cse820 lec 2 - introduction

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CSE820 Lec 2 - Introduction. Rich Enbody Based on slides by David Patterson. Review from last lecture. Computer Architecture >> instruction sets Computer Architecture skill sets are different 5 Quantitative principles of design Quantitative approach to design - PowerPoint PPT Presentation

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  • CSE820 Lec 2 - Introduction

    Rich EnbodyBased on slides by David Patterson

    CS252-s06, Lec 02-intro

  • Review from last lectureComputer Architecture >> instruction setsComputer Architecture skill sets are different 5 Quantitative principles of designQuantitative approach to designSolid interfaces that really workTechnology tracking and anticipationCS 252 to learn new skills, transition to researchComputer Science at the crossroads from sequential to parallel computingSalvation requires innovation in many fields, including computer architectureRAMP is interesting and timely CS 252 project opportunity given CS is at the crossroads

    CS252-s06, Lec 02-intro

  • Review: Computer Architecture bringsOther fields often borrow ideas from architectureQuantitative Principles of DesignTake Advantage of ParallelismPrinciple of LocalityFocus on the Common CaseAmdahls LawThe Processor Performance EquationCareful, quantitative comparisonsDefine, quantity, and summarize relative performanceDefine and quantity relative costDefine and quantity dependabilityDefine and quantity powerCulture of anticipating and exploiting advances in technologyCulture of well-defined interfaces that are carefully implemented and thoroughly checked

    CS252-s06, Lec 02-intro

  • OutlineReviewTechnology Trends: Culture of tracking, anticipating and exploiting advances in technologyCareful, quantitative comparisons:Define, quantity, and summarize relative performanceDefine and quantity relative costDefine and quantity dependabilityDefine and quantity power

    CS252-s06, Lec 02-intro

  • Moores Law: 2X transistors / yearCramming More Components onto Integrated CircuitsGordon Moore, Electronics, 1965# on transistors / cost-effective integrated circuit double every N months (12 N 24)

    CS252-s06, Lec 02-intro

  • Tracking Technology Performance TrendsDrill down into 4 technologies:Disks, Memory, Network, Processors Compare ~1980 Archaic (Nostalgic) vs. ~2000 Modern (Newfangled)Performance Milestones in each technologyCompare for Bandwidth vs. Latency improvements in performance over timeBandwidth: number of events per unit timeE.g., M bits / second over network, M bytes / second from diskLatency: elapsed time for a single event E.g., one-way network delay in microseconds, average disk access time in milliseconds

    CS252-s06, Lec 02-intro

  • Disks: Archaic(Nostalgic) v. Modern(Newfangled)CDC Wren I, 19833600 RPM0.03 GBytes capacityTracks/Inch: 800 Bits/Inch: 9550 Three 5.25 platters Bandwidth: 0.6 MBytes/secLatency: 48.3 msCache: noneSeagate 373453, 200315000 RPM (4X)73.4 GBytes (2500X)Tracks/Inch: 64000 (80X)Bits/Inch: 533,000 (60X)Four 2.5 platters (in 3.5 form factor)Bandwidth: 86 MBytes/sec (140X)Latency: 5.7 ms (8X)Cache: 8 MBytes

    CS252-s06, Lec 02-intro

  • Latency Lags Bandwidth (for last ~20 years)Performance Milestones

    Disk: 3600, 5400, 7200, 10000, 15000 RPM (8x, 143x)

    (latency = simple operation w/o contentionBW = best-case)

    CS252-s06, Lec 02-intro

    Chart1

    11

    7.04100

    14.4

    38.4

    137.6

    Disk

    (Latency improvement = Bandwidth improvement)

    Relative Latency Improvement

    Relative BW Improvement

    Sheet5

    Sheet5

    1111

    3107.04100

    1210014.4

    20100038.4

    48137.6

    120

    Memory

    Network

    Disk

    (Latency improvement = Bandwidth improvement)

    Relative Latency Improvement

    Relative BW Improvement

    Sheet6

    111

    37.04100

    1214.4

    2038.4

    48137.6

    120

    Memory

    Disk

    (Latency improvement = Bandwidth improvement)

    Relative Latency Improvement

    Relative BW Improvement

    Generation 2

    11

    7.04100

    14.4

    38.4

    137.6

    Disk

    (Latency improvement = Bandwidth improvement)

    Relative Latency Improvement

    Relative BW Improvement

    Disk

    11111

    33107.04100

    12.51210014.4

    6620100038.4

    30048137.6

    2250120

    Processor

    Memory

    Network

    Disk

    (Latency improvement = Bandwidth improvement)

    Bandwidth improvement

    Relative Latency Improvement

    Relative BW Improvement

    Generation Table

    CDC Wren ISeagate 373453

    1983200330008037.5150012.5120.0

    3600 RPM15000 RPM3600150004.26400080080.0

    0.03 GBytes capacity73.4 GBytes capacity0.0373.42,447533,0009,55055.8

    Three 5.25 plattersFour 2.5 platters204355.8

    Bandwidth:(in 3.5 form factor)217474.6300019015.8

    0.6 MBytes/secBandwidth:423666.4

    Latency: 48.3 ms86 MBytes/sec0.68614342000134313.4

    Cache: noneLatency: 5.7 ms48.35.78.550.1338.5

    0.33770.1353.8

    DRAMIntel 80286, 12.5 MHzIntel Pentium 4,1500 MHz

    (asynchronous)Double Data Rate Synchr. (clocked) DRAM19822001

    Year: 1980Year: 20002 MIPS (peak)4500 MIPS (peak)245002,250.0

    0.06 Mbits/chip256.00 Mbits/chip0.06252564,096.0Latency 320 nsLatency 15 ns3201521.30.14

    655362684354564,096.0472174.6

    16-bit data bus per module64-bit data bus per Dual Inline Memory Module (DIMM)16644.0684236.2

    13 Mbytes/sec1600 Mbytes/sec131600123.1

    Latency: 225 nsLatency: 52 ns225524.3

    Block transfers (page mode)

    Generation Table

    11111

    33107.04100

    12.51210014.4

    6620100038.4

    30048137.6

    2250120

    Processor

    Memory

    Network

    Disk

    (Latency improvement = Bandwidth improvement)

    Bandwidth improvement

    Relative Latency Improvement

    Relative BW Improvement

    Generations

    1111

    3107.04100

    1210014.4

    20100038.4

    48137.6

    120

    Memory

    Network

    Disk

    (Latency improvement = Bandwidth improvement)

    Relative Latency Improvement

    Relative BW Improvement

    Sheet4

    111

    37.04100

    1214.4

    2038.4

    48137.6

    120

    Memory

    Disk

    (Latency improvement = Bandwidth improvement)

    Relative Latency Improvement

    Relative BW Improvement

    Sheet1

    11

    7.04100

    14.4

    38.4

    137.6

    Disk

    (Latency improvement = Bandwidth improvement)

    Relative Latency Improvement

    Relative BW Improvement

    Sheet2

    Milestone123456

    Microprocessor16-bit address/bus, microcoded32-bit address/bus, microcoded5-stage pipeline, on-chip I & D caches, FPU2-way superscalar, 64-bit busOut-of-Order, 3-way superscalarSuperpipelined, integrated L2 cache

    ProductIntel 80286Intel 80286Intel 80486Intel PentiumIntel Pentium ProIntel Pentium 4

    Year19821985198919931997200134444

    Latency (clocks)65551022

    Bus width (bits)16 bits32 bits32 bits64 bits64 bits64 bits

    Clock rate (MHz)12.51625662001500

    Bandwidth (MIPS)26251326004500

    Latency (ns)320313200765015

    Memory ModuleDRAMPage Mode DRAMFast Page Mode DRAMFast Page Mode DRAMSynchronous DRAMDouble Data Rate DRAM

    Module width16 bits16 bits32 bits64 bits64 bits64 bits

    Year19801983198619931997200033743

    Mbit/DRAM chip0.060.2511664256

    Bandwidth (MB/s)13401602676401,600

    Latency (ns)225170125756252

    Local Area NetworkEthernetFast EthernetGigabit Ethernet10 Gigabit Ethernet

    IEEE Standard802.3802.3u802.3ab802.3ae

    Year19781995199920031744

    Link speed (Mb/s)10100100010000

    Bandwidth (Mb/s)10100100010000

    100023015080

    Hard Disk3600 RPM5400 RPM7200 RPM10000 RPM15000 RPM150751150

    ProductFujitsu 2351A?Seagate ST41600Seagate ST15150Seagate ST39102Seagate ST373307

    Year1982?19901994199820038445

    Capacity0.4 Gbytes?1.4 Gbytes4.3 Gbytes9.1 Gbytes73.4 Gbytes

    Disk diameter14 inch?5.25 inch3.5 inch3.5 inch3.5 inch

    Interface?SCSISCSISCSISCSI

    Bandwidth (MB/s)2492486

    Latency (ms)35.617.112.78.85.7

    Plot

    Microprocessor16-bit address/bus, microcoded32-bit address/bus, microcoded5-stage pipeline, on-chip I & D caches, FPU2-way superscalar, 64-bit busOut-of-Order, 3-way superscalarSuperpipelined, integrated L2 cache

    Generation123456

    Bandwidth improvement1313663002,250

    Latency improvement1124622

    Bandwidth improvement13122048120

    Latency improvement112344

    Bandwidth improvement1101001,0000.0

    Latency improvement147130.0

    Bandwidth improvement1251345

    Latency improvement12346

    Latency improvement1124622

    Bandwidth improvement1313663002,250

    Latency improvement1.01.31.83.03.64.3

    Bandwidth improvement13122048120

    Latency improvement147130.0

    Bandwidth improvement1101001,0000.0

    Latency improvement12346.26.2

    Bandwidth improvement125134515000

    11003600

    11004.1666666667

    1.5

    6.25

    Capacity

    Disk00000

    Cap/BW improvement0.00.00.00.00.0

    DRAM141625610244096

    Cap/BW improvement1.001.331.3312.8021.3334.13

    Sheet2

    11111

    33107.04100

    12.51210014.4

    6620100038.4

    30048137.6

    2250120

    Microprocessor

    Memory

    Network

    Disk

    (Latency improvement = Bandwidth improvement)

    Bandwidth improvement

    Relative Latency Improvement

    Relative Bandwidth Improve-ment

    Sheet3

    11111

    33107.04100

    12.51210014.4

    6620100038.4

    30048137.6

    2250120

    Processor

    Memory

    Network

    Disk

    (Latency improvement = Bandwidth improvement)

    Bandwidth improvement

    Relative Latency Improvement

    Relative BW Improvement

    MPU

    83%% data of bits

    231Mbit/s

    DECRA81Fujitsu 2351A24.0846774194Mbyte/s

    198236

    Rotation3600RPM39613.7534562212

    Average seek28ms28186blocks/track

    MAX BW2.2MB/s1.993KB/track

    Capacity456MB4040.0ms/track

    SMD0.0MB/s

    14 inch50,400bytes per track