[email protected] computing systems: organization and design ee460/cs360/t425

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[email protected] 1 Computing Systems: Organization and Design EE460/CS360/T425

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Page 1: Ctalarico@ewu.edu1 Computing Systems: Organization and Design EE460/CS360/T425

[email protected] 1

Computing Systems: Organization and Design

EE460/CS360/T425

Page 2: Ctalarico@ewu.edu1 Computing Systems: Organization and Design EE460/CS360/T425

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Administrative Issues

Instructor: Claudio TALARICO

office location: Computer & Engineering Bldg., Room 336

office hours: M,W 10:00 am - 1:00 pm

phone: (509) 359 - 4780

e-mail: [email protected]

URL: http//www.ewu.edu/x30360.xml

Register ASAP to blackboard: http://blackboard.ewu.edu/

Page 3: Ctalarico@ewu.edu1 Computing Systems: Organization and Design EE460/CS360/T425

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Required Textbook

D.A. Patterson and J.L. Hennessy, Computer Organization and Design. The Hardware/Software Interface Morgan Kaufmann, 3/e, 2005

Page 4: Ctalarico@ewu.edu1 Computing Systems: Organization and Design EE460/CS360/T425

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Grading Policy

10 homework assignments 20% of the final grade

1 midterm exam20% of the final grade

1 comprehensive final exam20% of the final grade

1 final project40% of the final grade

Page 5: Ctalarico@ewu.edu1 Computing Systems: Organization and Design EE460/CS360/T425

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Grading PolicyPercentage Grade Letter

100 4.099 4.098 3.997 3.996 3.895 3.894 3.793 3.792 3.691 3.690 3.589 3.488 3.487 3.386 3.385 3.284 3.283 3.182 3.181 3.080 3.079 2.978 2.877 2.776 2.675 2.574 2.473 2.372 2.271 2.170 2.069 1.968 1.867 1.766 1.665 1.564 1.463 1.362 1.261 1.160 1.0

A

B

C

D

Page 6: Ctalarico@ewu.edu1 Computing Systems: Organization and Design EE460/CS360/T425

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Grading Policy

Late work will not be accepted !!!

Page 7: Ctalarico@ewu.edu1 Computing Systems: Organization and Design EE460/CS360/T425

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Course content

The computer’s components Assessing and understanding performance The ISA abstraction Basics of Digital Design and HDLs Designing the processor: datapath and control Enhancing performance with pipelining Memory hierarchy