Domain D5: VLSI DESIGN SEE

This domain covers projects in Analog VLSI Design using Cadence Virtuoso Tool , Digital VLSI design using Cadence NC-Sim, Xilinx (Synthesis only), Model-sim (For Simulation only) and its FPGA implementation.

lab facilities available: Cadence design System’s EDA tools : NC-Sim, Virtuoso(Schematic editor and Layout editor Both), RTL Synthesis , Xilinx ISE for synthesis and implementation on FPGA Kit.

Capstone projects that can be conducted Dissertation Topics and Desired AreasDesign and simulation of analog circuits using cadence virtuoso, analog design based on CMOS etc.

Papers based upon cadence virtuoso, analog and mixed signal design using neural networks, Mixed signal Processing( Memories, OTA, Image Processing)

Home Automation, Microcontroller based projects,Design using VHDL/VERILOG , implementation of HDLC, AMBA AHB BUS etc.

Any paper with communication or image processing algorithms and should have a scope for its Hardware implementation

Finger Print Monitoring, MEMS etc. MEMS biomedical Sensors, Bio SensorsFuzzy Logic, Optical Fiber Communication using VLSI and FPGA implementation etc.

Minimize temperature dependence of chromatic dispersion, Techniques for intelligent mirror, action and gesture recognition using sensors, improvement in arm movement in case of Robotics

Faculty in VLSI Domain:

Sr No

Name of Faculty B Id Area of Interest E mail Id

1 Mr Rajeev Patial 12301 Implementation of Communication and Signal processing (algorithms) using EDA Tools

Rajeev.kumar@lpu.co.in

2 Ms Kanika Saini 15300 Analog Projects using Virtuoso and Mixed Signals using Neural networks , CMOS

Kanika.15300@lpu.co.in

3 Ms Pawandeep kaur

12284 Mixed signal processing(MEMORIES, OTA, IMAGE Processing)

Pawandeep.12284@lpu.co.in

4 Ms Navjot Kaur 12695 Projects based on Microcontrollers, Home automation projects, Digital

Navjot.kaur@lpu.co.in

system Design using VHDL/Verilog

5 Mr Anil Chowdary

14892 Any VLSI Project Anil.14892@lpu.co.in

6 Ms Cherry Bhargav

12037 Fuzzy Logic and Optical fiber Communication using VLSI and FPGA implementation

Cherry.bhargava@lpu.co.in

7 Ms Ashima Rangbulla

14836 Embedded based , VLSI based , Memory Based Projects

Ashima.14836@lpu.co.in

8 Mr Jitender Singh Sengar

14779 VLSI and MEMS Jitendra.14779@lpu.co.in

9 Mr T Sampath 15504 MEMS, BIO-Medical Sensors Sampath.15504@lpu.co.in

10 Veerati Raju 14667 Analog VLSI design Using Virtuoso Tool(Schematic and Layout Editor)

Veerati.14667@lpu.co.in