d75p 34 computer architecture week 9 austin and the powers. © c nyssen/aberdeen college 2003 all...

21
D75P 34 Computer Architecture Week 9 Austin And The Powers. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated Austin Powers pictures © Bartertown.org, used with permission Lava lamp and Jukebox © Keyclip with non distribution licence Prepared 19/11/03

Upload: edwin-floyd

Post on 20-Jan-2016

215 views

Category:

Documents


0 download

TRANSCRIPT

Page 1: D75P 34 Computer Architecture Week 9 Austin And The Powers. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

D75P 34

Computer ArchitectureWeek 9

Austin And The Powers.

© C Nyssen/Aberdeen College 2003All images © C Nyssen/Aberdeen College except where statedAustin Powers pictures © Bartertown.org, used with permissionLava lamp and Jukebox © Keyclip with non distribution licencePrepared 19/11/03

Page 2: D75P 34 Computer Architecture Week 9 Austin And The Powers. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

Direct Memory Access is an i/o technique enabling high speed data transfers.

Data is passed between the device and the RAM without the intervention of the CPU.

As part of your assessment material, you will be required to draw a graph demonstrating the difference in performance between DMA-

enabled and Non-DMA devices.

Page 3: D75P 34 Computer Architecture Week 9 Austin And The Powers. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

When beginning the question, you must first establish which components are involved.

Where is the data coming from and going to?

If you have not been given a diagram, it’s helpful at this stage to draw your own….

Page 4: D75P 34 Computer Architecture Week 9 Austin And The Powers. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

The second stage is to establish the time proportions.

How long does the data spend passing through each component?

Assume for each second of this time, 0.2 seconds is used to transfer the data through the modem buffer and 0.2 seconds is used to transfer it to the hard drive. The remaining 0.6 seconds is spent in the CPU.

The time should add up to 100%!Mark the proportions on your diagram.

Page 5: D75P 34 Computer Architecture Week 9 Austin And The Powers. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

The next stage is to work out an appropriate transfer rate.Remember that these figures have to go onto a graph!

The file is 3.44 MB in size and takes 11.67 minutes to download, process and transfer to the hard drive.

You are required to draw a graph showing how many kilobytes of data can be downloaded and saved over a period of four seconds under the given conditions.

The question has given us the clue that We need to transfer the data scale to kilobytes We need to work out a rate per second

Page 6: D75P 34 Computer Architecture Week 9 Austin And The Powers. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

3.44 megabytes x 1024 = 3522.56 kilobytes

11.67 minutes x 60 = 700.2 seconds

3522.56 divided by 700.2 = 5.0307 kilobytes/sec. It is probably safe to disregard the .0307!

Our transfer rate, without DMA, is therefore 5 kb/sec.

Page 7: D75P 34 Computer Architecture Week 9 Austin And The Powers. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

Plotting this on a graph over a period of four seconds ….

Remember to make the graph slightly bigger than the question says.

This line should rise at a constant rate.It should also begin from the origin, or 0.

Page 8: D75P 34 Computer Architecture Week 9 Austin And The Powers. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

Remember when we set up the DMA transfer, we no longer count the time spent for the data to travel through the CPU.

This gives us the net effect of transferring the same amount of data in 4/10th of the time. We can discount the 6/10th CPU time.

Page 9: D75P 34 Computer Architecture Week 9 Austin And The Powers. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

Where our 5kb previously took 1 second, it now takes 0.4 second; 10kb takes 0.8 second, and so on.

Plotting this new line on the graph gives us this…

Page 10: D75P 34 Computer Architecture Week 9 Austin And The Powers. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

The second line will still rise at a constant rate, and still begin at the origin.

At the moment the transfer rate is still totally variable, depending on the amount of data passed.

We still have to add on the time spent setting up the DMAC!

Page 11: D75P 34 Computer Architecture Week 9 Austin And The Powers. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

The setting up of the DMAC takes 1/3rd of the time that was previously spent processing a seconds' worth of data through the CPU.

To calculate this amount of time, it is useful to consult the first diagram again…

For each second’s worth of transfer, the CPU requires 0.6 of that second.

1/3rd of this is 0.2 seconds (0r 200 milliseconds).

Page 12: D75P 34 Computer Architecture Week 9 Austin And The Powers. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

Remember that setting up the DMA transfer always takes the same amount of time, no matter how much data is being transferred.

Page 13: D75P 34 Computer Architecture Week 9 Austin And The Powers. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

We have to add the DMA setup time on to every single point on the second line.

This results in a vertical “shift” upwards by 0.2 second.This line will not start from the origin, but from 0.2 second.

This is because the DMAC will always take 0.2 seconds to set up, even if no data at all is being transferred!

Page 14: D75P 34 Computer Architecture Week 9 Austin And The Powers. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

Your graph should now look like this…

Page 15: D75P 34 Computer Architecture Week 9 Austin And The Powers. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

The last thing to consider is our measure of efficiency.

As we were asked to draw the graph spanning a period of 4 seconds, we will use this as a

measurement base.You are required to draw a graph showing how many kilobytes of data can be downloaded and saved over a period of four seconds under the given conditions.

Finally, assume that the initial transfer rate given represents the CPU working at 80% efficiency. Draw in a control line to show this, then use the control to estimate the maximum transfer rate where the computer is using the DMA controller.

Page 16: D75P 34 Computer Architecture Week 9 Austin And The Powers. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

If we are measuring data transfers over a fixed timescale, we can say that the system can transfer 4 seconds-worth of data at 80% efficiency in the given period.

Page 17: D75P 34 Computer Architecture Week 9 Austin And The Powers. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

If 4 seconds = 80%, how much time = 100%?

You can cross-multiply like this ….

4 ?----- = ----- which is the same thing as ….80 100

400----- which gives us 5 seconds.80

If the system was working at 100% efficiency, it could do 5 seconds worth of data in the given time period.

Page 18: D75P 34 Computer Architecture Week 9 Austin And The Powers. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

The final graph with both control lines.Note that the label on the Y-axis and the Graph Title have been changed to reflect the data that is being presented.

Page 19: D75P 34 Computer Architecture Week 9 Austin And The Powers. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

As a double-check (you don’t need to do this bit)…..

11.67 minutes x 0.4 (cutting out the CPU) is 4.67 minutes.

When working at full efficiency, it would be 100/80 = 1.25% faster.

       

4.67/1.25 = 3.74 minutes, or 3 minutes and 44 seconds.

We still have to add on the 0.2 second to set up the DMAC….

So the total time taken would be 3 minutes and 44.2 seconds!!!

Page 20: D75P 34 Computer Architecture Week 9 Austin And The Powers. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

Summary [1]

Draw a diagram of the components involved. Put the time breakdown on each component. Work out an appropriate transfer rate. Plot the no-DMA line on your graph. Work out a new rate not including the CPU time. Add this to the graph (this step is optional) Work out the DMA set-up time. Add this to the graph (this step is optional)

Page 21: D75P 34 Computer Architecture Week 9 Austin And The Powers. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

Summary [2]

Add this figure to every point on the DMA line (vertically shifts it by the setup amount).

Draw in the first “efficiency” line. Work out where the 100% efficiency line should

go, and draw that in too. Make sure your axes have appropriate labels and

scales. Finally, finish your graph with an appropriate title.