Lab1: Lab1: Modelsim Setup and Hello WorldModelsim Setup and Hello World

1. quartus_install.pdf, www.altera.com2. oem_tutor.pdf, ModelSim Tutorial

1. Make Sure your “Modelsim-Altera” ready2. Go through a tutorial example for RTL simulati

on with ModelSim

Lab1:Lab1:Basic Simulation FlowBasic Simulation Flow

ModelSim: a verification and simulation tool for ● VHDL, ● Verilog, ● SystemVerilog, ● SystemC,and mixed-language designs.

ModelSim RTL simulationModelSim RTL simulation

1. Create libraries.2. Map to libraries.3. Compile source code and testbenches.4. Load the design.5. Add design stimulus.6. View the simulation results.7. Advance the simulator

You already had practiced it at Lab1.

Start ModelSimStart ModelSim

● Verilog: Copy counter.v and tcounter.v files from /<install_dir>/examples/tutorials/verilog/basicSimulation to the new directory.

● Start ModelSimClick from your Desktop

Change FolderChange Folder

● Select File > Change Direc

tory and change to the directory you created.

C:\Altera\61C:\Altera\pjt\Lab1

Create the working library.Create the working library.

Select File > New > Library.OKdir work, file 『 _info 』

Library Windowmodelsim.ini

Create the working library.Create the working library.

Transcript window

Compile the designCompile the design

1. Select Compile > Compile

2. Select both counter.v tcounter.v modules

3. Compile, Done

View the compiled design unitsView the compiled design units

● Library window● click the ’+’ icon

next to the work library

Load DesignLoad Design

● Select Simulate -> Start Simulation● OK● ModelSim> vsim -t ns work.test_counter

Structure window Structure window (labeled sim) that displays thehierarchical structure of the design in simulation

Process and Object WindowProcess and Object Window

Run the SimulationRun the Simulation

● Select View > Waveor > view wave

● Resize or Move 『 Window 』 by mouse● right-click test_counter to open a popup co

ntext menu.Select Add > To Wave

Run the SimulationRun the Simulation

● Click Run Icon● Run up to 100 ns● VSIM> run 500● Run -All● Simulate ->Break

Waveform Display, Zoom-In OutWaveform Display, Zoom-In Out

Breakpoints and StepBreakpoints and Step

Open source file

Breakpoint set, hit Breakpoint set, hit

Goto line 36Double click

Right click

Restart the simulationClick ResetClick Run -allCheck Transcript and source Windowexamine data

Step RunStep Run

StepStep overRun

Simulate -> End Simulation

Where to get on-line help?Where to get on-line help?

AppendixAppendix

Lab1: design HierachicalLab1: design Hierachical

LM_LICENSE_FILELM_LICENSE_FILE

Lab1:Lab1:ModelSim-Altera License File in Vista ModelSim-Altera License File in Vista