d:documents and settingscyh

深圳市艾天半导体有限公司电话：0755-82566617 传真：0755-23919567

地址：深圳市福田区深南中路国际科技大厦2504

网址：www.itm-ic.com

Quality Management ITM Semiconductor

Rev. 08 [2012. 03. 16]

MP24AD

Contents

Battery Protect Solution IC

1. Features Page 1

2. Outline

3. Pin Assignment Page 3

4. Block Diagram Page 3

5. Absolute Maximum Rating Page 4

6. Electrical Characteristics Page 4

7. Measuring Circuit Page 9

8. Operation Page 10

1) Overcharge detector (VD1) Page 10

2) Overdischarge detector (VD2) Page 10

3) Discharge overcurrent detector, Short detector(VD3, Short Detector) Page 11

4) Charger overcurrent detector Page 11

5) Over voltage charger detector Page 12

9. Application Circuit Page 13

10. Timing Chart Page 14

11. Packing Spec Page 17

12. Package Description Page 19

13. Marking Contents Page 20


Rev. 08 [2012. 03. 16]

MP24AD

- 1 -

Features

1. The protection IC and The Dual-Nch MOSFET to use common Drain are integrated into

One-packaging IC.

2. Reduced Pin-Count by fully connecting internally.

3. Application Part

1) Protection IC

① Uses high withstand voltage CMOS process.

- The charger section can be connected up to absolute maximum rating 28V.

② Detection voltage precision

- Overcharge detection voltage

±25 (Ta=25), ±45 (Ta=-30~70)

- Overdischarge detection voltage

±70 (Ta=25), ±80 (Ta=-30~70)

- Discharging overcurrent detection voltage

±10 (Ta=25), ±20 (Ta=-30~70)

- Charging overcurrent detection voltage

±20 (Ta=25), ±40 (Ta=-30~70)

③ Built-in detection delay times

- Overcharge detection delay time

1.00±0.20s (Ta=25), 1.00[+0.50,－0.40]s (Ta=-30~70)

- Overdischarge detection delay time)

96.0±19.2 (Ta=25), 96.0[+48,－38.4] (Ta=-30~70)

- Discharging overcurrent detection delay time)

12.0±2.4 (Ta=25), 12.0[+6,－4.8] (Ta=-30~70)

- Charging overcurrent detection delay time)

6.0±1.2 (Ta=25), 6.0[+3.0,－2.4] (Ta=-30~70)

- Short detection delay time)

400[+160,－120] (Ta=25), 400[+400,－200] (Ta=-30~70)

④ With abnormal charger detection function

⑤ 0V charge function is allowed

⑥ Auto Wake-up function is allowed

2) FET

① Using advanced trench technology to provide excellent RDS(ON), low gate charge and

operation with gate voltage as low as 2.5V while retaining a 12V VGS(MAX).

② The protection for ESD

③ Common drain configuration

④ General characteristics

- VDS (V) = 24V

- ID (A) = 7A

- RSS(ON) < 45mΩ (VGS = 3.9V, ID = 5A)

- ESD Rating : 2000V HBM



Rev. 08 [2012. 03. 16]

MP24AD

- 2 -

Outline

This is a battery protect solution IC which is integrated with built-in the protection IC to use

a lithium ion/lithium polymer secondary batteries developed for 1-cell series and Dual-Nch

MOSFET. It functions to protect the battery by detecting overcharge, overdischarge, discharge

overcurrent, charge overcurrent and other abnormalities as turning off internal Nch MOSFET.

The protection IC is composed of four voltage detectors, short detection circuit, reference

voltage sources, oscillator, counter circuit and logical circuits.

The COUT pin (charge FET control pin) and DOUT pin (discharge FET control pin) outputs are

CMOS output, and can drive the internal Nch MOSFET directly. The COUT output becomes low

level after delay time fixed in the IC if overcharge is detected. The DOUT output becomes low

level after delay time fixed in the IC if overdischarge, discharge overcurrent or short is detected.

On overcharge state, if the VDD voltage is less than the overcharge release voltage, the

COUT output becomes high level after delay time fixed in the IC. On overdischarge state, if the

voltage of the battery rises more than the overdischarge detection voltage with connecting the

charger, the DOUT output becomes high level after delay time fixed in the IC. Charging current

can be supplied to the battery discharged up to 0V.

Once discharge overcurrent or short have been detected, if the state of discharge

overcurrent or short is released by opening the loads, the DOUT output becomes high level after

delay time fixed in the IC. On overdischarge state, the supply current is reduced as less as

possible. Once charge overcurrent has been detected, the state of charge overcurrent is

released by opening the charger and setting the load.



Rev. 08 [2012. 03. 16]

MP24AD

- 3 -

Pin Assignment

Block Diagram


1 N.C

2 Source 1(same as VSS)

3 Source 2

4 VDD

5 V―

6 Drain

[ Package: TEP-5L ]

<Top view>

1

2

5

3

4

<Bottom view>

6


Rev. 08 [2012. 03. 16]

MP24AD

- 4 -

Absolute Maximum Rating※ TOPR=25, Source1(VSS)=0V

Electrical Characteristics※ TOPR=25


Item Symbol Measure Condition Min. Typ. Max. Unit *1

Operating Input Voltage VDD1 VDD - VSS 1.5 - 10.0 V A

Minimum Operating Voltagefor 0V Charging

VST VDD－V-, VDD-VSS=0V - - 1.2 V A

COUT Pin Nch ON Voltage VOL1 IOL=30, VDD=4.5V - 0.4 0.5 V -

COUT Pin Pch ON Voltage VOH1 IOH=－30, VDD=3.9V 3.4 3.7 - V -

DOUT Pin Nch ON Voltage VOL2 IOL=30, VDD=2.0V - 0.2 0.5 V -

DOUT Pin Pch ON Voltage VOH2 IOL=－30, VDD=3.9V 3.4 3.7 - V -

Current Consumption IDD VDD=3.9V, V-=0V - 3.0 6.0 L

Current Consumption at Stand-By IS VDD=2.0V - - 0.5 L

Overcharge Detection Voltage VDET1 R1=1.0 4.200 4.225 4.250 V B

Overcharge Release Voltage VREL1 R1=1.0 3.985 4.025 4.065 V B

Overdischarge Detection Voltage VDET2 V-=0V, R1=1.0 2.430 2.500 2.570 V D

Overdischarge Release Voltage VREL2 R1=1.0 2.800 2.900 3.000 V D

Overdischarge Release Voltage 2 VREL2'Vchg=4.2V,

R1=1.0, R2=2.22.430 2.520 2.610 V D

Item Symbol Rating Unit

Supply Voltage VDD -0.3 ~ 12 V

V- Terminal Input Voltage V- VDD-28 ~ VDD+0.3 V

DS Terminal Input Voltage VDS VSS-0.3 ~ VDD+0.3 V

COUT Terminal Output Voltage VCOUT VDD-28 ~ VDD+0.3 V

DOUT Terminal Output Voltage VDOUT VSS-0.3 ~ VDD+0.3 V

Operation Temperature TOPR -40 ~ +85

Storage Temperature TSTG -55 ~ +125

Drain-Source Voltage VDS 24 V

Gate-Source Voltage VGS ±12 V


Rev. 08 [2012. 03. 16]

MP24AD

- 5 -

※ TOPR=25

Note : *1 The test circuit symbols.

*2 The parameter is guaranteed by design.



Discharging OvercurrentDetection Voltage

VDET3 VDD=3.0V, R2=2.2 0.140 0.150 0.160 V F

Charging OvercurrentDetection Voltage

VDET4 VDD=3.5V, R2=2.2 -0.170 -0.150 -0.130 V G

Short Detection Voltage VSHORT VDD=3.0V 0.80 0.90 1.00 V F

Overcharge Detection Delay Time tVDET1 VDD=3.6V→4.6V 0.80 1.00 1.20 s B

Overcharge Release Delay Time tVREL1 VDD=4.6V→3.6V 1.6 2.0 2.4 B

Overdischarge DetectionDelay Time

tVDET2 VDD=3.6V→2.2V 76.8 96.0 115.2 D

Overdischarge ReleaseDelay Time

tVREL2 VDD=2.2V→3.6V 3.2 4.0 4.8 E

Discharging OvercurrentDetection Delay Time

tVDET3 VDD=3.0V, V-=0V→1V 9.6 12.0 14.4 F

Discharging OvercurrentRelease Delay Time

tVREL3 VDD=3.0V, V-=3V→0V 3.2 4.0 4.8 F

Charging OvercurrentDetection Delay Time

tVDET4 VDD=3.5V, V-=0V→-1V 4.8 6.0 7.2 G

Charging OvercurrentRelease Delay Time

tVREL4 VDD=3.5V, V-=-1V→0V 3.2 4.0 4.8 G

Short Detection Delay Time tSHORT VDD=3.0V, V-=0V→3.0V 280 400 560 F

Over Voltage ChargerDetection Voltage

Vchg1 VDD=3.6V, R2=2.2 6.0 8.0 10.0 V A

Over Voltage ChargerRelease Voltage

Vchg2 VDD=3.6V, R2=2.2 5.3 7.3 9.3 V A

Drain-Source Breakdown Voltage BVDSS ID=250, VGS=0V 24 - - V

Zero Gate Voltage Drain Current IDSS

VDS=20V, VGS=0V - - 1

TJ=55 - - 5

Gate-Body Leakage Current IGSS VDS=0V, VGS=±10V - - 10

Gate-Source Breakdown Voltage BVGSO VDS=0V, IG=±250 ±12 - - V

Gate Threshold Voltage VGS(th) VDS=VGS, ID=250 0.6 1.0 1.5 V

Static Source-SourceON-Resistance

RSS(ON)

VGS=4.5V, ID=5A 30 35 44 mΩ

VGS=4.2V, ID=5A 30.5 35.5 44.5 mΩ

VGS=3.9V, ID=5A 31 36 45 mΩ

VGS=3.7V, ID=5A 31.5 36.5 45.5 mΩ

VGS=3.5V, ID=5A 32.5 37.5 46.5 mΩ

VGS=3.0V, ID=5A 34 40 50 mΩ

VGS=2.5V, ID=3A 40 50 62 mΩ

Diode Forward Voltage VSD IS=1A, VGS=0V 0.50 0.69 0.90 V

Maximum Body-DiodeContinuous Current

IS 4.5 A


Rev. 08 [2012. 03. 16]

MP24AD

- 6 -

※ TOPR=-30~70 *2



1) Discharge / Charge Overcurrent Characteristics ※ TOPR=25

Note : The parameter is guaranteed by design, not tested in production.



Overcharge Detection Voltage VDET1 R1=1.0 4.180 4.225 4.270 V B

Overcharge Release Voltage VREL1 R1=1.0 3.955 4.025 4.095 V B

Overdischarge Detection Voltage VDET2 V-=0V, R1=1.0 2.420 2.500 2.580 V D

Overdischarge Release Voltage VREL2 R1=1.0 2.790 2.900 3.010 V D

Discharging OvercurrentDetection Voltage

VDET3 VDD=3.0V, R2=2.2 0.130 0.150 0.170 V F

Charging OvercurrentDetection Voltage

VDET4 VDD=3.5V, R2=2.2 -0.190 -0.150 -0.110 V G

Short Detection Voltage VSHORT VDD=3.0V 0.70 0.90 1.10 V F

Overcharge Detection Delay Time tVDET1 VDD=3.6V→4.6V 0.60 1.00 1.50 s B

Overcharge Release Delay Time tVREL1 VDD=4.6V→3.6V 1.2 2.0 3.0 B

Overdischarge DetectionDelay Time

tVDET2 VDD=3.6V→2.2V 57.6 96.0 144.0 D

Overdischarge ReleaseDelay Time

tVREL2 VDD=2.2V→3.6V 2.4 4.0 6.0 E

Discharging OvercurrentDetection Delay Time

tVDET3 VDD=3.0V, V-=0V→1.0V 7.2 12.0 18.0 F

Discharging OvercurrentRelease Delay Time

tVREL3 VDD=3.0V, V-=3V→0V 2.4 4.0 6.0 F

Charging OvercurrentDetection Delay Time

tVDET4 VDD=3.5V, V-=0V→-1V 3.6 6.0 9.0 G

Charging OvercurrentRelease Delay Time

tVREL4 VDD=3.5V, V-=-1V→0V 2.4 4.0 6.0 G

Short Detection Delay Time tSHORT VDD=3.0V, V-=0V→3.0V 200 400 800 F

Over Voltage ChargerDetection Voltage

Vchg1 VDD=3.6V, R2=2.2 6.0 8.0 10.0 V A

Over Voltage ChargerRelease Voltage

Vchg2 VDD=3.6V, R2=2.2 5.3 7.3 9.3 V A


Discharging overcurrentdetection Current

IDET3(1) VDD=4.2V 3.15 4.35 5.25 A

IDET3(2) VDD=3.9V 3.11 4.20 5.16 A

IDET3(3) VDD=3.7V 3.08 4.10 5.08 A

IDET3(4) VDD=3.5V 3.01 4.00 4.92 A

IDET3(5) VDD=3.0V 2.80 3.60 4.71 A

Charging OvercurrentDetection Current

IDET4(1) VDD=4.2V 2.92 4.35 5.57 A

IDET4(2) VDD=3.9V 2.89 4.20 5.48 A

IDET4(3) VDD=3.7V 2.86 4.10 5.40 A

IDET4(4) VDD=3.5V 2.80 4.00 5.23 A

IDET4(5) VDD=3.0V 2.60 3.60 5.00 A


Rev. 08 [2012. 03. 16]

MP24AD

- 7 -





Rev. 08 [2012. 03. 16]

MP24AD

- 8 -



Rev. 08 [2012. 03. 16]

MP24AD

- 9 -

Measuring Circuit


VDD

V－

Source1 (VSS) Source2

VV

VA

V

A

V

VDD

V－


V

VDD

V－


V

VDD

V－


V

VDD

V－


V

VDD

V－


V

VDD

V－


V

VDD

V－


A. E.

B.

C.

D.

F.

G.

H.

V

V

TP

TP

TP TP

TP

TP

TP TP


Rev. 08 [2012. 03. 16]

MP24AD

- 10 -

Operation1. Overcharge detector (VD1)

The VD1 monitors VDD pin voltage during charge. In the state of charging the battery, it

will detect the overcharge state of the battery if the VDD terminal voltage becomes higher

than the overcharge detection voltage(Typ. 4.225V). And then the COUT terminal turns to low

level, so the internal charging control Nch MOSFET turns OFF and it forbids to charge the

battery.

After detecting overcharge, it will release the overcharge state if the VDD terminal voltage

becomes lower than the overcharge release voltage(Typ.4.025V). And then the COUT terminal

turns to high level, so the internal charging control Nch MOSFET turns ON, and it accepts

to charge the battery.

When the VDD terminal voltage is higher than the overcharge detection voltage, to disconnect

the charger and connect the load, leave the COUT terminal low level, but it accepts to conduct

load current via the paracitical body diode of the internal Nch MOSFET. And then if the

VDD terminal voltage becomes lower than the overcharge detection voltage, the COUT terminal

turns to high level, so the internal Nch MOSFET turn ON, and it accepts to charge the battery.

The overcharge detection and release have delay time decided internally. When the VDD

terminal voltage becomes higher than the overcharge detection voltage, if the VDD terminal

voltage becomes lower than the overcharge detection voltage again within the overcharge

detection delay time(Typ. 1.00s), it will not detect overcharge. And in the state of overcharge,

when the VDD terminal voltage becomes lower than the overcharge release voltage, if the

VDD terminal voltage backs higher than the overcharge release voltage again within the

overcharge release delay time(Typ. 2ms), it will not release overcharge.

The output driver stage of the COUT terminal includes a level shifter, so it will output the

V- terminal voltage as low level. The output type of the COUT terminal is CMOS output

between VDD and V- terminal voltage.

2. Overdischarge detector (VD2)

The VD2 monitors VDD pin voltage during discharge. In the state of discharging the battery,

it will detect the overdischarge state of the battery if the VDD terminal becomes lower than

the overdischarge detection voltage (Typ. 2.500V). And then the DOUT terminal turns to low

level, so the internal discharging control Nch MOSFET turn OFF and it forbids to discharge

the battery.

Once overdischarge has been detected, overdischarge is released and the DOUT output

becomes high level, if the voltage of the battery rises more than the overdischarge

detection voltage with connecting the charger, or more than the overdischarge release

voltage without connecting the charger. Charging current is supplied through a parasitic

diode of Nch MOS FET when the VDD terminal voltage is below the overdischarge detection

voltage to the connection of the charger, and the DOUT terminal enters the state which can

be discharged by becoming high level,and turning on Nch MOS FET when the VDD terminal

voltage rises more than the overdischarge detection voltage.



Rev. 08 [2012. 03. 16]

MP24AD

- 11 -

When the battery voltage is about 0V, if the charger voltage is higher than the minimum

operating voltage for 0V charging (Max. 1.2V), the COUT terminal outputs high level and it

accepts to conduct charging current.

The overdischarge detection have delay time decided internally. When the VDD terminal

voltage becomes lower than the overdischarge detection voltage, if the VDD terminal voltage

becomes higher than the overdischarge detection voltage again within the overdischarge

detection delay time (Typ. 96ms), it will not detect overdischarge. Moreover, the overdischarge

release delay time (Typ. 4ms) exists, too.

All the circuits are stopped, and after the overdischarge is detected, it is assumed the

state of the standby, and decreases the current (standby current) which IC consumes as

much as possible. (When VDD=2V, Max. 0.5uA).

The output type of the DOUT terminal is CMOS output between VDD and VSS terminal voltage.

3. Discharge overcurrent detector, Short detector (VD3, Short Detector)

In the state of chargable and dischargabe, VD3 monitors the voltage level of V- pin. If

the V- terminal voltage becomes higher than the discharging overcurrent detection voltage

(Typ. 0.150V) by short of loads, etc., it will detect discharging overcurrent state. If the V-

terminal voltage becomes higher then short detection voltage (Typ. 0.9V), it will detect

discharging overcurrent state, too. And then the DOUT terminal outputs low level, so the internal

discharging control Nch MOSFET turns OFF, and it protects from large current discharging.

The discharging overcurrent detection has delay time decided internally. When the V- terminal

voltage becomes higher than the discharging overcurrent detection voltage, if the V- terminal

voltage becomes lower than the discharging overcurrent detection voltage within the discharging

overcurrent detection delay time (Typ. 12ms), it will not detect discharging overcurrent.

Morever, the discharging overcurrent release delay time (Typ. 4ms) exists, too.

The short detection delay time (Typ. 400us) decided internally exists, too.

The discharging overcurrent release resistance is built into between V- terminal and

VSS terminal. In the state of discharging overcurrent or short, if the load is opened,

V- terminal is pulled down to the VSS via the discharging overcurrent release resistance.

And when the V- terminal voltage becomes lower than the discharging overcurrent detection

voltage, it will automatically release discahrging overcurrent or short state. if discharging

overcurrent or short is detected, the discharging overcurrent release resistance turns ON.

On the normal state (chargable and dischargable state), the discharging overcurrent release

resistance is OFF.

4. Charge overcurrent detector (VD4)

In the state of chargable and dischargable, VD4 monitors the voltage level of V- pin. If

the V- terminal voltage becomes lower than charging overcurrent detection voltage (Typ. -0.150V)

by abnormal voltage or current charger, etc., it will detect charging overcurrent state. And

then the COUT terminal outputs low level, so the internal charging control Nch MOSFET turn

OFF, and it protects from large current charging.

It release charging overcurrent state if the abnormal charger is disconnected and the

load is connected.



Rev. 08 [2012. 03. 16]

MP24AD

- 12 -

The charging overcurrent detection has delay time decided internally. When the V-

terminal voltage becomes lower than the charging overcurrent detection voltage, if the V-

terminal voltage becomes higher than the charging overcurrent detection voltage within the

charging overcurrent detection delay time (Typ. 6ms), it will not detect charging overcurrent.

Morever, the charging overcurrent release delay time (Typ. 4ms) exists, too.

5. Over voltage charger detector

By monitoring charger voltage between VDD terminal and V- terminal, and when the voltage

becomes higher than over voltage charger detection voltage, COUT output becomes

low level and internal Nch MOSFET is turned to OFF. And when the voltage becomes lower

than over voltage charger release voltage, COUT output becomes high level and

internal Nch MOSFET is turned to ON. Please note that the larger value of R2, the larger

detection voltage.

There is no delay time of detection and release for this function.



Rev. 08 [2012. 03. 16]

MP24AD

- 13 -

Application Circuit (Example)

※ Application Hint

R1 and C1 stabilize a supply voltage ripple. However, the detection voltage rises by the

current of penetration in IC of the voltage detection when R1 is enlarged, so the value of

R1 is adjusted to 1kohm or less. Moreover, adjust the value of C1 to 0.01uF or more to

do the stability operation, please.

R1 and R2 resistors are current limit resistance if a charger is connected reversibly or a

highvoltage charger that exceeds the absolute maximum rating is connected. R1 and R2

may cause a power consumption will be over rating of power dissipation, therefore the

`R1+R2` should be more than 1kohm. Moreover, if R2 is too enlarged, the charger

connection release cannot be occasionally done after the overdischarge is detected, so

adjust the value of R2 to 10kohm or less, please.

C2 and C3 capacitors have effect that the system stability about voltage ripple or

imported noise. After check characteristics, decide that these capacitors should be inserted

or not, where should be inserted, and capacitance value, please.


P+

P-


Rev. 08 [2012. 03. 16]

MP24AD

- 14 -

Timing Chart

1. Overcharge, Charging overcurrent operations


VDD

V-

COUT

ICHARGE

IDISCHARGE

t

t

t

t

Connect Charger Connect ChargerConnect Load

Connect Load

OvercurrentCharger

VDET1

VDD

VDET3VSS

VDD

0

tVDET1 tVDET1

tVREL1tVREL1

V-

Open Charger,Connect Load

VDET4

tVDET4

tVREL4

VREL1


Rev. 08 [2012. 03. 16]

MP24AD

- 15 -

2. Overcharge, Overvoltage charger operations


VDD

V-

COUT

ICHARGE

IDISCHARGE

t

t

t

t

Connect Charger Connect ChargerConnect Load

Connect Load

OpenLoad

VDET1

VDD

VDET3VSS

VDD

0

tVDET1 tVDET1

tVREL1tVREL1

V-

ConnectOver Voltage

Charger

VREL1

OpenCharger


Rev. 08 [2012. 03. 16]

MP24AD

- 16 -

3. Overdischarge, Discharging Overcurrent and Short operations


VDD

V-

DOUT

ICHARGE

IDISCHARGE

t

t

t

t

Connect Load ConnectCharger

VDET2

VDD

VDET3VSS

VDD

0

tVDET2 tVDET2 tVDET3

tVREL2 tVREL2 tVREL3

VSHORT

Connect Load ConnectCharger

Open Short Open

Overcurrent

tVREL3

tSHORT

V-

VREL2


Rev. 08 [2012. 03. 16]

MP24AD

- 17 -


LABEL

REEL LABEL

▷ Taping spec

▷ Carrier tape spec

▷ Reel spec

Packing spec


Rev. 08 [2012. 03. 16]

MP24AD

- 18 -


Tape Reel

Anti-static bag

packing

Inner box

Out box

▷ OUTER BOX PACKING SPECIFICATION

OUT BOX LABEL


Rev. 08 [2012. 03. 16]

MP24AD

- 19 -

Package Description

Recommend Land Pattern (time shear)


D1

A

0.1

27±

0.0

08

e

θ

TOP VIEW

FRONT VIEW

BTM VIEW

SIDE VIEW

DETAIL X (3:1)

E1E

A1

A2

BURR SIDE

L

e1

SEATING PLANE

bX

EXPOSED PAD

D3

E2

0.355 REF.

0.200

0.963 REF.

1.150 REF.

X 4 REF.

1.5

3REF.

0.4REF.

1.015 REF.

0.3

0 M

AX.

D

NOTE

1. LEAD BURR : VERTICAL MAX 0.025 HORIZONTAL MAX 0.025 BURR SIDE : ALL TOP SIDE 2. MOLD BURR & FLASH : PACKAGE OUT LINE BURR MAX 0.100 EXPOSED PAD FLASH MAX 0.2003. PACKAGE WARPAGE MAX 0.0254. LEAD AND EXPOSED PAD PLATING : PURE TIN THICKNESS> 7.62~25.4um

SYMBOLMIN. NOM. MAX.

NOTE

A

DIMENSIONS

0.750 0.800 0.850

A1 0.623 0.673 0.723

A2 0.050

D 6.000

D1 5.320 5.370 5.420

D3 2.220 REF.

E 2.100

E1 1.950 2.000 2.050

E2 1.330

θ 10 °

e 0.650

e1 1.300

L 0.350

b 0.255 0.300 0.390

REF.

- -

- -

BSC

BSC

- -

6.1005.900

2.2002.000

[mm]


Rev. 08 [2012. 03. 16]

MP24AD

- 20 -

Marking Contents


Indicate 1'st Pin

Lot Code.

Manufacturing week

Manufacturing year

Model No.

ABCDEFMP24AD

Assembly Location

d:documents and settingscyh

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