decoder hoping code

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2011 Microchip Technology Inc. DS00663C-page 1

OVERVIEW

This application note fully describes the working of acode hopping decoder implemented on a MicrochipPIC16C54 microcontroller. The PIC16C54 is smallerthan the PIC16C56 used in the normal decoder(AN642) or the secure learn decoder (AN652). A sim-plified learning scheme with all encoders sharing acommon key and a simplified counter synchronizationscheme has been used to reduce the code space

requirements. The use of a common key reduces thesecurity of the system. The simple decoder can learnup to 15 encoders. This application note describes thevarious KEELOQcode hopping encoders that can beused with the decoder, the decoder hardware, and thevarious software modules comprising the system. Thesoftware can be used to implement a stand alonedecoder or integrated with full function security sys-tems. The decoder supports the Microchip HCS200,HCS300, HCS301, HCS360, HCS361 and HCS410KEELOQ Code Hopping Encoders.

Author: Steven DawsonMicrochip Technology Inc.

KEY FEATURES

PIC16C54 Stand alone decoder Compatible with Microchip HCS200, HCS300,

HCS301, HCS360, HCS361 and HCS410encoders

Automatic bit rate detection Automatic encoder type detection Four function outputs Up to 15 learnable transmitters RC Oscillator Single press learn

FIGURE 1: PIC16C54 DECODER

18

17

16

15

14

13

12

11

10

LEARN INIT

LEARN IND

Vcc

MCLR

1

2

3

4

GND

S0

S1

RFIN

NC

OSC OUT

OSC IN

Vcc

NC

EE CS

S2 EE CK

S3

5

6

7

8

9 EE DIO

PIC16C54

SimpleDecoder

AN663KEELOQ Simple Code Hopping Decoder

Notice:

This is a non-restricted version of Application Note AN659 which is available under the KEELOQ

License Agreement. The license agreement can be ordered from the Microchip Literature Center as

DS40149.


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AN663

DS00663C-page 2 2011 Microchip Technology Inc.

INTRODUCTION TO KEELOQENCODERS

All KEELOQ encoders use the KEELOQ code hoppingtechnology to make each transmission by an encoderunique. The encoder transmissions have two parts.The first part changes each time the encoder is acti-vated and is called the hopping code part and isencrypted. The second part is the unencrypted part ofthe transmission, principally containing the encodersserial number identifying it to a decoder. Refer toDS91002, Introduction to KEELOQ.

Hopping Code

The hopping code contains function information, a dis-crimination value, and a synchronization counter. Thisinformation is encrypted by an encryption algorithmbefore being transmitted. A 64-bit encryption key isused by the encryption algorithm. If one bit in the datathat is encrypted changes, the result is that an averageof half the bits in the output will change. As a result, thehopping code changes dramatically for each transmis-

sion and can not be predicted.

Function Information

The encoder transmits up to four bits of function infor-mation. Up to 15 different functions are available.

Discrimination Value

Stored in the encoder EEPROM, this information canbe used to check integrity of decryption operation by adecoder. If known information is inserted into the trans-mitted string before encryption, the same informationcan be used at the decoder to check whether the infor-mation has been decrypted correctly. In the MicrochipHCS encoders, up to 12 bits (including overflow bits)

are available.

Synchronization Counters

The transmitted word contains a 16-bit synchronizationcounter. The synchronization information is used at thedecoder to determine whether a transmission is valid oris a repetition of a previous transmission. Previouscodes are rejected to safeguard against code grabbers.The HCS300 and HCS301 encoders transmit two over-

flow bits which may be used to extend the range of thesynchronization counter from 65,536 to 196,608 buttonoperations. The HCS360 and HCS361 encoders trans-mit one overflow bit which can be used to extend therange of the synchronization counter from 65,536 to131,071 button operations.

Unencrypted Code

Serial Number

The encoders serial number is transmitted every timethe button is pressed. The serial number is transmittedunencrypted as part of the transmission and serves toidentify the encoder to the decoder.

Other Status and Function Information

The HCS200, HCS300, and HCS301 encoders includeprovision for four bits of function information and twostatus bits in the fixed code portion of its transmission.The two status bits indicate whether a repeated trans-mission is being sent, and whether the battery voltageis low. The HCS200 does not send repeated transmis-sion information, and the bit is permanently set to 0.

The HCS360/361 and HCS410 encoders transmit twobits that are used as a Cyclic Redundancy check.These bits can be used to check the integrity of thereception. Additionally, the HCS360, HCS361 andHCS410 encoders can extend the length of the serialnumber from 28 bits to 32 bits, replacing the unen-

crypted function code. The HCS410 also transmits 2queuing bits that can be used to detect multiplepresses of the same button combination.

Transmission Format Summary

Table 1 contains a summary of the information con-tained in transmissions from each of the KEELOQencoders that can be learned by the Microchipdecoder.


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FIGURE 2: DECODER BLOCK DIAGRAM

TABLE 1: KEELOQ ENCODER TRANSMISSION SUMMARY

HCS200/201

# of bits

HCS300/301

# of bits

HCS360/361

# of bits

HCS410

# of bits

Total Transmission Length 66 66 67 69

Code Hopping Portion 32 32 32 32

Sync Counter 16 16 16 16

Discrimination bits 12 10 8 10

User Bits 0 0 2 0

Overflow Bits 0 2 1 2

Independent Mode 0 0 1 0

Function Code 4 4 4 4

Fixed Portion 34 34 35 37

Serial number 28 28 28/32 28/32

Function Code 4 4 4/0 4/0

Low Voltage Indicator 1 1 1 1

Repeat Bit 1 1 0 0

CRC 0 0 2 2

Queue Bits 0 0 0 2

RF

Receiver RFIN

S0

S1S2S3

PIC16C54

EEPROMCSCLKDIO

Learn

Learn

Indication

Init


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AN663


TABLE 2: HCS200/201 AND HCS300/301 CODE HOPPING TRANSMISSION FORMAT

TABLE 3: HCS200/201 AND HCS300/301 SEED TRANSMISSION FORMAT

TABLE 4: HCS360/361 CODE HOPPING TRANSMISSION FORMAT

TABLE 5: HCS360/361 SEED TRANSMISSION FORMAT

TABLE 6: HCS410 CODE HOPPING TRANSMISSION FORMAT

TABLE 7: HCS410 SEED TRANSMISSION FORMAT

Code Hopping Portion Fixed Portion

Sync Counter Discrimination Func Serial Number Fund VLOW

REPT

Seed Portion Fixed Portion

Seed Serial Number Func VLOW

REPT


Sync Counter Discrimination

OVR, IND

Func Serial Number

(28/32 bits)

Func

(4/0

bits)

VLOW

REPT


Seed

(48 bits)

Serial Number

(12/16 MS bits)

Func

(4/0

bits)

VLOW

REPT


Sync Counter Discrimination

OVR

Func Serial Number

(28/32 bits)

Func

(4/0

bits)

VLOW

CRC

QUE


Seed

(60 bits)

Func

(4/0

bits)

VLOW

CRC

QUE


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AN663

PWM Format

In general, all KEELOQ encoders share a commontransmission format:

A preamble to improve biasing of decision thresholdsin super-regenerative receivers. The preamble con-sists of alternate on and off periods, each lasting aslong as a single elemental period.

A calibration header consisting of a low period of 10elemental periods. Calibration actions should be per-formed on the low period of the header to ensure cor-rect operation with header chopping.

A string of pulse-width modulated bits, each consistingof three elements. The first element is high, the secondcontains the data transmitted and is either high or low,the third element is always low.

A guard period is usually left between the transmis-sions. During this period nothing is transmitted by theencoder.

Figure 3 shows the sampling points when sampling thedata bits. The first and last elements are used exclu-sively to verify the integrity of the received symbol. Thefirst element (sample point A) is always high, the sec-ond (sample point B) is the complement of the data bitbeing sent, and the final element (sample point C) isalways low. Because the period between the low por-tion of a bit (sample point C) and the rising edge of the

following bit (sample point X) can vary, the rising edgeof the first element (sample point X) is used to resyn-chronize the receiving routine to each incoming bit.

If random noise is being received, the probability of aset of three samples producing a valid combination isonly 2-2 =1/4. For a string of 66 bits, the correspondingfigure is 2-134.

Integrity checking on incoming signals is important.Code hopping signals require significant processing,as well as EEPROM access, to decrypt. Unnecessaryprocessing can be avoided by not attempting to decryptincoming codes that have bit errors.

FIGURE 3: KEELOQ PWM TRANSMISSION FORMAT

2 te te 2 te 4 te

0

1

1 te 2 te te 5 te

Bit Format I Bit Format II Sampling Points

X A B C

Data

Microwire is registered trademark of Motorola.


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DECODER IMPLEMENTATION

The decoder is implemented on a PIC16C54 RISCmicrocontroller and a 93LC46B EEPROM as shown inthe decoder schematic in Figure 9. However, this solu-tion can be implemented in any PIC microcontrollerwith at least 500 words of program memory. The oper-ating frequency of the controller is 4 MHz. The micro-

controller is used to capture transmissions from thevarious encoders, decrypt transmissions captured, andcheck the validity of the transmission based on theinformation in the decrypted transmission and informa-tion stored in the EEPROM. If a transmission from avalid encoder is received, the decoder activates theoutputs dictated by the transmission.

Encoder information, such as serial number and syn-chronization information is stored externally in anEEPROM. The EEPROM used is a Microchip 93LC46BMicrowireSerial EEPROM. The information stored inthe EEPROM is encrypted to protect the contents. TheEEPROM encryption is less secure than the KEELOQ

code hopping algorithm.As can be seen from the section on encoder transmis-sions there are differences in the transmission formatsof the different encoders that can be used with thedecoder. The following section summarizes how thedifferences in transmitted data are dealt with by thedecoder.

As the serial number information follows after the codehopping portion of the transmission, any number ofserial number bits can be received and processed. Inthe Microchip decoder described, the complete serialnumber (28 bits) is stored.

After matching the received and stored serial number,validation of a received transmission consists of two

steps. The first includes checking the integrity of thedecryption operation. Here the decoder compares theleast significant 8-bits of the discrimination valuereceived with the least significant 8-bits of the serialnumber. The discrimination value stored with theHCS300/301/360/361 includes overflow bits and userbits.

The second portion of validation involves checking syn-

chronization information for that particular encoder.The synchronization counter transmitted by all encod-ers is 16 bits long. Two copies of the full synchroniza-tion counter are stored for all valid encoders. Thestoring of two copies of the synchronization informationprotects the decoder from loosing synchronization with

an encoder if one of the counters is corrupted.

TABLE 8: MICROCHIP DECODER FUNCTIONAL INPUTS AND OUTPUTS

Mnemonic Pin Number Input / Output Function

RF IN 18 I Demodulated PWM signal from RF receiver. The

decoder uses this input to receive encoder transmis-

sions.LEARN INIT 1 I Input to initiate learning, active low.

LEARN IND 2 O Output to show the status of the learn process (in an

integrated system this will be combined with the system

status indicator).

S0, S1, S2, S3 6, 7, 8, 9 O Function outputscorresponds to encoder input pins.


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PROGRAM FLOW

The software for the Microchip decoder has been writ-ten for the PIC16C54 microcontroller. The compilerused is MPASM version 01.30.01. The operating fre-quency of the PIC16C54 is 4 MHz. The clock speedshould be kept as close as possible to 4 MHz as thereception routine (RECEIVE) is dependent on the

4 MHz clock for correct functioning. Other decoderfunctions that rely on a 4 MHz clock speed are the holdtimes of the various outputs and time-outs. The mainprogram flow is described here. Detailed descriptionsof individual functions can be found further in the appli-cation note.

After startup, the encoder enters the main loop where itspends most of its time. The main loop checks to see ifthe learn button is being activated. If so, the decoderenters the learn mode described in the Learn inAN659.

If learn has not been initiated, the microcontrollerchecks for transmissions from encoders (RECEIVE). If a

transmission from an encoder has successfully beenreceived, the microcontroller validates the transmissionreceived as described in the Transmission Validationsection in AN659. If the transmission received is a validtransmission from an encoder learned into the system,the system sets the appropriate outputs (M_OUTPUT).

FIGURE 4: MICROCHIP DECODER MAIN

PROGRAM FLOW

Reset

RESET

Initialize Ports

Entry to MainLoop

M_LOOP

Handle TimerTST_TIMER

ReceivedTransmission?RECEIVE

TransmissionValidation

Learn RoutineYES

NO

NO

YES

Learnbutton

andVariables

Clearthe LED

pressed?

Update TimerTST_RTCC

LEARN


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FUNCTIONAL MODULES

Reception

The reception routine (RECEIVE) is based on a reliablealgorithm which has successfully been used in previ-ous implementations of KEELOQ decoders. Automaticbit rate detection is used to compensate for variations

in bit rate of different encoders of a specific type, aswell as the differences in bit rate between differentencoders (HCS200, HCS300, and HCS360). Thereception routine is able to receive 64-bit transmis-sions. This can easily be extended to receive more bits.The decoder only uses the first 60 bits received. Theremaining bits are ignored.

The reception algorithm performs a number of func-tions when an output is detected from the receiver.Figure 5 gives all the major sampling points in thereception algorithm.

The reception algorithm calibrates on the low period ofthe header to determine the actual elemental period forthe transmission being received. The required elemen-tal period is 10% of the low header period. In Figure 5the header calibration sample points are marked 1through 3. The calibration flow chart (Figure 6) showsat what points in the program samples 1, 2, and 3 aretaken.

Elemental periods outside the capture range of thealgorithm (either too long or too short) are rejected,since they are due either to noise or to reception of anincomplete signal.

Using the determined elemental period, three samplesafter the first rising edge (sample 3) following theheader are taken. The first sample is taken half an ele-mental period after the rising edge (Sample 4); the sec-

ond, one elemental period later (Sample 5), and thethird, another one elemental period later (Sample 6).The first sample must be high, the second could beeither high or low, and the third sample must be low. Ifeither the first or the third sample is not as expected,the attempt at capturing a transmission is abandoned.InFigure 5, the data sample points are points 4 through6. The flow chart describing data reception (Figure 7)shows where in the code the samples are taken.

If all 64 bits have been captured, each with the correctfirst and third elements, the transmission can beassumed to be correct, and decryption can commence.The receiving routine should be called often enough to

ensure that the high portion in the header is not missed(Sample 1, Figure 5).

FIGURE 5: SAMPLING POINTS USED IN

RECEIVE ALGORITHM

In systems where the reception routine is called tocheck if there is activity on the receiver input, the rou-tine should poll the input for a valid transmission for atleast the time taken to complete one transmission ifactivity is detected on the input line. This makes provi-sion for the reception routine being called while a trans-mission is in progress. Having missed the first header,the first transmission will be invalid and be discarded.The decoder should continue sampling the inputthrough the guard time in order to catch the nextheader and transmission (i.e., for a decoder designed

to capture HCS300 transmissions the time spent poll-ing for a valid transmission should be at least 100 ms ifactivity is detected in the input line).

Reception Algorithm Flow Chart

The flow chart inFigure 6describes the calibration rou-tine which is used to determine the actual transmissionrate of the encoder so that the decoder can compen-sate for deviations from nominal timing. There are fourdifferent exit points, each of which should branch to apoint in the program where housekeeping and inputmonitoring can be resumed. There is only one exit pointfor a valid calibration operation (RCV7). At this point, itis assumed that a valid header has been received and

that a string of data bits will follow.The second flow chart (Figure 7) handles the receptionof bits once the calibration routine has been success-fully completed. The data bits are all sampled threetimes each to ensure that a noise free transmission hasbeen received. The reception routine uses the cali-brated elemental period, determined in the calibrationroutine, to ensure that the samples are correctlyspaced. The routine resynchronizes itself on the risingflank of each bit. Only 60 bits of the data received areused by the decoder described, the decoder ignoresthe unencrypted function code and the status bits.

If the control samples in a given bit are sampled cor-rectly (i.e., the first element is high and the last elementis low), the routine checks whether 66 bits have beenreceived correctly. If not, the routine returns to the call-ing procedure.

1 2 3 4 5 6 7 4 5

Preamble Header Data


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FIGURE 6: CALIBRATION FLOW CHART

CalibrateRECEIVE

Input?

Reset Time-outCounter

Input?RCV1 Time-Out?

Invalid HeaderRMT_0

1

Clear CalibrationCounterRCV2

Input?RCV3

Too Long?RCV4

CalibrationCounter/10RCV6

Too Short?RCV6

Invalid HeaderRMT_0

Load Cal

CounterRCV7

Receive DataDL1

2

3

LOW

HIGH

NO

YES

HIGH

NO

LOW

HIGH

YES

YES

NO

LOW


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FIGURE 7: DATA RECEPTION FLOW CHART

Receive Data

RCV7

InputSAMPLE1

Wait Full BitPeriodDL2

InputSAMPLE2

Data = 1

Data = 0

Wait Full BitPeriod

DL3

Set Up DL1Timer

RCV11

InputRCV8/RCV9/

RVC10

Time-out?

InputSAMPLE3

Last Bit?

Received56 Bits?RMT01

CleanupRMT2

Invalid

Reception CompleteRMT1

3

4

5

6

7

HIGH

LOW

HIGH

LOW

LOW

HIGH

Wait Half BitPeriodDL1

HIGH

NO

YES

YES

NOLOW

NO

YES


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VALIDATION

SYNCHRONIZATION

FUNCTION INTERPRETATION

OUTPUT ACTIVATION

KEY GENERATION

DECRYPTION

LEARN

ROM MEMORY MAP

EEPROM MEMORY MAP

RAM MEMORY MAP

The confidential and proprietary information contained in this section of AN659 hasbeen removed. The full application note is available under a license agreement andcan be ordered as DS40149 from Microchip Technology Inc.


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AN663


DEVICE PINOUTS

The device used in the application note is a PIC16C54 PDIP or SOIC.

TABLE 9: DEVICE PINOUTS

TIMING PARAMETERS

TABLE 10: TIMING PARAMETERS

SOURCE CODE LISTING

A diskette is supplied containing source code for the Microchip decoder in the file SIMDEC**.ASM. The code has been

compiled using MPASM v01.30.01. Certain functions are dependent on the oscillator speed for correct functioning.Examples of time dependent functions include RECEIVE andTST_TIMER. The PIC16C54 Microcontroller should run at4 MHz.

TABLE 11: LIST OF IMPORTANT FUNCTIONS

PIN PIC16C54 Function Decoder Function PIN PIC16C54 Function Decoder Function

1 Port A Bit 2 LEARN Input 18 Port A Bit 1 RF Input

2 Port A Bit 3 LEARN Indicator 17 Port A Bit 0 Not used

3 TIMER0 Connect to VDD 16 Osc In RC osc (4 MHz)

4 MCLR Brown out detect 15 Osc Out

5 GND Ground 14 VDD +5V supply

6 Port B Bit 0 S0 13 Port B Bit 7 Not Used

7 Port B Bit 1 S1 12 Port B Bit 6 CS (93LC46B,

pin 1))

8 Port B Bit 2 S2 11 Port B Bit 5 CLK (93LC46B,

pin 2)

9 Port B Bit 3 S3 10 Port B Bit 4 DIO (93LC46B,

pin 3 & 4)

Parameter Typical Unit

Output activation duration 524 ms

Output pause if new function code received 131 ms

Erase all duration 8.4 s

Learn mode time-out 33.6 s

Learn failure LED on duration 1 s

Function Name Description

DECRYPT Decryption routine for Hop Code.

EEREAD The data in the EEPROM at ADDRESS is read to TMP1 and TMP2 (Note).

EEWRITE The data in TMP1, and TMP2 is written to the EEPROM at ADDRESS (Note).

M_DIS Check discrimination value.

M_CNT Check synchronization (counter) values.

RECEIVE Start of the RF reception routine.

LEARN Learn mode.TST_RTCC Check Timer0 and update CNT_LW and CNT_HI.

TST_TIMER Check CNT_LW and CNT_HI and do whatever real-time tasks that are required.

Note: TMP1, TMP2 and ADDRESS are user defined registers.


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APPENDIX A: SCHEMATIC DIAGRAMS

FIGURE 8: SCHEMATIC DIAGRAM OF MICROCHIP KEELOQ DECODER

VCC

VI

GN D

VO

U2LM7805

D5

1N4004/7

1 2 3J1

CON3

12V

GND

C2100u

F

C3100uF

POWERSUPPLY

1J2

RFINPUT

R3100R

VCC

VI

GND

VO

U4LOWVO

LTAGEDETECTOR

R110K

VCC

R4

R5

R8

S0

LEARN

D1

D3

D6

S1

S2

S3

D4

D2

D7

BUTLRNT

R6

R7

R9

MCLR

4RTCC

3OSC1

16

CLKOUT

15

RA017

RA118

RA21

RA32

RB17

VC C1 4

GN D5

RB06

RB28

RB39

RB410

RB511

RB612

RB713

U5

PIC16C56

C110pF

VCC

CS

1

SK

2

DI

3

DO

VCC

8

GND

5

NC

7

NC

6

U1

93LC46B

VCC R

212

S1LE

ARNINIT

SERIALEEPROM

47K

1K

4


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FIGURE 9: TYPICAL GARAGE DOOR OPENER SCHEMATIC

1 2 3J1

CON3

D5

1N

4004/7

12V

GND

12V

C2100uF

C3100uF

VI

GN D

VO

U2LM7805

VCC

12V

D8

1N4004/7

K2

RELAYSP

ST

MOTORCONTR

OLOUT

1J2 C

ON1

S0

Q1NPN

PowerSupply

VCC

VI

GN D

VO

U4LOWV

OLTAGEDETECTO

RVcc

R3100R

Vcc

1 2 3 4 5 6 7 8 9 101112131415

J3

RFRECEIVERMODULE

ANTENNA

DoorMotor

V1110VAC

L1

GARAGELIGHT

12V

RFINPUT

MCL

R

4

RTC

C

3

OSC

1

16

CLK

OUT

15

RA0

RA1

RA2

RA3

RB1

VCC1 4 GN D 5RB0

RB2

RB3

RB4

RB5

RB6

RB7

U5

PIC16C54

R110K

C110pF

S1S0

VCC

CS

1

SK

2

DI

3

DO

VCC

8

GND

5

NC

7

NC

6

U1

93LC46B

K1

RELAYSPST

D9

1N4004/7

Q2NPN

Garagelight

VCC

R247K

SERIAL

EEPROM

12S1LEARNINIT

D10

R4 1K

LEARN

17181 2 76 8 9 1

0111213

S1

D6

1N

4004/7

R6

100R

R71M C

5

10F

1K

4


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AN663

FIGURE 10: HCS200/300/301/360/361 TRANSMITTER DESIGN

Vcc

1

2

S1

D1LED

RFCIRCUITRY(

433MHz)

V

CC

C32.2pF

0805

R1

47R1206

L120mmPC

BTRACK

Q1BFR92A

SOT23

R2

47k1206

PWM

LED

S0

1S1

2

S3

4S2

3

GND

5

LED

7

PWM

6

VCC

8

U2

HCS300

S0S1S2S3

1

2

S2

BT1

6V

C1100nF

PGMCLK

VCC

1234

J1PROGRAMMINGPADS

PGMDATA

3

2

1

U1SAW

42527

R02101

R3220R

C2100pF

0805

C412pF

0805

NP0

NP0


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AN663


ADDITIONAL INFORMATION

Microchips Secure Data Products are covered bysome or all of the following:

Code hopping encoder patents issued in Europeancountries and U.S.A.

Secure learning patents issued in European countries,U.S.A. and R.S.A.

REVISION HISTORY

Revision C (May 2011)

Added new sectionAddi tional Information

Minor formatting and text changes wereincorporated throughout the document


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Information contained in this publication regarding device

applications and the like is provided only for your convenience

and may be superseded by updates. It is your responsibility toensure that your application meets with your specifications.

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The Microchip name and logo, the Microchip logo, dsPIC,KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART,

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All other trademarks mentioned herein are property of their

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2011, Microchip Technology Incorporated, Printed in the

U.S.A., All Rights Reserved.

Printed on recycled paper.

ISBN: 978-1-61341-165-0

Note the following details of the code protecti on feature on Microchip devices:

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Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our

products. Attempts to break Microchips code protection feature may be a violation of the Digital Millennium Copyright Act. If such actsallow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Microchip received ISO/TS-16949:2002 certification for its worldwideheadquarters, design and wafer fabrication facilities in Chandler andTempe, Arizona; Gresham, Oregon and design centers in Californiaand India. The Companys quality system processes and proceduresare for its PICMCUs and dsPIC DSCs, KEELOQcode hoppingdevices, Serial EEPROMs, microperipherals, nonvolatile memory andanalog products. In addition, Microchips quality system for the designand manufacture of development systems is ISO 9001:2000 certified.


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05/02/11
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