dell latitude d420 compal la-3071p - rev 1.0sec
TRANSCRIPT
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
Cover Sheet
1 59Friday, May 12, 2006
Compal Electronics, Inc.
COMPAL P/N :PCB NO :
COMPAL CONFIDENTIALMODEL NAME : HAU30
Crockett Schematics Document
uFCBGA Mobile Yonah-ULV
REV : 1.0 (DELL: A00)
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
LA-3071P
PCB P/N: DA800004H1LBOM NO. 43140131L01
DA800004H1L
Intel Calistoga-GMS + ICH7M
2006-5-12
Part Number Description
DA800004H1L PCB 00B LA-3071P REV1 M/B
MB PCB
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PS_ID_IN
PWR_ID
PQ_G
-DCIN_JACK
PS_ID
+DCIN_JACK
+DC_IN_SS
+5V_ALW
+DOCK_DC_IN
+3.3V_ALW
+5V_ALW+5V_ALW
+PWR_SRC+3.3V_RTC_LDO_1
PS_ID_IN <38>
PS_ID <40>
PS_ID_DISABLE# <40>
PS_ID_IN<38>
Title
Size Document Number R ev
Date: Sheet o f
0.4
+DCIN
1 10Friday, May 12, 2006
Compal Electronics, Inc.
LA-3071PAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
NOTE: "THE POINT LOCATEDAT PS MODULE
THE POINT
+DC_IN Source
PS_ID Detector
+3.3VX Source
PR
410
0K_0
402_
1%~D
1
2
PD
3SM
24_S
OT2
3
@
2 31
PC
20.
01U
_040
2_25
V7K
~D
12
MIC5235-3.3BM5_SOT23-5~D
PU10
IN1
GN
D2
OUT 5
NC 4EN3
PR
1047
K_0
402_
5%~D
12
PC1422.2U_0603_6.3V6K~D
1
2
PD
1D
A20
4U_S
OT3
23~D 23
1
PC
40.
1U_0
603_
25V
7K~D
12
PC
10.
47U
_080
5_25
V7k
12
PC
30.
1U_0
603_
25V
7K~D
12
PR6100_0402_5%~D@
1 2
G
D S
PQ1FDV301N_SOT23
2
1 3
PR
715
K_0
402_
1%~D
12
PC
143
1U_0
805_
25V
4Z~D
12
PR
12.
2K_0
402_
5%~D
12
PR
824
0K_0
402_
5%~D
12
PL1BLM11B102S 0603~D
12
PD
2D
A20
4U_S
OT3
23~D
@
231
PR20_0402_5%~D@1 2
PL2FBM-L11-453215-900LMAT_1812~D
1 2
PC
510
U_1
206_
25V
6M~D
12P
C6
0.01
U_0
402_
25V
7K~D
@
12
PL3FBM-L11-453215-900LMAT_1812~D
1 2
PR
94.
7K_0
603_
5%~D
12
PQ3SI4825DY_SO8~D
3 65
78
2
4
1
PJDCIN
FOX_JPD113E-LB103-7F
SINGAL 5
DC+_1 1
DC+_2 2
DC-_2 4
GND27
GND49
GND38
GND16
DC-_1 3
CB
E
PQ2PMBT3904_SOT23~D
2
31
PR333_0402_5%~D 1 2
PR
510
K_0
402_
1%~D
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
Block Diagram
2 59Friday, May 12, 2006
Compal Electronics, Inc.
Clock Generator
uFCBGA CPU
INTEL
DMI
H_D#(0..63)H_A#(3..31)
Compal confidentialModel : HAU30
AMP & INT.Speaker
Pentium-M
Block Diagram
Azalia Codec
Power On/OffSW & LED
System Bus
INTEL
Memory BUS(DDR2)
FSB 400/533 MHz
+1.5V_RUN 100MHz
+1.8V_SUS 400/533MHz
48MHz
ATA100
MDC
998pin BGA
SLG84450VTR
STAC9200
Azalia I/F
Calistoga-GMS
ICH7-M
RJ11
HeadPhone &MIC Jack
PATA HDD+3.3V_HDD
+VDDA
+5V_SUS +3.3V_RUN
+1.8V_SUS
+1.5V_RUN
+1.05V_VCCP
+VCC_CORE
+1.05V_VCCP
+3.3V_RUN
BANK 2, 3DDRII-DIMM X1
+0.9V_DDR_VTT
+1.8V_SUS
Cable
+3.3V_SUS
479pin
DC/DC Interface
CPU ITP Port
+FAN1_VOUT Yonah-2M ULV
+3.3V_RUN
+2.5V_RUN
+3.3V_RUN
VCORE (IMVP-6)
1.5V/1.05V
CHARGER
1.8V/0.9VBATT IN
DC IN
3V/5V/15V
GUARDIANEMC4000
Thermal
+3.3V_SUS
FAN
Power Sequence
DELL CONFIDENTIAL/PROPRIETARY
652pin BGA
pg 7,8
pg 18
pg 18
pg 6pg 7
pg 10,11,12,13,14
pg 22,23,24,25
pg 48
pg 26 pg 27
pg 34
pg 49
pg 50
pg 45
pg 46
pg 47pg 42,43
pg 44
pg 45
pg 28 pg 28
pg 15
+3.3V_ALW
pg 41
Int.KBD &Stick
SMSC KBC
+3.3V_ALW+RTC_CELL
MEC5004pg 40
pg 41
SPI
LPC BUS+3.3V_RUN33MHz
SMSC SIO
+5V_RUN
+3.3V_ALW
Touch Pad
ECE5018pg 39
USB[1]
USB Ports X1+5V_SUS pg 33USB[6] REAR
HUB USB[1]
HUB USB[2]
pg 40pg 37
FIR
DOCKINGBUFFER
pg 37
DOCKING PORT
pg 38 pg 31,32
PCI BUS
CardBus & 1394 & SDR5C843 CSP208
+3.3V_RUN 33MHzIDSEL:AD17(PIRQB,C,D#,GNT2#,REQ2#)
+3.3V_RUN+3.3V_SUS
HUB USB[2]USB[0]
Mini Card2+3.3V_RUN
WLANMini Card 1+3.3V_RUN
PCI Express BUS
+1.5V_RUN+1.5V_RUN pg 29
GIGA Enthernet
+3.3V_LAN
+3.3V_RUN/ +1.5V_RUN 100MHz
pg 36
BCM5752WWANpg 36
HUB USB[1]
USB[7]
Bluetooth+3.3V_RUN
HUB USB[4]
Stick
INT MIC+5V_SUS
+1.05V_VCCP
+3.3V_RUN
+3.3V_SUS
+1.5V_RUN
pg 34
SPI
+5V_RUN
+3.3V_RUN
pg 16,17
DDRII 512MB on Board+0.9V_DDR_VTT
+1.8V_SUS
pg 19LVDSLVDS CONN
RGB
pg 20
DVODVI Bridge SI1362
CRT CONNpg 21
TV
DVI
PWR USB X1+5V_SUSUSB[5] REAR
SD card SLOT
1394 CONNCard Bus SLOT
IDSEL:AD24(PIRQA#,GNT0#,REQ0#)
pg 30
RJ45
LAN SWITCHPI3L500E
pg 30
Transformerpg 30
+3.3V_LAN
+2.5V_LOMpg 30
+3.3V_LAN+3.3V_LAN
SIM Cardpg 36
+SIM_PWR
+DOCK_PWR_SRC+3.3V_RUN+2.5V_LOM
pg 32+SD_VCC
pg 31pg 32
+3.3V_RUN+1.8V_RUN
+LCDVDD+GFX_PWR_SRC
pg 33DH_PORT_PWRSRC
USB Ports X1+5V_SUS pg 33
USB[4] REAR
ST M25P80
+2.5V_RUNpg 18
Smart Card+5V_RUN pg 35
OZ77C6
HUB_USB[3]
SLOT
pg 51
pg 35pg 41
Fingerprint+3.3V_RUN
USB_BIO
+5V_RUN
+1.05V_VCCP
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Z4304
+PBATT
Z4305Z4306
Z4307
+VCHGR
+PBATT
+3.3V_ALW
+3.3V_ALW
PBAT_SMBDAT <40,51>PBAT_PRES# <39>
PBAT_ALARM# <39>
PBAT_SMBCLK <40,51>
Title
Size Document Number Rev
Date: Sheet o f
0.4
Battery Conn
2 10Friday, May 12, 2006
Compal Electronics, Inc.
LA-3071PAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
SUYIN_200028MR009G502ZLTOP view
9
8
7
6
5
4
3
2
1
Battery Connector
ESD Diodes
PC
822
00P_
0402
_50V
7K~D
12
PR
1110
K_04
02_1
%~D
12
PJBAT1SUYIN200277MR009G508ZR~D
BATT1+ 9
SMB_CLK 7SMB_DAT 6
BATT_PRES# 5SYSPRES# 4
BATT2- 1GND10GND11
BATT2+ 8
BATT_VOLT 3BATT1- 2
PD5DA204U_SOT323~D@
231PD4
DA204U_SOT323~D@
231 PD6
DA204U_SOT323~D@
231
PR15100_0402_5%~D
1 2
PD7DA204U_SOT323~D@
231
PR12100_0402_5%~D
1 2 PR14100_0402_5%~D
1 2
PL4FBM-L11-453215-900LMAT_1812~D
1 2
PC
70.
1U_0
603_
25V7
K~D
12PR13
100_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
Index and Config.
3 59Friday, May 12, 2006
Compal Electronics, Inc.
PIRQ
B,C,D
+1.05V_VCCP
PM TABLE
ON
ON
AD17
OFF
PCI DEVICE
TABLE
CARD BUS
IDSEL
S0
TABLE
2
PCI
ON
ON
S3
USB
ON
OFF
ON
+3.3V_SUS
OFF
+5V_SUS+5V_ALW
S1
S5 S4/AC don't exist
+1.8V_RUN
+VCC_CORE
REQ#/GNT#
+5V_RUN
ON
powerplane
+3.3V_RUN
S5 S4/AC
ON
ON
+3.3V_ALW
State
OFFOFF
OFF
+1.5V_RUN
0
4,6
7
USB PORT# DESTINATION
PWR USB
1 USB Hub (5018)
Docking
Blue tooth
2
Tolerance0.1U_0402_6.3VXX
Ceramic Capacitors :
Temperature CharacteristicsRated VoltagePackage SizeValue
CH
A
Capacitor Spec Guide:
1
SL
CODE
COG SJ
9
B
+-3%
CODE
Symbol F
+40,-20%+-20%
4
G
+20,-10%
X
UK
5
B
Z
C
+-0.05PF
Y5V
Temperature Characteristics:
Y5P
CK
V
+-0.1PF
X5R
A
Z5U
BJ
+100,-0%
Y5U X7R
P
+-30%
C
SH
8
H
CJ
+30,-10%
K
+-5%
7
Q
+80,-20%
6
+-0.5PF +-1PF
Z5V
+-10%
J
+-0.25PF
Tolerance:
+-2%
N
D
Z5P
2
UJ
D E F G
H I J
30Symbol
X6SNPO
K
X5S
M
ValuePackage SizeRated VoltageToleranceLow ESR Mark : 45 m ohm
10U_D2_10VX_R45
Tantalum or Polymer Capacitors :+0.9V_DDR_VTT
@XX : Depop component
NOTE1:
+1.8V_SUS
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
1
2
USB HUB DESTINATION
4
3
PC Card Bay
Mini 1(WWAN)
Mini 2(WLAN)
N/A
+2.5V_RUN
REAR
SMART CARD
5
DOCKING AD24 0 A
USB HUB onOZ77C6LN
DESTINATION
DP_HUB Fingerprint
+15V_SUS
3 N/A
+3.3V_SRC
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TPS51120_VFB2
+5V_SUSP_L
TPS51120_VO1
TPS51120_VFB1
+3.3V_SRCP_L
+5V_SUSP
TPS51120_DRVL2
TPS51120_CS2
+15V
S
TPS51120_DRVL1
+15VS_L
TPS51120_LL2
TPS51120_LL1
TPS51120_VO2TPS51120_CS1
+3.3V_SRCP
TPS51120_DRVH1
TPS51120_DRVH2
TPS
5112
0_SK
IP#
+15VP
+3.3V_SRCP
+5V_SUSP
+15VP
+5V_SUS
+3.3V_SRC
+15V_SUS
+PWR_SRC
GNDA_DCDC1
+3.3V_RTC_LDO
+3.3V_SRCP
+3.3V_RTC_LDO
+3.3V_SRCP
+3.3V_SRCP
+VCC_TPS51120
+5V_ALW
+DC1_PWR_SRC
+VCC_TPS51120
GNDA_DCDC1
GNDA_DCDC1
GNDA_DCDC1
GNDA_DCDC1
+3.3V_ALW
+VCC_TPS51120
+5V_SUSP
GNDA_DCDC1
+VCC_TPS51120
GNDA_DCDC1
+VCC_TPS51120
+3.3V_RTC_LDO
+3.3V_ALW
+3.3V_RTC_LDO_1
THERM_STP#<18>
SUS_ON<40,42,43>
SUS_ON<40,42,43>SUSPWROK_5V <49>
AUX_EN<40,42>
ALWON<40>
RUN_ON<19,40,42,43,48,49>
RUN_ENABLE <42>
Title
Size Document Number R ev
Date: Sheet o f
0.4
+3.3V/+5V/+15V
3 10Friday, May 12, 2006
Compal Electronics, Inc.
LA-3071PAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
5 Volt +/- 5%Design Current:3.63AMaximum current: 5.191 AOCP: 6.35A
DC/DC +3V/ +5V/ +15V
Place these CAPsclose to FETs3.3 Volt +/- 5%
Design Current: 6.5 AMaximum current: 9.1A OCP: 10.95A
15 Volt Maximum Current: 10mA
3.3V OCP Fsw=440 KHZRds_on_MAX=15m; Itrip_MIN=8.5uA;L=2.7uHDelta_I=Vout/L * 1/Fsw * (1-Vout/Vin) =3.3/2.7u * 1/440K *(1-3.3/19)=2.3AIvalley_MIN= Itrip*Rtrip/Rds_on=8.5u*14.7K/15m=8.33AIvalley= Itrip*Rtrip/Rds_on=10u*14.7K/15m=9.8AIocp_MIN=8.33+2.3/2=9.48AIocp=9.8+2.3/2=10.95A
Place these CAPsclose to FETs
32 QFN 5X5
5V OCP Fsw=290 KHZRds_on_MAX=20m; Itrip_MIN=8.5uA;L=4.7uHDelta_I=Vout/L * 1/Fsw * (1-Vout/Vin) =5/4.7u * 1/290K *(1-5/19)=2.7AIvalley_MIN= Itrip*Rtrip/Rds_on=8.5u*10K/20m=4.25AIvalley= Itrip*Rtrip/Rds_on=10u*10K/20m=5AIocp_MIN=4.25+2.7/2=5.6AIocp=5+2.7/2=6.35A
PC
3010
U_0
805_
6.3V
5K~D
12
PR
4120
0K_0
402_
1%~D
@
12
PC
92.
2U_1
206_
25V
7M~D
12
PR
157
100K
_040
2_1%
~D
12
PJP5
PAD-OPEN 4x4m
@1 2
PQ
5S
I480
0DY
-T1_
SO
8~D
36 578
2
4
1
PQ
6S
I481
0BD
Y_S
O8~
D
365 7 8
2
4
1
PR1360_0402_5%~D@
12
PJP2
PAD-OPEN 4x4m
@1 2
PC
334.
7U_1
206_
10V
7K~D
12
PR
240_
0402
_5%
~D
@
12
PJP12
PAD-OPEN 4x4m
@1 2
PR
159
2.2M
_040
2_5%
~D1
2
PC
110.
1U_0
603_
25V
7K~D
12
PC
1710
U_1
206_
25V
6M~D
12
PR2710K_0402_5%~D
12
PC
140.
1U_0
603_
25V
7K~D
12
PD
18B
AT5
4CW
_SO
T323
~D
32
1
PR
220_
0402
_5%
~D
@
12
PR160_0805_5%~D
1 2
PC
134
10U
_120
6_25
V6M
~D
@
12
PC
260.
1U_0
603_
25V
7K~D
12
PJP4
PAD-OPEN 4x4m
@1 2
PR34
0_0402_5%~D@ 1 2
G
DS
PQ9SI2301BDS-T1-E3 _SOT23~D2
13PQ
4S
I480
0DY
-T1_
SO
8~D
365 7 8
2
4
1P
C15
2200
P_0
402_
50V7
K~D
12
PC
162.
2U_1
206_
25V
7M~D
12
PR
380_
0402
_5%
~D
12
G
DS
PQ8SI2301BDS-T1-E3 _SOT23~D@
213
PR
138
0_08
05_5
%~D
@
12
G
D
S
PQ11RHU002N06_SOT323
2
13
PC
1210
U_1
206_
25V6
M~D
12
PR
290_
0402
_5%
~D
12
PR
404.
7K_0
402_
5%~D
1
2
PL72.7U_SIL1055R-2R7PF_9A
1 2
PC
1022
00P
_040
2_50
V7K~
D
12
PC
200.
1U_0
603_
25V
7K~D
12
PC
181U
_060
3_10
V6K
~D
12
PR
320_
0402
_5%
~D
@
12
PR
137
10K
_080
5_5%
~D
12
PC
191U
_060
3_10
V6K
~D
12
PL5FBM-L11-453215-900LMAT_1812~D
1 2
PR133
0_0603_5%~D
12
PC
240.
1U_0
603_
25V
7K~D
12
PR3010K_0402_5%~D
12
+
PC
2533
0U_D
3L_6
.3V
M_R
25~D
1
2
PR
3110
0K_0
402_
1%~D
12
PR1620_0402_5%~D@
12
PC
1310
U_1
206_
25V6
M~D
12
PC
2910
00P
_040
2_50
V7K~
D
12
PC220.1U_0603_25V7K~D
12
PQ
7FD
S66
90A
S_N
L_S
O8~
D
36 578
2
41
PR
2510
K_0
402_
1%~D
12
G
D
SPQ10RHU002N06_SOT323 @
2
13
PR1610_0805_5%~D
@
12
PR
230_
0402
_5%
~D
12
PR
190_
0402
_5%
~D
@ 12
PC1180.1U_0603_25V7K~D
12
PC
120
10U
_120
6_25
V6M
~D
@
12
PD
10R
B71
7F_S
OT3
23~D
@
321
PD21BAT54CW_SOT323~D
@
3 2
1
S
GD
PQ24FDC655BN_NL_SSOT-6~D
3
6 24
5 1
PR
135
0_04
02_5
%~D
12
PU7SN74AHC1G32DCKR_SSOP5~D
I02
I11O 4
P5
G3
PR
280_
0402
_5%
~D
@
12
PC
320.
01U
_060
3_25
V7K
~D1
2
PR200_0603_5%~D
1 2
PR
210_
0402
_5%
~D
@
12
PD
9E
C11
FS2_
SO
D10
6~D
21
PC
3110
00P
_040
2_50
V7K~
D
@
12
PR39
0_0402_5%~D@1 2
PR
2614
.7K
_040
2_1%
~D
12
PD
8M
MB
Z524
5B_S
OT2
3~D
1
2 3
PJP3
PAD-OPEN 4x4m
@1 2
PR1600_0402_5%~D@
12
PR361K_0402_5%~D
12
PL64.7U_SDT-1204P-4R7D-122GP_20%
14
32
PR180_0603_5%~D
1 2
PR175.1_0603_5%~D
12
PC
2710
00P
_040
2_50
V7K~
D
12
+
PC
2333
0U_D
3L_6
.3V
M_R
25~D
1
2
PC
2810
00P
_040
2_50
V7K~
D
12
PR37
0_0402_5%~D @1 2
PC210.1U_0603_25V7K~D
1 2
PR35
0_0402_5%~D @1 2
PU1
TPS51120
VIN22
V5FILT20
EN59
VBST213
DRVH214
LL215
DRVL216
VO28
VFB26
EN212EN129
VREG319
SK
IPS
EL
32
PGOOD2 11PGOOD1 30GND 5
PGND217
TONSEL 31VREF2 4CS2 18CS1 23
VFB1 3
VO1 1
PGND1 24
DRVL1 25
LL1 26
DRVH1 27
VBST1 28
VREG5 21
EN310 PA
D33
COMP1 2COMP2 7
CB
E
PQ252N2222_SOT23~D
2
31
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
Power Rail
4 59Friday, May 12, 2006
Compal Electronics, Inc.
+5V_ALW
+5V_SUS
BATTERY
+PWR_SRC
+3.3V_SRC
+3.3V_ALW
+3.3V_RUN
ADAPTER
SU
S_O
N
RU
N_O
N
+5V_RUN VDDA
AUD
IO_A
VD
D_O
N
(Opt
ion)
+15V_SUS
+2.5V_RUN
TPS51120
EMC4000
RU
N_O
N
PL8
L47
793475
FDS4435 +GFX_PWR_SRCRUN_ON
SI4800
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
SI3456
ENAB
_3V
LAN
+3.3V_LAN
ALWON
ALWON
SI4800
SU
S_O
N
+VCC_CORE
RU
NP
WR
OK
+VCCP
SI3456
+1.5V_RUN
RU
N_O
N
SC483
+1.8V_SUS
RU
N_O
N
RU
NP
WR
OK
AD3207 SC480
+1.8V_RUN
RU
NP
WR
OK
SU
SP
WR
OK
_5V
+0.9V_DDR_VTT
hexa
inf@
hotm
ail.co
m
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
+DC2_PWR_SRC
+1.5V_RUN_P
+1.05V_VCCP_P
GNDA_DC2A
+1.05V_VCCP_P
+5V_SUS
GNDA_DC2A
+1.5V_RUN_P
GNDA_DC2B
GNDA_DC2A
GNDA_DC2B
+PWR_SRC
GNDA_DC2B
+3.3V_RUN
+1.05V_VCCP
+1.5V_RUN
+3.3V_RUN1.05V_RUN_PWRGD <43>
1.5V_RUN_PWRGD<43>
RUN_ON<19,40,42,43,47,49>
Title
Size Document Number Rev
Date: Sheet o f
0.4
+1.5VRUNP /+VCCP_1P05VP
4 10Friday, May 12, 2006
Compal Electronics, Inc.
LA-3071PAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARYRef Des SC483 TPS52483--------------------------------- PR56 30.0K 15.0K PR58 15.0K 15.0K PR55 16.5K 11.8K PR57 15.0K 29.4K
1.05V +/- 5%Thermal Design Current: 3.36AMaximum Current:4.8A MIN_OCP:5.2A
1.5V +/- 5%Thermal Design Current: 2.5AMaximum Current: 3.6AMIN_OCP: 3.7A
Use PR56 and PR58 forVoltage Margining.
BOM Structure Description----------------------------------------------- @ Do Not Populate 4@ Populate for Semtech - SC483 Only 5@ Populate for Ti - TPS51483 Only
Use PR55 and P57 forVoltage Margining.
Place these CAPsclose to FETs Place these CAPs
close to FETs
Create new P/N
PR5212.7K_0402_1% 1 2
PR500_0603_5%~D
12
FDS6994S_SO8~DPQ12
G22D2 8
S13 D1 5
S21 D2 7
G14D1 6
PD
20
MM
BD
4148
W-7
-F_S
OD
323~
D
12
PC
531U
_060
3_10
V6K~
D@
1
2
PL93.3uH_PCMC063T-3R3MN_6A_20%
12
+
PC
4933
0U_D
2E_2
.5VM
_R9
1
2
PC
451U
_060
3_6.
3V6M
12
PR
4610
_040
2_5%
12
PC480.1U_0603_25V7K~D
12
PR5815K_0402_1%
12
PR
431M
_040
2_5%
~D1
2
PC
3510
U_1
206_
25V6
M~D
12
PC
4010
U_1
206_
25V6
M~D
12
PC1410.1U_0603_25V7K~D
@
1 2
SC48
3/TP
S514
83
PU2
SC1485ITSTR-TPS51483_TSSOP28
PGND11
DL12
VDDP13
ILIM14
LX15
DH16
BST17
EN/PSV2 8
TON2 9
VOUT2 10
VCCA2 11
FBK2 12
PGOOD2 13
AGND2 14
PGND2 15
DL2 16
VDDP2 17
ILIM2 18
LX2 19
DH2 20
BST2 21
EN/PSV122
TON123
VOUT124
VCCA125
FBK126
PGOOD127
AGND128
PR518.45K_0402_1% 1 2
PR
44 750K
_040
2_1%
~D
12
PL8FBM-L11-453215-900LMAT_1812~D
1 2
PC470.1U_0603_25V7K~D
12P
C37
2200
P_04
02_5
0V7K
~D
12
PR
601K
_040
2_1%
~D
12
PR5310K_0402_1%~D 5@ 1 2
PR621K_0402_1%~D
1 2
PJP7
PAD-OPEN 4x4m
@1 2
FDS6994S_SO8~DPQ13
G2 2D28
S1 3D15
S2 1D27
G1 4D16
PC
441U
_060
3_6.
3V6M
12
PR
5715
K_04
02_1
%~D
12
PC
4310
00P_
0402
_50V
7K~D
12
PC
501U
_060
3_10
V6K~
D@
1
2
PR48499K_0402_1%5@
1 2
PJP6
PAD-OPEN 4x4m
@1 2
PC
360.
1U_0
603_
25V7
K~D
12
PC
5482
P_04
02_5
0V8J
12
PR
5630
K_04
02_1
%
12
PR490_0603_5%~D
12
PR
140
100K
_040
2_1%
~D
12
+
PC
5133
0U_D
2E_2
.5VM
_R9
1
2
PC
5518
P_0
402_
50V8
J
12
PR1390_0402_5%~D@
1 2
PR549.09K_0603_1%~D5@ 1 2
PC
3822
00P_
0402
_50V
7K~D
12
PR
6110
0K_0
402_
1%~D
12
PC
411U
_060
3_10
V6K~
D
12
PR
5516
.5K_
0402
_1%
12
PD17BAT54A-7-F_SOT23~L
32
1
PC
4610
00P_
0402
_50V
7K~D
12
PJP8
PAD-OPEN 4x4m
@1 2
PR
4510
_040
2_5%
12
PR63
0_0603_5%~D
12
PC
390.
1U_0
603_
25V7
K~D
12
PR64
0_0603_5%~D
12
PR47453K_0402_1%~D5@
12
PC
421U
_060
3_10
V6K~
D
12
PC
341U
_060
3_10
V6K~
D
12
PL103.3uH_PCMC063T-3R3MN_6A_20%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
SMBUS TOPOLOGY
5 59Friday, May 12, 2006
Compal Electronics, Inc.
CLK GEN.
Macallan IV
ICH7-M
DAT_SMB +3.3V_ALW
CLK_SMB
GUARDIAN
ICH_SMBDATA
+3.3V_SUSICH_SMBCLK
SIO
PBAT_SMBCLK
PBAT_SMBDAT +3.3V_ALWBATTERYCONN
CHARGER
DELL CONFIDENTIAL/PROPRIETARY
DIMM1
DDR II 512M ON Board
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+3.3V_SUS
2N7002
2N7002
+3.3V_RUN
2.2K 2.2K 2.2K 2.2K
CLK_SCLK
CLK_SDATA
10K
SMBUS Address [A0]
SMBUS Address [A2]
195
197
B22
C22
17
16
5
6
7
8
SMBUS Address [D2]
SMBUS Address [2F]
+3.3V_ALW
8.2K8.2K
100
100
SMBUS Address [16]
SMBUS Address [12]
3
4
9
10
8
7
WWAN
SMBUS Address [TBD]
3032
WLAN
3032
SMBUS Address [TBD]
SBAT_SMBDAT111
112
+3.3V_ALW
+3.3V_ALW
SMBUS Address [58]5
6SBAT_SMBCLKInverter INV
8.2K 8.2K
10K 10K
SMBUS Address [C4, 72, 70, 48]
DOCK_SMB_CLK
+5V_ALW10
+5V_ALW
DOCKING9 DOCK_SMB_DAT
39
40
5752MLOM
C8C7
SMBUS Address [C8]
SMBUS Address [5A]Power USB
DOG house
10K
+3.3V_ALW
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+PWR_SRC
+1.8V_SUSP
+0.9V_DDR_VTT+0.9V_DDR_VTTP
+DDR_PWR_SRC
+DDR_PWR_SRC
+5V_SUS
+1.8V_SUSP
+5V_SUS
+0.9V_DDR_VTTP
+1.8V_SUSP
+1.8V_SUSP
+1.8V_SUSP
+5V_SUS
GNDA_DDR
+1.8V_SUSP
GNDA_DDR
GNDA_DDR
GNDA_DDR
GNDA_DDR
GNDA_DDRGNDA_DDR
GNDA_DDR
+1.8V_SUS
GNDA_DDR
RUN_ON <19,40,42,43,47,48>
SUSPWROK_5V <47>
SUSPWROK_1P8V <43>V_DDR_MCH_REF<10,15,16,17>
Title
Size Document Number R ev
Date: Sheet o fLA-3071P 0.4
+1.8VSUSP/ +0.9V_DDR_VT
5 10Friday, May 12, 2006
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
TPS5111620 QFN 4 X 4
<GMCH>
<5V_3V regulator><EC>
PAD
NOTE: Component Values Shown for SEMTECH SC480 ONLY. For Texas Instruments TPS51116, Please USE Reference BOM.
NOTE: For Test purposes only
.9 Volt +/- 5%Design Current:1.05AMaximum current:1.5A
1.8 Volt +/- 5%Design Current:3.5AMaximum current:4.9A MIN_OCP:5A
Place these CAPsclose to FETs
Create new P/N
<GMCH, DDR>
PC
701U
_060
3_10
V6K
~D
12
PC
711U
_060
3_10
V6K
~D
12
PL11FBM-L11-453215-900LMAT_1812~D
1 2
PC
730.
1U_0
402_
10V
7K~D
12
PC
6510
U_0
805_
6.3V
5K~D
@
1
2
PJP10PAD-OPEN 4x4m
@
1 2
PR74100_0402_5%~D 1 2
PR77
17.4K_0603_1%~D @1
2
PR
7010
0K_0
402_
1%~D
12
PD13RB751V-40_SOD323~D
2 1
PR690_0402_5%~D1 2
PC
132
10U
_120
6_25
V6M
~D @
12
PC
590.
1U_0
603_
25V
7K~D
12
PC
570.
1U_0
603_
25V
7K~D
12
PR750_0402_5%~D1 2
PC
5810
U_1
206_
25V
6M~D
12
PC
620.
1U_0
402_
10V
7K~D
12
PC
671U
_060
3_10
V6K
~D
@
12
FDS6994S_SO8~DPQ14
G2 2D28
S1 3D15
S2 1D27
G1 4D16
PR
730_
0402
_5%
~D
@
12
PU3SC480ITSTR_MLPQ24~D
PGND21
VTTS2
VSSA3
TON4
REF5
VCCA6
NC
7
VTT
EN
10
FB9
LX20
DL
19
PGND1 18
PGND1 17
ILIM 16
VDDP 15
VDDP 14
NC
12
EN
/PS
V11
VD
DQ
S8
PGD 13
VTT
IN23
VTT
24
BS
T22
DH
21
PAD 25
+
PC
6022
0U_D
2_4V
M~D
1
2
PC
6310
U_0
805_
6.3V
5K~D
1
2
PJP9
PAD-OPEN 4x4m
@1 2
PR
6612
.4K
_040
2_1%
~D
12
PJP11
PAD-OPEN 43X79
@1 2
PR
671M
_040
2_5%
~D1
2
PC
721U
_060
3_10
V6K
~D
12
PC
691U
_060
3_10
V6K
~D
@
12
+
PC
133
220U
_D2_
4VM
~D
1
2
PR76
27.4K_0603_1%~D@
12
PC
661U
_060
3_10
V6K
~D
12
PC
6410
U_0
805_
6.3V
5K~D
1
2
PL123.3uH_PCMC063T-3R3MN_6A_20%
12
PC
6810
00P
_040
2_50
V7K~
D
12
PR
7210
_040
2_1%
~D
1
2
PR
7110
_040
2_1%
~D
12
PR
650_
0603
_5%
~D
12
PC
119
18P
_040
2_50
V8J
@
12
PR
6810
K_0
402_
1%~D
@
12
PC
5622
00P
_040
2_50
V7K~
D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CPU_ITP#
CLK_CPU_ITP
CLK_CPU_ITP#
CPU_ITP
H_STP_CPU#
H_STP_PCI#
CLK_MCH_BCLK#MCH_BCLK#
CPU_BCLK
CLK_CPU_BCLK#CPU_BCLK#
CLK_CPU_BCLK
+CK_VDD_A
+CK_VDD_MAIN
CLK_XTAL_IN
FSA
CLK_CPU_BCLK#
CLK_CPU_BCLK
CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_CPU_ITP#
CLK_CPU_ITP
CLK_PCIE_LOM#
CLK_PCIE_LOM
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
CLK_PCIE_ICH#
CLK_PCIE_ICH
ICH_SMBDATA
ICH_SMBCLK
CLK_SDATA
CLK_SCLK
FSC
CLK_ICH_48M FSA
CLK14M_REFCLK_ICH_14MCLK_SIO_14M
CLK_ENABLE#
CLKIREF
CLK_SDATA
CLK_SCLK
FCTSEL1
FCTSEL1
CLK_PCIE_MINI2#
CLK_PCIE_MINI2
CLK_MCH_BCLKMCH_BCLK
PCIE_MINI2
CLK_PCIE_MINI2#
CLK_PCIE_MINI2
PCIE_MINI2#
CLK_PCI_SIO
CLK_PCI_ICH PCI_ICH
CLK_SMCARD_48M
CLK_PCI_5004
PCIE_ICH
PCIE_ICH#
CLK_PCIE_ICH
CLK_PCIE_ICH#
PCIE_MINI1
PCIE_MINI1#
CLK_PCIE_MINI1
CLK_PCIE_MINI1#
CLK_PCIE_MINI1
CLK_PCIE_MINI1#
+CK_VDD_REF
+CK_VDD_48
+CK_VDD_48+CK_VDD_A +CK_VDD_REF
CLK_XTAL_OUT
MCH_DREFCLK# DOT96#
DOT96MCH_DREFCLK
DOT96_SSC
DOT96_SSC#
DREF_SSCLK#
DREF_SSCLK
MCH_DREFCLK#
MCH_DREFCLK
CLK_PCIE_LOMPCIE_LOM
CLK_PCIE_LOM#PCIE_LOM#
MCH_3GPLL CLK_MCH_3GPLL
CLK_MCH_3GPLL#MCH_3GPLL#
CLK_PCI_LOM PCI_LOM
CLK_PCI_PCCARD PCI_PCCARD
PCI_DOCKCLK_PCI_DOCK
CLK_SD_48M
+CK_VDD_MAIN
+CK_VDD_MAIN2
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
H_STP_CPU# <24>
H_STP_PCI# <24>
CLK_MCH_BCLK# <10>
CLK_MCH_BCLK <10>
CLK_CPU_BCLK# <7>
CLK_CPU_BCLK <7>
CLK_CPU_ITP <7>
CLK_CPU_ITP# <7>
CLK_ICH_14M<24>CLK_SIO_14M<39>
CLK_PCIE_MINI2 <36>
CLK_PCIE_MINI2# <36>
CLK_PCI_SIO<39>
CLK_PCI_ICH<22>
CLK_SMCARD_48M<35>
CLK_PCI_5004<40>
CLK_ICH_48M<24>
CLK_PCIE_ICH# <24>
CLK_PCIE_ICH <24>
CLK_PCIE_MINI1 <36>
CLK_PCIE_MINI1# <36>
MINI2CLK_REQ# <36>
MINI1CLK_REQ# <36>
MCH_DREFCLK<10>
MCH_DREFCLK#<10>
CPU_MCH_BSEL1<8,10>CPU_MCH_BSEL2<8,10>
CLK_PCIE_LOM <29>
CLK_PCIE_LOM# <29>
CLK_MCH_3GPLL <12>
CLK_MCH_3GPLL# <12>
CLK_3GPLLREQ# <10>CLK_PCI_LOM<29>
CLK_PCI_PCCARD<31>
CLK_PCI_DOCK<38>
LOM_CLKREQ# <29>
CLK_SD_48M<31>
ICH_SMBDATA<24,29,36> CLK_SDATA <15,17>
CPU_MCH_BSEL0<8,10>
CLK_ENABLE#<50>
DREF_SSCLK <10>
DREF_SSCLK# <10>
ICH_SMBCLK<24,29,36> CLK_SCLK <15,17>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
Clock Generator
6 59Friday, May 12, 2006
Compal Electronics, Inc.
Place crystal within500 mils of CK410
31
G S
2N7002
2
D
1
*
CLKSEL2 CLKSEL0CLKSEL1FSC FSB FSA CPU
MHzSRCMHz
PCIMHz
266
133
200
166
333
100
400
100
100
100
100
100
100
100
33.3
33.3
33.3
33.3
33.3
33.3
33.3
0 0 0
00
0
0
0
00
0
0
1
1
1 1
1
1
1
1 1
1
1
CPU_BSEL CPU_BSEL2(FSC) CPU_BSEL1(FSB)
133
166
0
0
0
1
Place near each pinW>40 mil
Place near CK410+
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Reserve
FCTSEL1 PIN43 PIN44 PIN47 PIN48
0
1
DOT96T DOT96C 96/100M_T 96/100M_C
27M_out 27M SSout SRCT0 SRCC0
60ohm,500mA,0.1ohm
60ohm,500mA,0.1ohm
R19 49.9_0402_1%~D
1 2
R15 2.2_0603_5%~D
1 2R16 49.9_0402_1%~D
1 2
R34 39_0402_5%~D
1 2
R66 10K_0402_5%~D
1 2
R62 33_0402_5%~D
1 2
R41 15_0402_5%~D
1 2
X114.31818MHz_20P_1BX14318CC1A~D
12
C1527P_0402_50V8J~D
12
R30 0_0402_5%~D
1 2
R39 56_0402_5%~D
1 2
R29 33_0402_5%~D
1 2
R18 49.9_0402_1%~D
1 2
R6710K_0402_5%~D@
12
C11
0.04
7U_0
402_
16V7
K~D
1
2
R48 56_0402_5%~D
1 2
C80.1U_0402_16V4Z~D
1
2
R61 33_0402_5%~D
1 2
R561 8.2K_0402_5%~D@12
R51 475_0402_1%~D
1 2
R24 33_0402_5%~D
1 2
R1 49.9_0402_1%~D
12
R14 49.9_0402_1%~D 1 2
R43 33_0402_5%~D
1 2
R50 33_0402_5%~D
1 2
R21 49.9_0402_1%~D
1 2
C50.1U_0402_16V4Z~D
1
2
R605 39_0402_5%~D
12
R55 10K_0402_5%~D
1 2
R26 33_0402_5%~D
1 2
R44 33_0402_5%~D
1 2
C6430.1U_0402_16V4Z~D
1
2
R12 49.9_0402_1%~D
1 2
R49 33_0402_5%~D
1 2
R7110K_0402_5%~D
12
R54 33_0402_5%~D
1 2
R20 49.9_0402_1%~D
1 2
R63 10K_0402_5%~D
1 2
R38 56_0402_5%~D
1 2
C1627P_0402_50V8J~D
12
U1
SLG84450VTR_QFN72~D
VDDSRC1VDDSRC49
VDDSRC65
VDDPCI30VDDPCI36
VDD4840
VDDCPU12
VDDREF18
USB_48MHz/FSLA41
FSLB/TEST_MODE45
X219
X120
GNDPCI31
PCICLK232
REF0/FSLC/TEST_SEL23
SMBDAT17
SMBCLK16
ITP_EN/PCICLK_F037
IREF9
CPU_STOP# 24
CPUT1 11
CPUC1 10
CPUT_ITP/SRCT10 6
PCICLK333
PCICLK4/FCTSEL134
CPUC0 13
CPUT0 14
PCI_SRC_STOP# 25
GNDA 8
VDDA 7
GNDPCI35
CPUC_ITP/SRCC10 5
GNDREF21
GNDCPU15
GNDSRC4
GND4842
GNDSRC68
DOTT_96MHz/27MHz43
DOTC_96MHz/27MHz(SS)44
Vtt_PwrGd#/PD39
REF122 SRCT7 66
SRCC7 67
SRCT8 70
SRCC8 69
SRCT9 3
SRCC9 2
SRCC1 51
LCD100/96/SRC0_T 47
SRCT2 52
SRCT4 58
SRCT1 50
CLKREQ4# 57
SRCC2 53
SRCC5 61
SRCC4 59
SRCT5 60
LCD100/96/SRC0_C 48
SRCC3 56
SRCT3 55
SRCT6 63
SRCC6 64
CLKREQ6# 62
CLKREQ8# 71
CLKREQ9# 72
CLKREQ1# 46
CLKREQ5# 29
CLKREQ3# 28
CLKREQ2# 26
CLKREQ7# 38
VDDSRC54
PCICLK127
THRM_PAD73
THRM_PAD76
THRM_PAD74THRM_PAD75
R56 8.2K_0402_5%~D
12
R11 49.9_0402_1%~D
1 2
R46 10K_0402_5%~D
1 2
R28 33_0402_5%~D
1 2
C30.1U_0402_16V4Z~D
1
2
R70 33_0402_5%~D 1 2
C110U_0805_10V4Z~D
1
2
R6910K_0402_5%~D
12
L2BLM18PG600SN1_0603~D
1 2
R68 33_0402_5%~D 1 2
R31 33_0402_5%~D
1 2
R22 49.9_0402_1%~D 1 2
R3 49.9_0402_1%~D
12
R32 39_0402_5%~D
12
R4
2.2K
_040
2_5%
~D
12
C40.1U_0402_16V4Z~D
1
2
R45 33_0402_5%~D
1 2
C6
0.1U_0402_16V4Z~D
1
2
R25 1_0603_5%~D
1 2
R36 39_0402_5%~D
12
R37 56_0402_5%~D
1 2
R52.2K_0402_5%~D
12
R33 33_0402_5%~D
1 2
C14
0.04
7U_0
402_
16V7
K~D
1
2
R7 49.9_0402_1%~D
12
R17 49.9_0402_1%~D
1 2
C10
4.7U
_060
3_6.
3V6M
~D 1
2G
D S Q22N7002W-7-F_SOT323~D
2
1 3
C90.1U_0402_16V4Z~D
1
2
R7210K_0402_5%~D@
12
G
D S
Q12N7002W-7-F_SOT323~D
2
1 3
R65 33_0402_5%~D
1 2
R40 15_0402_5%~D
1 2
R35 39_0402_5%~D
12
R27 2.2_0603_5%~D
1 2
R23 49.9_0402_1%~D 1 2
C20.1U_0402_16V4Z~D
1
2 R6 49.9_0402_1%~D
12
R13 49.9_0402_1%~D 1 2
R53 33_0402_5%~D
1 2
L1BLM18PG600SN1_0603~D
1 2
R42 33_0402_5%~D
1 2
R9 49.9_0402_1%~D
1 2
R10 49.9_0402_1%~D
1 2
C12
4.7U
_060
3_6.
3V6M
~D 1
2
R8 49.9_0402_1%~D
12
R52 10K_0402_5%~D
1 2
C710U_0805_10V4Z~D
1
2
R64 33_0402_5%~D
1 2
R47 10K_0402_5%~D
1 2
C13
0.04
7U_0
402_
16V7
K~D 1
2
R2 49.9_0402_1%~D
12
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_FERR#
H_ADSTB#0
H_D#52
H_D#20
H_REQ#2
H_D#10
H_D#5
H_D#49
H_D#3
H_REQ#0
H_D#39
H_D#57
H_D#29
H_IGNNE#
H_D#34
H_D#14
H_BNR#
H_DSTBP#0
H_D#51
H_D#22
H_DEFER#
H_INIT#
H_REQ#1
H_D#50
H_D#48
H_D#0
H_RS#0
H_DSTBN#1
H_D#58
H_D#28
ITP_BPM#2
H_BPRI#
H_ADS#
ITP_BPM#3
H_RS#1
H_DSTBP#1
H_D#46
H_D#41
H_D#12
H_IERR#H_HITM#
H_DSTBN#0
H_D#47
H_D#37
H_INTR
H_DSTBN#2
H_D#9
H_D#7
H_REQ#4
H_D#31
H_D#13
ITP_DBRESET#
H_DRDY#
H_A20M#
H_D#27
H_D#25
H_D#4
H_DSTBP#2
H_D#56
H_D#35
H_D#59
H_D#63
H_D#45
H_D#24
H_D#30
H_D#55
H_D#40
H_D#19
H_D#62
H_D#44
H_D#23
H_D#2
H_D#8
H_D#6
H_D#54
H_D#33
H_D#18
H_D#16
H_D#61
H_D#43
H_D#1
H_D#26
H_DSTBN#3
H_D#53
H_D#32
H_D#11
H_DSTBP#3
H_D#38
H_D#36
H_D#17
H_D#15
H_NMI
H_D#60
H_D#42
H_D#21
H_BR0#
H_LOCK#
H_DPSLP#
H_HIT#
H_ADSTB#1
H_THERMTRIP#
H_DBSY#
H_RS#2
H_RESET#
ITP_BPM#1
H_REQ#3
H_SMI#H_STPCLK#
ITP_TCK
ITP_TRST#
TEST1TEST2ITP_TMS
H_CPUSLP#
ITP_TDOITP_TDI
ITP_BPM#5
H_DPWR#ITP_BPM#4
CPU_PROCHOT#
H_THERMTRIP#
H_TRDY#
CLK_CPU_BCLKCLK_CPU_BCLK#
ITP_BPM#0
ITP_TDO
ITP_TDO
ITP_TDI
ITP_TRST#
ITP_TCK
ITP_DBRESET#
H_RESET#
H_RESET#
H_THERMDAH_THERMDC
TEST2
H_DPRSTP#
ITP_BPM#5
ITP_TMS
ITP_TCK
ITP_TCK
ITP_DBRESET#
ITP_BPM#0
CLK_CPU_ITP#CLK_CPU_ITP
ITP_TRST#ITP_TMSITP_TDI
ITP_BPM#5
ITP_BPM#4
ITP_BPM#2
ITP_BPM#3
ITP_BPM#1
CPU_PROCHOT#TEST1
H_A#26
H_A#14
H_A#24
H_A#16
H_A#11
H_A#18
H_A#3
H_A#8
H_A#27
H_A#30
H_A#20
H_A#12
H_A#28
H_A#22
H_A#7
H_A#13
H_A#17
H_A#6H_A#5
H_A#10
H_A#15
H_A#31
H_A#9
H_A#19
H_A#25
H_A#21
H_A#23
H_A#4
H_A#29
+1.05V_VCCP
+3.3V_SUS
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
H_THERMTRIP#<18>
H_THERMDA<18>
H_THERMDC<18>
H_ADS#<10>
H_REQ#[0..4]<10>
H_BPRI#<10>H_BNR#<10>
H_HITM#<10>
H_BR0#<10>
H_HIT#<10>
H_D#[0..63] <10>
H_DPSLP#<23>
H_RESET#<10>
H_DRDY#<10>
H_ADSTB#0<10>
H_DSTBP#[0..3] <10>
H_ADSTB#1<10>
H_DSTBN#[0..3] <10>
H_DINV#0 <10>
H_DINV#2 <10>
H_DBSY#<10>
H_DINV#1 <10>
H_IGNNE# <23>
H_INTR <23>H_NMI <23>
H_DINV#3 <10>
H_INIT# <23>
ITP_DBRESET#<24,40>
H_A20M# <23>
H_STPCLK# <23>H_SMI# <23>
H_CPUSLP#<10,23>
H_DPWR#<10>H_DPRSTP#<23,50>
H_TRDY#<10>
CLK_CPU_BCLK<6>CLK_CPU_BCLK#<6>
CLK_CPU_ITP#<6>CLK_CPU_ITP<6>
H_DEFER#<10>
H_LOCK#<10>
H_RS#[0..2]<10>
CPU_PROCHOT#<39>
H_PWRGOOD<23>
H_FERR# <23>
H_A#[3..31]<10>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
Yonah-ULV in mFCPGA479
7 59Friday, May 12, 2006
Compal Electronics, Inc.
H_THERMDA, H_THERMDC routing together.Trace width / Spacing = 10 / 10 mil
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
This shall place near CPU
For Yonah B0
C17
0.1U
_040
2_16
V4Z~
D
1
2
R579 1K_0402_5%~D@1 2
R84 51_0402_5%~D1 2
R78 150_0402_1%~D
1 2
J2
MOLEX_52435-2891_28P~D@
TDI1 TMS2 TRST#3 NC14 TCK5 NC26 TDO7 BCLKN8 BCLKP9 GND010 FBO11 RESET#12 BPM5#13
BPM4#15
BPM3#17
BPM2#19
BPM1#21
BPM0#23 DBA#24 DBR#25 VTAP26 VTT027 VTT128
GND114
GND216
GND318
GND420
GND522
GN
D7
30
C182200P_0402_50V7K~D
@
1
2
R80 22.6_0402_1%~D
1 2R81 27.4_0402_1%~D
1 2
R8256_0402_5%~D
1 2
R76 39_0402_5%~D
1 2
R73 150_0402_1%~D
1 2
C63
30.
1U_0
402_
16V4
Z~D
1
2
R575 54.9_0402_1%~D@1 2
R468 75_0402_5%~D
1 2
ADDR GROUP
CONTROL
HOST CLK
MISC
DATA GROUP
THERMALDIODE
LEGACY CPU
YONAH-ULVU2A
Yonah-ULV_1.06G SC_UFCBGA479~D1@
A3#J4A4#L4A5#M3A6#K5A7#M1A8#N2A9#J1A10#N3A11#P5A12#P2A13#L1A14#P4A15#P1A16#R1A17#Y2A18#U5A19#R3A20#W6A21#U4A22#Y5A23#U2A24#R4A25#T5A26#T3A27#W3A28#W5A29#Y4A30#W2A31#Y1
REQ0#K3REQ1#H2REQ2#K2REQ3#J3REQ4#L5
ADSTB0#L2ADSTB1#V4
BCLK0A22BCLK1A21
ADS#H1BNR#E2BPRI#G5BR0#F1DEFER#H5DRDY#F21HIT#G6HITM#E4IERR#D20LOCK#H4RESET#B1
RS0#F3RS1#F4RS2#G3TRDY#G2
BPM0#AD4BPM1#AD3BPM2#AD1BPM3#AC4
DBR#C20DBSY#E1DPSLP#B5
DPWR#D24PRDY#AC2PREQ#AC1PROCHOT#D21
PWRGOODD6SLP#D7TCKAC5TDIAA6TDOAB3TEST1C26TEST2D25TMSAB5TRST#AB6
THERMDAA24THERMDCA25THERMTRIP#C7
D0# E22D1# F24D2# E26D3# H22D4# F23D5# G25D6# E25D7# E23D8# K24D9# G24
D10# J24D11# J23D12# H26D13# F26D14# K22D15# H25D16# N22D17# K25D18# P26D19# R23D20# L25D21# L22D22# L23D23# M23D24# P25D25# P22D26# P23D27# T24D28# R24D29# L26D30# T25D31# N24D32# AA23D33# AB24D34# V24D35# V26D36# W25D37# U23D38# U25D39# U22D40# AB25D41# W22D42# Y23D43# AA26D44# Y26D45# Y22D46# AC26D47# AA24D48# AC22D49# AC23D50# AB22D51# AA21D52# AB21D53# AC25D54# AD20D55# AE22D56# AF23D57# AD24D58# AE21D59# AD21D60# AE25D61# AF25D62# AF22D63# AF26
DINV0# J26DINV1# M26DINV2# V23DINV3# AC20
DSTBN0# H23DSTBN1# M24DSTBN2# W24DSTBN3# AD23DSTBP0# G22DSTBP1# N25DSTBP2# Y25DSTBP3# AE24
A20M# A6FERR# A5
IGNNE# C4INIT# B3
LINT0 C6LINT1 B4
STPCLK# D5SMI# A3
DPRSTP#E5
R74 51_0402_5%~D
1 2
R7722.6_0402_1%~D
1 2
R79 680_0402_5%~D
1 2
R83 56_0402_5%~D 1 2
R75 54.9_0402_1%~D 1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MAX
8731
_CSS
P
MAX8731_DHI
ACAV_IN
ACAV_IN
MAX
8731
_DAC
MAX8731_CSIN
GNDA_CHGR
MAX8731_CCI
MAX8731_CCS
MAX8731_CSIP
MAX8731_LDO
MAX8731_LDO
MAX8731_REF
MAX8731_ACOK
MAX8731_VCC
N657586
MAX8731_ACIN
MAX8731_LX
MAX8731_BSTB
MAX
8731
_CSS
N
MAX8731_CCV
MAX8731_REF
+VCHGR_L
MAX8731_IINP
MAX8731_IINP
GND
MAX8731_DLO
+CHRG_IN
+VCHGR
+DC_IN_SS
+VCHGR
GNDA_CHGR
+VCHGR
GNDA_CHGR
+PWR_SRC
GNDA_CHGR
+DC_IN_SS
GNDA_CHGR
GNDA_CHGR
+5V_ALW
+5V_ALW +3.3V_ALW
+5V_ALW
+5V_ALW
GNDA_CHGR
+5V_ALW
GNDA_CHGR
GNDA_CHGR
GNDA_CHGR
PBAT_SMBCLK<40,46>
ACAV_IN<18,40>
PBAT_SMBDAT<40,46>
ADAPT_OC <39>
ADAPT_TRIP_SEL<39>Title
Size Document Number Rev
Date: Sheet o f
0.4
Charger
7 10Friday, May 12, 2006
Compal Electronics, Inc.
LA-3071PAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
Smart Charger
Place these CAPsclose to FETs
+DC_IN discharge path
Maximum Battery Charge current = 3.15Awhen system off, S3, S4.
Need double confirm
Need modify
DELL CONFIDENTIAL/PROPRIETARY
Battery Type:4cell: Charging Voltage=17.325V;Charging Current =1.6A6cell: Charging Voltage=12.975V;Charging Current =3.15A9cell:Charging Voltage=12.975V;Charging Current =3.15A
ADAPTER(W)TRIP CURRENT (A) PR142 PR145 PR148 PR154
65
90
130
150
3.17
4.43
6.44
7.44
4.32M 301K 56.2K 27.4K NA
976K 49.9K 13.3K 9.31K 38.3K
33.2K
66.1K
15K
10K
33.2K
20K649K
976K 13.3K
13K
Table1
PR147
G
D
SPQ
26R
HU
002N
06_S
OT3
23
2
13
PR
158
1K_0
603_
1%~D
12
PR11910K_0402_1%~D
12
PC981U_0805_25V4Z~D
12P
C11
60.
01U
_040
2_25
V7K~
D
12
PR1250_0603_5%~D
1 2
PC
129
0.01
U_0
402_
25V8
K1
2
PQ23
SI4
810B
DY
_SO
8~D
365 7 8
2
4
1
PR
144
100K
_040
2_1%
~D1
2
PC
140
0.01
U_0
402_
50V7
K~D
@
12
PR
117
10K_
0402
_1%
~D
12
PC
111
220P
_060
3_50
V8J~
D 1
2
PR155100_0402_5%~D
1 2
PC
105
0.1U
_060
3_25
V7K~
D
12
PR1281_0603_5%~D
1 2
PC
113
0.01
U_0
402_
25V7
K~D
12
PC
103
10U
_120
6_25
V6M
~D
12
PC
122
0.1U
_060
3_25
V7M
~D
12
PC1040.01U_0402_25V7K~D
12
PC
9710
U_1
206_
25V6
M~D
12
PR1424.32M_0402_1%1 2
PC991U_0603_10V6K~D
1 2
PR131
0_0603_5%~D
12
PC
100
2200
P_04
02_5
0V7K
~D
12
PU9ALM393DR_SO8~D
IN+3
IN-2O 1
P8
G4
PR12310K_0402_1%~D
1 2
PL15FBM-L11-453215-900LMAT_1812~D
1 2
PC
114
1U_0
603_
10V6
K~D
12
PU6
MAX8731_TQFN28~D
DHI 24
CSIP 18
LX 23
FBSA 15
SDA9
IINP8
GN
D1
DCIN22
ACIN2
VDD11
SCL10
ACOK13
BATSEL14
BST 25
FBSB 16
CCS4
LDO 21
VCC 26
CSS
P28
CSIN 17
PGND 19
DLO 20
CCV6
CCI5
CSS
N27
REF3
DAC7
GND12
PR120100K_0402_1%~D
12
PL165.6U_HMU1356-5R6_8.8A_20%~D 2 1
PR
127
33_0
603_
1%~D
12
PC
108
0.1U
_080
5_50
V7M
~D
12
PC
115
0.1U
_040
2_10
V7K~
D
12
PR
149
100K
_040
2_1%
~D@
12
PC
110
10U
_120
6_25
V6M
~D
12
PR1460_0402_5%1 2
PC
130
100P
_040
2_50
V8J
12
PR
130
4.7K
_040
2_5%
~D
12
PR
121
365K
_040
2_1%
~D
12
G
D
S
PQ21RHU002N06_SOT323
2
13
1SS
355_
SOD
323~
DP
D19
21
PR
145
301K
_040
2_1%
~D1
2P
C11
20.
01U
_040
2_25
V7K~
D
12
PQ22
IRF7
821_
SO
8~D
365 7 8
2
4
1
PC
101
0.1U
_060
3_25
V7M
~D
12
PC
126
0.01
U_0
402_
25V8
K1
2
PC
139
0.01
U_0
402_
50V7
K~D
@
12
PC
117
0.1U
_040
2_10
V7K~
D
12
PC
102
10U
_120
6_25
V6M
~D
12
PC1071U_0603_10V6K~D
1 2
PR1160.01_2512_1%~D
4
2
1
3
PC1060.1U_0402_10V7K~D
12
PR
118
470K
_040
2_5%
~D
12
G
D
S
PQ20RHU002N06_SOT323
2
13
PD
15R
B75
1V-4
0_SO
D32
3~D
21
PR12449.9K_0402_1%~D
12
PU9BLM393DR_SO8~D
IN+5
IN-6 O 7
P8
G4
PR
147
56.2
K_04
02_1
% 1
2
PQ18SI4835BDY_SO8~D
3 65
78
2
4
1
PR1260_0402_5%~D
1 2
PC
109
10U
_120
6_25
V6M
~D
12
PC
121
2200
P_04
02_5
0V7K
~D
12
PR
143
100K
_040
2_1%
~D 12
PR
132
10K_
0402
_1%
~D
12 PC
135
0.01
U_0
603_
25V7
M~D
@
12
PC
128
100P
_040
2_50
V8J
12
PR12215.8K_0402_1%~D
12
PC
138
3300
P_04
02_5
0V7K
~D
12
PC
125
10P
_040
2_50
V8J~
D
<BOM Structure>
12
PR1290.01_2512_1%~D
4
2
1
3
PR
148
27.4
K_04
02_1
%
12
PC
127
100P
_040
2_50
V8J
12 PC
131
0.01
U_0
402_
25V8
K1
2
PR
154
154K
_040
2_1%
@1
2
PQ19SI4835BDY_SO8~D
365
78
2
4
1
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VSSSENSE
VCCSENSE
VSSSENSE
COMP0
VID3
VID6VID5
VID2
VID4
VID1
VCCSENSE
COMP1
H_PSI#
COMP2
VID0
COMP3
+1.05V_VCCP
+VCC_CORE
+1.05V_VCCP
V_CPU_GTLREF
V_CPU_GTLREF
+1.5V_RUN
+VCC_CORE
+VCC_CORE
H_PSI#<50>
VID0<50>VID1<50>VID2<50>VID3<50>VID4<50>VID5<50>VID6<50>
VCCSENSE<50>VSSSENSE<50>
CPU_MCH_BSEL0<6,10>CPU_MCH_BSEL1<6,10>CPU_MCH_BSEL2<6,10>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
Yonah-ULV in mFCBGA479
8 59Friday, May 12, 2006
Compal Electronics, Inc.
Resistor placed within0.5" of CPU pin.Traceshould be at least 25mils away from anyother toggling signal.
R_B
R_A
Layout close CPU PIN AD26
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
0.5 inch (max)
CPU_BSEL CPU_BSEL2 CPU_BSEL1
133
166
0 0
0 1
CPU_BSEL0
1
1
Length match within 25 mils
Layout close CPUVCCSENSE/VSSSENSEtrace width 18mil,space 7mil, forother signal 15mil
Close to U2.B26
POWER, GROUND
YONAH-ULV
U2C
Yonah-ULV_1.06G SC_UFCBGA479~D1@
VCCAE18VCCAE17VCCAB15VCCAA15VCCAD15VCCAC15VCCAF15VCCAE15VCCAB14VCCAA13VCCAD14VCCAC13VCCAF14VCCAE13VCCAB12VCCAA12VCCAD12VCCAC12VCCAF12VCCAE12VCCAB10VCCAB9VCCAA10VCCAA9VCCAD10VCCAD9VCCAC10VCCAC9VCCAF10VCCAF9VCCAE10VCCAE9VCCAB7VCCAA7VCCAD7VCCAC7VCCB20VCCA20VCCF20VCCE20VCCB18VCCB17VCCA18VCCA17VCCD18VCCD17VCCC18VCCC17VCCF18VCCF17VCCE18VCCE17VCCB15VCCA15VCCD15VCCC15VCCF15VCCE15
VSS K1VSS J2VSS M2VSS N1VSS T1VSS R2VSS V2VSS W1VSS A26VSS D26VSS C25VSS F25VSS B24VSS A23VSS D23VSS E24VSS B21VSS C22VSS F22VSS E21VSS B19VSS A19VSS D19VSS C19VSS F19VSS E19VSS B16VSS A16VSS D16VSS C16VSS F16VSS E16VSS B13VSS A14VSS D13VSS C14VSS F13VSS E14VSS B11VSS A11VSS D11VSS C11VSS F11VSS E11VSS B8VSS A8VSS D8VSS C8VSS F8VSS E8VSS G26VSS K26VSS J25VSS M25VSS N26VSS T26VSS R25VSS V25VSS W26VSS H24VSS G23VSS K23VSS L24VSS P24VSS N23VSS T23VSS U24VSS Y24VSS W23VSS H21VSS J22VSS M22VSS L21VSS P21VSS R22VSS V22VSS U21VSS Y21
VCCB14VCCA13VCCD14VCCC13VCCF14VCCE13VCCB12VCCA12VCCD12VCCC12VCCF12VCCE12VCCB10VCCB9VCCA10VCCA9VCCD10VCCD9VCCC10VCCC9VCCF10VCCF9VCCE10VCCE9VCCB7
VCCF7 VCCA7
R94
54.9
_040
2_1%
~D
12
R88 100_0402_1%~D 1 2
POWER, GROUNG, RESERVED SIGNALS AND NC
YONAH-ULV
U2B
Yonah-ULV_1.06G SC_UFCBGA479~D1@
PSI#AE6
GTLREFAD26
VCCSENSEAF7
VCCAB26
VCCAB20VCCAA20VCCAF20VCCAE20VCCAB18VCCAB17VCCAA18VCCAA17VCCAD18VCCAD17VCCAC18VCCAC17VCCAF18VCCAF17
RSVDT22
RSVDV3RSVDB2RSVDC3
VSS AB26VSS AA25VSS AD25VSS AE26VSS AB23VSS AC24VSS AF24VSS AE23VSS AA22VSS AD22VSS AC21VSS AF21VSS AB19VSS AA19VSS AD19VSS AC19VSS AF19VSS AE19VSS AB16VSS AA16VSS AD16VSS AC16VSS AF16VSS AE16VSS AB13VSS AA14VSS AD13VSS AC14VSS AF13VSS AE14VSS AB11VSS AA11VSS AD11VSS AC11VSS AF11VSS AE11VSS AB8VSS AA8VSS AD8VSS AC8VSS AF8VSS AE8VSS AA5VSS AD5VSS AC6VSS AF6VSS AB4VSS AC3VSS AF3VSS AE4VSS AB1VSS AA2VSS AD2VSS AE1VSS B6VSS C5VSS F5VSS E6VSS H6VSS J5VSS M5VSS L6VSS P6VSS R5VSS V5VSS U6VSS Y6VSS A4VSS D4VSS E3VSS H3VSS G4VSS K4VSS L3VSS P3VSS N4VSS T4VSS U3VSS Y3VSS W4VSS D1VSS C2VSS F2VSS G1RSVDB25
VSSSENSEAE7
VCCPK6VCCPJ6VCCPM6VCCPN6VCCPT6VCCPR6VCCPK21VCCPJ21VCCPM21VCCPN21VCCPT21VCCPR21VCCPV21VCCPW21VCCPV6VCCPG21
VID0AD6VID1AF5VID2AE5VID3AF4VID4AE3VID5AF2VID6AE2
BSEL0B22BSEL1B23BSEL2C21
COMP0R26COMP1U26COMP2U1COMP3V1
RSVDC23RSVDC24RSVDAA1RSVDAA4RSVDAB2RSVDAA3RSVDM4RSVDN5RSVDT2
RSVDD2RSVDF6RSVDD3RSVDC1RSVDAF1RSVDD22
VCCE7
C20
10U
_080
5_6.
3V6M
~D
1
2
R91
27.4
_040
2_1%
~D
12
R93
27.4
_040
2_1%
~D
12
C19
0.01
U_0
402_
16V7
K~D
1
2
R871K_0402_1%~D
12 R89 100_0402_1%~D
1 2
R92
54.9
_040
2_1%
~D
12
R902K_0402_1%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCC_CORE
+VCC_CORE
+VCC_CORE
+1.05V_VCCP
+VCC_CORE
+VCC_CORE
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
CPU Bypass
9 59Friday, May 12, 2006
Compal Electronics, Inc.
High Frequence Decoupling
7mOhmPS CAP
ESR <= 1.5m ohmCapacitor = 1320uF
Near VCORE regulator.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place these insidesocket cavity on L8(North sideSecondary)
Place these insidesocket cavity on L8(Sorth sideSecondary)
South Side Secondary
Place these insidesocket cavity on L8(North sideSecondary)
CRB was 270uF
North Side Secondary
7mOhmPS CAP
6mOhmPS CAP
6/7mOhmPS CAP
Temp. characteristics: X5ROperating range: -55~+85degree
6/7mOhmPS CAP
6mOhmPS CAP
CPU speed1.06G 5.5W1.2G 5.5W
1.2G 9.5W
CPU type
Signal core
Dual core
1@2@3@
P/N
BOM introductionUse of decoupling
1. 220uF poly cap 2pcs2. 22uF MLCC cap 8pcsSA000017Z2L
1.06G 7.5W4@
SA00000Z30L1. 220uF poly cap 4pcs2. 10uF MLCC cap 26pcs
BOM TAA
6@
W/O
W/O5@ W
1.2GSignal core
SA000017Z2LW
8@ 1.06G 5.5W1. 220uF poly cap 2pcs2. 22uF MLCC cap 8pcsSA00000Z33L
SA00000Z33L
Note:C42,C43,C41,C44will change to220U 2.5V 6M onDual Core CPU forCPU transitionnoise
Note:C21,C23,C26,C28,C29,C31,C34,C36use 22U on Single Core CPU anduse 10U on Dual Core CPU.
SA00001CF1L
Part Number Description
SA00000Z33L S IC LE80538UE0042M SL8W7 1.06G C0 FCBGA
Yonah-ULV_1.06G SC_UFCBGA479~D8@
C3622U_0805_6.3V6M~D
1
2
C2122U_0805_6.3V6M~D
1
2
C69710U_0805_4VAM~D4@
1
2
C510.1U_0402_10V7K~D
1
2
C480.1U_0402_16V4Z~D
1
2
+C42
220U
_D_2
VM_R
7M~D
4@
1
2Part Number Description
SA000017Z2L S IC LE80538UE0092M SL8W6 1.2G C0 FCBGA
Yonah-ULV_1.2G SC_UFCBGA479~D6@
C3122U_0805_6.3V6M~D
1
2
+
C44
330U
_D_2
.5VM
_R6M
~D
1
2
C69910U_0805_4VAM~D4@
1
2
C2322U_0805_6.3V6M~D
1
2
C69610U_0805_4VAM~D@
1
2
C4010U_0805_4VAM~D4@
1
2
Part Number Description
SA00001CF1L S IC YONAH ULV QKEY 1.2G C0 FCBGA 479P
Yonah-ULV_1.2G DC_UFCBGA479~D4@
+C70
533
0U_D
_2.5
VM_R
6M~D
@
1
2
C69310U_0805_4VAM~D4@
1
2
C3210U_0805_4VAM~D@
1
2
+
C45
330U
_D2E
_2.5
VM_R
9~D
@
1
2
C70110U_0805_4VAM~D@
1
2
C69810U_0805_4VAM~D4@
1
2
Part Number Description
SA000017Z2L S IC LE80538UE0092M SL8W6 1.2G C0 FCBGA
Yonah-ULV_1.2G SC_UFCBGA479~D2@
C70210U_0805_4VAM~D@
1
2
C460.1U_0402_10V7K~D
1
2
C69510U_0805_4VAM~D@
1
2
C470.1U_0402_10V7K~D
1
2
C2210U_0805_4VAM~D4@
1
2
C3010U_0805_4VAM~D4@
1
2
C70010U_0805_4VAM~D4@
1
2
C70310U_0805_4VAM~D4@
1
2
C500.1U_0402_10V7K~D
1
2
C3310U_0805_4VAM~D4@
1
2
C3422U_0805_6.3V6M~D
1
2
+C70
633
0U_D
_2.5
VM_R
6M~D
@
1
2
C3510U_0805_4VAM~D4@
1
2
C3710U_0805_4VAM~D4@
1
2
Part Number Description
SA00001CF1L S IC YONAH ULV QKEY 1.2G C0 FCBGA 479P
Yonah-ULV_1.2G DC_UFCBGA479~D5@
C70410U_0805_4VAM~D4@
1
2
C2622U_0805_6.3V6M~D
1
2
C2710U_0805_4VAM~D4@
1
2
C3910U_0805_4VAM~D4@
1
2
C2822U_0805_6.3V6M~D
1
2
+C43
220U
_D_2
VM_R
7M~D
4@
1
2
C2410U_0805_4VAM~D@
1
2
+
C41
330U
_D_2
.5VM
_R6M
~D
1
2
C490.1U_0402_16V4Z~D
1
2
C69410U_0805_4VAM~D4@
1
2
C3810U_0805_4VAM~D4@
1
2
C2922U_0805_6.3V6M~D
1
2
C2510U_0805_4VAM~D4@
1
2
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_SWNG1
H_SWNG0
H_VREF
V_DDR_MCH_REF
H_A#28
H_A#15
H_SWNG1
H_XRCOMP
H_D#16
H_D#10
H_A#16
H_D#62
H_D#60
H_D#19
H_D#7
H_D#0
H_A#20
H_A#17
H_A#13
H_SWNG0
H_D#53
H_D#39H_D#38
H_D#32
H_D#13
M_OCDOCMP0
H_A#8
H_D#59
H_D#27
H_D#20
H_A#26
H_A#19
H_D#58
H_D#48
H_D#46
H_D#40
H_D#8
H_D#44
H_D#12
H_D#3
H_D#1
H_A#7
H_YSCOMP
H_D#43
H_D#35
H_D#31
H_D#25H_D#24
H_A#22
H_D#61
H_D#56
H_D#21
H_D#11
H_D#6
H_A#27
H_A#6
H_A#3
H_D#37
H_D#33
H_D#30
H_D#63
H_D#51
H_D#9
H_D#2
SMRCOMPN
H_A#25
H_D#50
H_D#41
H_D#36
H_D#23
H_D#4
H_A#12H_A#11
H_D#54
H_D#42
M_OCDOCMP1
H_A#18
H_A#10
H_D#52
H_D#45
H_D#28
H_D#22
H_A#14
H_XSCOMP
H_D#29
H_A#21
H_D#47
H_D#34
H_D#18
H_A#31H_A#30H_A#29
H_A#24H_A#23
H_D#55
H_D#49
H_D#17
H_D#15
M_ODT0
H_A#9
H_A#5H_A#4
H_D#57
H_D#26
H_D#14
H_D#5
H_YRCOMP
M_CLK_DDR1M_CLK_DDR0
M_CLK_DDR#0M_CLK_DDR#1
PM_EXTTS#0
ICH_PWRGD
M_CLK_DDR#2M_CLK_DDR#3
M_CLK_DDR3M_CLK_DDR2
M_ODT3M_ODT2
PM_EXTTS#1
PM_EXTTS#0
H_DSTBP#0
H_DSTBP#2H_DSTBP#3
H_DSTBN#3
H_DSTBP#1
H_DSTBN#1H_DSTBN#0
H_DSTBN#2
H_DBSY#H_DEFER#
H_DPWR#H_DRDY#
H_HIT#H_HITM#H_LOCK#
H_RS#0
H_RS#2H_RS#1
H_REQ#0
H_REQ#4
H_REQ#2H_REQ#3
H_REQ#1
H_CPUSLP#H_TRDY#
H_RESET#H_VREF
H_BNR#H_BPRI#H_BR0#
H_VREFH_ADSTB#1H_ADSTB#0H_ADS#
V_DDR_MCH_REF
SMRCOMPP
CPU_MCH_BSEL0CPU_MCH_BSEL1CPU_MCH_BSEL2CFG3CFG5
CFG5
CPU_MCH_BSEL0
THERMTRIP_MCH#
DMI_MTX_IRX_N0DMI_MTX_IRX_N1
DMI_MRX_ITX_N0DMI_MRX_ITX_N1
DMI_MTX_IRX_P0DMI_MTX_IRX_P1
DMI_MRX_ITX_P0DMI_MRX_ITX_P1
PLTRST_R#
DDR_CKE0DDR_CKE1DDR_CKE2_DIMMADDR_CKE3_DIMMA
DDR_CS3_DIMMA#DDR_CS2_DIMMA#DDR_CS1#
M_OCDOCMP1M_OCDOCMP0
CFG6
PM_EXTTS#1
M_ODT1
DDR_CS0#
+1.8V_SUS
+3.3V_RUN
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
H_D#[0..63]<7>
CLK_MCH_BCLK# <6>CLK_MCH_BCLK <6>
H_CPUSLP# <7,23>
V_DDR_MCH_REF<15,16,17,49>
MCH_DREFCLK <6>MCH_DREFCLK# <6>
ICH_PWRGD <24,43>
MCH_ICH_SYNC# <22>
CLK_3GPLLREQ# <6>
PM_BMBUSY# <24>
THERMTRIP_MCH# <18>
PLTRST# <20,22,24,29,36>
H_REQ#[0..4] <7>
H_DPWR# <7>H_DRDY# <7>
H_DSTBP#[0..3] <7>
H_DSTBN#[0..3] <7>
H_HIT# <7>H_HITM# <7>H_LOCK# <7>
H_RS#[0..2] <7>
H_BPRI# <7>
CFG19<13>
CPU_MCH_BSEL0 <6,8>DMI_MRX_ITX_N0<24>DMI_MRX_ITX_N1<24>DMI_MRX_ITX_P0<24>DMI_MRX_ITX_P1<24>
CPU_MCH_BSEL1 <6,8>CPU_MCH_BSEL2 <6,8>
DDR_CKE0<16,17>
DDR_CKE3_DIMMA<15>DDR_CKE2_DIMMA<15>
DDR_CS3_DIMMA#<15>DDR_CS2_DIMMA#<15>
DDR_CS0#<16,17>
H_A#[3..31] <7>
H_ADS# <7>H_ADSTB#0 <7>H_ADSTB#1 <7>
H_BNR# <7>
H_BR0# <7>H_RESET# <7>
H_DBSY# <7>H_DEFER# <7>H_DINV#0 <7>
H_DINV#2 <7>H_DINV#1 <7>
H_DINV#3 <7>
H_TRDY# <7>
DMI_MTX_IRX_N0<24>DMI_MTX_IRX_N1<24>DMI_MTX_IRX_P0<24>DMI_MTX_IRX_P1<24>
M_CLK_DDR0<16,17>M_CLK_DDR1<16,17>
M_CLK_DDR2<15>M_CLK_DDR3<15>
M_CLK_DDR#0<16,17>M_CLK_DDR#1<16,17>
M_CLK_DDR#2<15>M_CLK_DDR#3<15>
M_ODT0<16,17>
M_ODT2<15>M_ODT3<15>
DREF_SSCLK# <6>DREF_SSCLK <6>
PM_EXTTS#0 <15>PM_EXTTS#1 <24>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
Calistoga(1 of 5)
10 59Friday, May 12, 2006
Compal Electronics, Inc.
Layout Note:H_XRCOMP & H_YRCOMP trace widthand spacing is 10/20
Layout Note:Route as shortas possible
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Stuff R111 & R112 for A1 Calistoga
(DMI Lane Reversal)CFG19
Calistoga-GMS not have CFG4,CFG[7..18],CFG[20]Need to double check
*Low = DMI x 2
High = DMI x 4CFG5
Strap Pin Table
Low = NormalOperation (Default):Lane number in Order
High = Reverse Lane
R10
5
200_
0402
_1%
~D
12
C53
0.1U
_040
2_10
V6K~
D
1
2
T2PAD~D
C52
0.1U
_040
2_10
V6K~
D
1
2
R10
454
.9_0
402_
1%~D
12
R101 80.6_0402_1%~D
1 2
CFG/
RSVD
DMI
PM
DDR2
MUX
ING
CLK
Calistoga-GMS_FCBGA998~D
U3B
DMI_RXN_0Y29DMI_RXN_1Y32DMI_RXP_0Y28DMI_RXP_1Y31
DMI_TXN_0V28DMI_TXN_1V31DMI_TXP_0V29DMI_TXP_1V32
SM_CK_0AF33SM_CK_1AG1
SM_CK_2AJ1SM_CK_3AM30
SM_CK#_0AG33SM_CK#_1AF1
SM_CK#_2AK1SM_CK#_3AN30
SM_CKE_0AN21SM_CKE_1AN22SM_CKE_2AF26SM_CKE_3AF25
SM_CS#_0AG14SM_CS#_1AF12SM_CS#_2AK14SM_CS#_3AH12
SM_OCDCOMP_0AJ21SM_OCDCOMP_1AF11
SM_ODT_0AE12SM_ODT_1AF14SM_ODT_2AJ14SM_ODT_3AJ12
SM_RCOMPNAN12SM_RCOMPPAN14SM_VREF_0AA33SM_VREF_1AE1 D_REFCLKN A27
D_REFCLKP A26D_REFSSCLKN J33D_REFSSCLKP H33
THRMTRIP# J15PWROK AB29RSTIN# W27
PM_BMBUSY# G21PM_EXTTS#_0 F26
CFG_0 C18CFG_1 E18CFG_2 G20
CFG_5 J20CFG_6 J18
PM_EXTTS#_1 H26
RESERVED8 F18
CLKREQ# J22
CFG_3 G18
PM_ICHSYNC# E31
RESERVED9 A3
RESERVED7 C17
RESERVED1 K32RESERVED2 K31
R10
724
.9_0
402_
1%~D
12
R97
221_
0402
_1%
~D
12
T14 PAD~D
R113 1K_0402_5%~D @1 2
T13 PAD~D
R10
624
.9_0
402_
1%~D
12
C55
0.1U
_040
2_10
V6K~
D
@
1
2
R109 10K_0402_5%~D@12
R96
100_
0402
_1%
~D
12
R100100_0402_1%~D
1 2
T15 PAD~D
T3PAD~D
R98
100_
0402
_1%
~D
12
R10
210
0_04
02_1
%~D
12
R110 1K_0402_5%~D @1 2
R10
354
.9_0
402_
1%~D
12
R11
140
.2_0
402_
1%~D
@
12
R95
221_
0402
_1%
~D
12
R108 10K_0402_5%~D
12
R11
240
.2_0
402_
1%~D
@
12
HOST
Calistoga-GMS_FCBGA998~D
U3A
H_XRCOMPA10H_XSCOMPA6H_XSWINGC15H_YRCOMPJ1H_YSCOMPK1H_YSWINGH1
H_D#_0C4H_D#_1F6H_D#_2H9H_D#_3H6H_D#_4F7H_D#_5E3H_D#_6C2H_D#_7C3H_D#_8K9H_D#_9F5H_D#_10J7H_D#_11K7H_D#_12H8H_D#_13E5H_D#_14K8H_D#_15J8H_D#_16J2H_D#_17J3H_D#_18N1H_D#_19M5H_D#_20K5H_D#_21J5H_D#_22H3H_D#_23J4H_D#_24N3H_D#_25M4H_D#_26M3H_D#_27N8H_D#_28N6H_D#_29K3H_D#_30N9H_D#_31M1H_D#_32V8H_D#_33V9H_D#_34R6H_D#_35T8H_D#_36R2H_D#_37N5H_D#_38N2H_D#_39R5H_D#_40U7H_D#_41R8H_D#_42T4H_D#_43T7H_D#_44R3H_D#_45T5H_D#_46V6H_D#_47V3H_D#_48W2H_D#_49W1H_D#_50V2H_D#_51W4H_D#_52W7H_D#_53W5H_D#_54V5H_D#_55AB4H_D#_56AB8H_D#_57W8H_D#_58AA9H_D#_59AA8H_D#_60AB1H_D#_61AB7H_D#_62AA2H_D#_63AB5
H_A#_3 F8H_A#_4 D12H_A#_5 C13H_A#_6 A8H_A#_7 E13H_A#_8 E12H_A#_9 J12
H_A#_10 B13H_A#_11 A13H_A#_12 G13H_A#_13 A12H_A#_14 D14H_A#_15 F14H_A#_16 J13H_A#_17 E17H_A#_18 H15H_A#_19 G15H_A#_20 G14H_A#_21 A15H_A#_22 B18H_A#_23 B15H_A#_24 E14H_A#_25 H13H_A#_26 C14H_A#_27 A17H_A#_28 E15H_A#_29 H17H_A#_30 D17H_A#_31 G17
H_ADS# F10H_ADSTB#_0 C12H_ADSTB#_1 H16
H_VREF0 E2H_BNR# B9H_BPRI# C7
H_BREQ0# G8H_CPURST# B10
HCLKN AA6HCLKP AA5
H_DBSY# C10H_DEFER# C6H_DINV#_0 H5H_DINV#_1 J6H_DINV#_2 T9H_DINV#_3 U6H_DPWR# G7H_DRDY# E6
H_DSTBN#_0 F3H_DSTBN#_1 M8H_DSTBN#_2 T1H_DSTBN#_3 AA3H_DSTBP#_0 F4H_DSTBP#_1 M7H_DSTBP#_2 T2H_DSTBP#_3 AB3
H_HIT# C8H_HITM# B4H_LOCK# C5
H_REQ#_0 G9H_REQ#_1 E9H_REQ#_2 G12H_REQ#_3 B8H_REQ#_4 F12
H_RS#_0 A5H_RS#_1 B6H_RS#_2 G10
H_SLPCPU# E8H_TRDY# E10
H_VREF1 E1
R115 2.2K_0402_5%~D1 2
R114 75_0402_5%~D
1 2
R99 80.6_0402_1%~D 1 2
C54
0.1U
_040
2_10
V6K~
D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D58
DDR_A_D43
DDR_A_D39
DDR_B_MA9DDR_B_MA8
DDR_A_D61
DDR_A_D52
DDR_A_D27
DDR_A_D13
DDR_A_D3
DDR_B_MA2
DDR_A_D56
DDR_A_D45
DDR_A_D42
DDR_A_D37
DDR_A_D31
DDR_A_D26
DDR_A_D49
DDR_A_D38
DDR_A_D15
DDR_A_D11
DDR_A_D8
DDR_B_MA6DDR_B_MA5DDR_B_MA4
DDR_B_RAS#
DDR_A_D47
DDR_A_D23
DDR_A_D20
DDR_B_MA12
DDR_A_BS0
DDR_A_D62
DDR_A_D54
DDR_A_D50
DDR_A_D18
DDR_A_D9
DDR_A_D5
DDR_A_D48
DDR_A_D4
DDR_A_D17
DDR_A_D14
DDR_A_D10
DDR_B_MA1
DDR_A_D46
DDR_A_D41
DDR_B_MA11DDR_B_CAS#
DDR_A_D36
DDR_A_D25
DDR_B_MA0DDR_A_D55
DDR_A_D32
DDR_A_D30
DDR_B_WE#
DDR_A_D59
DDR_A_D51
DDR_A_D34
DDR_A_D12
DDR_A_D6
DDR_A_BS1
DDR_A_D44
DDR_A_D35
DDR_A_D21
DDR_A_D19
DDR_A_D40
DDR_A_D28
DDR_A_D24
DDR_B_MA10
DDR_A_D60
DDR_A_D33
DDR_A_D2DDR_A_D1DDR_A_D0
DDR_B_MA7 DDR_A_D63
DDR_A_D53
DDR_A_D16
DDR_B_MA3
DDR_A_D57
DDR_A_D29
DDR_A_D22
DDR_A_D7
DDR_A_DM0
DDR_A_DM3
DDR_A_DM1
DDR_A_DM4
DDR_A_DM6
DDR_A_DM2
DDR_A_DM5
DDR_A_DM7
DDR_A_DQS0
DDR_A_DQS2DDR_A_DQS1
DDR_A_DQS6
DDR_A_DQS3
DDR_A_DQS7
DDR_A_DQS4DDR_A_DQS5
DDR_A_DQS#1
DDR_A_DQS#4DDR_A_DQS#3
DDR_A_DQS#6
DDR_A_DQS#2
DDR_A_DQS#5
DDR_A_DQS#7
DDR_A_DQS#0
DDR_A_MA0DDR_A_MA1DDR_A_MA2DDR_A_MA3
DDR_A_MA7DDR_A_MA6
DDR_A_MA4DDR_A_MA5
DDR_A_MA9DDR_A_MA8
DDR_A_MA11DDR_A_MA10
DDR_A_MA12
DDR_A_CAS#DDR_A_RAS#
SA_RCVENIN#SA_RCVENOUT#
DDR_A_WE#
DDR_B_BS0DDR_B_BS1
DDR_B_MA13
DDR_B_BS2
DDR_A_MA13
DDR_A_D[0..63] <15,16>
DDR_A_BS1<16,17>DDR_A_BS0<16,17>
DDR_B_MA[0..13]<15>
DDR_B_WE# <15>
DDR_B_CAS# <15>DDR_B_RAS# <15>
DDR_A_DM[0..7]<15,16>
DDR_A_MA[0..13]<16,17>
DDR_A_CAS#<16,17>DDR_A_RAS#<16,17>
DDR_A_WE#<16,17>
DDR_B_BS1<15>DDR_B_BS0<15>
DDR_B_BS2<15>
DDR_A_DQS#[0..7]<15,16>
DDR_A_DQS[0..7]<15,16>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
Calistogo(2 of 5)
11 59Friday, May 12, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DDR2 SYSTEM MEMORY
Calistoga-GMS_FCBGA998~D
U3C
SA_DQ_0 AC31SA_DQ_1 AB28SA_DQ_2 AE33SA_DQ_3 AF32SA_DQ_4 AC33SA_DQ_5 AB32SA_DQ_6 AB31SA_DQ_7 AE31SA_DQ_8 AH31SA_DQ_9 AK31
SA_DQ_10 AL28SA_DQ_11 AK27SA_DQ_12 AH30SA_DQ_13 AL32SA_DQ_14 AJ28SA_DQ_15 AJ27SA_DQ_16 AH32SA_DQ_17 AF31SA_DQ_18 AH27SA_DQ_19 AF28SA_DQ_20 AJ32SA_DQ_21 AG31SA_DQ_22 AG28SA_DQ_23 AG27SA_DQ_24 AN27SA_DQ_25 AM26SA_DQ_26 AJ26SA_DQ_27 AJ25SA_DQ_28 AL27SA_DQ_29 AN26SA_DQ_30 AH25SA_DQ_31 AG26SA_DQ_32 AM12SA_DQ_33 AL11SA_DQ_34 AH9SA_DQ_35 AK9SA_DQ_36 AM11SA_DQ_37 AK11SA_DQ_38 AM8SA_DQ_39 AK8SA_DQ_40 AG9SA_DQ_41 AF9SA_DQ_42 AF8SA_DQ_43 AK6SA_DQ_44 AF7SA_DQ_45 AG11SA_DQ_46 AJ6SA_DQ_47 AH6SA_DQ_48 AN6SA_DQ_49 AM6SA_DQ_50 AK3SA_DQ_51 AL2SA_DQ_52 AM5SA_DQ_53 AL5SA_DQ_54 AJ3SA_DQ_55 AJ2SA_DQ_56 AG2SA_DQ_57 AF3SA_DQ_58 AE7SA_DQ_59 AF6SA_DQ_60 AH5SA_DQ_61 AG3SA_DQ_62 AG5SA_DQ_63 AF5
SB_CAS# AG19SB_RAS# AG21SB_WE# AG20
SB_MA_0AN20SB_MA_1AL21SB_MA_2AK21SB_MA_3AK22SB_MA_4AL22SB_MA_5AH22SB_MA_6AG22SB_MA_7AF21SB_MA_8AM21SB_MA_9AE21SB_MA_10AL20SB_MA_11AE22SB_MA_12AE26SB_MA_13AE20
SA_CAS#AJ17SA_RAS#AK18SA_RCVENIN#AN28SA_RCVENOUT#AM28SA_WE#AH17
SA_MA_0AJ15SA_MA_1AM17SA_MA_2AM15SA_MA_3AH15SA_MA_4AK15SA_MA_5AN15SA_MA_6AJ18SA_MA_7AF19SA_MA_8AN17SA_MA_9AL17SA_MA_10AG16SA_MA_11AL18SA_MA_12AG18SA_MA_13AL14
SA_DQS#_0AC29SA_DQS#_1AK30SA_DQS#_2AJ33SA_DQS#_3AM25SA_DQS#_4AN8SA_DQS#_5AJ8SA_DQS#_6AM3SA_DQS#_7AE2
SA_DQS_0AC28SA_DQS_1AJ30SA_DQS_2AK33SA_DQS_3AL25SA_DQS_4AN9SA_DQS_5AH8SA_DQS_6AM2SA_DQS_7AE3
SA_DM_0AB30SA_DM_1AL31SA_DM_2AF30SA_DM_3AK26SA_DM_4AL9SA_DM_5AG7SA_DM_6AK5SA_DM_7AH3
SA_BS_0AK12SA_BS_1AH11SA_BS_2AG17
SB_BS_0AH21SB_BS_1AJ20SB_BS_2AE27
T4 PAD~DT5 PAD~D
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DAT_DDC2
CLK_DDC2
LCTLA_CLK
LCTLB_DATA
G_DAT_DDC2
VGA_RED
VGA_GRN
VGA_BLU
LCD_A2+
LCD_A2-
SDVO_CTRLDATA
L_IBG
LCD_A1-LCD_A0-
LCD_A0+LCD_A1+
G_CLK_DDC2
DVO_BLUE_C
SDVO_CTRLCLK+PEGCOMP
TVIREF
G_CLK_DDC2G_DAT_DDC2
CRT_IREF
BIA_PWMPANEL_BKEN
LCTLB_DATALCTLA_CLK
LCD_DDCDATALCD_DDCCLK
DVO_RED#_C
DVO_RED_C
DVO_GREEN#_C
DVO_GREEN_C
DVO_BLUE#_CDVO_CLK#_C
DVO_CLK_C
LCD_DDCDATA
LCD_DDCCLK
LCD_ACLK-LCD_ACLK+
LCD_ACLK-
LCD_A1-
LCD_A2+
LCD_ACLK+
LCD_A0+
LCD_A1+
LCD_A2-
LCD_A0-
+1.5VRUN_PCIE
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
DAT_DDC2 <21,38>
SDVOB_BLUE+ <20>
LCD_A0+<19>LCD_A1+<19>LCD_A2+<19>
LCD_A0-<19>LCD_A1-<19>LCD_A2-<19>
CLK_MCH_3GPLL#<6>CLK_MCH_3GPLL<6>
BIA_PWM<19,40>
LCD_DDCDATA<19>
LCD_ACLK-<19>
SDVOB_RED- <20>
SDVOB_RED+ <20>
SDVOB_GREEN- <20>
SDVOB_GREEN+ <20>
SDVOB_BLUE- <20>SDVOB_CLK- <20>
SDVOB_CLK+ <20>
LCD_ACLK+<19>
SDVOB_INT- <20>
SDVOB_INT+ <20>
TV_CVBS <38>TV_Y <38>TV_C <38>
SDVO_CTRLDATA<20>
VGA_BLU<21,38>
VGA_GRN<21,38>
VGA_RED<21,38>
VGA_VSYNC<21>VGA_HSYNC<21>
PANEL_BKEN<19>
ENVDD<19>
SDVO_CTRLCLK<20>
LCD_DDCCLK<19>
CLK_DDC2 <21,38>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
Calistoga(3 of 5)
12 59Friday, May 12, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Close to U3.H25
Close to U3.G23R126 150_0402_1%~D
12
C57 0.1U_0402_10V6K~D
1 2
R128 150_0402_1%~D
12
R12
015
0_04
02_1
%~D
12
R12
115
0_04
02_1
%~D
12
C7133.3P_0402_50VJ~D
1
2
R580 2.2K_0402_5%~D
1 2
R13
02.
2K_0
402_
5%~D
1
2
C7123.3P_0402_50VJ~D
1
2
R581 2.2K_0402_5%~D
1 2
C56 0.1U_0402_10V6K~D
1 2
C58 0.1U_0402_10V6K~D
1 2
R12
92.
2K_0
402_
5%~D
12
R123 10K_0402_5%~D
1 2
R11
915
0_04
02_1
%~D
12
R11624.9_0402_1%~D 1 2
SDVO
LVDS
VGA
TV
MISC
Calistoga-GMS_FCBGA998~D
U3F
SDVO_CTRLCLKJ27G_CLKNY26G_CLKPAA26
SDVO_CTRLDATAH27
TV_DACA A21TV_DACB C20TV_DACC E20TV_IREF G23
TV_IRTNA B21TV_IRTNB C21TV_IRTNC D21
CRT_DDC_CLKH20CRT_DDC_DATAH22CRT_BLUEA24CRT_BLUE#A23CRT_GREENE25CRT_GREEN#F25CRT_REDC25CRT_RED#D25CRT_VSYNCF27CRT_HSYNCD27CRT_IREFH25
L_BKLTCTLH30L_BKLTENG29L_CLKCTLAF28L_CTLBDATAE28L_DDC_CLKG28L_DDC_DATAH28L_VDDENK30L_IBGK27L_VBGJ29L_VREFHJ30L_VREFLK29
LA_CLKND30LA_CLKPC30
LA_DATAN_0G31LA_DATAN_1F32LA_DATAN_2D31
LA_DATAP_0H31LA_DATAP_1G32LA_DATAP_2C31
SDVO_RED N28SDVO_GREEN M32
SDVO_BLUE P33SDVO_CLKP R32
SDVO_RED# P28SDVO_GREEN# N32
SDVO_BLUE# P32SDVO_CLKN T32
SDVO_TVCLKIN M30SDVO_INT P30
SDVO_FLDSTALL T30
SDVO_TVCLKIN# N30SDVO_INT# R30
SDVO_FLDSTALL# T29
EXP_A_COMPI R28EXP_A_ICOMPO M28
LB_DATAN_0F33LB_DATAN_1D33LB_DATAN_2F30
LB_DATAP_0E33LB_DATAP_1D32LB_DATAP_2F29
LB_CLKNA30LB_CLKPA29
TV_DCONSEL0 G26TV_DCONSEL1 J26
C60 0.1U_0402_10V6K~D
1 2
R127 150_0402_1%~D
12
R117 255_0402_1%~D
12
R12
24.
99K_
0402
_1%
~D
12
G
DS
Q32N7002W-7-F_SOT323~D
2
13
C62 0.1U_0402_10V6K~D
1 2
R118 1.5K_0402_1%~D
12
G
DS
Q42N7002W-7-F_SOT323~D
2
13
C61 0.1U_0402_10V6K~D
1 2
C63 0.1U_0402_10V6K~D
1 2
C7143.3P_0402_50VJ~D
1
2
C59 0.1U_0402_10V6K~D
1 2
C7118.2P_0402_50V8J~D
1
2
R124 10K_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CFG19
+1.5V_RUN+1.05V_VCCP
+1.05V_VCCP
CFG19 <10>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
Calistoga(4 of 5)
13 59Friday, May 12, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
CRB 270uF
+
C71
220U
_D2_
4M_R
45~D
1
2
C66
0.1U
_040
2_10
V6K~
D
1
2
C67
10U
_080
5_6.
3V6M
~D
1
2
NC
Calistoga-GMS_FCBGA998~D
U3G
NC1W33NC2AM33NC3AL33NC4C33NC5B33NC6AN32NC7A32NC8AN31NC9W28NC10V27NC11W29NC12J24NC13H24NC14W32NC15G24NC16F24NC17E24NC18D24NC19K33NC20A31NC21E21NC22C23NC23AN19NC24AM19NC25AL19
NC29AN3NC30Y9NC31J19NC32H19NC33G19NC34F19NC35E19NC36D19NC37C19NC38B19
NC41G16NC42F16NC43E16NC44D16NC45C16NC46B16NC47AN2
NC49Y7NC50AM4NC51AF4NC52AD4NC53AL4NC54AK4
NC57AH4NC58AG4NC59AE4NC60AM1
NC64 Y5NC63 AL1NC62 Y6NC61 W30
RESERVED26 Y25RESERVED27 Y24RESERVED28 AB22RESERVED29 AB21RESERVED30 AB19RESERVED31 AB16RESERVED32 AB14RESERVED33 AA12RESERVED34 W24RESERVED35 AA24RESERVED36 AB24RESERVED37 AB20RESERVED38 AB18RESERVED39 AB15RESERVED40 AB13RESERVED41 AB12
NC28AH19
NC26AK19NC27AJ19
NC39A19NC40Y8
NC48A16
NC55W31NC56AJ4 RESERVED42 AB17
NC65 Y10NC66 W10NC67 W25NC68 V24NC69 U24NC70 V10NC71 U10NC72 K18
C64
0.1U
_040
2_10
V6K~
D
1
2
NCTF
Calistoga-GMS_FCBGA998~D
U3H
VCC_NCTF1T25VCC_NCTF2R25VCC_NCTF3P25VCC_NCTF4N25VCC_NCTF5M25VCC_NCTF6P24VCC_NCTF7N24VCC_NCTF8M24VCC_NCTF9Y22VCC_NCTF10W22VCC_NCTF11V22VCC_NCTF12U22VCC_NCTF13T22VCC_NCTF14R22VCC_NCTF15P22VCC_NCTF16N22VCC_NCTF17M22VCC_NCTF18Y21VCC_NCTF19W21VCC_NCTF20V21VCC_NCTF21U21VCC_NCTF22T21VCC_NCTF23R21VCC_NCTF24P21VCC_NCTF25N21VCC_NCTF26M21VCC_NCTF27Y20VCC_NCTF28W20VCC_NCTF29V20VCC_NCTF30U20VCC_NCTF31T20VCC_NCTF32R20VCC_NCTF33P20VCC_NCTF34N20VCC_NCTF35M20VCC_NCTF36Y19VCC_NCTF37P19VCC_NCTF38N19VCC_NCTF39M19VCC_NCTF40Y18VCC_NCTF41P18VCC_NCTF42N18VCC_NCTF43M18VCC_NCTF44Y17VCC_NCTF45P17VCC_NCTF46N17VCC_NCTF47M17VCC_NCTF48Y16VCC_NCTF49P16VCC_NCTF50N16VCC_NCTF51M16VCC_NCTF52Y15VCC_NCTF53P15VCC_NCTF54N15VCC_NCTF55M15VCC_NCTF56Y14
VCCAUX_NCTF1 AD25VCCAUX_NCTF2 AC25VCCAUX_NCTF3 AB25VCCAUX_NCTF4 AD24VCCAUX_NCTF5 AC24VCCAUX_NCTF6 AD22VCCAUX_NCTF7 AD21VCCAUX_NCTF8 AD20VCCAUX_NCTF9 AD19
VCCAUX_NCTF10 AD18VCCAUX_NCTF11 AD17VCCAUX_NCTF12 AD16VCCAUX_NCTF13 AD15VCCAUX_NCTF14 AD14VCCAUX_NCTF15 K14VCCAUX_NCTF16 AD13VCCAUX_NCTF17 Y13VCCAUX_NCTF18 W13VCCAUX_NCTF19 V13VCCAUX_NCTF20 U13VCCAUX_NCTF21 T13VCCAUX_NCTF22 R13VCCAUX_NCTF23 P13VCCAUX_NCTF24 N13VCCAUX_NCTF25 M13VCCAUX_NCTF26 AD12VCCAUX_NCTF27 Y12VCCAUX_NCTF28 W12
VSS_NCTF1 AN33VSS_NCTF2 AA25VSS_NCTF3 V25VSS_NCTF4 U25VSS_NCTF5 AA22VSS_NCTF6 AA21VSS_NCTF7 AA20VSS_NCTF8 AA19VSS_NCTF9 AA18
VSS_NCTF10 AA17VSS_NCTF11 AA16VSS_NCTF12 AA15VSS_NCTF13 AA14
VTT_NCTF1T10VTT_NCTF2R10VTT_NCTF3P10VTT_NCTF4N10VTT_NCTF5L10
VCC_NCTF57W14VCC_NCTF58V14VCC_NCTF59U14VCC_NCTF60T14VCC_NCTF61R14
VCCAUX_NCTF29 V12VCCAUX_NCTF30 U12VCCAUX_NCTF31 T12VCCAUX_NCTF32 R12VCCAUX_NCTF33 P12VCCAUX_NCTF34 N12VCCAUX_NCTF35 M12VCCAUX_NCTF36 AD11VCCAUX_NCTF37 AD10VCCAUX_NCTF38 K10
VCC_NCTF62P14VCC_NCTF63N14VCC_NCTF64M14
VTT_NCTF6D1
VSS_NCTF14 AA13VSS_NCTF15 A4VSS_NCTF16 A33VSS_NCTF17 B2VSS_NCTF18 AN1VSS_NCTF19 C1
RSVD_3M10RSVD_4A18RSVD_5AB10RSVD_6AA10
CFG_19 K28
RESERVED10 K25RESERVED11 K26RESERVED12 R24RESERVED13 T24RESERVED14 K21RESERVED15 K19RESERVED16 K20RESERVED17 K24RESERVED18 K22RESERVED19 J17RESERVED20 K23RESERVED21 K17RESERVED22 K12RESERVED23 K13RESERVED24 K16RESERVED25 K15
C68
10U
_080
5_6.
3V6M
~D
1
2
+
C70
220U
_D2_
4M_R
45~D
1
2
VSS
Calistoga-GMS_FCBGA998~D
U3E
VSS_1AH33VSS_2Y33VSS_3V33VSS_4R33
VSS_6AK32VSS_7AG32VSS_8AE32VSS_9AC32VSS_10AA32VSS_11U32VSS_12H32VSS_13E32VSS_14C32VSS_15AM31VSS_16AJ31VSS_17AA31VSS_18U31VSS_19T31VSS_20R31VSS_21P31VSS_22N31VSS_23M31VSS_24J31VSS_25F31VSS_26AL30VSS_27AG30VSS_28AE30VSS_29AC30VSS_30AA30VSS_31Y30VSS_32V30VSS_33U30VSS_34G30VSS_35E30VSS_36B30VSS_37AA29VSS_38U29VSS_39R29VSS_40P29VSS_41N29VSS_42M29VSS_43H29VSS_44E29VSS_45B29VSS_46AK28VSS_47AH28VSS_48AE28VSS_49AA28VSS_50U28VSS_51T28VSS_52J28VSS_53D28VSS_54AM27VSS_55AF27VSS_56AB27VSS_57AA27VSS_58Y27VSS_59U27VSS_60T27VSS_61R27VSS_62P27VSS_63N27VSS_64M27VSS_65G27
VSS_67C27VSS_68B27VSS_69AL26
VSS_71W26VSS_72U26VSS_73AN25VSS_74AK25
VSS_77J25VSS_78G25VSS_79A25VSS_80H23VSS_81F23
VSS_111 J16VSS_112 AL15VSS_113 AG15VSS_114 W15VSS_115 R15VSS_116 F15VSS_117 D15VSS_118 AM14VSS_119 AH14VSS_120 AE14VSS_121 H14VSS_122 B14VSS_123 F13VSS_124 D13VSS_125 AL12VSS_126 AG12VSS_127 H12VSS_128 B12VSS_129 AN11VSS_130 AJ11VSS_131 AE11VSS_132 AM9
VSS_134 AB9VSS_135 W9VSS_136 R9VSS_137 M9VSS_138 J9VSS_139 F9VSS_140 C9VSS_141 A9VSS_142 AL8VSS_143 AG8VSS_144 AE8VSS_145 U8VSS_146 AA7VSS_147 V7VSS_148 R7VSS_149 N7VSS_150 H7VSS_151 E7VSS_152 B7VSS_153 AL6VSS_154 AG6VSS_155 AE6VSS_156 AB6VSS_157 W6VSS_158 T6VSS_159 M6VSS_160 K6VSS_161 AN5VSS_162 AJ5VSS_163 B5VSS_164 AA4VSS_165 V4VSS_166 R4VSS_167 N4VSS_168 K4VSS_169 H4VSS_170 E4VSS_171 AL3VSS_172 AD3VSS_173 W3VSS_174 T3
VSS_5G33
VSS_133 AJ9
VSS_175 B3VSS_176 AK2VSS_177 AH2VSS_178 AF2VSS_179 AB2VSS_180 M2VSS_181 K2VSS_182 H2VSS_183 F2VSS_184 V1VSS_185 R1
VSS_66E27
VSS_70AH26
VSS_75AG25VSS_76AE25
VSS_82B23
VSS_84AJ22VSS_85AF22VSS_86G22
VSS_83AM22
VSS_87E22VSS_88J21VSS_89H21VSS_90F21VSS_91AM20
VSS_100AF18 VSS_99AH18 VSS_98AM18
VSS_96W19 VSS_95D20 VSS_94AF20
VSS_92AK20VSS_93AH20
VSS_97R19
VSS_101U18VSS_102H18VSS_103D18VSS_104AK17VSS_105V17VSS_106T17VSS_107F17VSS_108B17VSS_109AH16VSS_110U16
C65
0.1U
_040
2_10
V6K~
D
1
2he
xainf
@ho
tmail
.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VSSA_TVBG
U3_F1
U3_AB33
U3_AH1
VSSA_TVBG
+3V
RU
N_A
TV
+3.3V_TV+2.5V_CRT
+3GPLL_R
U3_AM32
U3_AN4
U3_AN18
U3_AA1
U3_A14
U3_A7
+2.5V_CRTDAC
+3GPLL_L
+VCC3G_R
+2.5V_RUN
+2.5V_RUN +1.5VRUN_PCIE
+2.5V_RUN
+1.5VRUN_QTVDAC
+2.5V_RUN
+3VRUN_ATVBG
+3VRUN_TVDACC
+3VRUN_TVDACB
+3VRUN_TVDACA
+2.5V_RUN
+1.5VRUN_MPLL+1.5VRUN_HPLL+1.5VRUN_DPLLA+1.5VRUN_DPLLB
+1.5VRUN_3GPLL+2.5V_RUN
+3VRUN_TVDACA
+3VRUN_TVDACB
+3V_TVDAC
+3VRUN_ATVBG
+3VRUN_TVDACC
+1.5VRUN_3GPLL
+1.5VRUN_HPLL +1.5VRUN_DPLLA
+1.5VRUN_MPLL
+1.5VRUN_DPLLB
+1.5VRUN_QTVDAC
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+2.5V_RUN
+2.5V_RUN
+2.5V_RUN
+1.8V_SUS
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
+1.05V_VCCP
+1.5V_RUN
+1.5V_RUN
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
Calistoga(5 of 5)
14 59Friday, May 12, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
close pin B31
Route VSSA_TVBG GND from GMCH todecoupling cap ground lead and thenconnect to the GND plane.
CRB 270uF
Route VSSA_TVBG GND from GMCH todecoupling cap ground lead and thenconnect to the GND plane.
CRTDAC: Route FBwithin 3" of Calistoga
Route VSSACRTDAC gnd from GMCH todecoupling cap ground lead and thenconnect to the gnd plane.
Route +2.5VRUN from GMCH pinN33 todecoupling cap (C66)<200mil to the edge.
C65, C73, C83 replace by 0ohm 0805 resistor
close pin C29/D29
45mA Max. 40mA Max.
45mA Max.
40mA Max.
CRT DAC Voltge Follower Circuit - 700mV TV DAC Voltge Follower Circuit - 700mV
Follow 945GMS desginguild to modify
180ohm,1500mA,0.09ohm
120ohm,600mA,0.25ohm
180ohm,1500mA,0.09ohm
120ohm,600mA,0.25ohm
60ohm,3000mA,0.025ohm
180ohm,1500mA,0.09ohm
180ohm,1500mA,0.09ohm
Close to U3.F20
L3BLM18PG181SN1_0603~D
12
C10022U_0805_6.3V6M~D
1
2
C84
0.02
2U_0
402_
16V7
K~D
1
2
C88
0_08
05_5
%~D
1 2
3
C12
64.
7U_0
603_
6.3V
6M~D
1
2
C10
20.
1U_0
402_
10V6
K~D
1
2C
119
0.1U
_040
2_10
V6K~
D
1
2
+
C10
533
0U_D
2E_2
.5VM
_R9~
D@
1
2
R1310_0603_5%~D
12
+
C11
022
0U_D
2_4M
_R45
~D
1
2
C86
0.02
2U_0
402_
16V7
K~D
1
2
L7BLM11A121S_0603~D
12
C79
10U
_080
5_6.
3V6M
~D
1
2
C81
4.7U
_060
3_6.
3V6M
~D
1
2
C11
410
U_0
805_
6.3V
6M~D
1
2
R5830_0805_5%~D
1 2
C90
4.7U
_060
3_6.
3V6M
~D
@
1
2
C82
4.7U
_060
3_6.
3V6M
~D
1
2
C92
0.1U
_040
2_10
V6K~
D
1
2
R13310_0402_5%~D
1 2
C12
50.
01U
_040
2_16
V7K~
D
1
2
+
C10
147
0U_D
2_2.
5VM
~D
1
2
C87
0.1U
_040
2_10
V6K~
D
1
2
R13410_0402_5%~D
1 2
C74
10U
_080
5_6.
3V6M
~D
1
2
R1320.5_0805_1%~D
1 2
C83
0_08
05_5
%~D
1 2
3
C13010U_0805_6.3V6M~D
1
2
+
C12
147
0U_D
2_2.
5VM
~D
1
2
C6320.47U_0402_16V4Z~D
1 2
C77
0_08
05_5
%~D
1 2
3
C80
0.1U
_040
2_10
V6K~
D
1
2
C11
50.
1U_0
402_
10V6
K~D
1
2
C6310.47U_0402_16V4Z~D
1 2
+
C12
322
0U_D
2_4M
_R45
~D
1
2
C85
0.1U
_040
2_10
V6K~
D
1
2
C75
10U
_080
5_6.
3V6M
~D
1
2
C11
310
U_0
805_
6.3V
6M~D
1
2
D2MMBD4148W-7-F_SOT323~D
1
3
2
C12
90.
1U_0
402_
10V6
K~D
1
2
L11BLM18PG181SN1_0603~D
12
L9BLM18PG181SN1_0603~D
1 2
C96
1U_0
402_
6.3V
4Z~D
1
2
C78
0.1U
_040
2_10
V6K~
D
1
2
C11
80.
47U
_040
2_16
V4Z~
D
1
2
C97
1U_0
402_
6.3V
4Z~D
1
2
C91
0.1U
_040
2_10
V6K~
D
1
2
C12
40.
1U_0
402_
10V6
K~D
1
2
R5820_0805_5%~D
1 2C10922U_0805_6.3V6M~D
1
2
C12
70.
1U_0
402_
10V6
K~D
1
2
C76
0.1U
_040
2_10
V6K~
D
1
2
C10
80.
1U_0
402_
10V6
K~D
1
2
POWER
Calistoga-GMS_FCBGA998~D
U3D
VCC0T26VCC1R26VCC2P26VCC3N26VCC4M26VCC5V19VCC6U19VCC7T19VCC8W18VCC9V18VCC10T18VCC11R18
VCCDHMPLL1 AE5VCCDHMPLL2 AD5
VCCADPLLA B26VCCADPLLB J32
VCCAHPLL AD2VCCAMPLL AD1
VCCACRTDAC0 C24VCCACRTDAC1 B24
VSSACRTDAC B25
VCCSYNC J23
VTT0A14VTT1D10VTT2P9VTT3L9VTT4D9VTT5P8VTT6L8VTT7D8VTT8P7VTT9L7VTT10D7VTT11A7VTT12P6VTT13L6VTT14G6VTT15D6VTT16U5VTT17P5VTT18L5VTT19G5VTT20D5
VCCA3GBG N33VSSA3GBG M33
VCCA3GPLL V26
VCC3G0 U33VCC3G1 T33
VCCTXLVDS1 C29
VCCSM0 AB33VCCSM1 AM32VCCSM2 AN29VCCSM3 AM29VCCSM4 AL29VCCSM5 AK29VCCSM6 AJ29VCCSM7 AH29VCCSM8 AG29VCCSM9 AF29
VCCSM10 AE29VCCSM11 AN24VCCSM12 AM24VCCSM13 AL24VCCSM14 AK24VCCSM15 AJ24VCCSM16 AH24VCCSM17 AG24VCCSM18 AF24VCCSM19 AE24VCCSM20 AN18VCCSM21 AN16
VCCHV0 E26VCCHV1 D26VCCHV2 C26
VCCALVDS B31
VCCDLVDS0 C28VCCDLVDS1 B28VCCDLVDS2 A28
VCCDTVDAC F20VCCDQTVDAC F22
VCCATVBG D23VSSATVBG E23
VCCATVDACA0 B20VCCATVDACA1 A20VCCATVDACB0 B22VCCATVDACB1 A22VCCATVDACC0 D22VCCATVDACC1 C22
VCC12W17VCC13U17VCC14R17VCC15W16VCC16V16VCC17T16VCC18R16VCC19V15VCC20U15VCC21T15
VCCAUX1AD33VCCAUX2AD32VCCAUX3AD31VCCAUX4AD30VCCAUX5AD29VCCAUX6AD28VCCAUX7AD27VCCAUX8AC27VCCAUX9AD26VCCAUX10AC26VCCAUX11AB26VCCAUX12AE19VCCAUX13AE18VCCAUX14AF17VCCAUX15AE17VCCAUX16AF16VCCAUX17AE16VCCAUX18AF15VCCAUX19AE15VCCAUX20J14VCCAUX21J10
VCCAUX26AD8VCCAUX27AD7VCCAUX28AD6
VCCTXLVDS0 D29
VCCSM22 AM16VCCSM23 AL16VCCSM24 AK16VCCSM25 AJ16VCCSM26 AN13VCCSM27 AM13VCCSM28 AL13VCCSM29 AK13VCCSM30 AJ13VCCSM31 AH13VCCSM32 AG13VCCSM33 AF13VCCSM34 AE13VCCSM35 AN4VCCSM36 AM10VCCSM37 AL10VCCSM38 AK10VCCSM39 AH1VCCSM40 AH10VCCSM41 AG10VCCSM42 AF10VCCSM43 AE10VCCSM44 AN7
VTT22U4VTT23P4
VCCSM45 AM7
VTT24L4VTT25G4VTT26D4VTT27Y3VTT28U3VTT29P3VTT30L3VTT31G3VTT32D3VTT33Y2VTT34U2
VTT35L2 VTT36P2
VTT37G2VTT38D2VTT39AA1
VTT45 Y1
VCCAUX22H10VCCAUX23AE9VCCAUX24AD9VCCAUX25U9
VSSALVDS B32
VTT44 U1
VTT41 P1VTT42 L1VTT43 G1
VTT40F1
VCCSM46 AL7VCCSM47 AK7VCCSM48 AJ7VCCSM49 AH7VCCSM50 AN10VCCSM51 AJ10
VTT21Y4
L5
BLM11A121S_0603~D
12
D1MMBD4148W-7-F_SOT323~D
1
3
2C
99
0.1U
_040
2_10
V6K~
D
1
2
L1010U_MLZ2012E100PTAIN_60mA_25%_0805~D
12
C1040.1U_0402_10V6K~D
1
2
C11
70.
1U_0
402_
10V6
K~D
1
2
L610U_MLZ2012E100PTAIN_60mA_25%_0805~D
12
L4BLM18PG181SN1_0603~D
12
C95
1U_0
402_
6.3V
4Z~D
1
2
C11
24.
7U_0
603_
6.3V
6M~D
1
2
C11
14.
7U_0
603_
6.3V
6M~D
1
2
C12
80.
1U_0
402_
10V6
K~D
1
2
C89
0.1U
_040
2_10
V6K~
D 1
2
C93
1U_0
402_
6.3V
4Z~D
1
2
C73
0.1U
_040
2_10
V6K~
D
1
2
C12
20.
1U_0
402_
10V6
K~D
1
2
L8BLM21PG600SN1D_0805~D
12
C94
1U_0
402_
6.3V
4Z~D
1
2
C11
60.
022U
_040
2_16
V7K~
D
1
2
C72
0_08
05_5
%~D
1 2
3
C12
00.
47U
_040
2_16
V4Z~
D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_B_MA11
V_DDR_MCH_REF
DDR_CKE3_DIMMA
M_CLK_DDR3
M_CLK_DDR2
M_CLK_DDR#3
M_CLK_DDR#2
DDR_CKE3_DIMMA
DDR_CS2_DIMMA#
CLK_SCLK
DDR_B_MA1
DDR_B_MA10
DDR_B_MA3
DDR_B_MA9 DDR_B_MA7DDR_B_MA12
DDR_B_MA5
DDR_B_WE#
DDR_A_D9
DDR_A_D3
DDR_A_D13
DDR_A_D5DDR_A_D6
DDR_A_D7
DDR_A_D15
DDR_A_D24
DDR_A_D21
DDR_A_D23
DDR_A_D17
DDR_A_D19
DDR_A_D14
DDR_A_D28
DDR_A_D27
DDR_A_D36
DDR_A_D60
DDR_A_D43
DDR_A_D49DDR_A_D48
DDR_A_D63DDR_A_D62
DDR_A_D61
DDR_A_DQS1
DDR_A_DQS0
DDR_A_DQS2
DDR_A_DM3
DDR_A_DM1
DDR_A_DM2
DDR_A_DQS4
DDR_A_DQS6
DDR_A_DQS7
CLK_SDATA
DDR_CKE2_DIMMA
DDR_B_MA8
DDR_CS3_DIMMA#
DDR_B_MA11
DDR_B_MA2DDR_B_MA0
DDR_B_MA4
DDR_B_MA6
DDR_B_CAS#
DDR_B_BS1DDR_B_RAS#
DDR_A_D1
DDR_A_D0
DDR_A_D2
DDR_A_D4
DDR_A_D11
DDR_A_D16
DDR_A_D10
DDR_A_D20
DDR_A_D22
DDR_A_D12DDR_A_D8
DDR_A_D29
DDR_A_D31
DDR_A_D18
DDR_A_D25
DDR_A_D34
DDR_A_D45
DDR_A_D53DDR_A_D52
DDR_A_D56
DDR_A_D58
DDR_A_D57
DDR_A_D59
DDR_A_DM6
DDR_A_DM4
DDR_A_DM5
DDR_A_DM7
DDR_B_MA13
DDR_A_DQS5
DDR_B_BS0
DDR_B_BS2
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS3DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_B_MA0
DDR_B_MA4
DDR_B_BS1
DDR_B_MA6
DDR_B_MA2
M_ODT2
M_ODT3
M_ODT2DDR_B_MA13
DDR_B_MA7
DDR_A_DM0
DDR_A_D47
DDR_CS2_DIMMA#DDR_B_RAS#
DDR_A_D46DDR_A_D44
DDR_A_D42
DDR_A_D35
DDR_A_D39DDR_A_D38
DDR_A_D32DDR_A_D37DDR_A_D33
DDR_A_D26 DDR_A_D30
M_ODT3
DDR_B_BS2
DDR_B_BS0DDR_B_MA10
DDR_B_CAS#DDR_B_WE#
DDR_CKE2_DIMMA
DDR_B_MA9
DDR_B_MA5
DDR_B_MA12
DDR_B_MA8
DDR_A_D41DDR_A_D40
DDR_B_MA3DDR_B_MA1
DDR_CS3_DIMMA#
PM_EXTTS#0
DDR_A_D54DDR_A_D55
DDR_A_D50DDR_A_D51
+0.9V_DDR_VTT
+0.9V_DDR_VTT
+3.3V_RUN
+1.8V_SUS
+1.8V_SUS +1.8V_SUS
+3.3V_RUN
DDR_A_DQS[0..7]<11,16>
DDR_B_MA[0..13]<11>
M_CLK_DDR3 <10>
M_CLK_DDR2 <10>
M_CLK_DDR#3 <10>
M_CLK_DDR#2 <10>
DDR_CKE3_DIMMA <10>
DDR_CS2_DIMMA# <10>
DDR_CKE2_DIMMA<10>
DDR_CS3_DIMMA#<10>
DDR_A_DQS#[0..7]<11,16>
M_ODT2 <10>
M_ODT3<10>
DDR_B_BS1 <11>
DDR_B_WE#<11>DDR_B_RAS# <11>
DDR_B_CAS#<11>
DDR_B_BS0<11>
DDR_B_BS2<11>
V_DDR_MCH_REF <10,16,17,49>
PM_EXTTS#0 <10>
DDR_A_DM[0..7]<11,16>
CLK_SDATA<6,17>CLK_SCLK<6,17>
DDR_A_D[0..63]<11,16>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
DDRII-SODIMM SLOT1
15 59Friday, May 12, 2006
Compal Electronics, Inc.Layout Note:Place these resistorclosely DIMM0,alltrace lengthMax=1.3"
Layout Note:Place near JDIM1
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V_DDR_VTT
Layout Note:Place these resistorclosely DIMM0,alltrace length<750 mil
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
ON Bottom SIDE
STANDARDDIMMA
C145
0.1U_0402_16V4Z~D
1
2
C139
0.1U_0402_16V4Z~D
1
2
R135 10K_0402_5%~D
1 2
RN2
56_0404_4P2R_5%~D
1423
C150
0.1U_0402_16V4Z~D
1
2 C152
0.1U_0402_16V4Z~D
1
2
RN1
56_0404_4P2R_5%~D
1 42 3
C131
2.2U_0603_6.3V6K~D
1
2
RN9
56_0404_4P2R_5%~D
1 42 3
RN6
56_0404_4P2R_5%~D
1423
C136
2.2U_0603_6.3V6K~D
1
2
C148
0.1U_0402_16V4Z~D
1
2 C154
0.1U_0402_16V4Z~D
1
2C142
0.1U_0402_16V4Z~D
1
2
RN4
56_0404_4P2R_5%~D
1423
C133
2.2U_0603_6.3V6K~D
1
2
C141
0.1U_0402_16V4Z~D
1
2
R565 0_0402_5%~D12
RN3
56_0404_4P2R_5%~D
1 42 3
C156
2.2U_0603_6.3V6K~D
1
2
C144
0.1U_0402_16V4Z~D
1
2
RN12
56_0404_4P2R_5%~D
1 42 3
C153
0.1U_0402_16V4Z~D
1
2
C140
0.1U_0402_16V4Z~D
1
2
C135
2.2U_0603_6.3V6K~D
1
2
RN8
56_0404_4P2R_5%~D
1423
RN13
56_0404_4P2R_5%~D
1423
C146
0.1U_0402_16V4Z~D
1
2
R136 10K_0402_5%~D
1 2
C132
0.1U_0402_16V4Z~D
1
2
R597100K_0402_5%~D@
12
RN10
56_0404_4P2R_5%~D
1423
C143
0.1U_0402_16V4Z~D
1
2
JDIMB
TYCO_1775803-2~D
VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39
VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18
DQ12 20DQ13 22
VSS 24DM1 26VSS 28CK0 30
CK0# 32VSS 34
DQ14 36DQ15 38
VSS 40
VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199
VSS 42DQ20 44DQ21 46
VSS 48NC 50
DM2 52VSS 54
DQ22 56DQ23 58
VSS 60DQ28 62DQ29 64
VSS 66DQS3# 68
DQS3 70VSS 72
DQ30 74DQ31 76
VSS 78NC/CKE1 80
VDD 82NC/A15 84NC/A14 86
VDD 88A11 90
A7 92A6 94
VDD 96A4 98A2 100A0 102
VDD 104BA1 106
RAS# 108S0# 110
VDD 112ODT0 114
NC/A13 116VDD 118
NC 120VSS 122
DQ36 124DQ37 126
VSS 128DM4 130VSS 132
DQ38 134DQ39 136
VSS 138DQ44 140DQ45 142
VSS 144DQS5# 146
DQS5 148VSS 150
DQ46 152DQ47 154
VSS 156DQ52 158DQ53 160
VSS 162CK1 164
CK1# 166VSS 168DM6 170VSS 172
DQ54 174DQ55 176
VSS 178DQ60 180DQ61 182
VSS 184DQS7# 186
DQS7 188VSS 190
DQ62 192DQ63 194
VSS 196SAO 198SA1 200
C155
0.1U_0402_16V4Z~D
1
2
RN5
56_0404_4P2R_5%~D
1 42 3
C137
2.2U_0603_6.3V6K~D
1
2
RN11
56_0404_4P2R_5%~D
1423
RN7
56_0404_4P2R_5%~D
1 42 3
C149
0.1U_0402_16V4Z~D
1
2
C138
0.1U_0402_16V4Z~D
1
2
C147
0.1U_0402_16V4Z~D
1
2
C134
2.2U_0603_6.3V6K~D
1
2
C151
0.1U_0402_16V4Z~D
1
2
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D5DDR_A_D6
DDR_SDQ5DDR_SDQ6
DDR_A_D2DDR_A_D1
DDR_A_D4DDR_A_D0
DDR_A_D3DDR_A_D7
DDR_A_D8DDR_A_D12
DDR_A_D14DDR_A_D15
DDR_A_D13DDR_A_D9
DDR_A_D11DDR_A_D10
DDR_A_D20DDR_A_D16
DDR_A_D18DDR_A_D22
DDR_A_D21DDR_A_D17
DDR_A_D23DDR_A_D19
DDR_A_D29DDR_A_D25
DDR_A_D27DDR_A_D26
DDR_A_D24DDR_A_D28
DDR_A_D31DDR_A_D30
DDR_SDQ2DDR_SDQ1
DDR_SDQ4DDR_SDQ0
DDR_SDQ3DDR_SDQ7
DDR_SDQ8DDR_SDQ12
DDR_SDQ14DDR_SDQ15
DDR_SDQ13DDR_SDQ9
DDR_SDQ11DDR_SDQ10
DDR_SDQ20DDR_SDQ16
DDR_SDQ18DDR_SDQ22
DDR_SDQ21DDR_SDQ17
DDR_SDQ23DDR_SDQ19
DDR_SDQ29DDR_SDQ25
DDR_SDQ27DDR_SDQ26
DDR_SDQ24DDR_SDQ28
DDR_SDQ31DDR_SDQ30
DDR_A_D35DDR_A_D38
DDR_A_D36DDR_A_D32
DDR_A_D37DDR_A_D33
DDR_A_D34DDR_A_D39
DDR_A_D40DDR_A_D42
DDR_A_D47DDR_A_D46
DDR_A_D41DDR_A_D45
DDR_A_D43DDR_A_D44
DDR_A_D49DDR_A_D48
DDR_A_D55DDR_A_D54
DDR_A_D53DDR_A_D52
DDR_A_D51DDR_A_D50
DDR_A_D57DDR_A_D56
DDR_A_D63DDR_A_D62
DDR_A_D61DDR_A_D60
DDR_A_D58DDR_A_D59
DDR_SDQ35DDR_SDQ38
DDR_SDQ36DDR_SDQ32
DDR_SDQ37DDR_SDQ33
DDR_SDQ34DDR_SDQ39
DDR_SDQ40DDR_SDQ42
DDR_SDQ47DDR_SDQ46
DDR_SDQ41DDR_SDQ45
DDR_SDQ43DDR_SDQ44
DDR_SDQ49DDR_SDQ48
DDR_SDQ55DDR_SDQ54
DDR_SDQ53DDR_SDQ52
DDR_SDQ51DDR_SDQ50
DDR_SDQ57DDR_SDQ56
DDR_SDQ63DDR_SDQ62
DDR_SDQ61DDR_SDQ60
DDR_SDQ58DDR_SDQ59
DDR_A_DQS0DDR_A_DQS#0
DDR_SDQS0DDR_SDQS#0
DDR_A_DQS1DDR_A_DQS#1 DDR_SDQS#1
DDR_A_DQS2DDR_A_DQS#2
DDR_SDQS1
DDR_SDQS2
DDR_SDQS#3DDR_A_DQS3DDR_A_DQS#3
DDR_SDQS3
DDR_A_DQS5
DDR_A_DQS4
DDR_SDQS5
DDR_SDQS4
DDR_SDQS#2
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6DDR_A_DQS6
DDR_A_DQS#7DDR_A_DQS7
DDR_SDQS6
DDR_SDQS7
DDR_SDQS#5
DDR_SDQS#4
DDR_SDQS#6
DDR_SDQS#7
DDR_A_DM0 DDR_SDM0
DDR_A_DM1 DDR_SDM1
DDR_A_DM2 DDR_SDM2
DDR_A_DM3 DDR_SDM3
DDR_A_DM4 DDR_SDM4
DDR_A_DM5 DDR_SDM5
DDR_A_DM6 DDR_SDM6
DDR_A_DM7 DDR_SDM7
V_DDR_MCH_REF
DDR_A_MA0DDR_A_MA1DDR_A_MA2DDR_A_MA3DDR_A_MA4DDR_A_MA5DDR_A_MA6DDR_A_MA7DDR_A_MA8DDR_A_MA9DDR_A_MA10DDR_A_MA11DDR_A_MA12DDR_A_MA13
M_CLK_DDR#0M_CLK_DDR0M_ODT0
DDR_CKE0DDR_A_BS0
DDR_CS0#
DDR_A_WE#DDR_A_CAS#DDR_A_RAS#
V_DDR_MCH_REF
V_DDR_MCH_REF
DDR_A_MA0DDR_A_MA1DDR_A_MA2DDR_A_MA3DDR_A_MA4DDR_A_MA5DDR_A_MA6DDR_A_MA7DDR_A_MA8DDR_A_MA9DDR_A_MA10DDR_A_MA11DDR_A_MA12DDR_A_MA13
M_CLK_DDR#1DDR_CKE0DDR_A_BS0
M_CLK_DDR1M_ODT0
DDR_A_MA0DDR_A_MA1DDR_A_MA2DDR_A_MA3DDR_A_MA4DDR_A_MA5DDR_A_MA6DDR_A_MA7DDR_A_MA8DDR_A_MA9DDR_A_MA10DDR_A_MA11DDR_A_MA12DDR_A_MA13
DDR_CS0#
DDR_A_WE#DDR_A_CAS#DDR_A_RAS#
V_DDR_MCH_REF
DDR_A_MA0DDR_A_MA1DDR_A_MA2DDR_A_MA3DDR_A_MA4DDR_A_MA5DDR_A_MA6DDR_A_MA7DDR_A_MA8DDR_A_MA9DDR_A_MA10DDR_A_MA11DDR_A_MA12DDR_A_MA13
M_CLK_DDR#1DDR_CKE0DDR_A_BS0
M_CLK_DDR1M_ODT0
DDR_CS0#
DDR_A_WE#DDR_A_CAS#DDR_A_RAS#
DDR_CKE0M_CLK_DDR#0M_CLK_DDR0
DDR_A_BS0
DDR_CS0#
DDR_A_WE#DDR_A_CAS#DDR_A_RAS#
DDR_SDQS#2DDR_SDQS2
DDR_SDM2
DDR_SDQS#4DDR_SDQS4
DDR_SDM4DDR_SDQS#6DDR_SDQS6
DDR_SDM6
DDR_A_BS1 DDR_A_BS1
DDR_A_BS1 DDR_A_BS1
M_ODT0
DDR_SDM0DDR_SDQS#0DDR_SDQS0
DDR_SDQ0
DDR_SDQ2
DDR_SDQ1
DDR_SDQ5
DDR_SDQ4
DDR_SDQ7
DDR_SDQ3
DDR_SDQ6
DDR_SDQ16
DDR_SDQ17DDR_SDQ18
DDR_SDQ19DDR_SDQ20
DDR_SDQ22
DDR_SDQ23
DDR_SDQ21
DDR_SDQ32
DDR_SDQ33
DDR_SDQ34
DDR_SDQ35
DDR_SDQ36
DDR_SDQ37DDR_SDQ38
DDR_SDQ39DDR_SDQ48
DDR_SDQ49
DDR_SDQ50
DDR_SDQ51DDR_SDQ52
DDR_SDQ53
DDR_SDQ54
DDR_SDQ55
+1.8V_SUS +1.8V_SUS
+1.8V_SUS +1.8V_SUS+1.8V_SUS
DDR_A_D[0..63]<11,15>
DDR_A_DQS[0..7]<11,15>
DDR_A_MA[0..13]<11,17>
DDR_A_DQS#[0..7]<11,15>
DDR_SDQS#[0..7]<17>
DDR_SDQ[0..63]<17>
DDR_SDQS[0..7]<17>
V_DDR_MCH_REF<10,15,17,49> M_CLK_DDR0 <10,17>M_CLK_DDR#0 <10,17>
M_ODT0 <10,17>
DDR_CKE0 <10,17>DDR_A_BS0 <11,17>
DDR_A_WE# <11,17>
DDR_A_RAS# <11,17>DDR_A_CAS# <11,17>
DDR_CS0# <10,17>
M_CLK_DDR1 <10,17>M_CLK_DDR#1 <10,17>
DDR_A_BS1 <11,17>
DDR_A_DM[0..7]<11,15>
DDR_SDM[0..7]<17>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
DDRII-ON BOARD I
16 59Friday, May 12, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place clost to each VREF pin
Layout Note:Place near U4,U5,U6,U7RN42
10_0404_4P2R_5%~D
1 42 3
RN69
10_0404_4P2R_5%~D
1 42 3
C661
0.1U_0402_16V4Z~D
1
2
C660
0.1U_0402_16V4Z~D
1
2
C665
2700P_0402_50V7K~D
1
2
R572 10_0402_5%~D
1 2
RN59
10_0404_4P2R_5%~D
1 42 3
C160
0.1U_0402_16V4Z~D
1
2
U5
K4T51083QC-ZCLD5_FBGA60~D
DQS#A8DM/RDQSB3DQ0C8DQ1C2DQ2D7DQ3D3DQ4D1DQ5D9DQ6B1DQ7B9
DQSB7 VDDQ A9VDDQ C1VDDQ C3VDDQ C7VDDQ C9
VREFE2
A0H8A1H3A2H7A3J2A4J8A5J3A6J7A7K2A8K8A9K3A10H2A11K7A12L2A13L8
NCG1NCL3NCL7
VDD A1VDD E9VDD H9VDD L1
VDDL E1
ODT F9CK E8
CK# F8CKE F2BA0 G2BA1 G3
CS# G8RAS# F7CAS# G7WE# F3
VSSQ A7VSSQ B2VSSQ B8VSSQ D2VSSQ D8
VSS E3VSS J1VSS K9
VSSDL E7
VSS A3NU/RDQSA2
C664
0.1U_0402_16V4Z~D
1
2
RN15
10_0404_4P2R_5%~D
1 42 3
R566 10_0402_5%~D
1 2
RN56
10_0404_4P2R_5%~D
1 42 3
RN33
10_0404_4P2R_5%~D
1 42 3
RN65
10_0404_4P2R_5%~D
1 42 3
RN51
10_0404_4P2R_5%~D
1 42 3
RN29
10_0404_4P2R_5%~D
1 42 3
R569 10_0402_5%~D
1 2
RN68
10_0404_4P2R_5%~D
1 42 3
C656
2.2U_0603_6.3V6K~D
1
2
RN38
10_0404_4P2R_5%~D
1 42 3
C672
2700P_0402_50V7K~D
1
2
C667
2700P_0402_50V7K~D
1
2
R570 10_0402_5%~D
1 2
RN36
10_0404_4P2R_5%~D
1 42 3
C662
0.1U_0402_16V4Z~D
1
2
RN48
10_0404_4P2R_5%~D
1 42 3
RN32
10_0404_4P2R_5%~D
1 42 3
RN57
10_0404_4P2R_5%~D
1 42 3
C669
2700P_0402_50V7K~D
1
2
RN45
10_0404_4P2R_5%~D
1 42 3
R567 10_0402_5%~D
1 2
RN27
10_0404_4P2R_5%~D
1 42 3
RN47
10_0404_4P2R_5%~D
1 42 3
C159
0.1U_0402_16V4Z~D
1
2
RN62
10_0404_4P2R_5%~D
1 42 3
RN24
10_0404_4P2R_5%~D
1 42 3
RN54
10_0404_4P2R_5%~D
1 42 3
RN18
10_0404_4P2R_5%~D
1 42 3
C158
2.2U_0603_6.3V6K~D
1
2
RN20
10_0404_4P2R_5%~D
1 42 3
RN35
10_0404_4P2R_5%~D
1 42 3
C658
2.2U_0603_6.3V6K~D
1
2
RN41
10_0404_4P2R_5%~D
1 42 3
RN17
10_0404_4P2R_5%~D
1 42 3
U4
K4T51083QC-ZCLD5_FBGA60~D
DQS#A8DM/RDQSB3DQ0C8DQ1C2DQ2D7DQ3D3DQ4D1DQ5D9DQ6B1DQ7B9
DQSB7 VDDQ A9VDDQ C1VDDQ C3VDDQ C7VDDQ C9
VREFE2
A0H8A1H3A2H7A3J2A4J8A5J3A6J7A7K2A8K8A9K3A10H2A11K7A12L2A13L8
NCG1NCL3NCL7
VDD A1VDD E9VDD H9VDD L1
VDDL E1
ODT F9CK E8
CK# F8CKE F2BA0 G2BA1 G3
CS# G8RAS# F7CAS# G7WE# F3
VSSQ A7VSSQ B2VSSQ B8VSSQ D2VSSQ D8
VSS E3VSS J1VSS K9
VSSDL E7
VSS A3NU/RDQSA2
C654
2.2U_0603_6.3V6K~D
1
2
C671
2700P_0402_50V7K~D
1
2
RN26
10_0404_4P2R_5%~D
1 42 3
U6
K4T51083QC-ZCLD5_FBGA60~D
DQS#A8DM/RDQSB3DQ0C8DQ1C2DQ2D7DQ3D3DQ4D1DQ5D9DQ6B1DQ7B9
DQSB7 VDDQ A9VDDQ C1VDDQ C3VDDQ C7VDDQ C9
VREFE2
A0H8A1H3A2H7A3J2A4J8A5J3A6J7A7K2A8K8A9K3A10H2A11K7A12L2A13L8
NCG1NCL3NCL7
VDD A1VDD E9VDD H9VDD L1
VDDL E1
ODT F9CK E8
CK# F8CKE F2BA0 G2BA1 G3
CS# G8RAS# F7CAS# G7WE# F3
VSSQ A7VSSQ B2VSSQ B8VSSQ D2VSSQ D8
VSS E3VSS J1VSS K9
VSSDL E7
VSS A3NU/RDQSA2
RN21
10_0404_4P2R_5%~D
1 42 3
RN39
10_0404_4P2R_5%~D
1 42 3
R568 10_0402_5%~D
1 2
C670
2700P_0402_50V7K~D
1
2
RN66
10_0404_4P2R_5%~D
1 42 3
RN44
10_0404_4P2R_5%~D
1 42 3
C157
0.1U_0402_16V4Z~D
1
2
R573 10_0402_5%~D
1 2
RN23
10_0404_4P2R_5%~D
1 42 3
C668
2700P_0402_50V7K~D
1
2
RN30
10_0404_4P2R_5%~D
1 42 3
RN19
10_0404_4P2R_5%~D
1 42 3
RN63
10_0404_4P2R_5%~D
1 42 3
RN60
10_0404_4P2R_5%~D
1 42 3
RN53
10_0404_4P2R_5%~D
1 42 3
C663
0.1U_0402_16V4Z~D
1
2
R571 10_0402_5%~D
1 2
RN14
10_0404_4P2R_5%~D
1 42 3
C655
2.2U_0603_6.3V6K~D
1
2RN50
10_0404_4P2R_5%~D
1 42 3
C629
0.1U_0402_16V4Z~D
1
2
C659
0.1U_0402_16V4Z~D
1
2
C657
2.2U_0603_6.3V6K~D
1
2
U7
K4T51083QC-ZCLD5_FBGA60~D
DQS#A8DM/RDQSB3DQ0C8DQ1C2DQ2D7DQ3D3DQ4D1DQ5D9DQ6B1DQ7B9
DQSB7 VDDQ A9VDDQ C1VDDQ C3VDDQ C7VDDQ C9
VREFE2
A0H8A1H3A2H7A3J2A4J8A5J3A6J7A7K2A8K8A9K3A10H2A11K7A12L2A13L8
NCG1NCL3NCL7
VDD A1VDD E9VDD H9VDD L1
VDDL E1
ODT F9CK E8
CK# F8CKE F2BA0 G2BA1 G3
CS# G8RAS# F7CAS# G7WE# F3
VSSQ A7VSSQ B2VSSQ B8VSSQ D2VSSQ D8
VSS E3VSS J1VSS K9
VSSDL E7
VSS A3NU/RDQSA2
C666
2700P_0402_50V7K~D
1
2
RN16
10_0404_4P2R_5%~D
1 42 3
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_SCLKCLK_SDATA
M_CLK_DDR0
DDR_A_MA10
DDR_A_WE#
DDR_A_MA0
DDR_A_MA1
DDR_A_MA3
DDR_A_MA8
DDR_A_BS0
DDR_CS0#
DDR_A_CAS#
DDR_A_BS1
DDR_A_MA12DDR_A_MA7
DDR_A_MA6
DDR_A_MA5
DDR_A_MA4DDR_A_MA2
DDR_A_MA9
M_CLK_DDR#0
DDR_A_MA11DDR_A_RAS#
DDR_CS0#
DDR_CKE0M_CLK_DDR#0M_CLK_DDR0M_ODT0
DDR_A_BS0
DDR_A_WE#DDR_A_CAS#DDR_A_RAS#
V_DDR_MCH_REF
DDR_A_MA0DDR_A_MA1DDR_A_MA2DDR_A_MA3DDR_A_MA4DDR_A_MA5DDR_A_MA6DDR_A_MA7DDR_A_MA8DDR_A_MA9DDR_A_MA10DDR_A_MA11DDR_A_MA12DDR_A_MA13
V_DDR_MCH_REF
DDR_A_MA0DDR_A_MA1DDR_A_MA2DDR_A_MA3DDR_A_MA4DDR_A_MA5DDR_A_MA6DDR_A_MA7DDR_A_MA8DDR_A_MA9DDR_A_MA10DDR_A_MA11DDR_A_MA12DDR_A_MA13
DDR_CKE0M_CLK_DDR#0M_CLK_DDR0M_ODT0
DDR_A_BS0
DDR_CS0#
DDR_A_WE#DDR_A_CAS#DDR_A_RAS#
DDR_A_MA0DDR_A_MA1DDR_A_MA2DDR_A_MA3DDR_A_MA4DDR_A_MA5DDR_A_MA6DDR_A_MA7DDR_A_MA8DDR_A_MA9DDR_A_MA10DDR_A_MA11DDR_A_MA12
V_DDR_MCH_REF
DDR_A_MA13
M_CLK_DDR#1
M_CLK_DDR#1
M_ODT0
DDR_A_BS0
M_CLK_DDR1
M_CLK_DDR1
DDR_CS0#
DDR_A_WE#DDR_A_CAS#DDR_A_RAS#
DDR_SDQS1DDR_SDQS#1DDR_SDM1
DDR_SDQS#3DDR_SDQS3
DDR_SDM3
DDR_SDQ40
DDR_SDQ41
DDR_SDQ42DDR_SDQ43
DDR_SDQ44
DDR_SDQ45
DDR_SDQ46
DDR_SDQ47
DDR_SDQS#5DDR_SDQS5
DDR_SDM5
DDR_SDQ56
DDR_SDQ57
DDR_SDQ58
DDR_SDQ59
DDR_SDQ60
DDR_SDQ61
DDR_SDQ62
DDR_SDQ63
DDR_SDQS#7DDR_SDQS7
DDR_SDM7
DDR_A_MA0DDR_A_MA1DDR_A_MA2DDR_A_MA3DDR_A_MA4DDR_A_MA5DDR_A_MA6DDR_A_MA7DDR_A_MA8DDR_A_MA9DDR_A_MA10DDR_A_MA11DDR_A_MA12
V_DDR_MCH_REF
DDR_A_MA13
M_CLK_DDR#1M_CLK_DDR1M_ODT0
DDR_A_BS0
DDR_CS0#
DDR_A_WE#DDR_A_CAS#DDR_A_RAS#
DDR_A_BS1DDR_A_BS1
DDR_A_BS1DDR_A_BS1
M_ODT0
DDR_CKE0 DDR_CKE0
DDR_CKE0
DDR_SDQ8
DDR_SDQ9
DDR_SDQ10
DDR_SDQ11DDR_SDQ12DDR_SDQ13
DDR_SDQ14
DDR_SDQ15
DDR_SDQ25
DDR_SDQ24
DDR_SDQ26
DDR_SDQ27
DDR_SDQ28DDR_SDQ29
DDR_SDQ30
DDR_SDQ31
+0.9V_DDR_VTT
+0.9V_DDR_VTT
+3.3V_RUN
+3.3V_RUN
+1.8V_SUS+1.8V_SUS
+1.8V_SUS +1.8V_SUS
+1.8V_SUS DDR_SDQS#[0..7]<16>
DDR_SDQ[0..63]<16>
DDR_SDQS[0..7]<16>
DDR_A_MA[0..13]<11,16>
DDR_A_WE#<11,16>
DDR_A_BS0<11,16>
DDR_CS0#<10,16>
DDR_A_CAS# <11,16>
DDR_A_BS1<11,16>
DDR_A_RAS# <11,16>
DDR_CS0# <10,16>
M_CLK_DDR0 <10,16>M_CLK_DDR#0 <10,16>
DDR_CKE0 <10,16>
M_ODT0 <10,16>
DDR_A_BS0 <11,16>
DDR_A_WE# <11,16>
DDR_A_RAS# <11,16>DDR_A_CAS# <11,16>
V_DDR_MCH_REF<10,15,16,49>
M_CLK_DDR#1 <10,16>M_CLK_DDR1 <10,16>
DDR_A_BS1 <11,16>
M_ODT0<10,16>
DDR_CKE0 <10,16>
DDR_SDM[0..7]<16>
CLK_SDATA<6,15>CLK_SCLK<6,15>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
DDRII-ON BOARD II
17 59Friday, May 12, 2006
Compal Electronics, Inc.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Layout Note:Place near U8,U9,U10,U11
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V_DDR_VTT
Layout Note:Place these resistorclosely DIMM0,alltrace lengthMax=1.3"
Layout Note:Place these resistorclosely DIMM0,alltrace length<750 mil
Place clost to each VREF pin
C180
0.1U_0402_16V4Z~D
1
2
C165
2.2U_0603_6.3V6K~D
1
2
C179
0.1U_0402_16V4Z~D
1
2
C188
3.3P_0402_50VJ~D
1
2
RN74
56_0404_4P2R_5%~D
1 42 3
C175
0.1U_0402_16V4Z~D
1
2
C174
3.3P_0402_50VJ~D
1
2
C168
0.1U_0402_16V4Z~D
1
2
C172
0.1U_0402_16V4Z~D
1
2
C167
0.1U_0402_16V4Z~D
1
2
C677
2700P_0402_50V7K~D
1
2
RN73
56_0404_4P2R_5%~D
1423
C682
2700P_0402_50V7K~D
1
2
C169
0.1U_0402_16V4Z~D
1
2
C166
0.1U_0402_16V4Z~D
1
2
R62556_0402_5%~D
12
RN72
56_0404_4P2R_5%~D
1 42 3
C674
0.1U_0402_16V4Z~D
1
2
C176
0.1U_0402_16V4Z~D
1
2
RN71
56_0404_4P2R_5%~D
1423
U10
K4T51083QC-ZCLD5_FBGA60~D
DQS#A8DM/RDQSB3DQ0C8DQ1C2DQ2D7DQ3D3DQ4D1DQ5D9DQ6B1DQ7B9
DQSB7 VDDQ A9VDDQ C1VDDQ C3VDDQ C7VDDQ C9
VREFE2
A0H8A1H3A2H7A3J2A4J8A5J3A6J7A7K2A8K8A9K3A10H2A11K7A12L2A13L8
NCG1NCL3NCL7
VDD A1VDD E9VDD H9VDD L1
VDDL E1
ODT F9CK E8
CK# F8CKE F2BA0 G2BA1 G3
CS# G8RAS# F7CAS# G7WE# F3
VSSQ A7VSSQ B2VSSQ B8VSSQ D2VSSQ D8
VSS E3VSS J1VSS K9
VSSDL E7
VSS A3NU/RDQSA2
C630
0.1U_0402_16V4Z~D
1
2
U9
K4T51083QC-ZCLD5_FBGA60~D
DQS#A8DM/RDQSB3DQ0C8DQ1C2DQ2D7DQ3D3DQ4D1DQ5D9DQ6B1DQ7B9
DQSB7 VDDQ A9VDDQ C1VDDQ C3VDDQ C7VDDQ C9
VREFE2
A0H8A1H3A2H7A3J2A4J8A5J3A6J7A7K2A8K8A9K3A10H2A11K7A12L2A13L8
NCG1NCL3NCL7
VDD A1VDD E9VDD H9VDD L1
VDDL E1
ODT F9CK E8
CK# F8CKE F2BA0 G2BA1 G3
CS# G8RAS# F7CAS# G7WE# F3
VSSQ A7VSSQ B2VSSQ B8VSSQ D2VSSQ D8
VSS E3VSS J1VSS K9
VSSDL E7
VSS A3NU/RDQSA2
R140 10K_0402_5%~D@12
C161
2.2U_0603_6.3V6K~D
1
2
C163
2.2U_0603_6.3V6K~D
1
2
R138
200_0402_5%~D
12
C675
2700P_0402_50V7K~D
1
2
R137
200_0402_5%~D
12
RN79
56_0404_4P2R_5%~D
1423
EEPROMU12
24LC256T-I/ST_TSSOP8~D@
SA01SA12SA23 GND 4
WP7SCL6SDA5 VDD 8
C673
0.1U_0402_16V4Z~D
1
2
R576
200_0402_5%~D
12
U8
K4T51083QC-ZCLD5_FBGA60~D
DQS#A8DM/RDQSB3DQ0C8DQ1C2DQ2D7DQ3D3DQ4D1DQ5D9DQ6B1DQ7B9
DQSB7 VDDQ A9VDDQ C1VDDQ C3VDDQ C7VDDQ C9
VREFE2
A0H8A1H3A2H7A3J2A4J8A5J3A6J7A7K2A8K8A9K3A10H2A11K7A12L2A13L8
NCG1NCL3NCL7
VDD A1VDD E9VDD H9VDD L1
VDDL E1
ODT F9CK E8
CK# F8CKE F2BA0 G2BA1 G3
CS# G8RAS# F7CAS# G7WE# F3
VSSQ A7VSSQ B2VSSQ B8VSSQ D2VSSQ D8
VSS E3VSS J1VSS K9
VSSDL E7
VSS A3NU/RDQSA2C
676
2700P_0402_50V7K~D
1
2
C183
0.1U_0402_16V4Z~D
1
2
R13910K_0402_5%~D@
12
C681
2700P_0402_50V7K~D
1
2
C178
0.1U_0402_16V4Z~D
1
2 C184
0.1U_0402_16V4Z~D
1
2
C171
2.2U_0603_6.3V6K~D
1
2
C170
0.1U_0402_16V4Z~D
1
2
RN70
56_0404_4P2R_5%~D
1 42 3
RN78
56_0404_4P2R_5%~D
1 42 3
C173
0.1U_0402_16V4Z~D
1
2
RN77
56_0404_4P2R_5%~D
1423
C1890.1U_0402_16V4Z~D@
1
2
C162
2.2U_0603_6.3V6K~D
1
2
RN75
56_0404_4P2R_5%~D
1423
U11
K4T51083QC-ZCLD5_FBGA60~D
DQS#A8DM/RDQSB3DQ0C8DQ1C2DQ2D7DQ3D3DQ4D1DQ5D9DQ6B1DQ7B9
DQSB7 VDDQ A9VDDQ C1VDDQ C3VDDQ C7VDDQ C9
VREFE2
A0H8A1H3A2H7A3J2A4J8A5J3A6J7A7K2A8K8A9K3A10H2A11K7A12L2A13L8
NCG1NCL3NCL7
VDD A1VDD E9VDD H9VDD L1
VDDL E1
ODT F9CK E8
CK# F8CKE F2BA0 G2BA1 G3
CS# G8RAS# F7CAS# G7WE# F3
VSSQ A7VSSQ B2VSSQ B8VSSQ D2VSSQ D8
VSS E3VSS J1VSS K9
VSSDL E7
VSS A3NU/RDQSA2
C182
0.1U_0402_16V4Z~D
1
2
R577
200_0402_5%~D
12
C186
0.1U_0402_16V4Z~D
1
2
R141 10K_0402_5%~D@12
C679
2700P_0402_50V7K~D
1
2
C678
2700P_0402_50V7K~D
1
2
C181
0.1U_0402_16V4Z~D
1
2
C164
2.2U_0603_6.3V6K~D
1
2
RN81
56_0404_4P2R_5%~D
1423
C680
2700P_0402_50V7K~D
1
2
C177
0.1U_0402_16V4Z~D
1
2 C185
0.1U_0402_16V4Z~D
1
2
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+FAN1_VOUT
THERMATRIP1#
THERMATRIP2#
REM_DIODE1_PREM_DIODE1_N
FAN1_TACH
THERMATRIP3#
THERMATRIP2#
+3VSUS_THRM
THERMATRIP1#
LDO_SET
+3V_LD
OIN
REM_DIODE3_NREM_DIODE3_P
+FAN1_VOUT
SNIFFER_GREEN#SNIFFER_YELLOW#
LDO_SET
+3.3V_ALW
+RTC_CELL
+5V_RUN
+RTC_CELL
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+2.5V_RUN
+3.3V_SUS
+3.3V_SUS+3.3V_SUS
+3.3V_SUS
+3.3V_SUS+3.3V_SUS
+1.05V_VCCP
+1.05V_VCCP
+2.5V_RUN
FAN1_TACH <40>
ATF_INT# <40>
THERMTRIP_SIO <39>
THERMTRIP_MCH#<10>
H_THERMTRIP#<7>
DAT_SMB<33,40>
H_THERMDA<7>
H_THERMDC<7>
SUSPWROK<24,43>
POWER_SW#<38,40,44>
ICH_PWRGD#<43>
ACAV_IN <40,51>
THERM_STP# <47>
SNIFFER_GREEN#<44>SNIFFER_YELLOW#<44>
2.5V_RUN_PWRGD <43>
CLK_SMB<33,40>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
FAN & Thermal Sensor
18 59Friday, May 12, 2006
Compal Electronics, Inc.
FAN1 Control and Tachometer
Place under CPU
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
SMBUS ADDRESS : 2FPlace cap close to theGuardian pins as possible.
REM_DIODE3_N, REM_DIODE3_P routing together.Trace width / Spacing = 10 / 10 mil
Place near the bottom SODIMM
Place C341 close to the Guardianpins as possible
Place C197 close to the Guardianpins as possible
Use Rev:CNeed create P/N
For Vmargin pop R578 andR158=30K,R158=1K for production.
SET local temperature on M/BVSET=(Tp-70)/21 =3.3V*R157/(R152+R157) =1.044Tp=92 degree
C2070.1U_0402_16V4Z~D@
1
2
C19
1
22U
_080
5_6.
3V6M
~D
1
2
R159
2.2K_0402_5%~D
1 2 C20
022
00P_
0402
_50V
7K~D
1
2
R1581K_0603_5%~D
12
R148 1K_0402_5%~D
1 2
C2030.1U_0402_16V4Z~D@
1
2
R151 8.2K_0402_5%~D
1 2
R1457.5K_0402_5%~D
1 2
C1932200P_0402_50V7K~D
1
2
C2090.1U_0402_16V4Z~D
1
2
EB
C
Q8 MMST3904-7-F_SOT323~D
2
31
R152147K_0402_1%~D
12
R149
2.2K_0402_5%~D
1 2
R14449.9_0603_1%~D 1 2
R1548.2K_0402_5%~D
12
C1982200P_0402_50V7K~D@
1
2
R14310K_0402_5%~D
12
R1468.2K_0402_5%~D
12
C2052200P_0402_50V7K~D
@
1
2
R14210K_0402_5%~D
12
C2010.1U_0402_16V4Z~D
1
2
EB
C
Q6
MM
ST39
04-7
-F_S
OT3
23~D
2
31
JFAN1
MOLEX_53780-0370~D
112233
GND 4GND 5
R15768K_0402_1%~D
12
C1960.1U_0402_16V4Z~D
1
2
EB
C
Q7
MM
ST39
04-7
-F_S
OT3
23~D
2
31
C1950.1U_0402_16V4Z~D
1
2
R160 0.27_1210_5%~D
12
R15310K_0402_5%~D
12
EB
C
Q5
MM
ST39
04-7
-F_S
OT3
23~D
2
31
C20
210
U_0
805_
6.3V
6M~D
1
2
R14710K_0402_5%~D
12
C1940.1U_0402_16V4Z~D
1
2
C190100P_0402_50V8J~D@
1
2
R15
51K
_040
2_5%
~D
12
C20
810
U_0
805_
10V4
Z~D
1
2
U13
EMC4000_QFN40~D
SMDATA7SMBCLK8
LDO_SHDN#_ADDR23
DP235DN234
+3V_SUS12VSUS_PWRGD21
+RTC_PWR3V18
+3V_PWROK#13
POWER_SW#38
THERMTRIP1#14
THERMTRIP2#15
THERMTRIP3#16
VSET39HW_LOCK#29VSS9
ATF_INT# 17
VCP 3
LDO_POK 31
DN1 36DP1 37
THERMTRIP_SIO 30ACAV_CLR 4
SYS_SHDN# 22
DP31DN32
VDD_5V 5
FAN_OUT6
GPIO110GPIO211GPIO319GPIO420
LDO_SET 24
LDO_OUT 25
LDO_IN 26
LDO_OUT 27
LDO_IN 28
GPIO532
FAN_DAC33
VCP 40
THERMAL PAD 41
D3RB751S40T1_SOD523-2~D
@
21
C20
61U
_060
3_10
V4Z~
D
1
2
C19
2
22U
_080
5_6.
3V6M
~D
@
1
2
R57831.6K_0402_1%~D
@
12
R150 1K_0402_5%~D
1 2
R15610K_0402_5%~D@
12
C1972200P_0402_50V7K~D
1
2
C2042200P_0402_50V7K~D
1
2
C1990.1U_0402_16V4Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LCD_TST
LCD_DDCCLKLCD_DDCDATA
LCD_A1-
LCD_A0+
LCD_A2-
LCD_A0-
LCD_A2+
LCD_A1+
LCD_ACLK+LCD_ACLK-
FPBACK_ENBIA_PWM
PANEL_BKEN
LAMP_STAT#
LAMP_D_STAT#
BIA_PWM
+LCDVDD
+PWR_SRC
+5V_ALW
+LCDVDD
+LCDVDD
+15V_SUS
+GFX_PWR_SRC+GFX_PWR_SRC
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN+15V_SUS
SBAT_SMBDAT <40>
RUN_ON<40,42,43,47,48,49>
LCD_TST <24>
LCD_A0- <12>LCD_A0+ <12>
LCD_A1- <12>LCD_A1+ <12>
LCD_A2- <12>LCD_A2+ <12>
LCD_ACLK- <12>LCD_ACLK+ <12>
ENVDD<12>
FPBACK_EN<39>
PANEL_BKEN<12>
BIA_PWM <12,40>
LCD_DDCDATA <12>LCD_DDCCLK <12>
SBAT_SMBCLK <40>
LAMP_STAT# <24>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
Internal LVDS
19 59Friday, May 12, 2006
Compal Electronics, Inc.
FDS4435: P CHANNAL
40mil40mil
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
M'07 inverter support - Populate Ra,U54 Depop Ua.D'05 inverter support - Populate Ua, Depop Ra,U54
M00 support D05 inverter
RaUa
M'07 inverter support - Depop D19.D'05 inverter support - Populate D19
C2160.1U_0603_50V4Z~D
1
2
S
GD
Q9SI3456DV-T1-E3_TSOP6~D
3
6
24 5
1
R166 0_0402_5%~D
1 2
C2120.1U_0402_16V4Z~D
1
2
R165200K_0402_5%~D
12
Q13FDS4435_NL_SO8~D
4
78
65
123
D19RB751S40T1_SOD523-2~D@
21
JP1
I-PEX_20143-030E-20F~D
29 29
27 27
25 25
23 23
21 21
19 19
16 1615 15
13 13
11 11
9 9
7 7
2 2
4 45 5
30 30
28 28
26 26
24 24
22 22
20 20
18 1817 17
14 14
12 12
10 10
8 8
6 6
1 1
3 3
MGND131MGND232
MGND333MGND434
R163470_0402_5%~D
12
C2150.1U_0603_50V4Z~D
1
2
G
D
S
Q11
2N70
02W
-7-F
_SO
T323
~D
2
13
C21
710
00P_
0402
_50V
7K~D
1
2
C21
00.
1U_0
402_
16V4
Z~D
1
2
R162100K_0402_5%~D
12
R161100K_0402_5%~D
12
C21
10.
1U_0
603_
50V4
Z~D
1
2
G
D S
Q142N7002W-7-F_SOT323~D
2
1 3
C2130.1U_0402_16V4Z~D
1
2
Q12DDTC124EUA-7-F_SOT323~D
I2
O1
G3
U14SN74AHC1G08DCKR_SC70-5~D@
IN11
IN22 G3
O 4
P5
C2140.1U_0402_16V4Z~D
1
2
G
D
S
Q10
2N7002W-7-F_SOT323~D
2
13
R168100K_0402_5%~D
12
R167
100K_0402_5%~D
1 2
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SDVOB_GREEN+
DVI_TX2+SDVOB_BLUE+
INT-
SDVOB_RED-
DVI_TX2-
+VSWINGDVI_SCLK
DVI_TX1-
DVI_TX0-
DVI_CLK+
SDVOB_BLUE-
DVI_TX1+
DVI_CLK-
SDVOB_GREEN-
DVI_TX0+
INT+
DVI_SDATA
SDVOB_RED+
SDVO_CTRLCLK
SDVO_CTRLDATA
DVI_TX2+
DVI_TX2-
DVI_TX1+
DVI_TX1-
DVI_TX0+
DVI_TX0-
DVI_CLK+
DVI_CLK-
+SPVCC_TMDS
+PVCC1_TMDS
+VCC_TMDS
+SVCC_TMDS
+PVCC2_TMDS
+1.8V_RUN
+AVCC_TMDS
+1.8V_RUN
+AVCC_TMDS+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+5V_RUN
+2.5V_RUN
SDVOB_BLUE+<12>
SDVOB_INT+<12>SDVOB_INT-<12>
SDVOB_RED+<12>SDVOB_RED-<12>
PLTRST#<10,22,24,29,36>
SDVOB_CLK+<12>
SDVOB_GREEN+<12>
SDVOB_CLK-<12>
SDVOB_GREEN-<12>
DVI_DETECT<38>
SDVOB_BLUE-<12>
SDVO_CTRLDATA <12>
DVI_SDATA <38>
DVI_TX2+ <38>
DVI_TX2- <38>
DVI_TX1+ <38>
DVI_TX1- <38>
DVI_TX0- <38>
DVI_TX0+ <38>
DVI_CLK- <38>
DVI_CLK+ <38>
DVI_SCLK <38>
SDVO_CTRLCLK <12>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
Internal LVDS
20 59Friday, May 12, 2006
Compal Electronics, Inc.PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
A1 LOW: Address = 0x70
HIGH: Address = 0x72
180ohm,1500mA,0.09ohm
180ohm,1500mA,0.09ohm
180ohm,1500mA,0.09ohm
180ohm,1500mA,0.09ohm
180ohm,1500mA,0.09ohm
180ohm,1500mA,0.09ohm
C224
10U_0805_10V4Z~D
1
2
L16BLM18PG181SN1_0603~D
12
R175 220_0402_5%~D
12
C23
710
0P_0
402_
50V8
J~D
@
1
2
C240
10U_0805_10V4Z~D
1
2
C22
510
U_0
805_
10V4
Z~D
1
2
R1781K_0402_5%~D
12
C24
610
0P_0
402_
50V8
J~D
@
1
2
L13BLM18PG181SN1_0603~D
12
C231
10U_0805_10V4Z~D
1
2
C241
0.1U_0402_16V4Z~D
1
2
C24
510
U_0
805_
10V4
Z~D
1
2
C23
50.
1U_0
402_
16V4
Z~D
1
2
C243
0.1U_0402_16V4Z~D
1
2
C249 0.1U_0402_16V4Z~D
1 2
C244 0.1U_0402_16V4Z~D
1 2
C2200.1U_0402_16V4Z~D
12R
180
4.7K
_040
2_5%
~D
12
R171110_0402_1%~D
1 2
C2390.1U_0402_16V4Z~D
1
2
R170110_0402_1%~D
1 2
C22
610
0P_0
402_
50V8
J~D
@
1
2
L17BLM18PG181SN1_0603~D
12C
228
0.1U
_040
2_16
V4Z~
D
1
2
L15BLM18PG181SN1_0603~D
12
R17
42.
2K_0
402_
5%~D
12
C242
0.1U_0402_16V4Z~D
1
2
R176 1K_0402_5%~D@ 1 2
R17
32.
2K_0
402_
5%~D
12
R17
94.
7K_0
402_
5%~D
12
C230
0.1U_0402_16V4Z~D
1
2
C24
80.
1U_0
402_
16V4
Z~D
1
2
C2180.1U_0402_16V4Z~D
12
L14BLM18PG181SN1_0603~D
12
L12BLM18PG181SN1_0603~D
12
C223
0.1U_0402_16V4Z~D
1
2
C2210.1U_0402_16V4Z~D
12 R172110_0402_1%~D
1 2
C23
810
00P_
0402
_50V
7K~D
1
2
U15
SII1362CLU_LQFP48~D
HTPLG29
PGN
D2
27
SDI+32SDI-33
EXT_RES35
SDADDC 9SCLDDC 8
SDSCL 5SDSDA 4
SDR+37SDR-38
SDG+40SDG-41
SDB+43SDB-44
SDC+46SDC-47
SPG
ND
3
RESET#2
PVC
C2
26
EXT_SWING25
PVC
C1
11
VCC
10VC
C34
AGN
D12
VCC
28
OVC
C1
AVC
C15
AVC
C21
SVC
C36
SVC
C42
SPVC
C48
GN
D7
TEST30
GN
D31
SGN
D39
SGN
D45
AGN
D18
AGN
D24
A1 6
TXC- 13TXC+ 14
TX0- 16TX0+ 17
TX1- 19TX1+ 20
TX2- 22TX2+ 23
C22
710
00P_
0402
_50V
7K~D
@
1
2
C222
0.1U_0402_16V4Z~D
1
2
R169110_0402_1%~D
1 2
C2190.1U_0402_16V4Z~D
12
C24
710
00P_
0402
_50V
7K~D
1
2
R1771K_0402_5%~D
12
C229
0.1U_0402_16V4Z~D
1
2
C23
210
U_0
805_
10V4
Z~D
1
2
C23
310
00P_
0402
_50V
7K~D
@
1
2
C23
610
U_0
805_
10V4
Z~D
1
2
C23
410
0P_0
402_
50V8
J~D
@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VGA_GRN
VGA_BLU
CLK_DDC2
+CRT_VCC
VGA_HSYNC_B
VGA_VSYNC_B
JVGA_HSBLUE
RED
GREEN
JVGA_VS
VGA_RED
M_ID2#
DAT_DDC2
+CRT_VCC
+CRT_VCC
+3.3V_RUN
+CRT_VCC
+5V_RUN
VGA_RED<12,38>
VGA_VSYNC<12>
VGA_GRN<12,38>
VGA_BLU<12,38>
VGA_HSYNC<12>
DAT_DDC2<12,38>
VSYNC_R <38>
HSYNC_R <38>
CLK_DDC2<12,38>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
CRT Connector
21 59Friday, May 12, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
K1 A2
A1 K2
DA204U
22ohm,500mA,0.1ohm
120ohm,600mA,0.25ohm
120ohm,600mA,0.25ohm
22ohm,500mA,0.1ohm
22ohm,500mA,0.1ohm
C25410P_0402_50V8J~D@
1
2
L19BLM18BB220SN1D_0603~D
1 2
D6DA204U_SOT323~D@
2 31
L18BLM18BB220SN1D_0603~D
1 2
C25
822
P_0
402_
50V8
J~D
1
2
R6500_0402_5%~D
1 2
R6490_1206_5%~D
12
C25
0
22P
_040
2_50
V8J~
D
@
1
2
D4DA204U_SOT323~D@
2 31
C25
722
P_0
402_
50V8
J~D
1
2
U16
SN74AHCT1G125GW_SOT-353~D
A2 Y 4
P5
G3
OE#
1
R18
115
0_04
02_1
%~D
12
R18
51K
_040
2_5%
~D@
12
R18
315
0_04
02_1
%~D
12
R190
39_0402_5%~D
1 2
C6370.1U_0402_16V4Z~D
1
2
L21BLM11A121S_0603~D
1 2
JCRT1
SUYIN_070546FR015S2307R~D
611
17
1228
1339
144
1015
5
1617
C25
2
22P
_040
2_50
V8J~
D
@
1
2
C25510P_0402_50V8J~D@
1
2
U17
SN74AHCT1G125GW_SOT-353~D
A2 Y 4
P5
G3
OE#
1
R18
62.
2K_0
402_
5%~D
12
R18
41K
_040
2_5%
~D@
12
R1881K_0402_5%~D 1 2
C25310P_0402_50V8J~D@
1
2
D7
RB
751S
40T1
_SO
D52
3-2~
D
21
R6510_0402_5%~D
1 2
R189
39_0402_5%~D
1 2
C25
1
22P
_040
2_50
V8J~
D
@
1
2
L22BLM11A121S_0603~D
1 2
L20BLM18BB220SN1D_0603~D
1 2
T12 PAD~D
C25
60.
01U
_040
2_16
V7K~
D
1
2
R18
215
0_04
02_1
%~D
12
R1872.2K_0402_5%~D
12
D5DA204U_SOT323~D@
2 31
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_PCI_ICH
PCI_SERR#
PCI_DEVSEL#PCI_PCIRST#
PCI_C_BE0#
PCI_REQ4#
PCI_PERR#
PCI_GNT4#
ICH_GPIO4_PIRQG#PCI_PIRQB#
PCI_REQ5#
PCI_STOP#
PCI_C_BE1#
PCI_C_BE3#
ICH_GPIO3_PIRQF#PCI_PIRQC#
PCI_REQ2#
ICH_GPIO2_PIRQE#
PCI_FRAME#
PCI_REQ3#
PCI_PLOCK#
PCI_IRDY#
PCI_C_BE2#
PCI_REQ1#
PCI_REQ0#
PCI_PIRQD#
PCI_PIRQA#
PCI_PAR
PCI_TRDY#
ICH_GPIO5_PIRQH#
PCI_PLTRST#CLK_PCI_ICHICH_PME#
PCI_AD0PCI_AD1PCI_AD2PCI_AD3PCI_AD4PCI_AD5
PCI_AD7PCI_AD6
PCI_AD8PCI_AD9
PCI_AD11PCI_AD10
PCI_AD14PCI_AD15
PCI_AD13PCI_AD12
PCI_AD16PCI_AD17
PCI_AD19PCI_AD18
PCI_AD22PCI_AD23
PCI_AD21PCI_AD20
PCI_AD25PCI_AD24
PCI_AD28PCI_AD29
PCI_AD31PCI_AD30
PCI_AD26PCI_AD27
PCI_TRDY#
PCI_DEVSEL#
PCI_STOP#
PCI_FRAME#
PCI_IRDY#
PCI_PLOCK#
PCI_SERR#
PCI_PERR#
PCI_PIRQC#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQD#
ICH_GPIO5_PIRQH#
ICH_GPIO4_PIRQG#
ICH_GPIO3_PIRQF#
ICH_GPIO2_PIRQE#
PCI_REQ0#
PCI_REQ2#
PCI_REQ3#
PCI_REQ4#
PCI_REQ5#
PCI_REQ1#
PCI_GNT5#
PCI_GNT0#
PCI_GNT5# PCI_GNT4#
PLTRST2#
PCI_GNT2#
PLTRST#PCI_PLTRST#
PCI_RST#PCI_PCIRST#
+3.3V_RUN
+3.3V_RUN
+3.3V_SUS
+3.3V_SUS
+3.3V_SUS
+3.3V_SUS
PCI_C_BE1# <31,37>
PCI_SERR# <31,37>
PCI_PAR <31,37>PCI_IRDY# <31,37,38>
PCI_PERR# <31,37>
PCI_PIRQC#<31>
PCI_C_BE3# <31,37>
PCI_FRAME# <31,37,38>
PCI_C_BE2# <31,37>
PCI_DEVSEL# <31,37>
PCI_TRDY# <31,37>
PCI_C_BE0# <31,37>
PCI_STOP# <31,37>
PCI_AD[0..31]<31,37>
ICH_PME# <39>
PCI_RST# <31,35,37>
PLTRST# <10,20,24,29,36>
MCH_ICH_SYNC# <10>
PCI_PIRQA#<37>
PCI_REQ0# <38>
PCI_PLOCK# <37>
PCI_GNT0# <37,38>
PLTRST2# <39,40>PCI_PIRQB#<31>
PCI_PIRQD#<31>
PCI_GNT2# <31>PCI_REQ2# <31>
CLK_PCI_ICH <6>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
ICH7(1/4)
22 59Friday, May 12, 2006
Compal Electronics, Inc.
Place closely pin U45.A9
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
LPC
PCI
SPI
GNT5#R214
GNT4#R213
(11)
(10)
(01)
unstuffunstuff
unstuff
unstuff stuff
stuff *
U18C
74VHC08MTCX_NL_TSSOP14~D
IN110
IN29 OUT 8
P14
G7
R196 8.2K_0402_5%~D
1 2
R2121K_0402_5%~D
12
R204 8.2K_0402_5%~D
1 2
R192 8.2K_0402_5%~D
1 2
Interrupt I/F
PCI
MISC
U19B
82801GHM SL8YB B0_BGA652~D
FRAME# F16
GPIO17 / GNT5# D8
TRDY# F14STOP# F15
GPIO2 / PIRQE# G8GPIO3 / PIRQF# F7GPIO4 / PIRQG# F8GPIO5 / PIRQH# G7
C/BE0# B15C/BE1# C12C/BE2# D12C/BE3# C15
IRDY# A7PAR E10
PCIRST# B18DEVSEL# A12
PERR# C9PLOCK# E11
SERR# B10
PIRQC#C5
RSVD[4]AH4
PIRQA#A3
RSVD[5]AD9
RSVD[2]AD5RSVD[3]AG4
PIRQB#B4
PIRQD#B5
RSVD[1]AE5
REQ0# D7GNT0# E7REQ1# C16GNT1# D16REQ2# C17GNT2# D17REQ3# E13GNT3# F13
REQ4# / GPIO22 A13GNT4# / GPIO48 A14GPIO1 / REQ5# C8
AD0E18AD1C18AD2A16AD3F18AD4E16AD5A18AD6E17AD7A17AD8A15AD9C14AD10E14AD11D14AD12B12AD13C13AD14G15AD15G13AD16E12AD17C11AD18D11AD19A11AD20A10AD21F11AD22F10AD23E9AD24D9AD25B9AD26A8AD27A6AD28C7AD29B6AD30E6AD31D6
RSVD[6] AE9RSVD[7] AG8RSVD[8] AH8RSVD[9] F21
MCH_SYNC# AH20
PLTRST# C26PCICLK A9
PME# B19
R193 8.2K_0402_5%~D
1 2
U18B
74VHC08MTCX_NL_TSSOP14~D
IN14
IN25 OUT 6
P14
G7
R194 8.2K_0402_5%~D
1 2
R214 8.2K_0402_5%~D
1 2
R195 8.2K_0402_5%~D
1 2
R198 8.2K_0402_5%~D
1 2
U18D
74VHC08MTCX_NL_TSSOP14~D
IN113
IN212 OUT 11
P14
G7
R206 8.2K_0402_5%~D
1 2
R211 8.2K_0402_5%~D
1 2
R191 8.2K_0402_5%~D
1 2
R202 8.2K_0402_5%~D
1 2
R209 8.2K_0402_5%~D
1 2
R197 8.2K_0402_5%~D
1 2
R201 8.2K_0402_5%~D
1 2
R21010_0402_5%~D
@
12
R2131K_0402_5%~D@
12
R200 8.2K_0402_5%~D
1 2
C2598.2P_0402_50V8J~D
@
1
2
R208 8.2K_0402_5%~D
1 2
R203 8.2K_0402_5%~D
1 2
U18A
74VHC08MTCX_NL_TSSOP14~D
IN11
IN22 OUT 3
P14
G7
R207 8.2K_0402_5%~D
1 2
R205 8.2K_0402_5%~D
1 2
R199 8.2K_0402_5%~D
1 2
R215 8.2K_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
IDE_DDREQ
H_A20M#
H_INIT#
H_IGNNE#
H_INTR
H_NMI
H_STPCLK#
H_FERR#
IDE_IRQ
H_DPRSTP#
IDE_DD9
IDE_DD2
IDE_DD15
IDE_DD0
IDE_DIOR#
DPRSLP#
LPC_LFRAME#
IDE_DA1
IDE_DD14
IDE_DA2
LPC_LDRQ1#
ICH_AZ_MDC_SDIN1
IDE_DD6
IDE_DA0
ICH_AC_SDOUT_R
IDE_DD13
IDE_DD10
IDE_DD8
IDE_DD1
IDE_DD7
IDE_DD4
LPC_LAD3
ICH_AC_RST_R#
IDE_IRQ
IDE_DD[0..15]
IDE_DD12
IDE_DD3
THRMTRIP_ICH#
IDE_DD5
SIO_RCIN#
LPC_LAD0
ICH_RTCRST#
IDE_DD11
IDE_DDACK#
ICH_AZ_CODEC_SDIN0
LPC_LDRQ0#
H_DPSLP#
SM_INTRUDER#
IDE_DIORDY
IDE_DSC1#
SM_INTRUDER#
ICH_AC_SYNC_R
ICH_AC_SYNC_R
ICH_AC_RST_R#
ICH_AC_SDOUT_R
H_CPUSLP#H_CPUSLP_R#
SIO_A20GATE
H_PWRGOOD
H_SMI#
LPC_LAD2
IDE_DSC3#
H_FERR#
LPC_LAD1
ICH_INTVRMEN
ICH_AC_BITCLK_R
ICH_AC_BITCLK_R
SIO_A20GATE
SIO_RCIN#
IDE_DIOW#
ICH_RTCX1
ICH_RTCX2
+RTC_CELL
+RTC_CELL
+3.3V_RUN
+3.3V_RUN
+1.05V_VCCP
+1.05V_VCCP
IDE_DD[0..15] <26>
IDE_DIOR#<26>IDE_DIOW#<26>
ICH_AZ_MDC_SDIN1<34>
LPC_LAD[0..3] <29,39,40>
IDE_DA[0..2] <26>
H_INTR <7>H_INIT# <7>
H_DPSLP# <7>
H_SMI# <7>
H_IGNNE# <7>
H_A20M# <7>
H_NMI <7>
H_STPCLK# <7>
H_CPUSLP# <7,10>
IDE_IRQ<26>
H_DPRSTP# <7,50>
H_PWRGOOD <7>
SIO_RCIN# <40>
IDE_DIORDY<26>
IDE_DSC1# <26>
SIO_A20GATE <40>
ICH_AZ_CODEC_SDIN0<27>
IDE_DSC3# <26>
ICH_AZ_CODEC_RST#<27>
ICH_AZ_CODEC_SYNC<27>
ICH_AZ_CODEC_SDOUT<27>
ICH_AZ_MDC_SYNC<34>
ICH_AZ_MDC_SDOUT<34>
ICH_AZ_MDC_BITCLK<34>
ICH_AZ_CODEC_BITCLK<27>
ICH_AZ_MDC_RST#<34>
IDE_DDACK#<26>IDE_DDREQ <26>
H_FERR# <7>
LPC_LFRAME# <29,39,40>
LPC_LDRQ0# <39>LPC_LDRQ1# <39>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
ICH7(2/4)
23 59Friday, May 12, 2006
Compal Electronics, Inc.
Package9.6X4.06 mm
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DPRSTP# daisy
Close to U19
ICH7-M --> IMVP6 -->Yonah
R226 56_0402_5%~D
1 2
CMOS1@SHORT PADS~D
11 2 2
R23333_0402_5%~D
1 2
C2621U_0603_10V4Z~D 1 2
R584 10K_0402_5%~D
12
C263 27P_0402_50V8J~D@
12
R220 10K_0402_5%~D
12
R2161M_0402_5%~D
12
R643 0_0402_5%~D12
R222 0_0402_5%~D 12
R219
332K_0402_1%~D
1 2
Y2
32.768K_12.5PF_Q13MC30610003~D
14
23
R21
710
M_0
402_
5%~D
12
R229
8.2K_0402_5%~D
12
R22533_0402_5%~D
1 2
R227
33_0402_5%~D
1 2
R22433_0402_5%~D 1 2
R23233_0402_5%~D
1 2RTC
LAN
SATA
AC-97/AZALIA
LPC
CPU
IDE
U19A
82801GHM SL8YB B0_BGA652~D
RTCX1AB1RTCX2AB2
RTCRST#AA3
INTVRMENW4INTRUDER#Y5
EE_CSW1EE_SHCLKY1EE_DOUTY2EE_DINW3
LAN_CLKV3
LAN_RSTSYNCU3
LAN_RXD0U5LAN_RXD1V4LAN_RXD2T5
LAN_TXD0U7LAN_TXD1V6LAN_TXD2V7
ACZ_BCLKU1ACZ_SYNCR6
ACZ_RST#R5
ACZ_SDIN0T2ACZ_SDIN1T3ACZ_SDIN2T1
ACZ_SDOUTT4
SATALED#AF18
SATA0RXNAF3SATA0RXPAE3SATA0TXNAG2SATA0TXPAH2
SATA2RXNAF7SATA2RXPAE7SATA2TXNAG6SATA2TXPAH6
SATA_CLKNAF1SATA_CLKPAE1
SATARBIASNAH10SATARBIASPAG10
IORDYAG16IDEIRQAH16DDACK#AF16DIOW#AH15DIOR#AF15
LAD0 AA6LAD1 AB5LAD2 AC4LAD3 Y6
LDRQ0# AC3LDRQ1# / GPIO23 AA5
LFRAME# AB3
A20GATE AE22A20M# AH28
CPUSLP# AG27
TP1 / DPRSTP# AF24TP2 / DPSLP# AH25
FERR# AG26
GPIO49 / CPUPWRGD AG24
IGNNE# AG22INIT3_3V# AG21
INIT# AF22INTR AF25
RCIN# AG23
SMI# AF23NMI AH24
STPCLK# AH22
THERMTRIP# AF26
DA0 AH17DA1 AE17DA2 AF17
DCS1# AE16DCS3# AD16
DD0 AB15DD1 AE14DD2 AG13DD3 AF13DD4 AD14DD5 AC13DD6 AD12DD7 AC12DD8 AE12DD9 AF12
DD10 AB13DD11 AC14DD12 AF14DD13 AH13DD14 AH14DD15 AC15
DDREQ AE15
R22856_0402_5%~D
12
R21820K_0402_5%~D
1 2
R221 0_0402_5%~D@ 12
R22333_0402_5%~D 1 2
C26012P_0402_50V8J~D 12
R23033_0402_5%~D
1 2
C26112P_0402_50V8J~D 12
C26427P_0402_50V8J~D@
1
2
R23133_0402_5%~D
1 2
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LINKALERT#
ICH_BATLOW#
ICH_PCIE_WAKE#
SIO_THRM#
IRQ_SERIRQ
CLKRUN#ICH_SMBDATA
USB_OC1#
SIO_THRM#
USBP5-
ICH_PCIE_WAKE#
USBP7-
CLK_PCIE_ICH#
USB_OC2#
USBP5+
CLK_ICH_48M
PM_BMBUSY#
CLK_ICH_14M
CLK_PCIE_ICH
PLTRST#
USBP4-
USBP6-
H_STP_CPU#
IMVP_PWRGD
SIO_SLP_S3#ITP_DBRESET#
CLK_ICH_48M
CLK_ICH_14MICH_RI#
USBP6+
IRQ_SERIRQ
SIO_EXT_SMI#
SIO_SLP_S5#
USBP4+
USBP7+
SMBALERT#
USBRBIAS
DMI_IRCOMP
GPIO24
USB_OC0#
USB_OC3#
USB_OC1#USB_OC2#
USB_OC5#
USB_OC7#
USB_OC6#USB_OC7#
ICH_SMBCLK
SPKR
LINKALERT#
USB_OC4#
H_STP_PCI#
ICH_SMLINK0ICH_SMLINK0ICH_SMLINK1 ICH_SMLINK1
SUSPWROK
ICH_BATLOW#
SIO_PWRBTN#
ICH_PWRGD
ICH_SUSCLK
PCIE_IRX_WLANTX_N2PCIE_IRX_WLANTX_P2
PCIE_ITX_WLANRX_P2
SIO_EXT_WAKE#
SIO_EXT_SCI#
USBP1+USBP1-
DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MRX_ITX_P0
DMI_MRX_ITX_P1
DMI_MRX_ITX_N0
DMI_MRX_ITX_N1
USBP0+USBP0-
USB_OC0#
PCIE_IRX_WANTX_N1PCIE_IRX_WANTX_P1
PCIE_ITX_WANRX_P1
PCIE_ITX_LOMRX_N3
PCIE_IRX_LOMTX_N3PCIE_IRX_LOMTX_P3
PCIE_ITX_LOMRX_P3
USB_OC4#
USB_OC6#
LCD_TST
ICH_SPI_CLK
BT_RADIO_DIS#
WWAN_RADIO_DIS#
WWAN_RADIO_DIS#
ICH_EC_SPI_CLK
USB_OC5#
IDE_HRESET#
LAMP_STAT#
BT_RADIO_DIS#
DPRSLPVR
SMBALERT#DPRSLPVR
SIO_EXT_SCI#
SIO_EXT_SMI#
USB_OC3#
LAMP_STAT#
ICHI_ECI_SPIO_DATAICHO_SPIIICHO_ECO_SPII_DATA
CLKRUN#
RSVD_HDDC_EN#
SPI_CS#
PCIE_ITX_WANRX_N1
PCIE_ITX_WLANRX_N2
+3.3V_SUS
+3.3V_RUN
+3.3V_SUS
+3.3V_SUS
+1.5V_RUN
+3.3V_SUS
+3.3V_SUS
+3.3V_SUS+3.3V_SUS
+3.3V_RUN
+3.3V_SUS
SIO_EXT_SMI#<40>
H_STP_CPU#<6>
IMVP_PWRGD<43,50>
USBP4+ <33>USBP5- <33>USBP5+ <33>
USBP4- <33>
IRQ_SERIRQ<29,31,39,40>
SIO_SLP_S3# <40>
SIO_SLP_S5# <40>
CLK_PCIE_ICH# <6>CLK_PCIE_ICH <6>
PM_BMBUSY#<10>
SIO_THRM#<40>
ICH_PCIE_WAKE#<39>
USBP6+ <33>USBP7- <38>USBP7+ <38>
USBP6- <33>
PLTRST# <10,20,22,29,36>
CLK_ICH_14M <6>CLK_ICH_48M <6>
CLKRUN#<31,39,40>
SPKR<27>
H_STP_PCI#<6>
SUSPWROK <18,43>
SIO_PWRBTN# <40>
DPRSLPVR <50>
PCIE_IRX_WLANTX_N2<36>PCIE_IRX_WLANTX_P2<36>PCIE_ITX_WLANRX_N2_C<36>
PCIE_ITX_WLANRX_P2_C<36>
SIO_EXT_WAKE#<40>
SIO_EXT_SCI# <40>
USBP1+ <39>USBP1- <39>
DMI_MRX_ITX_N0 <10>DMI_MRX_ITX_P0 <10>
DMI_MRX_ITX_N1 <10>DMI_MRX_ITX_P1 <10>
USBP0+ <36>USBP0- <36>
USB_OC5# <33>
USB_OC3#
PCIE_IRX_WANTX_N1<36>PCIE_IRX_WANTX_P1<36>
PCIE_ITX_WANRX_N1_C<36>
PCIE_ITX_WANRX_P1_C<36>
PCIE_IRX_LOMTX_N3<29>
PCIE_ITX_LOMRX_N3_C<29>
PCIE_ITX_LOMRX_P3_C<29>
PCIE_IRX_LOMTX_P3<29>
USB_OC4# <33>USB_OC6# <33>
ICH_EC_SPI_CLK<40>
ICHO_ECO_SPII_DATA<40>ICHI_ECI_SPIO_DATA<40>
ITP_DBRESET#<7,40>
LCD_TST<19>
BT_RADIO_DIS#<34>
WWAN_RADIO_DIS# <36>
IDE_HRESET#<26>
LAMP_STAT#<19>
PM_EXTTS#1 <10>
ICH_SMBDATA<6,29,36>ICH_SMBCLK<6,29,36>
DMI_MTX_IRX_N0 <10>DMI_MTX_IRX_P0 <10>
DMI_MTX_IRX_N1 <10>DMI_MTX_IRX_P1 <10>
SPI_CS#<40>
ICH_PWRGD <6>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
ICH7(3/4)
24 59Friday, May 12, 2006
Compal Electronics, Inc.
(PCI Express Wake Event)
Place closely pin U45.B2
Place closely pin U45.AC1
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
close to ICH7-M
Within 500 mils
Within 500 mils
<---Docking
<---REAR
<---REAR
<---SIO USB Hub
<---PWR USB
GIGA LAN--->
Mini Card 1--->
Mini Card 2--->
<---Mini2 WLAN
R23
910
K_04
02_5
%~D
12
R26
610
K_04
02_5
%~D
12
R2418.2K_0402_5%~D
1 2
R246 8.2K_0402_5%~D
1 2
R237 8.2K_0402_5%~D@1 2
R27010_0402_5%~D@
12
R250 10K_0402_5%~D
1 2
R264 24.9_0402_1%~D
1 2
R248 10K_0402_5%~D 1 2
R26
710
K_04
02_5
%~D
12
R253 680_0402_5%~D
1 2
R257 10K_0402_5%~D 1 2
T7PAD~D
R259 10K_0402_5%~D 1 2
R258 10K_0402_5%~D 1 2
C269 0.1U_0402_10V6K~D
1 2
R245 10K_0402_5%~D
1 2
R23
810
K_04
02_5
%~D
12
R574 0_0402_5%~D12
R263 10K_0402_5%~D 1 2
C2654.7P_0402_50V8C~D@
1
2
C270 0.1U_0402_10V6K~D
1 2
R247 10K_0402_5%~D
1 2
R244 8.2K_0402_5%~D
1 2R243
10_0402_5%~D@
12
R271 22.6_0402_1%~D 1 2
R255 100K_0402_5%~D1 2
R261 10K_0402_5%~D 1 2
R252 10K_0402_5%~D
1 2
R256 10K_0402_5%~D 1 2
R2362.2K_0402_5%~D
12
C2724.7P_0402_50V8C~D@
1
2
R23
52.
2K_0
402_
5%~D
12
R262 10K_0402_5%~D 1 2
R251 8.2K_0402_5%~D
1 2
R641 47_0402_5%~D12
T6PAD~D
R249 10K_0402_5%~D
1 2
R26847_0402_5%~D
1 2
R242 10K_0402_5%~D
1 2
R260 10K_0402_5%~D 1 2
R234 10K_0402_5%~D
1 2
R269 47_0402_5%~D
1 2
R254 10K_0402_5%~D
1 2
C267 0.1U_0402_10V6K~D
1 2
C268 0.1U_0402_10V6K~D
1 2
PCI-EXPRESS
DIRECT MEDIA INTERFACE
USB
SPI
U19D
82801GHM SL8YB B0_BGA652~D
SPI_CLKR2SPI_CS#P6SPI_ARBP1
SPI_MOSIP5SPI_MISOP2
DMI0RXN V26DMI0RXP V25DMI0TXN U28DMI0TXP U27
DMI1RXN Y26DMI1RXP Y25DMI1TXN W28DMI1TXP W27
DMI2RXN AB26DMI2RXP AB25DMI2TXN AA28DMI2TXP AA27
DMI3RXN AD25DMI3RXP AD24DMI3TXN AC28DMI3TXP AC27
DMI_CLKN AE28DMI_CLKP AE27
DMI_ZCOMP C25DMI_IRCOMP D25
PERn1F26PERp1F25PETn1E28PETp1E27
PERn2H26PERp2H25PETn2G28PETp2G27
PERn3K26PERp3K25PETn3J28PETp3J27
PERn4M26PERp4M25PETn4L28PETp4L27
PERn5P26PERp5P25PETn5N28PETp5N27
PERn6T25PERp6T24PETn6R28PETp6R27
OC0#D3OC1#C4OC2#D5OC3#D4OC4#E5OC5# / GPIO29C3OC6# / GPIO30A2OC7# / GPIO31B3
USBP0N F1USBP0P F2USBP1N G4USBP1P G3USBP2N H1USBP2P H2USBP3N J4USBP3P J3USBP4N K1USBP4P K2USBP5N L4USBP5P L5USBP6N M1USBP6P M2USBP7N N4USBP7P N3
USBRBIAS# D2USBRBIAS D1
C271 0.1U_0402_10V6K~D
1 2
T17PAD~D
R240 10K_0402_5%~D
1 2 R37010K_0402_5%~D@
12
SATA
POWER MGT
SYS
SMB
GPIO
Clocks
GPIO
GPIO
U19C
82801GHM SL8YB B0_BGA652~D
RI#A28
SPKRA19
SYS_RST#A22 SUS_STAT#A27
GPIO0 / BM_BUSY#AB18
GPIO26A21
GPIO27B21GPIO28E23
GPIO32 / CLKRUN#AG18
GPIO33 / AZ_DOCK_EN#AC19GPIO34 / AZ_DOCK_RST#U2
VRMPWRGDAD22
GPIO11 / SMBALERT#B23
SUSCLK C20
SLP_S3# B24SLP_S4# D23SLP_S5# F22
PWROK AA4
GPIO16 / DPRSLPVR AC22
TP0 / BATLOW# C21
PWRBTN# C23
LAN_RST# C19
RSMRST# Y4
GPIO21 / SATA0GP AF19GPIO19 / SATA1GP AH18GPIO36 / SATA2GP AH19GPIO37 / SATA3GP AE19
CLK14 AC1CLK48 B2
GPIO9 E20GPIO10 A20GPIO12 F19GPIO13 E19GPIO14 R4GPIO15 E22GPIO24 R3GPIO25 D20
SATACLKREQ#/GPIO35 AD21GPIO38 AD20GPIO39 AE20
SMBCLKC22SMBDATAB22LINKALERT#A26SMLINK0B25SMLINK1A25
GPIO18 / STPPCI#AC20GPIO20 / STPCPU#AF21
WAKE#F20SERIRQAH21THRM#AF20
GPIO6AC21GPIO7AC18GPIO8E21
R26
510
K_04
02_5
%~D
12
C266 0.1U_0402_10V6K~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+DMIPLL_R
ICH_V5REF_SUS
+1.5V_DMIPLL
ICH_V5REF_RUN
+1.5V_RUN_L
ICH_V5REF_RUN
ICH_V5REF_SUS
+RTC_CELL
+5V_SUS
+1.5V_RUN_L
+1.5V_DMIPLL
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+5V_RUN
+3.3V_SUS
+3.3V_SUS
+3.3V_SUS
+3.3V_SUS
+3.3V_SUS
+3.3V_SUS
+1.05V_VCCP
+1.05V_VCCP
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
ICH7(4/4)
25 59Friday, May 12, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
CRB is 270uF
60ohm,3000mA,0.025ohm
600ohm,100mA
C2830.1U_0402_10V6K~D
1
2
C29
910
U_0
805_
6.3V
6M~D
1
2
C2950.1U_0402_10V6K~D
1
2
C3070.1U_0402_10V6K~D
1
2
C29
70.
1U_0
402_
10V6
K~D
1
2
C3050.1U_0402_10V6K~D
1 2
L24BLM11A601S_0603~D
1 2
C29
10.
1U_0
402_
10V6
K~D
1
2
R5850.5_0805_1%~D
1 2
C2850.1U_0402_10V6K~D
1 2
C2874.7U_0603_6.3V6M~D
1 2R273
10_0402_5%~D
12
C29
60.
1U_0
402_
10V6
K~D
1
2
C2890.1U_0402_10V6K~D
1
2
+
C27
6
220U
_D2_
4M_R
45~D
1
2
C3080.1U_0402_10V6K~D
1
2
D8RB751S40T1_SOD523-2~D
21
C30
00.
1U_0
402_
10V6
K~D
1
2
U19F
82801GHM SL8YB B0_BGA652~D
V5REF[1]G10
V5REF[2]AD17
V5REF_SusF6
Vcc1_5_B[1]AA22Vcc1_5_B[2]AA23Vcc1_5_B[3]AB22Vcc1_5_B[4]AB23Vcc1_5_B[5]AC23Vcc1_5_B[6]AC24Vcc1_5_B[7]AC25Vcc1_5_B[8]AC26Vcc1_5_B[9]AD26Vcc1_5_B[10]AD27Vcc1_5_B[11]AD28Vcc1_5_B[12]D26Vcc1_5_B[13]D27Vcc1_5_B[14]D28Vcc1_5_B[15]E24Vcc1_5_B[16]E25Vcc1_5_B[17]E26Vcc1_5_B[18]F23Vcc1_5_B[19]F24Vcc1_5_B[20]G22Vcc1_5_B[21]G23Vcc1_5_B[22]H22Vcc1_5_B[23]H23Vcc1_5_B[24]J22Vcc1_5_B[25]J23Vcc1_5_B[26]K22Vcc1_5_B[27]K23Vcc1_5_B[28]L22Vcc1_5_B[29]L23Vcc1_5_B[30]M22Vcc1_5_B[31]M23Vcc1_5_B[32]N22Vcc1_5_B[33]N23Vcc1_5_B[34]P22Vcc1_5_B[35]P23Vcc1_5_B[36]R22Vcc1_5_B[37]R23Vcc1_5_B[38]R24Vcc1_5_B[39]R25
Vcc1_5_B[41]T22Vcc1_5_B[42]T23Vcc1_5_B[43]T26Vcc1_5_B[44]T27Vcc1_5_B[45]T28Vcc1_5_B[46]U22Vcc1_5_B[47]U23Vcc1_5_B[48]V22Vcc1_5_B[49]V23Vcc1_5_B[50]W22
Vcc1_5_B[52]Y22Vcc1_5_B[53]Y23
Vcc1_5_B[51]W23
Vcc1_5_B[40]R26
Vcc3_3[1]B27
VccDMIPLLAG28
VccSATAPLLAD2
Vcc3_3[2]AH11
Vcc1_05[1] L11Vcc1_05[2] L12Vcc1_05[3] L14Vcc1_05[4] L16
Vcc1_05[6] L18Vcc1_05[5] L17
Vcc1_05[7] M11Vcc1_05[8] M18Vcc1_05[9] P11
Vcc1_05[10] P18Vcc1_05[11] T11Vcc1_05[12] T18Vcc1_05[13] U11Vcc1_05[14] U18Vcc1_05[15] V11Vcc1_05[16] V12Vcc1_05[17] V14Vcc1_05[18] V16Vcc1_05[19] V17Vcc1_05[20] V18
Vcc3_3 / VccHDA U6
VccSus3_3/VccSusHDA R7
V_CPU_IO[1] AE23V_CPU_IO[2] AE26V_CPU_IO[3] AH26
Vcc3_3[3] AA7Vcc3_3[4] AB12Vcc3_3[5] AB20Vcc3_3[6] AC16Vcc3_3[7] AD13Vcc3_3[8] AD18Vcc3_3[9] AG12
Vcc3_3[10] AG15Vcc3_3[11] AG19
Vcc3_3[12] A5
Vcc3_3[14] B16Vcc3_3[15] B7Vcc3_3[16] C10
Vcc3_3[13] B13
Vcc3_3[17] D15Vcc3_3[18] F9Vcc3_3[19] G11Vcc3_3[20] G12
VccRTC W5
VccSus3_3[1] P7
VccSus3_3[2] A24
VccSus3_3[4] D19VccSus3_3[5] D22VccSus3_3[6] G19
VccSus3_3[3] C24
VccSus3_3[7] K3VccSus3_3[8] K4VccSus3_3[9] K5
VccSus3_3[10] K6VccSus3_3[11] L1
Vcc1_5_A[19] AB17Vcc1_5_A[20] AC17
Vcc1_5_A[21] T7Vcc1_5_A[22] F17Vcc1_5_A[23] G17
Vcc1_5_A[24] AB8Vcc1_5_A[25] AC8
VccSus1_05[1] K7
Vcc1_5_A[1]AB7Vcc1_5_A[2]AC6Vcc1_5_A[3]AC7Vcc1_5_A[4]AD6Vcc1_5_A[5]AE6Vcc1_5_A[6]AF5Vcc1_5_A[7]AF6Vcc1_5_A[8]AG5Vcc1_5_A[9]AH5
Vcc1_5_A[10]AB10Vcc1_5_A[11]AB9Vcc1_5_A[12]AC10Vcc1_5_A[13]AD10Vcc1_5_A[14]AE10Vcc1_5_A[15]AF10Vcc1_5_A[16]AF9Vcc1_5_A[17]AG9Vcc1_5_A[18]AH9
VccSus3_3[19]E3
VccUSBPLLC1
VccSus1_05/VccLAN1_05[1]AA2VccSus1_05/VccLAN1_05[2]Y7
VccSus3_3/VccLAN3_3[1]V5VccSus3_3/VccLAN3_3[2]V1VccSus3_3/VccLAN3_3[3]W2VccSus3_3/VccLAN3_3[4]W7
Vcc3_3[21] G16
VccSus3_3[12] L2VccSus3_3[13] L3VccSus3_3[14] L6VccSus3_3[15] L7VccSus3_3[16] M6VccSus3_3[17] M7VccSus3_3[18] N7
VccSus1_05[2] C28VccSus1_05[3] G20
Vcc1_5_A[26] A1Vcc1_5_A[27] H6Vcc1_5_A[28] H7Vcc1_5_A[29] J6Vcc1_5_A[30] J7
C29
00.
1U_0
402_
10V6
K~D
1
2
C3090.1U_0402_10V6K~D
1
2
C27
31U
_060
3_10
V4Z~
D
1
2
C29
80.
01U
_040
2_16
V7K~
D
1
2
C29
3
0.1U
_040
2_10
V6K~
D
1
2
C27
40.
1U_0
402_
10V6
K~D
1
2
C27
7
0.1U
_040
2_10
V6K~
D
1
2
C2840.1U_0402_10V6K~D 1 2
D9RB751S40T1_SOD523-2~D
21
C3060.1U_0402_10V6K~D
1
2
C2820.1U_0402_10V6K~D
1
2
C30
30.
1U_0
402_
10V6
K~D
1
2
+
C27
533
0U_V
_6.3
VM_R
25M
~D
1
2
C2860.1U_0402_10V6K~D
1
2
C3041U_0603_10V4Z~D
1
2
R272100_0402_5%~D
12
C27
8
0.1U
_040
2_10
V6K~
D
1
2
C3020.1U_0402_10V6K~D
1
2
U19E
82801GHM SL8YB B0_BGA652~D
VSS[0]A4VSS[1]A23VSS[2]B1VSS[3]B8VSS[4]B11VSS[5]B14VSS[6]B17VSS[7]B20VSS[8]B26VSS[9]B28VSS[10]C2VSS[11]C6VSS[12]C27VSS[13]D10VSS[14]D13VSS[15]D18VSS[16]D21VSS[17]D24VSS[18]E1VSS[19]E2VSS[21]E4VSS[22]E8VSS[23]E15VSS[24]F3VSS[25]F4VSS[26]F5VSS[27]F12VSS[28]F27VSS[29]F28VSS[30]G1VSS[31]G2VSS[32]G5VSS[33]G6VSS[34]G9VSS[35]G14VSS[36]G18VSS[37]G21VSS[38]G24VSS[39]G25VSS[40]G26VSS[41]H3VSS[42]H4VSS[43]H5VSS[44]H24VSS[45]H27VSS[46]H28VSS[47]J1VSS[48]J2VSS[49]J5VSS[50]J24VSS[51]J25VSS[52]J26VSS[53]K24VSS[54]K27VSS[55]K28VSS[56]L13VSS[57]L15VSS[58]L24VSS[59]L25VSS[60]L26VSS[61]M3VSS[62]M4VSS[63]M5VSS[64]M12VSS[65]M13VSS[66]M14VSS[67]M15VSS[68]M16VSS[69]M17VSS[70]M24VSS[71]M27VSS[72]M28VSS[73]N1VSS[74]N2VSS[75]N5VSS[76]N6VSS[77]N11VSS[78]N12VSS[79]N13VSS[80]N14VSS[81]N15VSS[82]N16VSS[83]N17VSS[84]N18VSS[85]N24VSS[86]N25VSS[87]N26VSS[88]P3VSS[89]P4VSS[90]P12VSS[91]P13VSS[92]P14VSS[93]P15VSS[94]P16VSS[95]P17VSS[96]P24VSS[97]P27
VSS[98] P28VSS[99] R1
VSS[100] R11VSS[101] R12VSS[102] R13VSS[103] R14VSS[104] R15VSS[105] R16VSS[106] R17VSS[107] R18VSS[108] T6VSS[109] T12VSS[110] T13VSS[111] T14VSS[112] T15VSS[113] T16VSS[114] T17VSS[115] U4VSS[116] U12VSS[117] U13VSS[118] U14VSS[119] U15VSS[120] U16VSS[121] U17VSS[122] U24VSS[123] U25VSS[124] U26VSS[125] V2VSS[126] V13VSS[127] V15VSS[128] V24VSS[129] V27VSS[130] V28VSS[131] W6VSS[132] W24VSS[133] W25VSS[134] W26VSS[135] Y3VSS[136] Y24VSS[137] Y27VSS[138] Y28VSS[139] AA1VSS[140] AA24VSS[141] AA25VSS[142] AA26VSS[143] AB4VSS[144] AB6VSS[145] AB11VSS[146] AB14VSS[147] AB16VSS[148] AB19VSS[149] AB21VSS[150] AB24VSS[151] AB27VSS[152] AB28VSS[153] AC2VSS[154] AC5VSS[155] AC9VSS[156] AC11VSS[157] AD1VSS[158] AD3VSS[159] AD4VSS[160] AD7VSS[161] AD8VSS[162] AD11VSS[163] AD15VSS[164] AD19VSS[165] AD23VSS[166] AE2VSS[167] AE4VSS[168] AE8VSS[169] AE11VSS[170] AE13VSS[171] AE18VSS[172] AE21VSS[173] AE24VSS[174] AE25VSS[175] AF2VSS[176] AF4VSS[177] AF8VSS[178] AF11VSS[179] AF27VSS[180] AF28VSS[181] AG1VSS[182] AG3VSS[183] AG7VSS[184] AG11VSS[185] AG14VSS[186] AG17VSS[187] AG20VSS[188] AG25VSS[189] AH1VSS[190] AH3VSS[191] AH7VSS[192] AH12VSS[193] AH23VSS[194] AH27
L23
BLM21PG600SN1D_0805~D
1 2
C2940.1U_0402_10V6K~D
1
2
C30
10.
1U_0
402_
10V6
K~D
1
2
C29
20.
1U_0
402_
10V6
K~D
1
2
C27
9
0.1U
_040
2_10
V6K~
D
1
2he
xainf
@ho
tmail
.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
IDE_DIORDY
IDE_ACT#
IDE_DIOR#IDE_DIORDYIDE_DDACK#
IDE_ACT#
IDE_DA1IDE_DA0
IDE_DD1IDE_DD0
IDE_DD6IDE_DD5IDE_DD4IDE_DD3
IDE_DD7
IDE_DD2
IDE_HRESET#
IDE_DIOW#
IDE_IRQ
IDE_DA2PDIAG#
IDE_DDREQ
IDE_DD8
IDE_DD11
IDE_DD13IDE_DD12
IDE_DD15IDE_DD14
IDE_DD10IDE_DD9
HDD_EN_3.3V
+3.3V_HDD
+3.3V_HDD
+3.3V_HDD
+3.3V_RUN
+3.3V_RUN
+3.3V_SUS+15V_SUS
+3.3V_HDD
+3.3V_HDD
IDE_DA[0..2]<23>
IDE_DD[0..15]<23>
HDDC_EN#<39>
IDE_DIORDY<23>
IDE_DSC1#<23>IDE_ACT#<44>
IDE_HRESET#<24>
IDE_DIOW# <23>
IDE_IRQ <23>
IDE_DDREQ <23>
IDE_DSC3# <23>
IDE_DIOR#<23>
IDE_DDACK#<23>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
IDE HDD Connector
26 59Friday, May 12, 2006
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Pleace near HD CONN
+3.3V_HDD Source
HDD PWR
Need to modify of FPC ZIP connector
HDD Connector
C311
0.1U_0402_16V4Z~D
1
2
R278 510_0402_5%~D@12
JHDD1
FOX_QT510406-2101-7F~D
1133557799111113131515171719192121232325252727292931313333353537373939
GND41GND43
2 24 46 68 8
10 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 3032 3234 3436 3638 3840 40
GND 42GND 44
C31
010
00P_
0402
_50V
7K~D
1
2
C31
510
U_0
805_
10V4
Z~D
1
2
R280100K_0402_5%~D@
12
R28
110
0K_0
402_
5%~D
1
2
C312
1U_0603_10V4Z~D
1
2
R27510K_0402_5%~D
1 2
C31
30.
1U_0
402_
16V4
Z~D
1
2
C31
40.
1U_0
402_
16V4
Z~D
@
1
2
R276 4.7K_0402_5%~D
1 2
PJP1
PAD-OPEN 4x4m
1 2
S
GD Q15
SI3456DV-T1-E3_TSOP6~D@
3
624
51
G
D
SQ16
2N7002W-7-F_SOT323~D@
2
13
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AC97VREFI
CAP2
AUDIO_AVDD_ON TPS793475_BYPASS
AC97VREFI
ICH_AZ_CODEC_RST#
ICH_AZ_CODEC_SDOUT
ICH_AZ_CODEC_SYNC
ICH_AC_SDIN0_R
ICH_AZ_CODEC_BITCLK
CAP2
HP_NB_SENSE
SPDIF_SHDN
SENSE_A
SENSE_A
Z2403 PC_BEEPZ2402
HP_NB_SENSE
ICH_AZ_CODEC_SDOUT
DOCK_HP_MUTE#
DOCK_HP_MUTE#
+VDDA
+VDDA+5V_SUS
+VDDA
+VREFOUT
+VDDA
+3.3V_RUN
+5V_RUN
+3.3V_RUN
ICH_AZ_CODEC_RST#<23>
ICH_AZ_CODEC_SYNC<23>
ICH_AZ_CODEC_SDOUT<23>
ICH_AZ_CODEC_BITCLK<23>
HP_OUT_L <28>
HP_OUT_R <28>
AUDIO_AVDD_ON<39>
NB_MICIN_L <28>
SPDIF_DOCK<38>
SPDIF_SHDN<39>
MIC_SWITCH <28>
AUD_LINE_OUT <28>
NB_MICIN_R <28>
INT_MIC <28>
BEEP<39>
SPKR<24>PC_BEEP <28>
HP_NB_SENSE<28,39>
DOCK_HP_MUTE#<39>
EAPD<28>
ICH_AZ_CODEC_SDIN0<23>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
Azalia (HD) Codec
27 59Friday, May 12, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
This signal must be under 1V.
+VDDA=4.75V
Close to U24.18
Close to U24.20
Close to U24.5
W=30 mil
Close to U24
Close to U24.3
When L47 is popped, no pop U22.
TRACE>15 mil
45
2
single gate TTL
31
W=20 mil
600ohm,100mA
Note: C336,C340,C341,C326,C327,C328,C619,C620 useTemp. characteristics: X5ROperating range: -55~+85degree
STAC9200 Rev.
CA1
B1
R22 R109
5.11K 10K
39.2K 20K
C62
010
U_0
805_
10V6
M~D
1
2
C33910P_0402_50V8J~D@
1 2
C334 1000P_0402_50V7K~D
1 2
U22
TPS793475DBVRG4_SOT23-5~D
OUT 5
BYPASS 4
GND2
EN3
IN1L26
BLM11A601S_0603~D@
1 2
C32
20.
047U
_040
2_16
V7K~
D
1
2
C32
10.
1U_0
402_
10V6
K~D
1
2
R286 5.1K_0402_1%~D
12
R288 2.2K_0402_5%~D
1 2
R287 2.2K_0402_5%~D
1 2
C32
810
U_0
805_
10V6
M~D
1
2
C332 0.1U_0402_10V6K~D 1 2
R604 100K_0402_5%~D
12
STAC9200
U24
STAC9200X5NAEB1XR_QFN32~D
SDATA_OUT2
BIT_CLK3
SYNC7
RESET#8
SPDIF _OUT32
CAP220
VREF_OUT19
VREF_IN18
AVD
D26
AVSS
117
AVSS
229
SPDIF _ IN/EAPD /GPIO331
SENSE_A 9
SDATA_IN5
LINE_IN_L 15
LINE_IN_R 16
CD_L 10
CD_R 12
HP_L 27
HP_R 28
LOUT_L 23
LOUT_R 24
MONO_OUT 25
DVD
D6
DVS
S4
GPIO021
GPIO122
GPIO230
MIC1 13
MIC2 14
NC11NC211
R554 0_0402_5%~D@12
C34
01U
_060
3_10
V6K~
D
1
2
R29
120
K_04
02_1
%~D
12
C32
40.
1U_0
402_
10V6
K~D
1
2
C33810P_0402_50V8J~D@
1 2
G
D
S Q182N7002W-7-F_SOT323~D
2
13
R28210K_0402_5%~D 1 2
R28947_0402_5%~D@
12
G
D
SQ172N7002W-7-F_SOT323~D
2
13
C31
60.
1U_0
402_
10V6
K~D
1
2
C3230.1U_0402_10V6K~D
1
2
R2832.2K_0402_5%~D
12
C34
10.
1U_0
402_
10V6
K~D
1
2
C721 1000P_0402_50V7K~D
1 2
C32
02.
2U_0
603_
6.3V
6K~D
1
2
C61
90.
1U_0
402_
10V6
K~D
1
2
U23SN74AHCT1G86DCKR_SC70-5~D
A1
B2 Y 4
P5
G3
R284 33_0402_5%~D
1 2
C32
61U
_060
3_10
V6K~
D
1
2
C33122P_0402_50V8J~D@
1
2
C3250.1U_0402_10V6K~D
1 2
C31
70.
047U
_040
2_16
V7K~
D
1
2
R29
039
.2K_
0402
_1%
~D
12
C333
0.1U_0402_10V6K~D
1 2
C33
61U
_060
3_10
V6K~
D
1
2
R591 0_0402_5%~D12
C32
70.
1U_0
402_
10V6
K~D
1
2
C31
81U
_060
3_10
V6K~
D
1
2
C33722P_0402_50V8J~D@
1
2
C34210P_0402_50V8J~D@
1 2
C335 1000P_0402_50V7K~D
1 2
R28522_0402_5%~D @
12
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AUD_GAIN0
AUD_GAIN1
AUD_LINE_IN_R
C1P
C1N
HP_SPK_L1
PVSS
HP_SPK_R1
INT_SPK_R1
+5V_AMPVCC
BYPASS
RIN-
AUD_GAIN0
AUD_GAIN1
INT_SPK_R1
INT_SPK_R2
AUD_LINE_IN_L
MIC_L1
MIC_R1 MIC_R2
MIC_BIAS
MIC_BIAS
HP_SPK_R1
HP_SPK_L1 HP_SPK_L2
HP_SPK_R2
INT_SPK_R2
INT_MIC+
INT_MIC-
INT_MIC+
INT_MIC-
SPK_SHUTDOWN#
HP_NB_SENSE
NB_MUTE
MIC_L2
+5V_AMPVCC
+3.3V_RUN
+5V_SUS +5V_AMPVCC
+3VRUN_4411+VREFOUT
+VDDA
+VDDA
+VDDA
+VDDA
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+5V_SUS
NB_MUTE<39>
HP_OUT_L<27>
HP_OUT_R<27>
AUD_LINE_OUT<27>
MIC_SWITCH<27>
NB_MICIN_R<27>
NB_MICIN_L<27>
INT_MIC <27>
PC_BEEP<27>
HP_NB_SENSE<27,39>
EAPD<27>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
AMP and PHONE JACK
28 59Friday, May 12, 2006
Compal Electronics, Inc.
Gain Setting
GAIN0 INPUTAV(inv)GAIN1
21.6dB
15.6dB
6dB
1
0
10dB
25K ohm
45K ohm
70K ohm
90K ohm
IMPEDANCE
11
0
0
0
*
1
Speaker Connector
15 mils trace W=40mils
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
600ohm,100mA
120ohm,600mA,0.25ohm
120ohm,600mA,0.25ohm
60ohm,3000mA,0.025ohm
120ohm,600mA,0.25ohm
120ohm,600mA,0.25ohm
Note:C343,C344,C345,C346,C350,C351,C353,C354,C355,C356,C357 useTemp. characteristics: X5ROperating range: -55~+85degree
C34
810
0P_0
402_
50V8
J~D
1
2
D20DA204U_SOT323~D@
2 31
C36410U_0805_10V6M~D
1
2
C3650.1U_0402_10V6K~D
1
2
R30510K_0402_5%~D
1 2
R29
810
0K_0
402_
5%~D
12
U25ALM358DR2G_SOIC8~D
P8
IN+ 3
IN- 2G4
O1
C372
0.47U_0402_16V4Z~D
1
2
C3472.2U_0603_6.3V6K~D
1
2
C3540.1U_0402_10V6K~D
1 2
C346
2.2U_0603_6.3V6K~D
1 2
R303100K_0402_5%~D
1 2
C3441U_0603_10V6K~D
1
2
R3101K_0402_5%~D
12
R3121K_0402_5%~D@
12
R3041K_0402_5%~D
12
C37
047
P_0
402_
50V8
J~D
1
2
C63
947
P_0
402_
50V8
J~D
1
2
G
D
S Q802N7002W-7-F_SOT323~D
21
3
R29
34.
7K_0
402_
5%~D
12
C3511U_0603_10V6K~D
1 2
R2954.99_0402_1%~D
12
R30610K_0402_5%~D
1 2
C3694700P_0402_25V7K~D
12
C343
1000P_0402_50V7K~D
1 2
U26
MAX4411ETP+_TQFN20~D
C1P1
PGN
D2
C1N3
NC-4 4
PVss
5
NC-6 6
SVss
7
NC-8 8
OUTL 9
SVD
D10
INR15
SHDNR#14
INL13
NC-12 12
OUTR 11
NC-20 20
PVD
D19
SHDNL#18
SGN
D17
NC-16 16
D21DA204U_SOT323~D@
2 31
JSPK1
MOLEX_53780-0270~D
1122
GND3GND4
R307100K_0402_5%~D
1 2
MIC1
WM-63PCY_2P~D
12
JP8
SUYIN_010030FR006G103ZL~D
12
3
4
5
6
78C
360
100P
_040
2_50
V8J~
D
1
2
L32
BLM21PG600SN1D_0805~D
1 2
L28BLM11A121S_0603~D
12
R30
110
0K_0
402_
5%~D
12C352
2.2U_0603_6.3V6K~D
1 2
C36
110
00P_
0402
_50V
7K~D
@
1
2
C3714700P_0402_25V7K~D
12
C3582.2U_0603_6.3V6K~D
1 2
U25BLM358DR2G_SOIC8~D
P8
IN+5
IN-6 G4
O 7
C62147P_0402_50V8J~D
12
R30
020
K_04
02_1
%~D
@
12
C3452.2U_0603_6.3V6K~D
1 2
C36
210
00P_
0402
_50V
7K~D
@
1
2
L27BLM11A601S_0603~D
1 2
JP7
SUYIN_010030FR006G103ZL~D
12
3
4
5
6
78
C3631U_0603_10V6K~D
1
2
C3560.1U_0402_10V6K~D
1 2
C3532.2U_0603_10V6K~D
1
2
C35
910
0P_0
402_
50V8
J~D
1
2
R3091K_0402_5%~D
12
C3572.2U_0603_10V6K~D
1
2
R2974.99_0402_1%~D
12
C3674700P_0402_25V7K~D
12
D25SM24_SOT23~D@
2 31
R3081K_0402_5%~D
12
C64
047
P_0
402_
50V8
J~D
1
2
C3501U_0603_10V6K~D
1 2
R3131K_0402_5%~D
12
G
D
S Q792N7002W-7-F_SOT323~D@
2
13
R3111K_0402_5%~D@
12
C6250.1U_0402_10V6K~D
12
L30BLM11A121S_0603~D
12
U27
TPA6017A2PWP_TSSOP20~D
GN
D4
1G
ND
311
GN
D2
13G
ND
120
VDD
16PV
DD
115
RIN-17
BYPASS 10
NC 12
LOUT- 8
LOUT+ 4
ROUT- 14
ROUT+ 18
RIN+7
LIN-5
LIN+9
GAIN0 2
GAIN1 3
PVD
D2
6
SHUTDOWN19
GN
D_T
21
C3660.1U_0402_10V6K~D
1
2
L31BLM11A121S_0603~D
12
C368
4700P_0402_25V7K~D
12
C3550.1U_0402_10V6K~D
12
G
D
S Q212N7002W-7-F_SOT323~D
2
13
R296100K_0402_5%~D
12
R294100K_0402_5%~D
12
R3021K_0402_5%~D
12
R314
100K_0402_5%~D
12
R29
920
K_04
02_1
%~D
@
12
R29
24.
7K_0
402_
5%~D
12
C652100P_0402_50V8J~D
@
1
2
C34
910
0P_0
402_
50V8
J~D
1
2
L29BLM11A121S_0603~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TPM_EN#TPM_GPIO2
CLK_PCIE_LOM#
LAN_TX3+
PLTRST#
LAN_TX3-
LOM_CS#
LOM_SI
LPC_LAD1
TPM_GPIO1
LAN_ACT#
PCIE_IRX_LOMTX_P3_C
LPC_LAD0
LOM_SO
IRQ_SERIRQ
LAN_TX1-
LAN_TX2+
LPC_LFRAME#
PCIE_IRX_LOMTX_N3_C
REGCTL_PNP25
REGCTL_PNP12
TPM_GPIO0
LOM_SCLK
LAN_TX0-
LAN_TX1+
XTALI
XTALO
LPC_LAD3
REGCTL_PNP12
CLK_PCIE_LOM
LINK_100#
LAN_TX2-
PCIE_WAKE#
LINK_10#
LAN_TX0+
PLTRST#
LPC_LAD2
CLK_PCI_LOM
CLK_PCI_LOM
TPM_GPIO0
TPM_GPIO1
TPM_GPIO2
TPM_EN#
LOM_LOW_PWR
BCM5752_K5
BCM5752_K5
LOM_SCLK
LOM_CS#
LOM_SOLOM_SI
LOM_LOW_PWR
REGCTL_PNP25
+3.3V_LAN
+3.3V_SRC
+1.2V_PCIE_PLLVDD
+2.5V_XTALVDD
+2.5V_AVDD
+3.3V_LAN
+1.2V_GPHY_PLLVDD
+1.2V_AVDDL
+1.2V_PCIE_PLLVDD
+1.2V_PCIE_SDS_VDD
+2.5V_BIASVDD
+2.5V_XTALVDD
+2.5V_AVDD
+1.2V_LOM
+1.2V_AVDDL
+1.2V_PCIE_SDS_VDD
+2.5V_BIASVDD
+3.3V_RUN
+3.3V_LAN
+3.3V_LAN
+3.3V_LAN
+3.3V_LAN
+3.3V_LAN
+3.3V_LAN
+3.3V_LAN
+3.3V_LAN
+3.3V_LAN
+2.5V_LOM
+2.5V_LOM
+2.5V_LOM
+2.5V_LOM
+2.5V_LOM
+1.2V_LOM
+1.2V_LOM
+1.2V_LOM
+1.2V_LOM
+1.2V_GPHY_PLLVDD
PCIE_WAKE# <36,39>CLK_PCIE_LOM# <6>CLK_PCIE_LOM <6>
LAN_TX3- <30>
LAN_TX1- <30>
LAN_TX3+ <30>
LAN_TX2- <30>LAN_TX1+ <30>
ENAB_3VLAN<42>
PCIE_IRX_LOMTX_P3 <24>
PCIE_ITX_LOMRX_N3_C <24>
PCIE_IRX_LOMTX_N3 <24>
PCIE_ITX_LOMRX_P3_C <24>
LAN_TX2+ <30>
LAN_ACT#<30>
LINK_10#<30>LINK_100#<30>
CLK_PCI_LOM<6>
ICH_SMBDATA<6,24,36>
LOM_TPM_EN#<39>
LPC_LFRAME#<23,39,40>
IRQ_SERIRQ<24,31,39,40>PLTRST#<10,20,22,24,36>
LPC_LAD[0..3]<23,39,40>
LOM_CLKREQ#<6>
LOM_CABLE_DETECT<39>
LOM_LOW_PWR <39>
ICH_SMBCLK<6,24,36>
PLTRST# <10,20,22,24,36>
LAN_TX0+ <30>LAN_TX0- <30>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
BCM5751M
29 59Friday, May 12, 2006
1C4
MMJT9435
B
C2
3E
Layout Notice : 1.2V filter. Place as closechip as possible.
Layout Notice : Place as closechip as possible.
Layout Notice : No highspeed signal should berouted near RDAC or onadjacent layer to RDAC
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARYAtmel AT45BCM021B
ST M45PE20
NV_STRAP1 NV_STRAP0 SO SI CS# SCLK
0
1
0 0
0 0 0
1
1
1 1
1
Place closely pin J8
Rc, Rd are 1/2 W rating
Rc Rd
600ohm,100mA
600ohm,100mA
600ohm,100mA
600ohm,100mA
600ohm,100mA
600ohm,100mA
Follow Travis to add thatBroadcom will be update fornext version.
Follow M07 schematicPop R341 to use BLM11A601SIf noise margin on SDSVDD so thatpop C412,C413
C4030.1U_0402_16V4Z~D
1
2
C4010.1U_0402_16V4Z~D 1 2
C4070.1U_0402_16V4Z~D
1
2
C4104.7U_0603_6.3V6M~D
1
2
L38
BLM11A601S_0603~D
12
C38
30.
1U_0
402_
16V4
Z~D
1
2
R59920K_0402_5%~D@
12
R329 4.7K_0402_5%~D@
1 2R326 10K_0402_5%~D 1 2
C374
0.1U_0402_16V4Z~D
1
2
C7100.1U_0402_16V4Z~D
1
2
C414
0.1U_0402_16V4Z~D
1
2
X325MHZ_18PF_1BX25000CK1D~D
1 2
C4000.1U_0402_16V4Z~D
1
2
R34
04.
7K_0
402_
5%~D1
2
C375
4.7U_0603_6.3V6M
~D
1
2
C384
0.1U_0402_16V4Z~D
1
2
R327 10K_0402_5%~D 1 2
C4124.7U_0603_6.3V6M~D
@
1
2
C4130.1U_0402_16V4Z~D@
1
2
C38
80.
1U_0
402_
16V4
Z~D
1
2
R328 10K_0402_5%~D 1 2
R3334.7K_0402_5%~D@
1 2
C38
20.
1U_0
402_
16V4
Z~D
1
2
R335 4.7K_0402_5%~D@1 2
R62
04.
7K_0
402_
5%~D
@1
2
L36
BLM11A601S_0603~D
12
BCM5752
Analogpower
PLL
GND
Digial power
BIAS
U28B
BCM5752KFBG A2_FPBGA144~D
VDDC_0D5
VDDC_4H5VDDC_5H6VDDC_6H8VDDC_7J4
VDDIO_3F1VDDIO_4G10VDDIO_5J2VDDIO_6L1VDDIO_7L12
VSS_4 E6VSS_5 E7VSS_6 E8VSS_7 E9VSS_8 F4VSS_9 F5
VSS_10 F6VSS_11 F7VSS_12 F8VSS_13 F9VSS_14 G5VSS_15 G6VSS_16 G7VSS_17 G8VSS_18 L2VSS_19 L6VSS_20 M6
NC_7 D2NC_8 D3NC_9 E1
NC_10 E2NC_11 F2
VDDC_3D8 VDDC_2D7 VDDC_1D6
VSS_3 E5VSS_2 E4VSS_1 B10VSS_0 B2
NC_18 J10
VDDP_0A5VDDP_1G3VDDP_2L11
XTALVDDH12
PCIE_SDSVDDK4
AVDDL_0F10AVDDL_1F11
AVDD_0A11AVDD_1F12
PCIE_PLLVDDK6
GPHY_PLLVDDG12
BIASVDDA12
NC_12 G1
NC_0 A1NC_1 A6NC_2 A7NC_3 B7NC_4 C1NC_5 C3NC_6 D1
NC_13 G2NC_14 G9NC_15 H1NC_16 H2NC_17 H10
NC_19 K1NC_20 K2NC_21 K3NC_22 K5NC_23 K7NC_24 K8NC_25 K10NC_26 K11NC_27 L4NC_28 L8NC_29 M8
VDDIO_0A3VDDIO_1C2VDDIO_2D10
C38
70.
1U_0
402_
16V4
Z~D
1
2
R341
BLM11A601S_0603~D
12
L33
BLM11A601S_0603~D
12
C396
0.1U_0402_16V4Z~D
1
2
R331 4.7K_0402_5%~D@1 2
R31
5
2_12
10_5
%~D
12
R32133_0402_5%~D
@
12
R3304.7K_0402_5%~D
@
1 2
Q24MMJT9435T1G_SOT223~D
1
23
4
C391
0.1U_0402_16V4Z~D
1
2
S
GD
Q22SI3456DV-T1-E3_TSOP6~D
36
245
1
C40
8
27P
_040
2_50
V8J~
D
1
2
Q23MMJT9435T1G_SOT223~D
1
23
4
C385
4.7U_0603_6.3V6M
~D
1
2
L34
BLM11A601S_0603~D
12
R332 4.7K_0402_5%~D@1 2
C7264700P_0402_25V7K~D
1
2
C37
80.
1U_0
402_
16V4
Z~D
1
2
R603 0_0402_5%~D12
C37
90.
1U_0
402_
16V4
Z~D
1
2
C38
10.
1U_0
402_
16V4
Z~D
1
2
R337 0_0402_5%~D@1 2
C38
64.
7U_0
603_
6.3V
6M~D
1
2
C4110.1U_0402_16V4Z~D
1
2
L35
BLM11A601S_0603~D
12
R322 4.7K_0402_5%~D
12
C395
10U_0805_10V4Z~D
1
2
LPC/TPM
Media
GPIO
BCM5752
Power
PCI-E
TEST
LED
Bias
Clock
Control
Regulator
Control
SPI
SMBUS
U28A
BCM5752KFBG A2_FPBGA144~D
TRD3+ B11TRD3- B12TRD2+ C11TRD2- C12TRD1+ D11TRD1- D12TRD0+ E11TRD0- E12
LCLKJ8
LAD0J7LAD1L10LAD2J5LAD3K9
LFRAMEJ9LRESETM10SERIRQH7
GPIO0H9GPIO1H11GPIO2C5
SMB_CLKC8SMB_DATAC7
SERIAL_DI J1SERIAL_DO M4
SIE10 SCLKC9
SOD9CSC10
PERST B1
REGCTL12 J11
REGCTL25 M11
REGSEN25 M12
LINKLEDA9SPD100LEDB9SPD1000LEDA10TRAFFICLEDB8
PCIE_TXDN M3
PCIE_TXDP L3
PCIE_RXDN L7
PCIE_RXDP M7
WAKE A4REFCLK- L5REFCLK+ M5
VAUXPRSNT B6
TCK B5TDI F3
TDO B4TMS E3
TRST D4
RDAC A8
XTALIL9
XTALOM9
REFCLK_SEL B3
LOW_PWR H4
REGSUP12 K12
REGSEN12 J12GPIO3C4
GPHY_TVCOI C6
ATTN_BTTN A2TPM_GPIO0G4
TPM_GPIO2H3 TPM_GPIO1J3
TPM_ENJ6 VMAINPRSNT G11
NV_STRAP1M1 NV_STRAP0M2
R601 0_0402_5%~D@12
R324 0_0402_5%~D
12
R6402K_0402_5%~D
1 2
C38
90.
1U_0
402_
16V4
Z~D
1
2
C40
9
27P
_040
2_50
V8J~
D
1
2R
339
4.7K
_040
2_5%
~D
12U30
AT45BCM021B-SU_SO8~D
SI 1SCK 2
RESET# 3CS# 4
SO8GND7VCC6WP#5
C39
00.
1U_0
402_
16V4
Z~D
1
2 C37
60.
1U_0
402_
16V4
Z~D
1
2
R323 1K_0402_5%~D
12
C4050.1U_0402_16V4Z~D
1
2
C3990.1U_0402_16V4Z~D
1
2
C4020.1U_0402_16V4Z~D 1 2
R31
62_
1210
_5%
~D
12
U29
M45PE20-VMN6TP_SO8~D@
D 1C 2
RESET# 3S# 4
Q8VSS7VCC6W#5
C397
0.1U_0402_16V4Z~D
1
2
C37
70.
1U_0
402_
16V4
Z~D
1
2
R325 1K_0402_5%~D
12
R334 330_0402_5%~D
12
C38
00.
1U_0
402_
16V4
Z~D
1
2
R336 4.7K_0402_5%~D
1 2
C4044.7U_0603_6.3V6M~D
1
2
C394
0.1U_0402_16V4Z~D
1
2
R33
81.
18K
_040
2_1%
~D
12
C393470P_0402_50V7K~D
1
2
C4064.7U_0603_6.3V6M~D
1
2
C39822P_0402_50V8J~D
@
1
2
L37
BLM11A601S_0603~D
12
C392
10U_0805_10V4Z~D
1
2
R60039K_0402_5%~D@
12
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DOCKED
DOCK_LED_100#DOCK_LED_10#
LINK_LED100#
DOCK_LAN_ACTLED_YEL#
LAN_ACT#
LINK_100#
LINK_LED10#
LINK_LED100#
LAN_LEDACT# LAN_ACTLED_YEL_R#
LED_10_GRN_R#
LED_100_ORG_R#
LAN_TX3-LAN_TX3+
LAN_TX2-LAN_TX2+
LAN_TX1+
LAN_TX0+LAN_TX1-
LINK_10#
LINK_LED10#LAN_LEDACT#
RJ_TIPRJ_RINGRJ_RING_L
RJ_TIP_L
NB_LAN_TX0+
NB_LAN_TX1+
NB_LAN_TX1-
NB_LAN_TX0-
NB_LAN_TX2+
NB_LAN_TX3+
NB_LAN_TX3-
NB_LAN_TX2-
LAN_TX0-
LAN_TX0+
LAN_TX1-
LAN_TX1+
LAN_TX2-
LAN_TX2+
LAN_TX3-
LAN_TX3+ LAN_TX3+R
LAN_TX3-R
LAN_TX0+R
LAN_TX0-R
LAN_TX2+R
LAN_TX2-R
LAN_TX1-R
LAN_TX1+RSW_LAN_TX3+SW_LAN_TX3-
SW_LAN_TX0-SW_LAN_TX0+
SW_LAN_TX2+SW_LAN_TX2-
SW_LAN_TX1-SW_LAN_TX1+
DOCK_LAN_TX0-DOCK_LAN_TX0+
DOCK_LAN_TX1-DOCK_LAN_TX1+
DOCK_LAN_TX2-DOCK_LAN_TX2+
DOCK_LAN_TX3-DOCK_LAN_TX3+
LAN_ACTLED_YEL_R#
LED_10_GRN_R#LED_100_ORG_R#
SW_LAN_TX3- NB_LAN_TX3-
NB_LAN_TX1-
SW_LAN_TX1+
TRM_CT
NB_LAN_TX2-
Z2805
NB_LAN_TX2+
Z2807
SW_LAN_TX2+
NB_LAN_TX0-
NB_LAN_TX0+
Z2806
SW_LAN_TX1-
NB_LAN_TX1+
SW_LAN_TX0+
SW_LAN_TX3+
SW_LAN_TX0-
Z2808
NB_LAN_TX3+
SW_LAN_TX2-
LAN_TX0- +3.3V_LAN
+3.3V_LAN
+2.5V_LOM
+3.3V_LAN
DOCKED<38,39>
LAN_ACT#<29>LINK_10#<29>LINK_100#<29>
DOCK_LAN_ACTLED_YEL# <38>DOCK_LED_10# <38>DOCK_LED_100# <38>
RJ_TIP_L<38>
RJ_RING_L<38>
LAN_TX0-<29>
LAN_TX0+<29>
LAN_TX2-<29>
LAN_TX2+<29>
LAN_TX3-<29>
LAN_TX3+<29>
DOCK_LAN_TX0- <38>DOCK_LAN_TX0+ <38>
DOCK_LAN_TX1- <38>DOCK_LAN_TX1+ <38>
DOCK_LAN_TX2- <38>DOCK_LAN_TX2+ <38>
DOCK_LAN_TX3- <38>DOCK_LAN_TX3+ <38>
LAN_TX1-<29>
LAN_TX1+<29>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
LAN TRANSFOMER
30 59Friday, May 12, 2006
TODOCKFROM NIC DOCKED
1: TO DOCK0: TO RJ45
LAN ANALOGSWITCH
Layout Notice : Place bead asclose PI3L500 as possible
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Layout Notice : Placetermination as close asASIC as possible
The resistors need atleast 1/16W
GNDCHASIS C
642
300P
_180
8_30
00V8
K~D
@ 1
2
L47FBMA-L11-160808-301LMA20T_2P~D
12
R342 48.7_0402_1%~D
1 2
C416 0.1U_0402_16V4Z~D
1 2
R349 48.7_0402_1%~D
1 2
R35
1
10K_
0402
_5%
~D
@1
2
L40 39NH_ 0603CS-390EJTS_5%_2P~D
1 2
C417 0.1U_0402_16V4Z~D
1 2
L41 39NH_ 0603CS-390EJTS_5%_2P~D
1 2
C4210.1U_0402_10V6K~D
1
2
C418 0.1U_0402_16V4Z~D
1 2
R354 150_0402_5%~D
1 2
R346 48.7_0402_1%~D
1 2
L66BLM11A601S_0603~D
12
R356 150_0402_5%~D
1 2
C4200.1U_0402_10V6K~D
1
2
JPHON1
FOX_JM74613-P2002-7F~D
1122
GND13GND24
1:1
1:1
1:1
1:1
TR8
H5015NLT_24P~D
TCT11
TD1+2
TD1-3
TCT24
TD21+5
TD2-6
TCT37
TD3+8
TD3-9
TCT410
TD4+11
TD4-12 MX4- 13
MX3- 16
MCT3 18
MX2- 19
MX2+ 20
MCT2 21
MX1- 22
MX1+ 23
MCT1 24
MX4+ 14
MCT4 15
MX3+ 17
R355 150_0402_5%~D
1 2
R348 48.7_0402_1%~D
1 2
L39 39NH_ 0603CS-390EJTS_5%_2P~D
1 2
R35
3
10K_
0402
_5%
~D
@1
2
C415 0.1U_0402_16V4Z~D
1 2
R35
975
_040
2_1%
~D
12
R343 48.7_0402_1%~D
1 2R344 48.7_0402_1%~D
1 2
L48FBMA-L11-160808-301LMA20T_2P~D
12
L44 39NH_ 0603CS-390EJTS_5%_2P~D
1 2
L42 39NH_ 0603CS-390EJTS_5%_2P~D
1 2
JP2
FOX_JM36113-P2651-7F~D
PR1-2
PR1+1
PR2+3
PR3+4
PR3-5
PR2-6
PR4+7
PR4-8
LED
_YEL
LOW
-13
SHLD
115
LED
_YEL
LOW
+12
A211
LDE_
GR
EEN
-10
LDE_
OR
ANG
E-9
SHLD
216
NC
14
R347 48.7_0402_1%~D
1 2
JP9
MOLEX_53780-0270~D
1 12 2
GND 3GND 4
C4190.1U_0402_10V6K~D
1
2
R35
875
_040
2_1%
~D
12
R35
775
_040
2_1%
~D
12
C4220.1U_0402_10V6K~D
1
2
C423 1000P_1808_3KV7K~D
1 2
L43 39NH_ 0603CS-390EJTS_5%_2P~D
1 2
L45 39NH_ 0603CS-390EJTS_5%_2P~D
1 2
R36
075
_040
2_1%
~D
12
C64
130
0P_1
808_
3000
V8K~
D@ 1
2
L46 39NH_ 0603CS-390EJTS_5%_2P~D
1 2
R345 48.7_0402_1%~D
1 2
R35
2
10K_
0402
_5%
~D
@1
2
U31
PI3L500E_TQFN56~D
SEL17
A02
A13
A27
A38
A411
A512
A614
0B1 48
0B2 46
1B1 47
1B2 45
2B1 43
2B2 41
3B1 42
3B2 40
4B1 37
4B2 35
5B1 36
5B2 34
6B1 32
6B2 30
7B1 31
7B2 29
A715
LED019LED120LED254
0LED1 22
0LED2 25
1LED1 23
1LED2 26
2LED1 52
2LED2 51NC5
VDD
04
VDD
110
VDD
218
VDD
327
VDD
438
VDD
550
VDD
656
GN
D0
1G
ND
16
GN
D2
9G
ND
313
GN
D4
16G
ND
521
GN
D6
24G
ND
728
GN
D8
33G
ND
939
GN
D10
44G
ND
1149
GN
D12
53G
ND
1355
GN
D P
57
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CBS_CSTSCHNGCBS_CCLKRUN#CBS_CCLK_INTERNAL
CBS_CINT#
CBS_CAUDIO
CBS_RSVD/A18
CBS_RSVD/D14CBS_RSVD/D2
CBS_CCD2#_R5C843
CBS_CVS2CBS_CVS1
PCI_AD29PCI_AD30
PCI_AD28
PCI_AD31
PCI_AD26PCI_AD25
PCI_AD27
PCI_AD22PCI_AD23
PCI_AD20
PCI_AD24
PCI_AD21
PCI_AD18PCI_AD17
PCI_AD19
PCI_AD14
PCI_AD16
PCI_AD13
PCI_AD15
PCI_AD12PCI_AD11PCI_AD10PCI_AD9
PCI_AD7PCI_AD6
PCI_AD8
PCI_AD4PCI_AD5
PCI_AD1PCI_AD2PCI_AD3
PCI_AD0
PCI_C_BE3#
PCI_C_BE0#
PCI_C_BE2#PCI_C_BE1#
PCI_PAR
PCI_FRAME#
PCI_STOP#PCI_DEVSEL#
PCI_TRDY#PCI_IRDY#
PCI_AD17 CBS_IDSEL
PCI_REQ2#PCI_GNT2#
PCI_PERR#PCI_SERR#
CBUS_GRST#PCI_RST#CLK_PCI_PCCARD
IEEE1394_TPBN0
CK3
3M_C
BS_T
ERM
CLK_PCI_PCCARD
CBS_CAD15
CBS_CAD13
CBS_CC/BE3#CBS_CC/BE2#
CBS_CC/BE0#CBS_CC/BE1#
CBS_CPAR
CBS_CDEVSEL#
CBS_CTRDY#CBS_CFRAME#
CBS_CIRDY#CBS_CSTOP#
CBS_CPERR#
CBS_CREQ#CBS_CGNT#
CBS_CBLOCK#
CBUS_GRST#
CBS_SPK
IEEE1394_TPAP0
IEEE1394_TPBP0
R5C843XI
IEEE1394_TPBN0
IEEE1394_TPAN0
IEEE1394_TPAP0
R5C843XI
SD_CLK
SD_ENR5C843XO
IEEE1394_TPBIAS0
TPB0+
TPA0+TPA0-
TPB0-
CBS_CCD1#_R5C843
CLK_SD_48M
CK
48M
_SD
CLK_SD_48M
R5C843XO
SD_EN
IEEE1394_TPBP0
IEEE1394_TPBIAS0
IEEE1394_TPAN0
Z3008
MDIO06
USB_HUBP1+USB_HUBP1-
CBS_CRST#
CBS_CSERR#
+3.3V_RUN_PHY
+3.3V_R5C843
+3.3V_R5C843
+3.3V_R5C843
+3.3V_RUN_CARD+3.3V_R5C843
+3.3V_R5C843
VPPEN0<32>
SD_CMD <32>
CLKRUN#<24,39,40>
CBS_CCLKRUN# <32>CBS_CSTSCHNG <32>
CBS_CCLK <32>
CBS_CRST# <32>
CBS_CINT# <32>
CBS_CAUDIO <32>
CBS_RSVD/D2 <32>CBS_RSVD/D14 <32>
CBS_RSVD/A18 <32>
PCI_AD[0..31]<22,37>
PCI_C_BE3#<22,37>
PCI_C_BE1#<22,37>PCI_C_BE0#<22,37>
PCI_C_BE2#<22,37>
PCI_PAR<22,37>
PCI_TRDY#<22,37>PCI_FRAME#<22,37,38>
PCI_IRDY#<22,37,38>PCI_STOP#<22,37>PCI_DEVSEL#<22,37>
PCI_GNT2#<22>PCI_REQ2#<22>
PCI_RST#<22,35,37>CLK_PCI_PCCARD<6>
CBS_CAD0 <32>
CBS_CAD19 <32>
CBS_CAD17 <32>CBS_CAD18 <32>
CBS_CAD15 <32>
CBS_CAD12 <32>
CBS_CAD14 <32>
CBS_CAD11 <32>CBS_CAD10 <32>CBS_CAD9 <32>CBS_CAD8 <32>CBS_CAD7 <32>CBS_CAD6 <32>CBS_CAD5 <32>CBS_CAD4 <32>CBS_CAD3 <32>CBS_CAD2 <32>CBS_CAD1 <32>
CBS_CAD31 <32>
CBS_CAD29 <32>
CBS_CAD27 <32>
CBS_CAD23 <32>CBS_CAD24 <32>
CBS_CAD28 <32>
CBS_CAD26 <32>
CBS_CAD21 <32>CBS_CAD20 <32>
CBS_CAD30 <32>
CBS_CAD25 <32>
CBS_CAD13 <32>
CBS_CAD16 <32>
CBS_CAD22 <32>
CBS_CC/BE3# <32>
CBS_CC/BE1# <32>CBS_CC/BE2# <32>
CBS_CC/BE0# <32>
CBS_CPAR <32>
CBS_CREQ# <32>CBS_CGNT# <32>
CBS_CPERR# <32>
CBS_CFRAME# <32>CBS_CTRDY# <32>
CBS_CSTOP# <32>CBS_CIRDY# <32>
CBS_CBLOCK# <32>CBS_CDEVSEL# <32>
IRQ_SERIRQ<24,29,39,40>
CB_HWSPND#<39>
SD_DET# <32>
PCI_PIRQD#<22>
SD_CLK <32>
VPPEN1<32>
VCC5EN#<32>VCC3EN#<32>
PCI_PIRQC#<22>PCI_PIRQB#<22>
USB_HUBP1+<32,39>USB_HUBP1-<32,39>
PCI_PERR#<22,37>PCI_SERR#<22,37>
CBUS_GRST#<39>
SYS_PME#<37,39>
CBS_CSERR# <32>
CLK_SD_48M <6>
SD_WP# <32>
SD_DATA0 <32>SD_DATA1 <32>SD_DATA2 <32>SD_DATA3 <32>
CBS_CVS1 <32>CBS_CVS2 <32>
CBS_CCD1#_R5C843 <32>CBS_CCD2#_R5C843 <32>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
CardBus Controller(R5C843)
31 59Friday, May 12, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Close to U32.A16,B16
Close to U32.A14
Close to U32.D13,B14
Close to J1
Close to U32
Close to JP5 pin5 Close to JP5 pin5
C428 Close Cardbus connector
C424, C425 need totest the startingvaule, then modifythe value
R373 10K_0402_5%~D
1 2
R377
56.2_0402_1%~D
12
R363
100K_0402_5%~D
12
R5C843
U32A
R5C843-CSP208P_CSP208~D
AD31M2AD30M1AD29N5AD28N4AD27N2AD26N1AD25P5AD24P4AD23R4AD22R2AD21R1AD20T2AD19T1AD18U2AD17U1AD16V1AD15T7AD14V7AD13W7AD12R8AD11T8AD10V8AD9W8AD8R9AD7V9AD6W9AD5T11AD4V11AD3W11AD2T12AD1V12AD0W12
PARV6
DEVSEL#T5
FRAME#V3
GNT#M5
IDSELP1
IRDY#V4
PERR#W5
REQ#M4
SERR#T6
STOP#V5
TRDY#W4
CCLK/CADR16 L19CCLKRUN#/WP(IOIS16#) A18
CRST#/RESET H19
RESERVED/CDATA2 C19RESERVED/CDATA14 W18
RESERVED/CADR18 N16
CAD31/CDATA10 B19CAD30/CDATA9 C18CAD29/CDATA1 D19CAD28/CDATA8 D18CAD27/CDATA0 E19
CAD26/CADR0 E16CAD25/CADR1 F18CAD24/CADR2 F15CAD23/CADR3 G18CAD22/CADR4 G15CAD21/CADR5 H18CAD20/CADR6 H15
CAD19/CADR25 J18CAD18/CADR7 J16
CAD17/CADR24 J15CAD16/CADR17 P16
CAD15/IOWR# P19CAD14/CADR9 R19CAD13/IORD# P18
CAD12/CADR11 R18CAD11/OE# T19
CAD10/CE2# T18CAD9/CADR10 U19
CAD8/CDATA15 U18CAD7/CDATA7 W17
CAD6/CDATA13 V17CAD5/CDATA6 W16
CAD4/CDATA12 V16CAD3/CDATA5 W15
CAD2/CDATA11 V15CAD1/CDATA4 T15CAD0/CDATA3 R14
CC/BE3#/REG# F16CC/BE2#/CADR12 K18
CC/BE1#/CADR8 P15CC/BE0#/CE1# V19
CPAR/CADR13 N15
CAUDIO/BVD2(SPKR#/LED) F19
RESERVED/CADR19 N19
CCD1#/CD1# T14CCD2#/CD2# D15
CDEVSEL#/CADR21 L18
CFRAME#/CADR23 K16
CGNT#/WE# M15
CINT#/RDY(IREQ#) M18
CIRDY#/CADR15 K15
CREQ#/INPACK# G19
CSTOP#/CADR20 M16
CSTSCHG/BVD1(STSCHG#/RI#) E18
CTRDY#/CADR22 L16
CVS1/VS1# R16CVS2/VS2# H16
PCICLKK1PCIRST#L4GBRST#G2
CPERR#/CADR14 N18CSERR#/WAIT# G16
HWSPND#F2
CLKRUN#L5
INTA#J2
C/BE3#P2C/BE2#W2C/BE1#W6C/BE0#T9
INTB#K4INTC#K2
UDIO0/SERIRQ#J4UDIO1H1UDIO2H2UDIO3H4UDIO4H5UDIO5G1
RI_OUT#/PME#G4SPKROUTF1
TESTF4
C4260.01U_0402_16V7K~D
1 2
R365 22_0402_5%~D 12
C653
4.7P_0402_50V8C
~D
@
1
2
C68
30.
1U_0
402_
16V4
Z~D
1
2
R362100_0402_5%~D
1 2
C435
1U_0603_10V4Z~D
1
2
L49
857CM-0009~D
@
11
22 33
44 5 5
6 67 7
8 8
R5C843U32B
R5C843-CSP208P_CSP208~D
CPSD11
TPAP1B10
TPAP0B12TPAN0A12
TPBP0B13TPBN0A13
TPBIAS0D12
XOB16 XIA16
TPAN1A10
TPBP1B11TPBN1A11
VREFD13REXTB14
MDIO00 B1MDIO01 A2MDIO02 A3MDIO03 B3MDIO04 B4MDIO05 A5MDIO06 B5MDIO07 D5MDIO08 A6MDIO09 B6MDIO10 D6MDIO11 E6MDIO12 A7MDIO13 B7MDIO14 D7MDIO15 E7MDIO16 A8MDIO17 B8MDIO18 D8MDIO19 E8
FIL0A14
TPBIAS1D10
USBDPV14USBDMW14
VPPEN0V13VPPEN1W13
VCC5EN#R13VCC3EN#T13
REGEN#R7
C43
10.
1U_0
402_
16V4
Z~D
1
2
C428 0.01U_0402_16V7K~D
1 2
R61
815
0K_0
402_
5%~D
12
R381
56.2_0402_1%~D
12
C436
4.7P_0402_50V8C
~D
@
1
2
R384 0_0402_5%~D
12
C433
0.01U_0402_16V7K~D
1
2
X424.576MHz_16P_1BG24576CKIA~D
12
C43
21U
_060
3_10
V4Z~
D
1
2
R383 0_0402_5%~D
12
R374 100K_0402_5%~D
1 2
R647 33_0402_5%~D
12
R376
56.2_0402_1%~D
12
R372 10K_0402_5%~D
1 2
R366
100K_0402_5%~D
@12
C717 100P_0402_50V8J~D
12
R379
100K_0402_5%~D
12
C425
18P_0402_50V8J~D
12
R595 0_0402_5%~D@ 12
C720 100P_0402_50V8J~D
12
R367 0_0402_5%~D1 2
C434
0.33U_0603_10V7K~D
1
2
R609 0_0402_5%~D@12
R378
10_0402_5%~D
@
12
C427
0.01U_0402_16V7K~D
1
2
R606 0_0402_5%~D12
R646 33_0402_5%~D
12
C424
18P_0402_50V8J~D
12
U33
AAT4250IGV-T1_SOT23-5~D
IN5
ON/OFF#4
OUT 1GND 2N.C 3
R371 10K_0402_5%~D
1 2
R386 0_0402_5%~D
12
R648 33_0402_5%~D
12
R645 33_0402_5%~D
12
R607
10_0402_5%~D
@
12
C437
270P_0402_50V7K~D
1
2
J1
FOX_UV31413-4TA-7F~D
A+4A-3B+2B-1
GND5 GND6
C719 100P_0402_50V8J~D
12
R385
5.1K_0402_1%
~D
12
R364
100K_0402_5%~D
12
T16PAD~D
R617 0_0402_5%~D12
R593 0_0402_5%~D@ 12
C718 100P_0402_50V8J~D
12
R361
10K_0402_5%~D
12
R382 0_0402_5%~D
12
R380
56.2_0402_1%~D
12
R594 33_0402_5%~D
12
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CBS_CAD17
CBS_CAD13
CBS_CIRDY#
CBS_CPARCBS_CC/BE1#
CBS_CAD30
CBS_CC/BE3#
CBS_RSVD/D14
CBS_CAD10
CBS_CAD27
CBS_CREQ#
CBS_CBLOCK#
CBS_CAD15
CBS_CAD29
CBS_CC/BE0#
CBS_CAD16
CBS_CAD21
CBS_CGNT#
CBS_CAD9
CBS_CAD7
CBS_CAD0
CBS_RSVD/A18
CBS_CAD14
CBS_CAD4
CBS_CFRAME#
CBS_CVS1
CBS_CRST#
CBS_CCLK
CBS_CAD11
CBS_CAD31
CBS_CVS2
CBS_CAD25
CBS_CSERR#
CBS_CAD19
CBS_RSVD/D2
CBS_CPERR#
CBS_CAD5
CBS_CTRDY#
CBS_CAD6
CBS_CAD2
CBS_CCLKRUN#
CBS_CAD23
CBS_CAD1
CBS_CAD24
CBS_CC/BE2#
CBS_CAD12
CBS_CSTOP#
CBS_CAD18
CBS_CINT#
CBS_CAD3
CBS_CDEVSEL#
CBS_CAD26
CBS_CAD20
CBS_CSTSCHNGCBS_CAD28
CBS_CAUDIO
CBS_CAD8
CBS_CAD22SD_WP#
UIM_RESETUIM_CLK
UIM_DATA+UIM_VPP
USB_HUBP1- CBS_CAD15
EXUSB_EN#
EXUSB_EN#
EXUSB_EN#
VCC3EN#_R5531
CBS_CAD13 USB_HUBP1+
CBS_CCD1#_R5C843
CBS_CCD2#_R5C843
EXUSB_EN#_CCD EXUSB_EN#
CBS_CCD2#
EXUSB_EN#_CCD
CBS_CCD1#
CBS_CCD2#
CBS_CCD1#
VCC3EN#_R5531
CBS_VPP
CBS_VCC
+3.3V_RUN_PHY
+3.3V_RUN_PHY
+3.3V_RUN_CARD
+3.3V_R5C843
+3.3V_R5C843
+5V_RUN
+3.3V_RUN +3.3V_R5C843 +3.3V_R5C843
+3.3V_R5C843
+SIM_PWR
+UIM_VPP
CBS_VCCCBS_VPP
+SC_PWR
+3.3V_R5C843
CBS_VCC
+SC_PWR
CBS_VCCCBS_VPP
+SIM_PWR
+3.3V_R5C843+3.3V_R5C843
+3.3V_R5C843
+3.3V_R5C843
+3.3V_R5C843
+3.3V_R5C843
+3.3V_R5C843
+3.3V_R5C843
VPPEN0<31>VPPEN1<31>
VCC5EN#<31>
SD_CLK<31>
CBS_CAD[0..31]<31>
SD_WP#<31>
SD_CMD<31>
UIM_CLK<36>UIM_RESET<36>UIM_DATA<36>
CBS_CRST#<31>
CBS_CAUDIO<31>CBS_CC/BE3#<31>
CBS_CREQ#<31>CBS_CSERR#<31>
CBS_CFRAME#<31>CBS_CTRDY#<31>
CBS_CDEVSEL#<31>CBS_CSTOP#<31>
CBS_CBLOCK#<31>CBS_RSVD/A18<31>
CBS_CIRDY# <31>
CBS_RSVD/D2 <31>CBS_CCLKRUN# <31>
SCCD-<35>
CBS_RSVD/D14<31>
CBS_CPAR <31>
CBS_CCLK <31>
SC_IO_R<35>
CBS_CC/BE1# <31>
CBS_CINT# <31>
CBS_CC/BE2# <31>
SCCD+ <35>
CBS_CSTSCHNG<31>
CBS_CC/BE0# <31>
CBS_CGNT# <31>
SC_DET# <35,39>
CBS_CPERR# <31>
SD_DET#<31>
EXUSB_EN# <39>
USB_HUBP1-<31,39>
VCC3EN#<31>
USB_HUBP1+ <31,39>
SD_DATA1<31>SD_DATA0<31>
SD_DATA3<31>SD_DATA2<31>
CBS_CCD2#<39>
CBS_CCD1#_R5C843 <31>
CBS_CCD2#_R5C843 <31>
SC_RST#_R <35>
SC_CLK_R <35>
CBS_CVS1<31>
CBS_CVS2<31>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
CardBus/SD card Socket
32 59Friday, May 12, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
SIM & SD CARD will combine together,the connector will update to 18pin
Close to U32
USB signal,impedance90ohm,tracewidth/space=5/6
Close to JCBUS1 pin22,62
Close to JCBUS1 pin23,63
C429, C430 Close Cardbus connector
C430270P_0402_50V7K~D@
1 2
C707
0.01U_0402_16V7K~D
1
2
C44
710
U_0
805_
10V4
Z~D
1
2
C684
0.01U_0402_16V7K~D
1
2
C455
0.1U_0402_16V4Z~D
1
2
C445
0.01U_0402_16V7K~D
1
2
C7220.1U_0402_16V4Z~D
1 2
R592 0_0805_5%~D
1 2
C7150.1U_0402_16V4Z~D
1 2
C429270P_0402_50V7K~D
@1 2
C46
60.
1U_0
402_
16V4
Z~D
1
2C444
0.01U_0402_16V7K~D
1
2
C46
30.
01U
_040
2_16
V7K~
D
1
2
C50
633
P_0
402_
50V8
J~D
1
2
C70
810
U_0
805_
10V4
Z~D
1
2
R656 0_0402_5%~D@12
U62
74AHC1G08GW_SOT353-5~D
IN11
IN22 G3
O 4
P5
JP5
HRS_FH12-40(19)SA-1SH(55) ~D
11223344556677889910101111121213131414
161617171818
1515
GND20GND21
1919
C50
41U
_060
3_10
V4Z~
D
1
2
C457
0.01U_0402_16V7K~D
1
2
C50
533
P_0
402_
50V8
J~D
1
2
C7160.1U_0402_16V4Z~D
1 2
C456
0.01U_0402_16V7K~D
1
2
U63B
SN74CB3Q3306APWR_TSSOP8~D
2A5 2B 6
2OE
7
G4
P8
R654 0_0402_5%~D@12
C443
10U_0805_10V4Z~D
1
2
C50
833
P_0
402_
50V8
J~D
1
2
U65B
SN74CB3Q3306APWR_TSSOP8~D
2A5 2B 6
2OE
7
G4
P8
C46
70.
01U
_040
2_16
V7K~
D
1
2
U65A
SN74CB3Q3306APWR_TSSOP8~D
1A2 1B 3
P8
1OE
1
G4
C446
0.01U_0402_16V7K~D
1
2
C441
0.01U_0402_16V7K~D
1
2
C448
0.01U_0402_16V7K~D
1
2
D12
NNCD5.6LG~D
@
2 31
45
C46
20.
1U_0
402_
16V4
Z~D
1
2
C454
10U_0805_10V4Z~D
1
2
L50
BLM21A601SPT_0805~D
1 2
R65910K_0402_5%~D
1 2
C461
0.47U_0603_16V4Z~D
1
2
C70
90.
01U
_040
2_16
V7K~
D
1
2
R5C843
U32C
R5C843-CSP208P_CSP208~D
VCC_3V1F5VCC_3V2G5VCC_3V3J19VCC_3V4K19
VCC_PCI3V1W3VCC_PCI3V2R11VCC_PCI3V3R12
VCC_MD3VA4
VCC_RIN1R6VCC_RIN2E13
VCC_ROUT1L1
AGND1A9AGND2B9AGND3D9
VCC_ROUT2E14
AVCC_PHY1E10AVCC_PHY2E11AVCC_PHY3A17
GND1J1GND2J5GND3K5GND4E9GND5R10GND6T10GND7V10GND8W10GND9L15GND10M19
NC1 L2NC2 C1NC3 D1NC4 E1NC5 C2NC6 D2NC7 E2NC8 E4NC9 E12
AVCC_PHY4B17
AGND4D14AGND5A15AGND6B15
JCBUS1
FOX_QTS0080A-1021-9F~D2 24 46 68 810 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 3032 3234 3436 3638 3840 4042 4244 4446 4648 48
54 54
50 5052 52
56 5658 58
64 64
60 6062 62
66 6668 68
72 7270 70
74 7476 7678 7880 80
33 55 77 99
1515
1111 1313
1717 1919
23232121
2525 2727 2929 3131 3333 3535 3737 3939 4141 4343 4545 4747
5353
4949 5151
5555 5757
6363
5959 6161
6565 6767
71716969
7373 7575 7777
11
7979
U34
R5531V002-E2-FA_SSOP16~D
VCC3IN11
NC 10
VCC5_EN1
EN03EN14
FLG5
VCCOUT 12VCCOUT 14
VCC5IN15
VCC3_EN2
VPPOUT 8
NC 7NC 6GND16
VCC5IN13
VCCOUT 9
C458
0.01U_0402_16V7K~D
1
2
C45
110
00P_
0402
_50V
7K~D
1
2
R65210K_0402_5%~D
1 2
C45
010
00P_
0402
_50V
7K~D
1
2
C460
0.47U_0603_16V4Z~D
1
2
R6550_0402_5%~D
@12
C459
0.01U_0402_16V7K~D
1
2
C442
0.01U_0402_16V7K~D
1
2
C453
0.01U_0402_16V7K~D
1
2
C439
0.01U_0402_16V7K~D
1
2
C438
10U_0805_10V4Z~D
1
2
U63A
SN74CB3Q3306APWR_TSSOP8~D
1A2 1B 3
P8
1OE
1
G4
C440
0.01U_0402_16V7K~D
1
2
C46
50.
1U_0
402_
16V4
Z~D
1
2
U64NC7SZ04P5X_NL_SC70-5~D
A 2Y4
P5
NC
1
G3
C46
410
U_0
805_
10V4
Z~D
1
2
C449
0.01U_0402_16V7K~D
1
2
C50
733
P_0
402_
50V8
J~D
1
2
C7230.1U_0402_16V4Z~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB_OC4#
USB_OC5#
USB_OC6#USB_BACK_EN#
USBP6_D-USBP6_D+
USBP4-
USBP4_D+
USBP6_D+
USBP6_D-
USBP4_D+USBP4_D-
USBP5_D-USBP5_D+
DH_SMBCLK
DH_SMBDATPORT_PWRUSB_SRC
DH_SMBDAT
PWRUSB_SMBEN
DH_SMBCLKCLK_SMB
DAT_SMB
Z2501
Z250
2
PWRUSB_SRC
USBP5+
USBP5-
USBP5_D+
USBP5_D-
PORT_PWRUSB_SRC
USB_BACK_EN#
USBP5+
USBP5-
USBP4_D-
USBP4+
USBP6+ USBP4-
USBP4+
USBP6-
USBP6-
USBP6+
+USB_BACK_PWR
+USB_BACK_PWR
+USBP5_PWR
+USBP5_PWR
+PWR_SRC
+5V_SUS
+5V_SUS
+USB_BACK_PWR
+USBP5_PWR
USB_OC4# <24>
USB_OC5# <24>
USB_OC6# <24>USB_BACK_EN#<39>
USBP4-<24>
USBP4+<24>
USBP6-<24>
USBP6+<24>
CLK_SMB<18,40>
PWRUSB_EN <39>
PWRUSB_OC#<39>
DBAY_MODPRES#<39>
USB_BACK_EN#<39>
USBP5+<24>
USBP5-<24>
DAT_SMB<18,40>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
USB 2.0 Port
33 59Friday, May 12, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
USB Port
Rear USB Ports
C47610U_0805_10V4Z~D
1
2
+
C46
815
0U_D
_6.3
VM
_R55
~D
1
2
L53 DLW21SN900SQ2_0805~D@
11
44 3 3
2 2
C4820.1U_0603_50V4Z~D
1
2
C48010U_0805_10V4Z~D
1
2
+C473150U_D_6.3VM_R55~D
1
2
R3940_0402_5%~D 1 2
U21
IP4220CZ6_SO6~D
@
D2+ 4
D1- 6
VCC 5
D1+1
GND2
D2-3
C4750.1U_0402_16V4Z~D
1
2
F1
1.5A_24V_MINISMDC150F/24~D
1 2
C62
30.
1U_0
603_
50V4
Z~D
1
2
C6221000P_0402_50V7K~D
@1
2
C47
20.
1U_0
402_
16V4
Z~D
1
2
R39
910
0K_0
402_
5%~D
1
2
L58MURATA BLM31PG500SNI_1206~D
1 2
R40
1
100K
_040
2_5%
~D
12
G
D S
Q272N7002W-7-F_SOT323~D
2
1 3
R3980_0402_5%~D 1 2
JDOG1
FOX_UB1112C-PB202-7F_9P~D
T11T22T33T44
PWR_SRC5SMB_DATA6SMB_ALERT7SMB_CLK8GND29
SHLD1 10SHLD2 11SHLD3 12SHLD4 13
L57 DLW21SN900SQ2_0805~D@
11
44 3 3
2 2
U20
PRTR5V0U2X_SOT143-4~D
@
GND1
IO12
IO2 3
VIN 4
R3970_0402_5%~D 1 2
G
D
S Q292N7002W-7-F_SOT323~D
2
13
R403150_0402_5%~D
1 2
C4740.1U_0402_16V4Z~D 1
2
JP12
SUYIN_020173MR004S558ZL~D
VCC4D-3D+2GND1
GND 5GND 6GND 7GND 8
R40
620
0K_0
402_
5%~D
12
C4810.1U_0603_50V4Z~D
1
2
JP11
SUYIN_020173MR004S558ZL~D
VCC4D-3D+2GND1
GND 5GND 6GND 7GND 8
R40
410
0K_0
402_
5%~D
1
2
U35
TPS2062DR_SO8~D
GND1IN2EN1#3EN2#4
OC1# 8OUT1 7OUT2 6OC2# 5
R3950_0402_5%~D 1 2
G
D
S
Q302N7002W-7-F_SOT323~D
@ 2
13
R3930_0402_5%~D 1 2
C46
90.
1U_0
402_
16V4
Z~D
1
2
U37
TPS2062DR_SO8~D
GND1IN2EN1#3EN2#4
OC1# 8OUT1 7OUT2 6OC2# 5
C4790.1U_0402_16V4Z~D
1
2
R3960_0402_5%~D 1 2
L56 DLW21SN900SQ2_0805~D@
11
44 3 3
2 2
Q25FDS4435_NL_SO8~D
4
7 865
123
G
D S
Q262N7002W-7-F_SOT323~D
2
1 3
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ICH_AZ_MDC_BITCLK
ICH_AZ_MDC_SYNC
ICH_AZ_MDC_SDOUT
ICH
_AC
_SD
OU
T_M
DC
TER
M
ICH_AZ_MDC_SDOUT
MD
C_A
C_B
ITC
LK_T
ERM
MDC_SDIN
ICH_AZ_MDC_BITCLK
ICH_RST_MDC_R#
ICH_AZ_MDC_SYNC
ICH_AZ_MDC_SDOUT
ICH_AZ_MDC_RST#
COEX2_WLAN_ACTIVE
COEX1_BT_ACTIVECOEX3
BT_RADIO_DIS#
ICH_RST_MDC_R#
BT_ACTIVE
+3.3V_RUN
+3.3V_SUS
+5V_SUS
ICH_AZ_MDC_SYNC<23>
ICH_AZ_MDC_BITCLK<23>
ICH_AZ_MDC_SDOUT<23>
COEX2_WLAN_ACTIVE<36>
COEX1_BT_ACTIVE<36>BT_RADIO_DIS#<24>
USB_HUBP4-<39>
USB_HUBP4+<39>
MDC_RST_DIS#<39>
ICH_AZ_MDC_RST#<23>
BT_ACTIVE<36,44>
ICH_AZ_MDC_SDIN1<23>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
BT PORT & MDC
34 59Friday, May 12, 2006
Compal Electronics, Inc.
1
3
5
7
9
11 12
10
8
6
4
2GND
IAC_SDATA0
IAC_SYNC
IAC_SDATAIN
IAC_RESET#
RES
RES
3.3V
GND
GND
IAC_BITCLK
GND
New MDC connector.
W=20 mil
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Bluetooth
R410100K_0402_5%~D
12
JBT1
JST_SM10B-SRSS-TB1(LF)(SN)~D
1122334455667788991010
GND 11GND 12
R4090_0402_5%~D@
1 2
C49210P_0402_50V8J~D@
1 2
C48810P_0402_50V8J~D@
1 2
T9 PAD~D
G
D S
Q32BSS138W-7-F_SOT323~D
2
1 3
C48
64.
7U_0
603_
6.3V
6M~D
1
2
C4830.1U_0402_16V4Z~D
1
2
R40
710
K_04
02_5
%~D 1
2
C49010P_0402_50V8J~D
@
1
2
R41110K_0402_5%~D
12
C48
433
P_0
402_
50V8
J~D
1
2
Connector for MDC Rev1.5
JMDC1
TYCO_1-179397-2~D
GND11IAC_SDATA_OUT3GND25IAC_SYNC7IAC_SDATA_IN9IAC_RESET#11
RES0 2RES1 43.3V 6
GND3 8GND4 10
IAC_BITCLK 12
1313
1414
1515
1616
1717
1818
1919
2020
R41
310
_040
2_5%
~D@
12
C48
70.
1U_0
402_
16V4
Z~D
1
2
R41433_0402_5%~D
1 2
R40
810
K_04
02_5
%~D1
2
C48910P_0402_50V8J~D
@
1
2
C48
510
0P_0
402_
50V8
J~D
@
1
2
C49110P_0402_50V8J~D@
1 2
R41
210
_040
2_5%
~D@
12
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SC_RST#_RSC_CLK_R
SC_IO_R
CLK_SMCARD_48M
MD0
SC_RST#
SCCD+
SC_IO
SCCD-
SC_DET#
CLK_SMCARD_48M
PCI_RST#
SCCD-
SCCD+
VRCPR
+SC_PWR
USB_HUBP3-
SC_CLK
USB_HUBP3+
SC_C4
HUB_USB_BIO+
HUB_USB_BIO-
+SC_PWR
+3.3V_OUT
+3.3V_RUN
+5V_RUN
CLK_SMCARD_48M<6>
PCI_RST#<22,31,37>
USB_HUBP3+<39>USB_HUBP3-<39>
SC_DET# <32,39>
SC_CLK_R <32>SC_RST#_R <32>
SC_IO_R <32>
USB_BIO- <41>
USB_BIO+ <41>
SCCD+ <32>
SCCD- <32>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
Smart Card OZ77C6
35 59Friday, May 12, 2006
Compal Electronics, Inc.PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
USB SMARTCARD READER.
& USB SMARTCARDS ARE SUPPORTED.TYPE A (5V), B (3V), AB (5V/3V)
Place closely pin 3
Close to Smart Card Conn.
<---Fingerprint
C72
447
P_0
402_
50V8
J~D
@
1
2
R41
515
K_04
02_5
%~D
12
C502
1U_0603_10V4Z~D
12
C49
40.
1U_0
402_
16V4
Z~D
1
2
C5034.7P_0402_50V8C~D
@
1
2
C49
60.
1U_0
402_
16V4
Z~D
1
2
R56
315
K_04
02_5
%~D
12
R41
615
K_04
02_5
%~D
12
C49
70.
1U_0
402_
16V4
Z~D
1
2
C50
10.
1U_0
402_
16V4
Z~D
1
2
R658 33_0402_5%~D 1 2
R41
810
K_04
02_5
%~D
12
R424 220_0402_5%~D
12
C49
54.
7U_0
603_
6.3V
6M~D
1
2
R41
71.
5K_0
402_
1%~D
12
R657 33_0402_5%~D 1 2
R422 220_0402_5%~D
12
R56
215
K_04
02_5
%~D
12
R42
0
47K_
0402
_5%
~D
12
L67
DLW21SN900SQ2_0805~D
@
11
44 3 3
2 2
R42
6
4.7K
_040
2_5%
~D
12
C72
547
P_0
402_
50V8
J~D
@
1
2
R425 220_0402_5%~D
12
C49
84.
7U_0
603_
6.3V
6M~D
1
2
R423 33_0402_5%~D
12
U38
OZ77C6LN-B1_QFN32~D
VCC5V_IN5VCC5V_IN28
UPD-17UPD+16
RST#14
NC30NC31
XI/48M_IN3XO4
MODE0/SC_LED#32MODE11MODE22
GND11GND13GND26
+3.3V_OUT 29
DPD- 19DPD+ 18
EGATED- 21EGATED+ 20
SC_VCC 27
SC_RST# 24SC_CLK 23
SC_C4 22SC_IO 25
SC_DET# 15
RF_OUT 8RF_IN/RX 7
RF_CLK 9RF_AUX 10
VR_C
PR6
VR_C
PR12
R42710_0402_5%~D
@
12
C50
01U
_060
3_10
V4Z~
D
1
2
C49
90.
1U_0
402_
16V4
Z~D
1
2
C49
34.
7U_0
603_
6.3V
6M~D
1
2
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB_HUBP2_D+
ICH_SMBCLK
USB_HUBP2_D-
ICH_SMBDATA
WWAN_RADIO_DIS#
LED_WLAN_OUT#
PCIE_IRX_WLANTX_N2PCIE_IRX_WLANTX_P2
PCIE_ITX_WLANRX_N2_CPCIE_ITX_WLANRX_P2_C
WLAN_RADIO_OFF#PLTRST#
UIM_DATAUIM_CLK
+UIM_VPP
PCIE_IRX_WANTX_N1PCIE_IRX_WANTX_P1
PCIE_ITX_WANRX_N1_CPCIE_ITX_WANRX_P1_C
USB_HUBP2_D-
USB_HUBP2_D+
CLK_PCIE_MINI1#CLK_PCIE_MINI1
MINI1CLK_REQ#
PLTRST#
PCIE_WAKE#
UIM_RESET
WLAN_RADIO_OFF#
COEX2COEX1
+3.3V_LAN
+SIM_PWR
+3.3V_LAN
+3.3V_RUN +3.3V_RUN
+3.3V_RUN+3.3V_RUN
+3.3V_RUN
+3.3V_RUN+3.3V_LAN
+3.3V_LAN
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
+UIM_VPP
COEX1_BT_ACTIVE<34>COEX2_WLAN_ACTIVE<34>
PCIE_IRX_WLANTX_N2<24>PCIE_IRX_WLANTX_P2<24>
MINI2CLK_REQ#<6>
PCIE_ITX_WLANRX_N2_C<24>PCIE_ITX_WLANRX_P2_C<24>
PCIE_IRX_WANTX_N1<24>PCIE_IRX_WANTX_P1<24>
PCIE_ITX_WANRX_N1_C<24>PCIE_ITX_WANRX_P1_C<24>
USB_HUBP2+<39>
USB_HUBP2-<39>
MINI1CLK_REQ#<6>
PLTRST# <10,20,22,24,29>
PLTRST# <10,20,22,24,29>
PCIE_WAKE#<29,39>
PCIE_WAKE#<29,39>
WWAN_RADIO_DIS# <24>
LED_WLAN_OUT# <44>BT_ACTIVE <34,44>
UIM_CLK <32>UIM_RESET <32>
USBP0+ <24>USBP0- <24>
HOST_DEBUG_TX <40>HOST_DEBUG_RX<40>
8051RX <40>
8051TX<40>
WLAN_RADIO_DIS#<39>
CLK_PCIE_MINI2#<6>CLK_PCIE_MINI2<6>
ICH_SMBDATA <6,24,29>ICH_SMBCLK <6,24,29>
CLK_PCIE_MINI1#<6>CLK_PCIE_MINI1<6>
UIM_DATA <32>
ICH_SMBDATA <6,24,29>ICH_SMBCLK <6,24,29>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
Mini Card
36 59Friday, May 12, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+-9%
+3.3Vaux
+3.3V
VoltageTolerance
+1.5V
+-9%
+-5%
PWRRail
Primary Power Aux Power
Peak Normal Normal
1000 750
330
500
250
375
250 (Wake enable)5 (Not wake enable)
NA
Mini CardWire less WAN
Wire less LAN
Mini Card
Mini-Card Latch
Mini-Card Latch
C521
0.047U_0402_16V4Z~D
1
2
C5244.7U_0603_6.3V6M~D
1
2
JCLIP2
MOLEX_48099-5200~D
11223344
D23
RB751S40T1_SOD523-2~D
21
R5550_0402_5%~D
@1 2
JMINI1
MOLEX_67910-5200~D
1133557799111113131515171719192121232325252727292931313333353537373939414143434545474749495151
GND153
2 24 46 68 8
10 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 3032 3234 3436 3638 3840 4042 4244 4446 4648 4850 5052 52
GND2 54
+C685330U_V_6.3VM_R25M~D
1
2
C51
70.
1U_0
402_
16V4
Z~D
1
2
R6390_0402_5%~D1 2
C51533P_0402_50V8J~D
1
2
C51
10.
047U
_040
2_16
V4Z~
D
1
2
+C509330U_V_6.3VM_R25M~D
1
2
R6340_0402_5%~D
@1 2
R4300_0402_5%~D 1 2
C51
00.
1U_0
402_
16V4
Z~D
1
2
JCLIP1
MOLEX_48099-5200~D
11223344
C523
0.1U_0402_16V4Z~D
1
2
C5140.047U_0402_16V4Z~D
1
2
C51
90.
047U
_040
2_16
V4Z~
D
1
2
C522
0.1U_0402_16V4Z~D
1
2
C5130.047U_0402_16V4Z~D
1
2
JMINI2
MOLEX_67910-5200~D
1133557799111113131515171719192121232325252727292931313333353537373939414143434545474749495151
GND153
2 24 46 68 8
10 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 3032 3234 3436 3638 3840 4042 4244 4446 4648 4850 5052 52
GND2 54
R6380_0402_5%~D
1 2
C51
233
P_0
402_
50V8
J~D
1
2C51633P_0402_50V8J~D
1
2
L60 DLW21SN900SQ2_0805~D@
11
44 3 3
2 2
C520
0.047U_0402_16V4Z~D
1
2
R4310_0402_5%~D 1 2
C51
80.
047U
_040
2_16
V4Z~
D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
QUIETE#DOCK_PCI_EN#
QBUFEN#
DOCK_SERR#
DOCK_LOCK#
PCI_C_BE3#
PCI_SERR#
DOCK_C_BE2#
PCI_PLOCK#
PCI_PIRQA#
PCI_AD24
DOCK_TRDY#
DOCK_PCIRST#
PCI_C_BE1#DOCK_C_BE0#
PCI_PERR#
PCI_PAR
PCI_C_BE0#
DOCK_SPME#
PCI_STOP#
DOCK_GNT0#
DOCK_PAR
DOCK_STOP#
DOCK_PIRQA#
PCI_TRDY#
SYS_PME#DOCK_C_BE3#
DOCK_DEVSEL#
PCI_IRDY#
PCI_C_BE2#
DOCK_IRDY#PCI_FRAME#
DOCK_PCI_IDSEL
DOCK_PERR#
DOCK_FRAME#
PCI_DEVSEL#
DOCK_C_BE1#
PCI_GNT0#PCI_RST#
PCI_AD22
PCI_AD26
PCI_AD15
PCI_AD16
PCI_AD30
PCI_AD28
PCI_AD25
PCI_AD18
PCI_AD2
PCI_AD5
PCI_AD20
PCI_AD10
PCI_AD7
PCI_AD31
PCI_AD17
PCI_AD24
PCI_AD1
PCI_AD29
PCI_AD14
PCI_AD4
PCI_AD21
PCI_AD23
PCI_AD27
PCI_AD3
PCI_AD8
PCI_AD0
PCI_AD9
PCI_AD19
PCI_AD6
PCI_AD11PCI_AD12PCI_AD13
DOCK_AD30
DOCK_AD27
DOCK_AD18
DOCK_AD24
DOCK_AD23
DOCK_AD14
DOCK_AD6
DOCK_AD3DOCK_AD2
DOCK_AD13
DOCK_AD26
DOCK_AD0
DOCK_AD15
DOCK_AD11
DOCK_AD1
DOCK_AD28
DOCK_AD8
DOCK_AD21
DOCK_AD25
DOCK_AD10
DOCK_AD19
DOCK_AD16
DOCK_AD22
DOCK_AD31
DOCK_AD7
DOCK_AD5
DOCK_AD20
DOCK_AD17
DOCK_AD9
DOCK_AD12
DOCK_AD29
DOCK_AD4
QUIETE#
QUIETE#
+IRVCC
+VCC_QBUFD
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+5V_RUN +VCC_QBUF
DOCK_PCI_EN#<38>
QBUFEN#<39>
DOCK_PAR <38>
PCI_TRDY#<22,31>
PCI_FRAME#<22,31,38>
DOCK_C_BE1# <38>
SYS_PME#<31,39>
DOCK_TRDY# <38>
PCI_DEVSEL#<22,31>
DOCK_GNT0# <38>
DOCK_C_BE0# <38>
PCI_PIRQA#<22>
DOCK_IRDY# <38>
PCI_GNT0#<22,38>
DOCK_DEVSEL# <38>
PCI_C_BE3#<22,31>
DOCK_LOCK# <38>
PCI_C_BE1#<22,31>DOCK_C_BE2# <38>
DOCK_FRAME# <38>
PCI_PERR#<22,31>
PCI_PAR<22,31>
DOCK_PERR# <38>
PCI_RST#<22,31,35>
PCI_STOP#<22,31>
DOCK_SPME# <38>
PCI_C_BE2#<22,31>
DOCK_PIRQA# <38>
DOCK_SERR# <38>
PCI_IRDY#<22,31,38>
PCI_SERR#<22,31>
PCI_PLOCK#<22>
DOCK_PCI_IDSEL <38>
PCI_C_BE0#<22,31>
DOCK_PCIRST# <38>
DOCK_STOP# <38>
DOCK_C_BE3# <38>
PCI_AD[0..31]<22,31>DOCK_AD[0..31] <38>
IRRX <39>
IRTX<39>
D_IRMODE<39>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
DOCKING BUFFER & FIR
37 59Friday, May 12, 2006
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
FIR
Need to modify PAD width from 9mil to 8mil
R4321K_0402_5%~D
12
U40
TFDU6102-TR3_8P~D
VCC6
SD_MODE5
IRED_CATHODE2
TXD3
IRED_ANODE 1
RXD 4
MODE 7
GND 8
C5250.1U_0402_16V4Z~D 1 2
C5300.1U_0402_16V4Z~D
1 2
D13
RB751S40T1_SOD523-2~D
2 1
U41
PI5C162861BE_BQSOP48~D
A02A13A24A35A46A57A68A79A810A911
A1014A1115A1216A1317A1418A1519
B0 46B1 45B2 44B3 43B4 42B5 41B6 40B7 39B8 38B9 37
B10 34B11 33B12 32B13 31B14 30B15 29
GND1 12GND2 24NC11
NC213
OE147OE235 VCC2 48VCC1 36
A1620A1721A1822A1923
B16 28B17 27B18 26B19 25
R437100K_0402_5%~D 1
2C
528
4.7U
_060
3_6.
3V6M
~D
1
2
R43347_0805_5%~D
12
C52
64.
7U_0
603_
6.3V
6M~D
1
2
C68
70.
47U
_040
2_16
V4Z~
D
1
2C68
60.
1U_0
402_
16V4
Z~D
1
2
U39
PI5C34X2245BE_BQSOP80~D
NC11A12A23A34A45A56A67A78A89GND110NC211A912A1013A1114A1215A1316A1417A1518A1619GND220NC321A1722A1823A1924A2025A2126A2227A2328A2429GND330NC431A2532A2633A2734A2835A2936A3037A3138A3239GND440
VCC4 80OE1# 79
B1 78B2 77B3 76B4 75B5 74B6 73B7 72B8 71
VCC3 70OE2# 69
B9 68B10 67B11 66B12 65B13 64B14 63B15 62B16 61
VCC2 60OE3# 59
B17 58B18 57B19 56B20 55B21 54B22 53B23 52B24 51
VCC1 50OE4# 49
B25 48B26 47B27 46B28 45B29 44B30 43B31 42B32 41
R43
510
K_04
02_5
%~D
12
C5290.1U_0402_16V4Z~D
1
2
D14
RB751S40T1_SOD523-2~D
2 1
R43
610
K_04
02_5
%~D
12
C52
70.
1U_0
402_
16V4
Z~D
1
2
U42
SN74AHC1G32DCKR_SC70-5~DINB2
INA1O 4
P5
G3
C6880.47U_0402_16V4Z~D
1 2
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DOCK_AD28
DOCK_AD13
DOCK_AD22
DOCK_OWNS_PCI
DOCK_SIO_ALERT#
DOCK_AD31
TV_Y
TV_C
DOCK_C_BE2#
DOCK_AD30
DOCK_AD8
VGA_RED
DOCK_AD4
DOCK_AD23
DOCK_AD11
PCI_IRDY#
DOCK_AD16
DOCK_AD0
DOCK_AD10
Z3306
DOCK_AD11
DOCK_AD0
DOCK_AD19
DOCK_AD5
DOCK_AD3
DOCK_AD7
DOCK_AD31
DOCK_AD9
DOCK_AD4
DOCK_TRDY#
DOCK_AD26
PCI_GNT0#
DOCK_AD6
D_LAD2
DOCK_C_BE0#
TV_CVBS
DOCK_AD14
DOCK_AD18
DOCK_C_BE1#
DOCK_AD20
DOCK_AD12
DOCK_AD6
DOCK_AD30
PCI_FRAME#
DOCK_LAN_ACTLED_YEL#
G_DOC_PWRSRC
DOCK_AD2
DOCK_AD7
TV_Y
DOCK_OWNS_PCI
DOCK_AD29
R_PIDEACT
DOCK_AD8
DOCK_AD14
DOCK_AD10
DOCK_AD2
DOCK_AD27
DOCK_AD25
DOCK_AD17
VGA_RED
DOCK_C_BE3#
DOCK_AD17
DOCK_AD25
TV_CVBS
DOCK_AD24
Z3305
DOCK_LED_100#
DOCK_AD20
DOCK_AD16
DOCK_AD15
TV_C
DOCK_AD21
DOCK_AD18
DOCK_AD28DOCK_AD1
VGA_BLU
DOCK_AD21
D_LAD0
DOCK_AD19
DOCK_PWR_EN
DOCK_AD13
DOCK_AD5
DOCK_AD27
VGA_GRN
DOCK_AD12
DOCK_STOP#
Z330
7
DOCK_AD22
DOCK_PCIRST#
DOCK_AD15
DOCK_PERR#
VGA_GRN
DOCK_AD29
D_LAD1
DOCK_AD1
DOCK_AD23
DOCK_LED_10#
SPDIF_DOCK
DOCK_AD24
VGA_BLU
D_LAD3
DOCK_AD9
DOCK_AD3
DOCK_DET# DOCK_DET#
Z3308
DOCK_DET#
USBP7-USBP7+
CLK_PCI_DOCK
PCI_REQ0#
DOCK_AD26
VSYNC_RHSYNC_R
TV_C
TV_CVBS
TV_Y
+2.5V_LOM_DOCK
+PWR_SRC+DOCK_PWR_SRC
+DOCK_PWR_SRC
+5V_ALW
+DOCK_DC_IN
+3.3V_ALW
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_SUS
+2.5V_LOM
DOCK_FRAME#<37>
DAT_KBD <40>
DOCK_TRDY# <37>
DOCK_LAN_TX3+ <30>
CLK_PCI_DOCK<6>
VGA_BLU<12,21>
CLK_KBD <40>
DOCK_AD[0..31] <37>
DOCK_LAN_TX3- <30>
VGA_GRN<12,21>
VGA_RED<12,21>
DOCK_SMB_INT# <40>
DOCK_GNT0# <37>
DVI_TX0-<20>
D_LFRAME# <39>
DOCK_IRDY# <37>
DVI_DETECT <20>
PCI_GNT0#<22,37>
PS_ID_IN<45>
DOCK_DEVSEL# <37>
DVI_TX0+<20>
DVI_SDATA <20>
PCI_FRAME#<22,31,37>
DVI_CLK+<20>
DVI_SCLK <20>
PCI_IRDY#<22,31,37>
DVI_TX1-<20>
D_DLDRQ1# <39> D_LAD0 <39>
DVI_TX1+<20>
DOCK_C_BE3# <37>
DOCK_LOCK#<37>
DAT_DOCK<40>
DOCK_SMB_DAT<40>
DOCK_PCI_IDSEL <37>
TV_CVBS<12>
DOCK_PAR<37>
DOCK_LED_100#<30>
DOCK_C_BE2#<37>
SPDIF_DOCK<27>
DOCK_LAN_TX0-<30>
CLK_DOCK<40>
D_LAD1<39>
DVI_CLK-<20>
D_LAD2<39>
D_SERIRQ <39>
TV_Y<12>
DOCK_LAN_TX1-<30>
DVI_TX2-<20>
R_PIDEACT <44>
DOCK_SIO_ALERT# <39>
DOCK_PCIRST# <37>
DOCK_SMB_CLK<40>
D_LAD3<39>
DOCK_LAN_ACTLED_YEL# <30>
DOCK_C_BE0# <37>
TV_C<12>
DOCK_PERR# <37>
D_CLKRUN# <39>
DOCK_STOP# <37>
DOCK_PCI_EN#<37>
DOCK_SERR#<37>DVI_TX2+<20>
DOCK_C_BE1# <37>
DOCK_LAN_TX2+ <30>
DOCK_PIRQA#<37>
DOCK_LAN_TX0+<30>
DOCK_SPME#<37>
DOCK_LAN_TX1+<30>DOCK_LAN_TX2- <30>
DOCK_PWR_EN<39>
DOCK_LED_10#<30>
DAT_DDC2 <12,21>CLK_DDC2 <12,21>
DOCKED <30,39>
USBP7- <24>USBP7+ <24>
PCI_REQ0# <22>
HSYNC_R <21>VSYNC_R <21>
RJ_TIP_L<30>RJ_RING_L <30>
POWER_SW#<18,40,44>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
DOCKING CONN.
38 59Friday, May 12, 2006
PLACE TERMINATIONS CLOSE TO DOCK CONNECTOR
self power dock
NB
PWR_SRC
no power dock
DVI_TX4-DVI_TX4+
DVI_TX3+DVI_TX3-
DVI_TX5+DVI_TX5-
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
C5350.01U_0402_16V7K~D 1 2
C6901000P_0402_50V7K~D
1
2
JDOCK1C
TYCO_2-1612415-3~D
P1P1
P2P2
P3P3
P4P4
P5 P5
P6 P6
P7 P7
P8 P8
MH1MH1 MH2 MH2
SHLD5MH9
SHLD1MH5
SHLD2MH6
SHLD3 MH7
SHLD6MH10
SHLD4 MH8
SHLD7 MH11
SHLD8 MH12
MH16 MH16MH15MH15 MH14 MH14MH13MH13
R438 100K_0402_5%~D@12
R442 150_0402_1%~D 1 2
C53
10.
1U_0
603_
50V4
Z~D
1
2
SIGNAL 218PRJ11 2PVOID 52PPOWER 8P
VOID PIN: V14 V16 V44 V46 V56~V68 V123 V124 V129~V135 V191 V192 V197~V203 V219 V221 V249 V251 V260~V272
JDOCK1D
TYCO_2-1612415-3~D
R446100K_0402_5%~D
12
R44333_0402_5%~D@
12 C650
0.1U_0402_16V4Z~D
1 2
U4674AHC1G08GW_SOT353-5~D
IN11
IN22 G3
O 4
P5
R4490_0402_5%~D@
1 2
C5330.01U_0402_16V7K~D
1 2
R444100K_0402_5%~D
12
C5360.01U_0402_16V7K~D
12
C6490.1U_0402_16V4Z~D
1
2
C5340.01U_0402_16V7K~D
12
U45
74AHC1G08GW_SOT353-5~D
IN11
IN22 G3
O 4
P5
C68
910
00P_
0402
_50V
7K~D
1
2
Q33FDS4435_NL_SO8~D
4
78
65
123
Q34DDTC144EUA-7-F_SOT323~D
2
13
U43NC7SZ04P5X_NL_SC70-5~D
A2 Y 4
P5
NC
1
G3 R447
100K_0402_5%~D
12
C5380.1U_0603_50V4Z~D
1
2
R44
810
0K_0
402_
5%~D
12
D15SM05_SOT23~D@
231
R445100K_0402_5%~D
12
JDOCK1B
TYCO_2-1612415-3~D
S137137S138138S139139S140140S141141S142142S143143S144144S145145S146146S147147S148148S149149S150150S151151S152152S153153S154154S155155S156156S157157S158158S159159S160160S161161S162162S163163S164164S165165S166166S167167S168168S169169S170170S171171S172172S173173S174174S175175S176176S177177S178178S179179S180180S181181S182182S183183S184184S185185S186186S187187S188188S189189S190190
S205 205S206 206S207 207S208 208S209 209S210 210S211 211S212 212S213 213S214 214S215 215S216 216S217 217S218 218
S220 220
S222 222S223 223S224 224S225 225S226 226S227 227S228 228S229 229S230 230S231 231S232 232S233 233S234 234S235 235S236 236S237 237S238 238S239 239S240 240S241 241S242 242S243 243S244 244S245 245S246 246S247 247S248 248
S250 250
S252 252S253 253S254 254S255 255S256 256S257 257S258 258S259 259
S193193S194194S195195S196196
M204204
U44
74AHC1G08GW_SOT353-5~D
IN11
IN22 G3
O 4
P5
JDOCK1A
TYCO_2-1612415-3~D
S11S22S33S44S55S66S77S88S99S1010S1111S1212S1313
S1515
S1717S1818S1919S2020S2121S2222S2323S2424S2525S2626S2727S2828S2929S3030S3131S3232S3333S3434S3535S3636S3737S3838S3939S4040S4141S4242S4343
S4545
S4747S4848S4949S5050S5151S5252S5353S5454S5555
S69 69S70 70S71 71S72 72S73 73S74 74S75 75S76 76S77 77S78 78S79 79S80 80S81 81S82 82S83 83S84 84S85 85S86 86S87 87S88 88S89 89S90 90S91 91S92 92S93 93S94 94S95 95S96 96S97 97S98 98S99 99
S100 100S101 101S102 102S103 103S104 104S105 105S106 106S107 107S108 108S109 109S110 110S111 111S112 112S113 113S114 114S115 115S116 116S117 117S118 118S119 119S120 120S121 121S122 122
S125 125S126 126S127 127S128 128
M136 136
C53
20.
1U_0
603_
50V4
Z~D
1
2
G
D
S
Q352N7002W-7-F_SOT323~D
2
13
C53722P_0402_50V8J~D@
1
2
R4400_0402_5%~D
12R441 150_0402_1%~D
1 2
C6510.1U_0402_16V4Z~D
1 2
R439 150_0402_1%~D 1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RBIAS
IRQ_SERIRQ
CLK_SIO_14M
D_LAD1
D_LAD3
LPC_LDRQ1#
D_LAD0
D_LAD2
D_DLDRQ1#
D_LFRAME#
IRTX
D_SERIRQ
D_CLKRUN#
IRRX
REG_EN
CLKRUN#LPC_LDRQ0#
SIO_VDDA
USB_HUBP4+USB_HUBP4-
USBP1+USBP1-USB_HUBP1+USB_HUBP1-USB_HUBP2+USB_HUBP2-
ECE5018_XTAL1ECE5018_XTAL2
LPC_LAD1LPC_LAD0
LPC_LAD2LPC_LAD3
PLTRST2#CLK_PCI_SIO
LPC_LFRAME#
RUNPWROK
D_IRMODE
PCIE_WAKE#
PCIE_WAKE#
SYS_PME#DOCK_SIO_ALERT#
DOCK_SIO_ALERT#
PBAT_PRES#
BEEP
DOCKEDQBUFEN#DOCK_PWR_EN
BC_CLKBC_DATBC_INT#
PBAT_ALARM#
PBAT_ALARM#
LOM_TPM_EN#
AUDIO_AVDD_ON
ICH_PME#ICH_PCIE_WAKE#
FPBACK_EN
CPU_PROCHOT#
BID3BID2BID1BID0
BID1
BID2
BID0
BID3
CLK_PCI_SIO
CLK_SIO_14M
THERMTRIP_SIO
WLAN_RADIO_DIS#
SINFFER_WIRELESS_ON/OFF#
SC_DET#
USB_BACK_EN#
D_CLKRUN#
D_SERIRQ
D_DLDRQ1#
MDC_RST_DIS#
LOM_TPM_EN#
SYS_PME#
PWRUSB_OC#
DBAY_MODPRES#
CB_HWSPND#
SPDIF_SHDN
DBAY_MODPRES#
PWRUSB_OC#
PWRUSB_EN
IMVP6_PROCHOT#
NB_MUTE
IMVP6_PROCHOT#
HP_NB_SENSE
USB_HUBP3+USB_HUBP3-
HDDC_EN#
HDDC_EN#
EXUSB_EN#
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW+3.3V_ALW
+3.3V_ALW
+3.3V_RUN
+3.3V_RUN
USBP1+ <24>USBP1- <24>USB_HUBP1+ <31,32>USB_HUBP1- <31,32>USB_HUBP2+ <36>USB_HUBP2- <36>
USB_HUBP4+ <34>USB_HUBP4- <34>
LPC_LAD[0..3] <23,29,40>
PLTRST2# <22,40>CLK_PCI_SIO <6>
CLKRUN# <24,31,40>
IRQ_SERIRQ <24,29,31,40>
LPC_LFRAME# <23,29,40>
LPC_LDRQ1# <23>LPC_LDRQ0# <23>
CLK_SIO_14M <6>
D_DLDRQ1# <38>
D_LAD1 <38>D_LAD2 <38>D_LAD3 <38>
D_LAD0 <38>
D_LFRAME# <38>D_CLKRUN# <38>
D_SERIRQ <38>
RUNPWROK <40,43,50>
IRTX<37>IRRX<37>
D_IRMODE<37>
SYS_PME#<31,37>DOCK_SIO_ALERT#<38>
PBAT_PRES#<46>
BEEP<27>
DOCKED<30,38>QBUFEN#<37>
DOCK_PWR_EN<38>
BC_CLK<40>
BC_INT#<40>BC_DAT<40>
PBAT_ALARM#<46>
AUDIO_AVDD_ON<27>
ICH_PME#<22>ICH_PCIE_WAKE#<24>
WLAN_RADIO_DIS# <36>
SNIFFER_WIRELESS_ON/OFF#<44>
SC_DET#<32,35>
USB_BACK_EN#<33>
PCIE_WAKE#<29,36>
FPBACK_EN<19>
MDC_RST_DIS#<34>
PWRUSB_OC#<33>
DBAY_MODPRES#<33>
CB_HWSPND#<31>
SPDIF_SHDN<27>
PWRUSB_EN<33>
IMVP6_PROCHOT#<50>
CPU_PROCHOT#<7>
NB_MUTE<28>
ADAPT_OC<51>
LOM_CABLE_DETECT<29>
HP_NB_SENSE<27,28>
LOM_LOW_PWR<29>
USB_HUBP3+ <35>USB_HUBP3- <35>
ADAPT_TRIP_SEL<51>
HDDC_EN#<26>
EXUSB_EN#<32>CBS_CCD2#<32>
CBUS_GRST#<31>THERMTRIP_SIO<18>
LOM_TPM_EN#<29>
DOCK_HP_MUTE#<27>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
ECE5018
39 59Friday, May 12, 2006
Compal Electronics, Inc.
Route RBIAS and its return to pin 128 veryshort.
TEST_PIN is a No Connect
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
<---Blue Tooth
<---Mini1 WWAN
A000 1X031 1
1 X021
BID0BID3
X01X00REVBID2 BID1
0 0
0
000
00000
000
Place closely pin 56
Place closely pin 64
<---PC Card Bay
120ohm,600mA,0.25ohm
Follow Travis to add thatBroadcom will be update fornext version.
<---Smart Card
*
L61BLM18PG181SN1_0603~D
12
C55
44.
7U_0
603_
6.3V
6M~D
1
2
C63
84.
7U_0
603_
6.3V
6M~D
1
2
R457 100K_0402_5%~D
12
R45910K_0402_5%~D
12
R473 10K_0402_5%~D1 2
C5410.1U_0402_16V4Z~D
1
2
C54
50.
1U_0
402_
16V4
Z~D
1
2
LPC
DLPC
USB
GPIO
ECE5018
CLK
TEST
U47
ECE5018 A0_VTQFP128~D
GPIOA[0]97GPIOA[1]98GPIOA[2]99GPIOA[3]100GPIOA[4]101GPIOA[5]102GPIOA[6]103GPIOA[7]104
VDDA33 8
VSS 23
VDDA33 14
VSS 51
VDDA33 20
VSS 36
GPIOH[0]24GPIOH[1]25GPIOH[4]26GPIOH[5]27BC_INT#58BC_DAT59BC_CLK60
VCC
134
GPIOE[0]/RXD1GPIOE[1]/TXD2GPIOE[2]/RTS#3GPIOE[3]/DSR#4GPIOE[4]/CTS#5GPIOE[5]/DTR#84GPIOE[6]/RI#83GPIOE[7]/DCD#6
CLKRUN# 37
DCLK_RUN# 38
SER_IRQ 39
DSER_IRQ 40
LRESET# 41LFRAME# 42
DLFRAME# 43
LDRQ1# 44
DLDRQ1# 45
LDRQ0# 46
LAD3 47
DLAD3 48
LAD2 49
DLAD2 50
LAD1 52
VCC
157
DLAD1 53
LAD0 54
DLAD0 55
PCICLK 56
GPIOB[0]/INIT#65GPIOB[1]/SLCTIN#66GPIOC[2]/SCLT67GPIOC[3]/PE68GPIOC[4]/BUSY69GPIOC[5]/ACK#70GPIOC[6]/ERROR#71GPIOC[7]/ALF#73GPIOD[0]/STROBE#74GPIOC[1]/PD775GPIOC[0]/PD676GPIOB[7]/PD577GPIOB[6]/PD478GPIOB[5]/PD379GPIOB[4]/PD280GPIOB[3]/PD181GPIOB[2]/PD082
CLKI (14.318 MHz) 64
GPIOD[1]61GPIOD[2]62
GPIOD[3]/VBUS_DET63
CAP_LDO 86
VCC
185
VSS 96
GPIOD[4]/OCS1_N28GPIOD[5]/OCS2_N29GPIOD[6]/OCS3_N30GPIOD[7]/OCS4_N31
GPIOH[6]32GPIOH[7]33
GPIOG[0]88GPIOG[1]89GPIOG[2]90GPIOG[3]91GPIOG[4]92GPIOG[5]93GPIOG[6]94GPIOG[7]95
SYSOPT1/GPIOH[2]106SYSOPT0/GPIOH[3]107
VCC
110
8
GPIOF[7]109GPIOF[6]110GPIOF[5]111GPIOF[4]112
IRTX113IRRX114
GPIOF[3]/IRMODE/IRRX3B115GPIOF[2]/IRTX2116GPIOF[1]/IRRX2117GPIOF[0]/IRMODE/IRRX3A118
VCC1 119
VDD18 120
VSS 17
XTAL2 122XTAL1/CLKIN 123
VDDA18PLL 124VDDA33PLL 125
ATEST 126
RBIAS 127
VSS 11
VSS 128VSS 121VSS 87VSS 72
USBDP0 9USBDN0 10USBDP1 13USBDN1 12USBDP2 15USBDN2 16USBDP3 19USBDN3 18USBDP4 21USBDN4 22
PWRGD 7
OUT65 105
TEST_PIN 35
R454 10K_0402_5%~D
1 2
C55
54.
7U_0
603_
6.3V
6M~D
1
2
R474 10K_0402_5%~D1 2
R450 10K_0402_5%~D
1 2
R455 100K_0402_5%~D
12
R559 10K_0402_5%~D
1 2
C55
30.
1U_0
402_
16V4
Z~D
1
2
R596 100K_0402_5%~D
12
R45
812
K_04
02_1
%~D
12
R456 100K_0402_5%~D
12
R46
910
K_04
02_5
%~D
@
12
C5420.1U_0402_16V4Z~D
1
2
R602 0_0402_5%~D@ 12
R476 10K_0402_5%~D
1 2
R653 0_0402_5%~D12
R56
00_
0402
_5%
~D
12
R46322_0402_5%~D
@
12
R564 0_0402_5%~D@ 12
R452 10K_0402_5%~D
1 2
Y124MHZ_12PF_1BX24000CE1B~D
12
R644 100K_0402_5%~D
1 2
R47
210
K_04
02_5
%~D
@
12
R451 10K_0402_5%~D
1 2
C54812P_0402_50V8J~D
1 2
C55122P_0402_50V8J~D
@
1
2
R460 100K_0402_5%~D12
R475 10K_0402_5%~D@ 1 2
C5430.1U_0402_16V4Z~D
1
2
C54
40.
1U_0
402_
16V4
Z~D
1
2
C5390.1U_0402_16V4Z~D
1
2
C54922P_0402_50V8J~D
@
1
2
C54
74.
7U_0
603_
6.3V
6M~D
1
2
R47
110
K_04
02_5
%~D
12
C54
60.
1U_0
402_
16V4
Z~D
1
2
R46122_0402_5%~D
@
12
R46
2
1M_0
402_
5%~D
12
R47
010
K_04
02_5
%~D
@
12
C5400.1U_0402_16V4Z~D
1
2
C550
12P_0402_50V8J~D
1 2
C55
24.
7U_0
603_
6.3V
6M~D
1
2
R453 10K_0402_5%~D
1 2
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LPC_LAD[0..3]
CLK_KBD
DAT_KBD
DAT_SMB
CLK_SMB
CLK_DOCK
DAT_DOCK
CLK_PCI_5004
+RTC_CELL_VCC0
LID_CL#
AUX_EN
SIO_EXT_SMI#EC_FLASH_SPI_CLK
LPC_LFRAME#
KSO16
KSO5
SIO_SLP_S3#
BAT1_LED#
LPC_LAD1
CLK_PCI_5004
KSI1KSI2
MEC5004_XOSEL
MEC5004_XTAL1
8051TX
+VR
_CA
P
RUNPWROK
PLTRST2#
CLK_KBD
KSO3
NUM_LED#
LID_CL_SIO#
CLKRUN#
KSI3
KSI7
KSO0
KSO8
SIO_THRM#
KSO15
SIO_SLP_S5#
SBAT_SMBCLK
IRQ_SERIRQ
ICH_EC_SPI_CLK
SIO_A20GATE
KSI0
RESET_OUT#
FAN1_TACH
SFPI_EN
MEC5004_XTAL1
SNIFFER_PWR_SW#
DAT_TP_SIO
LPC_LAD3
KSI6
PBAT_SMBCLK
SCRL_LED#
FWP#
SIO_EXT_SCI#
PS_ID
KSO1
KSO9
FWP#
RUN_ON
CLK_TP_SIO
KSO7
KSO11
PBAT_SMBDAT
BREATH_LED
BC_INT#
SBAT_SMBDAT
CLK_DOCK
KSO10ACAV_IN
KSO14ALWON
HOST_DEBUG_TX
LPC_LAD2
DAT_DOCK
DAT_KBD
KSI4
KSO6
CAP_LED#
DEBUG_ENABLE#
LPC_LAD0
ATF_INT#
LID_CL_SIO#
SUS_ON
HOST_DEBUG_RX
KSO2
BAT2_LED#
KSI5
KSO12KSO13
SIO_RCIN#
SNIFFER_PWR_SW#
+3.3V_ALW_EC
BC_DATBC_CLK
SIO_EXT_WAKE#
KSO4
CLK_SMBDAT_SMB
DOCK_SMB_DATDOCK_SMB_CLK
PS_ID_DISABLE#
DOCK_SMB_INT#
DOCK_SMB_INT#
SNIFFER_SW#
DEBUG_ENABLE#
SIO_PWRBTN#
+EC
_AG
ND
DOCK_SMB_DAT
DOCK_SMB_CLK
SBAT_SMBDAT
SBAT_SMBCLK
PBAT_SMBDAT
PBAT_SMBCLK
MEC5004_XTAL2
ICHO_ECO_SPII_DATAICHI_ECI_SPIO_DATA
ECO_FLASHI_DATAECI_FLASHO_DATA
SFPI_EN
SPI_CS#
ECI_FLASHO_DATA
SPI_WE#
SPI_WE#
SPI_HOLD#
SPI_HOLD#EC_FLASH_SPI_CLK
ECO_FLASHI_DATA EC_FLASH_SPI_CLKECO_FLASHI_DATA
ECI_FLASHO_DATASPI_CS#
VGA_IDENTIFY
VGA_IDENTIFY
ITP_DBRESET#
MEC5004_XTAL2
MAIN_PWR_SW#
MAIN_PWR_SW#
8051RX
INSTANT_ON_SW#INSTANT_ON_SW#
+VR_CAPALWON
SNIFFER_LED_OFF#
SPI_CS#
+3.3V_ALW+RTC_CELL
+RTC_CELL
+5V_ALW
+RTC_CELL
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+5V_RUN
+3.3V_SUS +3.3V_SUS
+3.3V_SUS
+RTC_CELL
+3.3V_ALW
LPC_LFRAME#<23,29,39>
PLTRST2#<22,39>
LPC_LAD[0..3]<23,29,39>
CLKRUN#<24,31,39>
CLK_PCI_5004<6>
KSI[0..7]<41>
KSO[0..16]<41>
BAT1_LED# <44>BAT2_LED# <44>
RESET_OUT# <43>
RUNPWROK <39,43,50>
ACAV_IN <18,51>
DAT_TP_SIO<41>
ALWON <47>
BREATH_LED <44>
FAN1_TACH <18>
SIO_A20GATE<23>
CLK_KBD<38>DAT_KBD<38>
DAT_DOCK<38>CLK_DOCK<38>
ICH_EC_SPI_CLK<24>
PBAT_SMBDAT <46,51>
SIO_EXT_SCI# <24>
SIO_EXT_SMI# <24>
BC_INT#<39>
BC_CLK<39>BC_DAT<39>
SIO_THRM#<24>
IRQ_SERIRQ<24,29,31,39>
SBAT_SMBDAT <19>
AUX_EN <42,47>SUS_ON <42,43,47>RUN_ON <19,42,43,47,48,49>
SIO_SLP_S5# <24>SIO_SLP_S3# <24>SIO_RCIN# <23>SIO_EXT_WAKE# <24>
LID_CL# <41,44>
SCRL_LED# <44>CAP_LED# <44>
NUM_LED# <44>
ATF_INT# <18>
BIA_PWM <12,19>
DAT_SMB <18,33>
DOCK_SMB_DAT <38>
PS_ID_DISABLE# <45>
DOCK_SMB_INT# <38>
POWER_SW# <18,38,44>
SNIFFER_SW# <44>
SIO_PWRBTN#<24>
ICHI_ECI_SPIO_DATA<24>ICHO_ECO_SPII_DATA<24>
ITP_DBRESET# <7,24>
PS_ID <45>
HOST_DEBUG_TX <36>
8051RX<36>
SNIFFER_LED_OFF# <44>
CLK_TP_SIO<41>
8051TX<36>
SPI_CS# <24>
HOST_DEBUG_RX <36>
CLK_SMB <18,33>
SBAT_SMBCLK <19>
DOCK_SMB_CLK <38>
PBAT_SMBCLK <46,51>
Title
Size Document Number R ev
Date: Sheet o fLA-3071P 1.0
EMC5004
40 59Friday, May 12, 2006
Compal Electronics, Inc.
32 KHz Clock
Pop for flash corruption issue.
Place closely pin 58
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
1=Flash Recovery Enabled0=Flash Recovery Disabled
Bat2 = Amber LEDBat1 = Green LED
Flash write protect bottom 4Kof internal bootblock flash
low=write protected
20mA drive pins
150 MIL SO8
200 MIL SO8
Flash ROM
Depop 0ohm whendoing flashrecovery
120ohm,600mA,0.25ohm
120o
hm,6
00mA
,0.2
5ohm
The same MDC connctorfor TAA module
R484 4.7K_0402_5%~D
1 2
C5580.1U_0402_16V4Z~D
1
2
Y332.768K_12.5PF_Q13MC30610003~D
1 4
2 3
C56522P_0402_50V8J~D
@
1
2
C56
21U
_060
3_10
V4Z
~D
1
2
L62
BLM11A121S_0603~D
1 2
C5590.1U_0402_16V4Z~D
1
2
R486 10K_0402_5%~D
12
R49510_0402_5%~D
12
R6370_0402_5%~D
12
R490 10K_0402_5%~D
1 2
R558 10K_0402_5%~D
1 2
R62
810
K_0
402_
5%~D
@
12
R482 4.7K_0402_5%~D
1 2
G
D
S
Q772N7002W-7-F_SOT323~D@2
13
JP3
TYCO_1-179373-2~D
@
1 13 35 57 79 9
11 11
2244668810101212
1313
1414
1515
1616
1717
1818
1919
2020
JDEBUG1Molex_53261
@1 12 23 3
5 54 4
U49
M25P80-VMW6TP_SO8~D
@
S#1Q2W#3VSS4
VCC 8HOLD# 7
C 6D 5
C56110U_0805_6.3V6M~D
1
2
C5560.1U_0402_16V4Z~D
1
2
R590 0_0402_5%~D@1 2
C5631U_0603_10V4Z~D
1
2
C6914.7U_0603_6.3V6M~D@
1 2
C5570.1U_0402_16V4Z~D
1
2
C567
0.1U_0402_16V4Z~D
12
R50410K_0402_5%~D
12
C56
922
P_0
402_
50V
8J~D
1
2
R63010K_0402_5%~D@
1 2
R489 10K_0402_5%~D
1 2
R496 8.2K_0402_5%~D
1 2
R479100K_0402_5%~D
12
R499 0_0402_5%~D 1 2
R586
0_0402_5%~D
1 2
EC_FLASH_PAD1@SHORT PADS~D 1
12
2
C56
84.
7U_0
603_
6.3V
6M~D
1
2
R5031K_0402_5%~D
12
R477100K_0402_5%~D
12
R4911M_0402_1%~D
12
R47810K_0402_5%~D
1 2
R50710K_0402_5%~D
12
R50810K_0402_5%~D
12
R49
710
K_0
402_
5%~D
12
R50
010
K_0
402_
5%~D
@
12
R487 4.7K_0402_5%~D
1 2
R49
810
K_0
402_
5%~D
12
R614 100K_0402_5%~D
1 2
R50522_0402_5%~D
@
12
R5060_0402_5%~D
12
R48110K_0402_5%~D
1 2
L63
BLM
11A
121S
_060
3~D
12
R492 8.2K_0402_5%~D
1 2
C56
60.
1U_0
402_
16V
4Z~D
1
2
T11PAD~D
C57
022
P_0
402_
50V
8J~D
1
2
R488 4.7K_0402_5%~D
1 2
U50
M25P80-VMW6TP_SO8~D
S#1Q2W#3VSS4
VCC 8HOLD# 7
C 6D 5
R493 8.2K_0402_5%~D
1 2
D22RB751S40T1_SOD523-2~D@
21
R494 8.2K_0402_5%~D
1 2
T10PAD~D
C5600.1U_0402_16V4Z~D
1
2
C
BE
Q76PMST3906_SOT323-3~D@
1
2
3
R511100K_0402_5%~D
12
R483 8.2K_0402_5%~D
1 2
R485 8.2K_0402_5%~D
1 2
LPC Interface
Host/8051
Keyboard and Mouse Interface
BC Bus
PWR SW
U48
MEC5004_VTQFP128~D
GPIO82/FAN_TACH3 43
SGPIO35 1SGPIO36 (SFPI_EN) 2
SGPIO37 3
SGPIO43 4
GPIO16/FAN_TACH2 42GPIO15/FAN_TACH1 41
GPIO5/KSO1514GPIO4/KSO1415
OUT11/PWM1 46OUT10/PWM0 45
OUT9/PWM2 47
OUT5/KBRST50
OUT2/PWM3 48
PWRGD 49
nRESET_OUT/OUT6 53
ACAV_IN 128
POWER_ SW_IN1# 126
AB1A_DATA 5AB1A_CLK 6AB1B_DATA 7AB1B_CLK 8
KSO13/GPIO1816KSO12/OUT817KSO11/GPIOC718KSO10/GPIOC619KSO9/GPIOC520KSO8/GPIOC423KSO7/GPIO324KSO6/GPIO225
KSO4/GPIO028KSO3/GPIOC329KSO2/GPIOC230KSO1/GPIOC131KSO0/GPIOC032
KSI7/GPIO1933KSI6/GPIO1734KSI5/GPIO1035KSI4/GPIO936KSI3/GPIO837KSI2/GPIO738KSI1/GPIO639KSI0/SGPIO3040
KCLK77KDAT78EMCLK79EMDAT80
POWER_ SW_IN0# 127
VC
C1
21
KSO5/GPIO127
VR
_CA
P22
VS
S26
KSO17/GPIOA112KSO16/GPIOA013
VS
S51
VC
C1
44
GPIO96/TOUT1 52
SGPIO44/MSCLK/SPCLK2 54SGPIO45/MSDATA/SPDOUT2 55
SER_IRQ56
LRESET#57PCICLK58LFRAME#59LAD060LAD161LAD262LAD363
VS
S74
CLKRUN#64
VC
C1
65
nEC_SCI/SPDIN2 66
SGPIO31/TIN1/SPCLK1 67SGPIO47/SPDOUT1 68SGPIO46/SPDIN1 69
SYSOPT0/SGPIO32/LPC_TX 70SYSOPT1/SGPIO33/LPC_RX 71
TEST_PIN 72
GPIOA3/WINDMON 73
GPIO94/IMCLK75GPIO95/IMDAT76
VC
C1
83
GPIO20/PS2CLK/8051RX81GPIO21/PS2DAT/8051TX82
VS
S88
nFWP 84
SGPIO42 89SGPIO41 90SGPIO40 91
SGPIO34/A20M92
VS
S_P
LL10
1
HSTCLK102
FLCLK103
VC
C_P
LL10
4
HSTDATAIN105
FLDATAIN106
HSTDATAOUT107
FLDATAOUT108
FLCS0109FLCS1110
VS
S11
3
nBAT_LED 114nPWR_LED 115
VC
C1
116
OUT7/nSMI 11
GPIO83/32KHZ_OUT 117
BGPO0 118
ALWON 120
XTAL1122
XOSEL123
XTAL2124
AG
ND
125
POWER_ SW_IN2# 119
GPIO11/AB2A_DATA 93GPIO12/AB2A_CLK 94
GPIO13/AB2B_DATA 95GPIO14/AB2B_CLK 96
GPIO87/AB1C_DATA 111GPIO86/AB1C_CLK 112
GPIO85/AB1D_DATA 9GPIO84/AB1D_CLK 10
GPIO93/AB1F_DATA 97GPIO92/AB1F_CLK 98
GPIO91/AB1E_DATA 99GPIO90/AB1E_CLK 100
BC_CLK87BC_DAT86BC_INT85
VC
C0
121
R62
910
0K_0
402_
5%~D
@1
2
R50
110
K_0
402_
5%~D
@
12
R512100K_0402_5%~D@
12
C5640.047U_0402_16V4Z~D
1
2
R63
210
0K_0
402_
5%~D
@1
2R510
47_0402_5%~D
1 2
R50
910
K_0
402_
5%~D
12
R642 0_0402_5%~D
12
R631 22_0402_5%~D@1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DAT_TP_SIO
CLK_TP_SIOTP_CLK
TP_DATA
SP_V+
KSI6KSI7
KSO13
KSO8
KSI5
KSO4
KSO11
KSO14
KSO10
KSO6
KSO2
KSO15
KSI3
KSO12
KSI1
KSI4
KSO0
KSO16
KSI0
KSO5
KSO3
KSO7
KSI2
KSO9
KSO1
KSO8
KSO1
KSO12KSO16
KSO6
KSO13
KSO4
KSO2KSO0
KSO5
KSI1
KSI0KSI3
KSO3
KSO14
KSI6
KSO7
KSO15
KSI5KSI2
KSO11KSO9
KSI7
KSI4
KSO10
USB_BIO-USB_BIO+
SP_GND
TP_DATATP_CLK
SP_XSP_Y
SP_GNDSP_XSP_V+SP_Y
LID_CL#
SP_YSP_V+SP_XSP_GND
+5V_RUN
+3.3V_RUN
+5V_RUN
+3.3V_ALW
KSI[0..7]<40>
KSO[0..16]<40>
DAT_TP_SIO <40>
USB_BIO-<35>USB_BIO+<35>
LID_CL#<40,44>
CLK_TP_SIO <40>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
INT KB & FT & LID & TOUCH PAD
41 59Friday, May 12, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Touch PAD
600ohm,100mA
600ohm,100mA
Co-lay with JP4
C59
010
0P_0
402_
50V8
J~D
1
2
C57
810
0P_0
402_
50V8
J~D
1
2
R51
34.
7K_0
402_
5%~D
12
C57
510
0P_0
402_
50V8
J~D
1
2
C59
410
0P_0
402_
50V8
J~D
1
2
Part Number Description
GC020008R00 BATT CR2025 W/CABLE 170MAH MB 00B 0FD
RTC BATT
Part Number DescriptionDA300001O1L FPC 00B LF-3072P REV1 T/P FPC WITH BIO
T/P FPC
C57
710
0P_0
402_
50V8
J~D
1
2
C64
510
0P_0
402_
50V8
J~D
@
1
2
JP6
IPEX_20413-004E~D11 22 33 44
GND5 GND6
Part Number Description
DC02000980L H-CONN SET 00B M/B-B/T
Bluetooth wire set cable
C58
410
0P_0
402_
50V8
J~D
1
2
Part Number Description
PK230005C0L SPK PACK 00B 1W 8OHM
SPKER1
Part Number Description
DC02000960L H-CONN SET 00B M/B-MDC
MDC wire set cable
Part Number Description
DC020008Q0L H-CONN SET 00B MB-LCD 12 WXGA
LCD cableC
593
100P
_040
2_50
V8J~
D
1
2
C57
210
P_0
402_
50V8
J~D
1
2
C59
210
0P_0
402_
50V8
J~D
1
2
C58
810
0P_0
402_
50V8
J~D
1
2
JP4
HRS_FH12-10(4)SA-1SH(55)~D11 22 33 44
GND5 GND6
Part Number DescriptionPK090003M0L TRACK PAD ALPS KGDDEN010A BIOSENSOR
Touch-PAD MODULE
C58
210
0P_0
402_
50V8
J~D
1
2
R51
44.
7K_0
402_
5%~D
12
C57
910
0P_0
402_
50V8
J~D
1
2
C62
610
P_0
402_
50V8
J~D
1
2
C58
910
0P_0
402_
50V8
J~D
1
2
C64
710
0P_0
402_
50V8
J~D
@
1
2
C58
710
0P_0
402_
50V8
J~D
1
2
Part Number Description
DC000002T0L PCMCIAFOXCONN1CA86501-CR-4F
PCMCIA BODY
C5730.1U_0402_16V4Z~D
1
2
JKYBRD1
HRS_FH28D-25SB-1SH~D1
3
5
7
11
9
13
15
17
19
21
23
25
27
2
4
6
8
10
12
14
16
18
20
22
24
26
C59
810
0P_0
402_
50V8
J~D
1
2
PJP13
PAD-OPEN 4x4m
1 2
C59
710
0P_0
402_
50V8
J~D
1
2
Part Number Description
DA300001N1L FPC 00B LF-3071P REV1 HITACHI
HDD FPC cable
C59
910
0P_0
402_
50V8
J~D
1
2
C64
810
0P_0
402_
50V8
J~D
@
1
2
C58
610
0P_0
402_
50V8
J~D
1
2
C59
110
0P_0
402_
50V8
J~D
1
2
C59
510
0P_0
402_
50V8
J~D
1
2
C58
010
0P_0
402_
50V8
J~D
1
2
L65BLM11A601S_0603~D
1 2
C57
110
P_0
402_
50V8
J~D
1
2
L64BLM11A601S_0603~D
1 2
C64
610
0P_0
402_
50V8
J~D
@
1
2
C64
40.
1U_0
402_
16V4
Z~D
1
2
C58
110
0P_0
402_
50V8
J~D
1
2
C58
310
0P_0
402_
50V8
J~D
1
2
C62
710
P_0
402_
50V8
J~D
1
2
JTPAD
HRS_FH12-30-14-SA-1SH-55~D11 22 33 44 55 66 77 88 99 1010 1111 1212 1313 1414 GND15 GND16
C57
610
0P_0
402_
50V8
J~D
1
2
C58
510
0P_0
402_
50V8
J~D
1
2
C59
610
0P_0
402_
50V8
J~D
1
2
Part Number Description
DA300001S1L FPC 00B LF-3073P REV1 LED FPC
LED FPC cable
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RUN_ON_5V#
N21917830
SUS_ON
SUS_ENABLE
SUS_ON_5V#
+5V
RU
N_D
IS
+3.3
VR
UN
_DIS
+1.8
VR
UN
_DIS
+1.5
VR
UN
_DIS
+0.9
VD
DR
_DIS
RUN_ON_5V#
+2.5
VR
UN
_DIS
+1.8
VS
US
_DIS
SUS_ON_5V#
RUN_ENABLE
+5V_ALW
+PWR_SRC+PWR_SRC
+0.9V_DDR_VTT
+3.3V_RUN
+3.3V_RUN
+5V_RUN
+5V_RUN
+1.8V_RUN
+1.8V_RUN +2.5V_RUN
+1.8V_SUS
+3.3V_SUS
+5V_SUS
+3.3V_SRC
+3.3V_SRC
+1.5V_RUN
+15V_SUS
+15V_SUS
+5V_ALW
+1.8V_SUS
RUN_ON<19,40,43,47,48,49>
ENAB_3VLAN <29>
AUX_EN<40,47>
SUS_ON<40,43,47>
RUN_ENABLE<47>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
POWER CONTROL
42 59Friday, May 12, 2006
Compal Electronics, Inc.
+3.3V_SUS Source
Run Planes Enable
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+5V_RUN Source
DC/DC Interface
+1.8V_RUN Source
+3.3V_RUN Source
Discharge Circuit
R53
01K
_040
2_5%
~D
@
12
R520100K_0402_5%~D
12
R633200K_0402_5%~D
12
G
D
S
Q69
2N70
02W
-7-F
_SO
T323
~D
2
13
G
D
S
Q392N7002W-7-F_SOT323~D
2
13
R532100K_0402_5%~D
12
R534470K_0402_5%~D
12
R51820K_0402_5%~D
12
R53
11K
_040
2_5%
~D
@
12
R517100K_0402_5%~D
12
R52320K_0402_5%~D
12
Q37STS11NF30L_SO8~D
365
78
2
4
1
C60
247
00P_
0402
_25V
7K~D
1
2
R533100K_0402_5%~D
12
R52
61K
_040
2_5%
~D
@
12
R61922_0805_5%~D
12
R53
520
0K_0
402_
5%~D
12
S
GD
Q44SI3456DV-T1-E3_TSOP6~D
3
6
245
1G
D
S Q48
2N70
02W
-7-F
_SO
T323
~D
@
2
13
C692470P_0402_50V7K~D
12
R52520K_0402_5%~D
12
G
D
S Q46
2N70
02W
-7-F
_SO
T323
~D
@
2
13
D24MMBD4148W-7-F_SOT323~D
1
3
2
C60
510
U_0
805_
10V4
Z~D
1
2
G
D
S Q47
2N70
02W
-7-F
_SO
T323
~D
@
2
13
Q43SI4800DY-T1-E3_SO8~D
365
78
2
4
1
R52220K_0402_5%~D
12
C60
110
U_0
805_
10V4
Z~D
1
2
G
D
S Q45
2N70
02W
-7-F
_SO
T323
~D
@
2
13
Q40SI4800DY-T1-E3_SO8~D
365
78
2
4
1
G
D
S Q50
2N70
02W
-7-F
_SO
T323
~D
@
2
13
G
D
S
Q51
2N70
02W
-7-F
_SO
T323
~D
2
13
G
D
S Q422N7002W-7-F_SOT323~D
2
13
R52
91K
_040
2_5%
~D
@
12
G
D
S
Q52
2N70
02W
-7-F
_SO
T323
~D
2
13
R52
71K
_040
2_5%
~D
@
12
R521100K_0402_5%~D
12
C60
310
U_0
805_
10V4
Z~D
1
2
G
D
SQ412N7002W-7-F_SOT323~D
2
13
C60
010
U_0
805_
10V4
Z~D
1
2
R52
81K
_040
2_5%
~D
@
12
G
D
S
Q382N7002W-7-F_SOT323~D
2
13
R519100K_0402_5%~D
12
G
D
S Q49
2N70
02W
-7-F
_SO
T323
~D
@
2
13
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RUNPWROK
IMVP_PWRGD
RESET_OUT#
Z401
2
ICH_PWRGD
ICH_PWRGD#
5V_3V_RUN_PWRGD
+COINCELL
+RTC_CELL
+COINCELL
+3.3V_RTC_LDO_1
+3.3V_RUN+3.3V_SUS
+3.3V_SUS
+3.3V_SUS
+3.3V_SUS
+3.3V_SUS+3.3V_SUS
+3.3V_SUS
+3.3V_SUS
+3.3V_SUS
+5V_SUS
+5V_RUN
+3.3V_SUS
+3.3V_RUN
+1.8V_SUS
+1.8V_RUN
RUN_ON<19,40,42,47,48,49>
SUSPWROK <18,24>
RUNPWROK <39,40,50>
RESET_OUT#<40>
IMVP_PWRGD<24,50>
ICH_PWRGD# <18>
ICH_PWRGD <10,24>
SUSPWROK_1P8V<49>
SUS_ON<40,42,47>
1.5V_RUN_PWRGD<48>
1.05V_RUN_PWRGD<48>
2.5V_RUN_PWRGD<18>
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
Power Good
43 59Friday, May 12, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
COIN RTC Battery
Follow Travis tomodify
At S3 step back-drive: 78mV, change to SI2303
At S3 step back-drive:198mV, change to SI2303
R5391K_0402_5%~D
12
C6240.1U_0402_16V4Z~D
1
2
R58
90_
0402
_5%
~D
12
R622
4.7K_0402_5%~D
R58
80_
0402
_5%
~D
12
U52A
74LVC3G14DC_VSSOP8~D
P8
A1 Y 7
G4
R626
100K_0402_5%~D
G
D
S Q532N7002W-7-F_SOT323~D
2
13
U53D
74VHC08MTCX_NL_TSSOP14~D
IN113
IN212 OUT 11
P14
G7
D16BAT54CW_SOT323~D
32
1
R53620K_0402_5%~D
12
R538100K_0402_5%~D
12
U52B
74LVC3G14DC_VSSOP8~D
P8
A6 Y 2
G4
R556100K_0402_5%~D
12
C6181U_0603_10V4Z~D
1
2
R621
200K_0402_5%~D
EB
CQ75MMST3904-7-F_SOT323~D
2
31
G
D
S
Q70
SI2303BDS-T1-E3_SOT23-3~D
2
13
EB
CQ73MMST3904-7-F_SOT323~D
2
31
G
D
S
Q74
SI2303BDS-T1-E3_SOT23-3~D
2
13
R623
200K_0402_5%~D
U53A74VHC08MTCX_NL_TSSOP14~DIN11
IN22 OUT 3
P14
G7
R55710K_0402_5%~D
12
C6160.1U_0402_16V4Z~D 1 2
G
D
S Q632N7002W-7-F_SOT323~D
2
13
U53C74VHC08MTCX_NL_TSSOP14~D
IN110
IN29 OUT 8
P14
G7
R624
4.7K_0402_5%~D
EB
CQ71MMST3904-7-F_SOT323~D
2
31
R58
70_
0402
_5%
~D
12
U53B
74VHC08MTCX_NL_TSSOP14~D
IN14
IN25 OUT 6
P14
G7
U52C
74LVC3G14DC_VSSOP8~D
P8
A3 Y 5
G4C617
0.01U_0402_16V7K~D
1
2
R5370_0402_5%~D
1 2
C6130.1U_0402_16V4Z~D 1 2
R627
4.7K_0402_5%~D
JCOIN1
MOLEX_53780-0270~D
1122
GND3GND4
Q72DDTA114EUA-7-F_SOT323~D
2
13
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BREATH_LED_B
BAT1_LED#
SNIFFER_Y
SNIFFER_G
SNIFFER_GREEN#
SNIFFER_YELLOW#
IDE_ACT#
BAT2_LED#
BT_ACT
WLAN_ACT
R_CAP_LED#
R_NUM_LED#
R_SCRL_LED#
POWER_SW#
BATT_AMBER_LED
BATT_GREEN_LED
POWER_SW_LED
POWER_SW_LED
BT_ACTWLAN_ACT
R_CAP_LED#R_NUM_LED#
R_SCRL_LED#
BT_LED_DIS#
SNIFFER_SW#
LID_CL#
BT_ACT
R_CAP_LED#R_NUM_LED#
R_SCRL_LED#
WLAN_ACT
+3.3V_ALW
+3.3V_RUN
+3.3V_RUN
+3.3V_ALW
+3.3V_ALW
+3.3V_SUS
+3.3V_SUS
+5V_RUN
+3.3V_SUS
+3.3V_SUS
+3.3V_RUN
+3.3V_ALW
+3.3V_ALW
+3.3V_RUN
BREATH_LED<40>
BAT1_LED#<40>
SCRL_LED#<40>
CAP_LED#<40>
NUM_LED#<40>
LED_WLAN_OUT#<36>
SNIFFER_GREEN#<18>
SNIFFER_YELLOW#<18>
SNIFFER_SW#<40>
BAT2_LED#<40>
R_PIDEACT<38>
IDE_ACT#<26>
SNIFFER_WIRELESS_ON/OFF#<39>
POWER_SW#<18,38,40>
BT_ACTIVE<34,36>
LID_CL#<40,41>
SNIFFER_LED_OFF#<40>
Title
Size Document Number R ev
Date: Sheet o fLA-3071P 1.0
PAD and Standoff
44 59Friday, May 12, 2006
Compal Electronics, Inc.
Fiducial Mark
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
MDC Cable latch
Co-lay with JLED1
R54410K_0402_5%~D
1 2
H16@H_C472D376
1
H17@H_C472D431X376
1
FD13
FIDUCIAL MARK~D
1
R54351_0402_5%~D
12
EB
CQ57MMST3904-7-F_SOT323~D
2
31
R615 51_0402_5%~D1 2
Part Number Description
EL00B00070L HAU30_MYLAR_DDR2
MYLAR4
JP10
IPEX_20403-010E~D
11223344
GND11GND12
55667788991010
H5@H_C315D126
1
FD20FIDUCIAL MARK~D1
FD17
FIDUCIAL MARK~D
1
Part Number Description
FH00B00060L HAU30_MIC_RUBBER
RUBBER1
CLP4EMI_CLIP
GND1
Q58DDTA114EUA-7-F_SOT323~D
21
3
Q67DDTA114EUA-7-F_SOT323~D
2
13
Q59DDTA114EUA-7-F_SOT323~D
2
13
FD15
FIDUCIAL MARK~D
1
FD26
FIDUCIAL MARK~D
1
FD11
FIDUCIAL MARK~D
1
CLP2EMI_CLIP
GND1
JPSW
MOLEX_53780-0370~D
112233
GND 4GND 5
R548 510_0402_5%~D
12
R550
330_0402_5%~D
1 2
CLP1EMI_CLIP
GND 1
H3@H_C315D126
1
H7@H_C315D126
1
R54047_0402_5%~D
1 2
H18H_C315D126@
1
FD8
FIDUCIAL MARK~D
1
Q62DDTA114EUA-7-F_SOT323~D
2
13
LED3LTST-C190KGKT_GRN_0603~D
12
H10@H_C315D126
1
Y
G
D18
12-22AUYSYGC/530-A2/TR8_G/Y~D
3
21
R545 510_0402_5%~D
12
Part Number Description
EL00B000A0L HAU30_MYLAR_FAN
MYLAR7
FD12
FIDUCIAL MARK~D
1
H6@H_C315D126
1
FD19FIDUCIAL MARK~D1
FD16
FIDUCIAL MARK~D
1
FD31
FIDUCIAL MARK~D
1
FD1
FIDUCIAL MARK~D
1
H1@H_C315D126
1
FD23
FIDUCIAL MARK~D
1
H15H_C236D91
1
R552220_0402_5%~D
1 2
Part Number Description
EL00B00040L HAU30_DOCKING_HOLE_MYLAR
MYLAR1
Part Number Description
EL00B00050L HAU30_DOCKING_LOCK_L_MYLAR
MYLAR2
FD30
FIDUCIAL MARK~D
1
FD5
FIDUCIAL MARK~D
1
G
O
LED5
LTST-C155KGKFKT_GRN/ORG~D
2 1
4 3
R61610K_0402_5%~D
1 2
H11H_C236D91
1H4@H_C315D126
1
FD21
FIDUCIAL MARK~D
1
EB
CQ68MMST3904-7-F_SOT323~D
2
31
Part Number Description
EL00B000O00 HAU30_RUBBER_MDC
RUBBER2
H2@H_C315D126
1
Q55DDTA114EUA-7-F_SOT323~D
2
13
G
D
SQ78BSS138W-7-F_SOT323~D
2
13
JLED1
HRS_FH12-10S-0.5SH(55)~D
11223344
GND11GND12
55667788991010
FD2
FIDUCIAL MARK~D
1
H8@H_C315D126
1
FD3
FIDUCIAL MARK~D
1
Q61DDTA114EUA-7-F_SOT323~D
2
13
Part Number Description
EL00B000X00 HAU30_MYLAR_HDD
MYLAR6
FD6
FIDUCIAL MARK~D
1
H14H_C236D91
1
R54910K_0402_5%~D
12
FD22
FIDUCIAL MARK~D
1
Q54DDTA114EUA-7-F_SOT323~D
2
13
R547 510_0402_5%~D
12
FD4
FIDUCIAL MARK~D
1
R546 510_0402_5%~D
12
H12@H_C236D126
1
FD27
FIDUCIAL MARK~D
1
Part Number Description
EL00B00060L HAU30_DOCKING_LOCK_R_MYLAR
MYLAR3
FD28
FIDUCIAL MARK~D
1
R63610K_0402_5%~D@
12
Part Number Description
EL00B000N00 HAU30_MYLAR_WLAN_WWAN
MYLAR5
R551 56_0402_5%~D
1 2
R553220_0402_5%~D
1 2
C
BE Q56
PMST3906_SOT323-3~D 1
2
3
R54110K_0402_5%~D
1 2
FD7
FIDUCIAL MARK~D
1
FD14
FIDUCIAL MARK~D
1
FD10
FIDUCIAL MARK~D
1
Q60DDTA114EUA-7-F_SOT323~D
2
13
FD24
FIDUCIAL MARK~D
1
Part Number Description
MAAA00153G0 SCREW M M 2.0D 3.0L K 4.6D ZK NL + CR3+
SCREW1
FD9
FIDUCIAL MARK~D
1
JPLID
MOLEX_53780-0370~D
112233
GND 4GND 5
CLP3EMI_CLIP
GND 1
FD29
FIDUCIAL MARK~D
1FD25
FIDUCIAL MARK~D
1
FD32
FIDUCIAL MARK~D
1
R542 1K_0402_5%~D
1 2
JSNIFF
1BS008-13130-002-7F_4P~D
11
22
33
44
GND5
GND6
H9@H_C315D126
1
LED1LTST-C190KGKT_GRN_0603~D
12
H13H_C236D91
1
FD18
FIDUCIAL MARK~D
1
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
H H
G G
F F
E E
D D
C C
B B
A A
AD3419_BST1
ADP3207_PWM1
ADP3207_#DCM
AD
P32
07_R
AM
PA
DJ
ADP3207_VRTT
AD3419_DRVH1
+CPU_PWR_SRC
AD3419_DRVL1
AD
P32
07_T
TSEN
SE
AD
P32
07_C
SS
UM
AD
P32
07_C
SR
EF
AD
P32
07_C
SR
EF
AD3419_SW1
+VCC_CORE
GNDA_CORE
+PWR_SRC
+PWR_SRC
GNDA_COREGNDA_CORE
GNDA_COREGNDA_CORE
GNDA_CORE
GNDA_CORE
GNDA_CORE
GNDA_COREGNDA_CORE
GNDA_CORE
GNDA_CORE
GNDA_CORE
+3.3V_RUN
+5V_RUN
+5V_RUN
GNDA_CORE
+VCC_CORE
GNDA_CORE
DPRSLPVR<24>
RUNPWROK<39,40,43>
IMVP6_PROCHOT# <39>
VSSSense <8>
VCCSense <8>
H_DPRSTP#<7,23>H_PSI#<8>
VID2<8>
VID0<8>
VID3<8>VID4<8>VID5<8>VID6<8>
VID1<8>
CLK_ENABLE#<6>
IMVP_PWRGD<24,43>
RUNPWROK<39,40,43>
Title
Size Document Number R ev
Date: Sheet o f
1.0
+VCORE
50 59Friday, May 12, 2006
Compal Electronics, Inc.
LA-3071P
Rdson_typ4.8mohms
PWM2, PWM3 pull high
DELL CONFIDENTIAL/PROPRIETARY
Thermistor PH1 should be placed close to the hot spot of the VR
NOTE: ( Connection VCORE output Cap GND)De-populate PR113 and PR115 when CPU is present
NOTE:PR111 is reversed for loop gain measurement purpose
IMVP-6 solution for Yonah ULV: 1-phase/9A
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
@ 0.45U_MPC1040LR45_27A_20%~D
Single Core(YONAH ULV)
Dual Core(YONAH ULV)
1. Choke: PL14 is 0.88u H2. MOS: PQ273 .PR104 is 309K.(OCP:14A)4. PR114 is 2.37K.(Load Line: -5.1m)5. PR101 is 10K.6. PR88 is 820P ; 8. STUFF PC807. PR90 is 390P.
1. Choke: PL14 is 0.45u H2. MOS: PQ27.3. PR104 is 215K.(OCP:20A)4. PR114 is 5.76K.(Load Line: -2.1m)5. PR101 is 20K.6. PR88 is 470P ; 8. NO-STUFF PC807. PR90 is 470P.
Dual Core(MEROM ULV)
NOTE
@ 2
15K
_040
2_1%
@5.76K_0402_1%~D
@ 470P_0402_50V7K
@20K_0603_1%~D
@ 470P_0402_50V7K
1. Choke: PL14 is 0.45u H2. MOS: PQ16 and PQ273. PR104 is 215K.(OCP:20A)4. PR114 is 5.76K.(Load Line: -2.1m)5. PR101 is 20K. ;8. NO-STUFF PC806. PR88 is 470P7. PR90 is 470P.
PR92 0_0402_5%~D1 2
PR
8210
_060
3_5%
12
PC
9610
00P
_040
2_50
V7K~
D
12
PR102 0_0402_5%~D
12
PR850.001_2512_1%~D
4
2
1
3
PC
9410
00P
_040
2_50
V7K~
D1
2
PR113100_0402_5%~D@
1 2
PR
108
12K
_040
2_1%
12
PC
9510
00P
_040
2_50
V7K~
D1
2
PD14RB751V-40_SOD323~D
12
PR
104
309K
_040
2_1%
12
PC
7910
U_1
206_
25V6
M~D
1
2
PR
797.
32K
_060
3_1%
@
12
PC
7710
00P
_040
2_50
V7K~
D
12
PH
110
0K_0
603_
5%_T
H11
-4H
104F
T
@
12
PC
754.
7U_0
805_
10V
6K
12
PU5
ADP3207JCP-RL_LFCSP-40
STSET9
SS8
EN1
PWRGD2
PGDELAY3
FBRTN5
CLKEN4
FB6
COMP7
ILIM
IT11
RR
PM
13
GN
D20
RT
14
RA
MP
AD
J15
LLS
ET
16
CS
RE
F17
CS
SU
M18
CS
CO
MP
19
PWM3 24
VR
PM
12
SW1 23
PWM2 25
PWM1 26
OD 27
DCM 28
VRTT 29
TTSENSE 30
PS
I32
DP
RS
TP33
VID
634
VID
535
VID
436
VID
337
VID
238
VID
040
VID
139
DPRSLP10
SW2 22
SW3 21
VC
C31
PC
810.
01U
_040
2_25
V7K
~D
@
12
PR141
499_0402_1%12
PR
940_
0402
_5%
~D1
2
PC
890.
015U
_040
2_16
V7K
12
G
D
S PQ172N7002_SOT23~D@
2
13
PR880_0402_5%~D
@
12
PR
950_
0402
_5%
~D1
2
PC
9039
0P_0
402_
50V7
K
PR
810_
0402
_5%
~D
@
12
PR87
0_0402_5%~D1 2
PC
780.
1U_0
805_
25V
7K~D
12
PR1500_0402_5%~D
1 2
PR115100_0402_5%~D@
1 2
PQ
16IR
F783
2_S
O8~
D
36 578
2
4
19 PQ
27FD
S70
88S
N3_
SO
8~D
@
36 578
2
4
19
+
PC
137
15U
_D2_
25M
_R90
~D
1
2
PC
821U
_080
5_25
V4Z
~D
12
PL140.88UH_MPC1040LR88_17A_20%~D
1 2
PR
110
280K
_040
2_1%
12
PR1070_0402_5%~D
12
PR
800_
0603
_5%
~D
12
PR
930_
0402
_5%
~D1
2
PR1340_0603_5%~D
12
PC86100P_0402_50V8K
12
PQ
15IR
F782
1_S
O8~
D
365 7 8
2
4
1
PR
90
1.91
K_0
402_
1%~D
12
PR1001K_0402_1%
12PR101
10K_0603_0.1%~D
1 2PC8727P_0402_50V8K
12
PC854700P_0402_25V7K
1 2
PR114
2.37K_0402_1%~D 12
PR
970_
0402
_5%
~D@
12
PR
960_
0402
_5%
~D1
2
PC
8010
U_1
206_
25V6
M~D
1
2
PR1030_0402_5%~D
12
PL13FBMA-L11-321611-800LMA40T
12
PU4
ADP3419JRM_MSOP-10
IN1
SD#2
DRVLSD#3
CROWBAR4
VCC5 DRVL 6
GND 7
SW 8
DRVH 9
BST 10
PR
105
160K
_040
2_1%
~D
12
PC88820P_0402_25V8K
1 2
PR990_0402_5%~D
12
PR
106
392K
_040
2_1%
12
PR
112
0_04
02_5
%~D
12
PC
760.
33U
_060
3_10
V7K
12
PR91 0_0402_5%~D1 2
PC841000P_0402_50V7K~D
1 2
PR98 0_0402_5%~D1 2
PR
891.
91K
_040
2_1%
~D
12
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
Changed-List History 1
52 59Friday, May 12, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
1 0.27 H/W 10/14 INTELH_DPRSTP# & H_DPSLP# not need pulldown resistor for Intel request Remove R85,R86
2
3 41 H/W 10/14 Steve Touch PAD module issue Change JTPAD1.14 from +3.3V_RUN to GND 0.2
4 42 H/W Power sequence issue that +1.8V_RUN toolate on +VCC_CORE 0.2
Remove R524,C604
5 43 H/W 10/14 Steve Add +5V,+3V,+1.8V_RUN power sequenceschematic to control sequence
Add R621,R622,R623,R624,R626,R627,Q70,Q71,Q72,Q73,Q74,Q75 0.2
15 H/W 10/14SO-DIMMA SM Bus address define need changefrom A4 to A2 for 945GMS DDR support onechannel issue.
Change R135 from pull down to pull up +3.3V_RUNChange R136 from pull up to pull down and change from 100K to 10K 0.2Steve
10/14 Steve
6 17 H/W 10/15 Steve 945GMS support CKE0,CS0#,ODT0 to controlon board RAM,so remove CKE1,CS1#,ODT1
Remove RN76,RN80 and add R625,previously T13,T14,T15 forDDR_CKE1,DDR_CS1#,M_ODT1
0.2
7 39 H/W 10/15 Steve Change BID from X00 to X01 Un-pop R473,pop R469
8 44 H/W 10/15 Steve
0.2
0.2Remove CAP,NUM,SCRL,BT,WLAN LED from M/Bto FFC and CAP,NUM,SCRL direct driving LEDfrom MEC5004.
Remove LED6,LED7,LED8,LED9,LED10,Q64,Q65,Q66,add JLED1
9 19 H/W 10/17 Steve 945GMS control panel backlite (BIA_PWM),the voltage level is 3.3V, so don't needadd component for voltage level shift.
Remove U54 0.2
40 H/W 10/17 Steve Resolve EC code damage issue Reserved R628,R629,R630,R631,R632,C691,Q76,Q77,D22(depop) 0.210
11 31 H/W 10/27 Steve Follow M07_R5C843 refer schematic tomodify.
Change C424,C425 from 22P to 12P 0.2
12 42 H/W 10/27 Steve Resolve IMVP_PWRGD glitch during poweron/S3 resume
Add R633,C692 0.2
13 9 H/W 10/27 Steve For Dual Core CPU action Reserved C693,C694,C695,C696,C697,C698,C699,C700,C701,C702,C703,C704,C705,C706(depop)
0.2
14 H/W 10/27 Steve Support WoW function for prevent backdrive. Add D23,no pop R634 0.2
15
36
34 H/W 10/27 Steve Keep the BT LED off when the SNIFFER isturned on.
Add R635,R636,Q78 0.2
16 40 H/W 10/31 Steve Resolve EC flash corruption issue. Add R637 to pull down. 0.2
17 9 H/W 11/1 Steve Support one core CPU that follow Intelreqeust just pop 8pcs of 22uF MLCC Cap.
Pop C21,C23,C26,C28,C29,C31,C34,C36 0.2
18 42 H/W 11/3 Dell Correct C692 value Change to 470PF
19 34 H/W 11/3 Dell SNIFFER_LED_OFF# should be pull up to +3.3V_SUS
Change to pull up power source from +5V_SUS to +3.3V_SUS
0.2
0.2
20 36 H/W 11/7 CoE Nimi-Card Reset change to PLTRST# Follow CoE M07-Nimicard-a07 0.2
21 36 H/W 11/7 CoE Nimi-Card WLAN COEX2_WLAN_ACTIVE ANDCOEX1_BT_ACTIVE ADD 0 ohms: R638 andR639
Follow CoE M07-Nimicard-a07 0.2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
Changed-List History 2
53 59Friday, May 12, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
0.222 36 H/W 11/7 CoE C685 STUFFED Follow CoE M07-Nimicard-a07
23 32 H/W 11/7 CoE SIM Module C505, C506, C507, C508 Change to33P_0402, and C508 stuffed
Follow CoE M07-Nimicard-a07
24 44 H/W 11/7 Steve Sniffer LED Indicator Error Swap D18 pin2,3 of LED
25 24 H/W 11/8 CoE R370 Move to ICH7 side Follow CoE M07-ICH a07
26 31 H/W 11/8 CoE C428, C429, C430 add the note to close connector FollowM07_R5C843_REF_SCHEMATICS_A00
27 31 H/W 11/8 CoE C424, C425 add a note to change the value aftermeasure the starting value
FollowM07_R5C843_REF_SCHEMATICS_A00
28 31 H/W 11/8 CoE C431 change from 0.01u to 0.1u FollowM07_R5C843_REF_SCHEMATICS_A00
29 31 H/W 11/8 CoE +SD_VCC change to +3.3V_RUN_CARD FollowM07_R5C843_REF_SCHEMATICS_A00
30 32 H/W 11/8 CoE VCC_PCI/ VCC_MD3V add C707_0.01u FollowM07_R5C843_REF_SCHEMATICS_A00
31 32 H/W 11/8 CoE R389_100 remove FollowM07_R5C843_REF_SCHEMATICS_A00
32 32 H/W 11/8 CoE C448/ C449 /C684 change to 0.01u_0402 FollowM07_R5C843_REF_SCHEMATICS_A00
33 32 H/W 11/8 CoE VCC_CBS add C708_10u and C709_0.01u FollowM07_R5C843_REF_SCHEMATICS_A00
34 32 H/W 11/8 CoE +VCC_CBS rename to VCC_CBS, +CBS_VPP rename to CBS_VPP FollowM07_R5C843_REF_SCHEMATICS_A00
35 44 H/W 11/8 CoE Bluetooth LED disable function when Sniffer Activeupdate, follow travis: R636 pull-up to +3.3_ALW,Q56 --> 3906, R635 --> remove. But depop R636
Follow Travis
36 29 H/W 11/9 Brocadcom Change RDAC for Broadcom request. Change R338 from 1.15K to 1.18K.
37 34 H/W 12/8 Steve_Wang Resolve Bluetooth LED always light Pop R408
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.3
38 9 H/W 12/8 Steve_Wang Separate BOM type for different CPU. Pop 1@ for Signal core 1.06GPop 2@ for Singal core 1.2GPop 3@ for Dual core 1.06G
0.3
39 29 H/W 12/13 Steve_Wang Prevent Q23 damage issue for transfor +3.3V_LAN to+2.5V_LOM
Add R640,C710
40 20 H/W 12/13 Steve_Wang Resolve DVI test fail issue 1. Change C245,C236 from 0.1U to 10U2. Change R169,R170,R171,R172 from 300ohm to 110ohm3. Change R175 from 300ohm to 220ohm4. Pop C238,C247
41 26 H/W 12/13 Steve_Wang Resolve HDD_EN# have spike when power on Change R279 from 100K to 4.7K
42 39 H/W 12/13 Steve_Wang Change BID from X01 to X02 Unpop R469,R474; pop R470,R473
0.3
0.3
0.3
0.3
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
Changed-List History 3
54 59Friday, May 12, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
0.339 H/W 12/14 CoE C638 STUFFED Follow CoE M07_EC_Latitude_A0743
44 26 H/W 12/14 CoE Change HDD_EN# signal from ICH to SIO1.Change HDD_EN# from ICH to ECE5018 pin106.2.Add R644 to pull-up +3.3V_ALW3.Delete R279 to pull-down4.Rename signal at ICH to RSVD_HDDC_EN# and add Test Point
45 24,40 H/W 12/16 CoE SPI_CS# have spike over 4.5V when power on
0.3
Add R641,R642 damping to prevent. 0.3
46 31 H/W 12/19 MikeCC_Huang Measure SD EA find Data overshot,undershot over 3.3V Add R645,R646,R647,R648 damping to meliorate. 0.3
47 21 H/W 12/20 DELL +CRT_VCC current limit issue Add 1206 Res of R649. 0.3
48 28 H/W 12/21 DELL Fine tuning AUD_LINE_OUT signal Change C368 from 0.0047u(X5R) to 4700P(X7R) 0.3
49 24 H/W 12/21 DELL Follow DELL request Change R265 contact from R641 pin1 to pin2 0.3
50 27,28 H/W 12/21 DELL Follow DELL request Change Auido by-pass cap to X5R 0.3
51 18 H/W 12/21 DELL Follow DELL request Add VSET,LDO_SET note 0.3
52 21 H/W 12/21 COE Follow COE M07_CRT_LVDS_DVI rev A07schematic Add R650,R651 0.3
53 42 H/W 12/21 COE Follow COE M07_System power sequence_A07 schematic Add D24 for fast turn Off FET 0.3
54 43 H/W 12/21 COE Follow COE M07_System power sequence_A07 schematicChange Q63 from MMBT3904 to 2N7002 that ithas good margin to turn 0.3
55 28 H/W 12/22 COE Follow COE M07_AUDIO_A05 schematic Add EAPD signal & Q79 for power saving control 0.3
56 29 H/W 12/23 Crystal EA Follow vendor suggest to modify resistor to matchcrystal negative resistor EA
Change R334 from 200 to 330ohm 0.3
57 31 H/W 12/23 Crystal EA Follow vendor suggest to modify cap to matchcrystal EA
Change C424,C425 from 12P to 18P.
58 21 H/W 12/23 RGA EA For 1pix 1600x1200 rising/falling time over spec issue Change L18,L19,L20 from 60ohm to 22ohm
0.3
0.3
59 39 H/W 12/23 Crystal EA Follow vendor suggest to modify crystal Change Y1 from 24MHz_20pF to 24MHz_12pF 0.3
60 30 H/W 12/26 DELL Follow DELL resolution of test Media Slice,APR,DAPRreturn loss issue
1.Change R342,R343,R344,R345,R346,R347,R348,R349 from49.9 to 48.7ohm2.Change L39,L40,L41,L42,L43,L44,L45,L46 from 24NH to39NH
0.3
61 30 H/W 2/18 EMI EMI test ISN of LAN on 10/100 item fail.The solutionare pop C421,C422 and change C419~C422 character fromY5Vto X5R
1.Pop C421,C4222.Change C419~C422 character from Y5V to X5R
0.4
62 31 H/W 2/18 STEVE_WANG System can't boot issue. Unpop R609 0.4
63 28 H/W 2/27 DELL Follow DELL request to modify amplifier gain from10db to 15.6db for fix small sound on speaker issue
Unpop R311,R312; pop R310,R313 0.4
64 28 H/W 2/27 DELL Follow DELL request to modify cap value from0.047u to 4700p for best pop and click performance Change C367,C369,C371 from 0.047U to 4700P
0.4
65 9 H/W 3/2 DELL Follow Intel document to modify 330u 7mohm to 6mohm Change C41,C42,C43,C44,C705,C706 from 330U 7mohm to 6mohm 0.4
66 12 H/W 3/2 DELL Follow DELL request to add shunt caps between LVDS signal. Add 10P_0402 of C711,C712,C713,C714 0.4
67 32 H/W 3/6 DELL DELL support Express USB Card can't work on R5C843issue.
Add schematic ofU62,U63,U64,U65,C715,C716,C722,C723,R652,R654,R655 0.4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
Changed-List History 4
55 59Friday, May 12, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
0.439 H/W 3/7 DELL DELL support Express USB Card can't work on R5C843issue.
68
69 18 H/W 3/9 Thermal Modify OTP thermal shut down to 91 degree.
Reserve 0ohm of R653 for control Express card detect.
Change R157 from 41.2K to 68K 0.4
70 31 H/W 3/10 Mikecc_Huang SD bus signal overshoot/undershoot over spec. Add C717,C718,C719C720 0.4
71 27 H/W 3/10 SIGMATEL Follow sigmatel request to add cap for SENSE_A signal Add 1000P cap 0.4
72 28 H/W 3/10 SIGMATEL Follow sigmatel request to add NB_MUTE signal forcontrol MAX4411 shutdown.
Add Q80 of NB_SENSE signal to control MAX4411 shutdown 0.4
73 28 H/W 3/10 SIGMATEL Follow sigmatel request to add ESD diode for avoidHigh pol
Reserve D25 0.4
74 28 H/W 3/10 SIGMATEL Follow sigmatel request for MIC BIAS. Unpop R299,R300 0.4
75 35 H/W 3/10 DELL Modiy USB_BIO-/USB_BIO+ ESD IC to choke Add R657,R658; reserve L67,C724,C725; delete U55 0.4
76 35 H/W 3/10 Mikecc_Huang Advoid LID_CL# have some error on ALPS touchpad module. Add PJP13 0.4
77 32 H/W 4/10 Mikecc_Huang Result remove PCMCIA Card can't reduce default issue Add R659
78 41 H/W 4/10 DELL Improve LVDS for 3 dB (CDMA, GSM) at 1900 band Pop C575~C599Change C712,C713,C714 from 10P to 3.3P.
79 39 H/W 4/10 Steve_Wang Change Board ID from X02 to A00 Pop R473,R474,R471;unpop R469,R470,R475
80 6 H/W 4/17Steve_Wang Result WWAN noise issue
Change R35,R36,R32,R34,R605 from 15ohm to 39ohmChange R37,R38,R39,R48 from 33ohm to 56ohm
81 29 H/W 4/21 DELL Add cap for damp power-up surge current Add C726 of 4700P Cap.
82 6 H/W 4/28 DELL Result WWAN noise issue Unpop R561
83 6 ME 4/28 CT_Huang Avoid FPC easy to remove from connector Add JP6,JP10 that co-lay with JP4,JLED1
84 9 Power 4/28 Kenneth_Chang Result DC CPU noise Remove C24,C32,C695,C696,C701,C702
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
85 44 H/W 5/9 Steve_Wang Result HDD,Power,Battery Charger,Bluetooth,WLAN LEDlightness irregularity issue
Change R615,R543 to 51ohm,R540 to 47ohm;R542,R547to 330ohm,R551 to 56ohm
1.0
86 44 H/W 5/12 Steve_WangResult NUM,CAP,SCRL,Bluetooth,WLAN LEDbrightness irregularity issue
Change R545,R546,R547,R548 to 510ohm,R542 to 1Kohm 1.0
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
Changed-List History 2
56 59Friday, May 12, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
1 PWR 10/14 0.2For support Adapter 45W
51 Kenny Add PR154 154K_0402_1% (SD03415438L) connect net (ADAPT_TRIP_SEL) to PU9_2Add net name "ADAPT_TRIP_SEL"
2 51 PWR 10/14 Kenny Add PC135 0.01U_0603_25V (SD03415438L) connect FBSA to GNDFBSA of the MAX8731 for dV/dt filtering per DELL's recommendation
3
4
5
6
51
51
51
PWR
PWR
PWR
10/27
10/27
10/27
Kenny
Kenny
Kenny
Moved battery voltage feedback to charge states
Connected pins 15 and 16 together changed connection to +VCHGR.Add PR155
Added layout notes for PC135 and PC136
Adjusted the current setting of the "UL"circuit and added hysteresis
change value of the PR142 from 499K to 4.32M, change value of the PR148 from 33.2K to 27.4K
7
50
50
PWR
PWR
10/27
10/27
Kenny
Kenny
Adjusted the Load line setting change value of the PR108 from 249K to 12K, change value of the PR114 from 48.7K to 2.37KRemove PC93
Adjusted the transient setting Change value of the PR106 from511K to 392K, Change value of the PR114 from 82.5K to 160KAdd PC94 as originally 1000pF
0.2
0.2
0.2
0.2
0.2
847 PWR 10/31 Kenny
When AC souce plug in, the suson turn on about 120ms immediately.
Change value of the PR27 from10K to 0, Change value of the PR30 from 10K to 0.Add PR156 and PR157
947 PWR 11/02 Kenny
Remove PR156 and change PR157 location from PR30_1 to PR30_2.
10 51 11/02 KennyVcore noise issue and ME's high limit
Remove PC74 and add PCChange value of the PC79 from 1210 type to 1206, Change value of the PC80 from 1210 type to 1206
11 51
PWR
PWR11/07 Kenny Follow MAX8731 reference schematic of
A07 version
Add Table1 for ADP_OCP circuit.Modify value of PR147 from 59K to 56.2K
12 47 PWR11/07 Kenny
Follow TPS51120 reference schematic of A06 version
Change value of the PR27 from 0 to 10K, Change value of the PR30 from 0 to 10K.
13
14
51
51
PWR
PWR
11/29
11/29
Kenny
Kenny
Follow COE reference schematic of A09 version. PC135 may not be needed
Change PC135 to "NO STUFF"
Follow COE reference schematic of A09 version. PC138 may be needed
Add PC138
0.2
0.2
0.2
0.2
0.2
0.2
0.3
1551
PWR 12/12 Kenny Deeply discharged battery problem Add PR158 and PD19
0.3
0.3
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
Changed-List History 2
57 59Friday, May 12, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
1 PWR 12/15 0.3Resolve a Choke for Dual Core CPUKenny
Add PL17 and POP 4@ for Dual core50
2 46 PWR12/15 Kenny
Modify battery connecter the same pine length for P+ and GND
Change P/N form DC040001R0L to DC04000380L
3 51 PWR
PWR
12/20 Kenny
Kenny4
Add PC139 and PC140 for "NO STUFF"Solve Inaccuracte CP point for 65W adapter-in current
47TDC requirement Add PR159
5 50 PWR
12/20
12/20Kenny
We plan to add MOSFET for dual core CPU and have layout space limitation. So change PL13 size from 1810 to 1206.
Change PL13 size from 1810 to 1206.
0.3
0.3
0.3
0.3
Delay the 1.5VRUN to meet Intel spec for the 3VRUN vs 1.5VRUN specification.6
7
8
48
47
50
PWR
PWR
PWR
12/21
12/21
12/21
Kenny
Kenny
Kenny
Add PD20 and PC141
Change to 0 ohms for PR159
Del PR151 and PC83
GG Issue item 19
EMI test is ok, and have layout limitation issue for Dual core after adding low side MOS
9 49 PWR 12/21 KennyFollow MO7_DDRII_SC480_TPS51116_A04 circuit Change PR78 to 27.4K, PR77 to 17.4K.
0.3
0.3
0.3
0.3
10
11
12
47
48
49
PWR
PWR
PWR
12/22
12/22
12/22
Kenny
Kenny
Kenny
TDC requirementChange to 470K ohms for PR159
Follow M07_1_05V1_5V_SC483_TPS51483_A07 circuit
"NO STUFF" for PC141
Modify single and dual core note
0.3
0.3
0.3
13 50 PWR 12/23 Kenny TDC requirement Change PC90 from 680p to 390pF 0.3
14 50 PWR 12/26Kenny
Modify the Footprint for PQ16 0.3
15 PWR12/27 Kenny
47 Kemet CAP quantity issueChange from SGA00000N8L to SGA00001A8L for 2 pcs. (PC25)Change from SGA00000N8L to SGA1933131L for 2 pcs. ( PC23)
0.3
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
Changed-List History 2
58 59Friday, May 12, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
1 PWR 2/11Footprint error for PD20Kenny Modify footprint fron SOD323 to SOT323
48
2 51 PWR 2/11 Kenny Location error for MOSFET STUFF for PQ27, NO-STUFF for PQ16
3 50 PWR 2/20Kenny
The OCP setting is 20 A for Dual Core CPU Adding NO-stuff for 215K on PR104
0.4
0.4
0.4
4 50PWR
2/21 KennyThe load line is "-2.1m" for Dual Core CPU. Adding NO-stuff for 5.76K on PR114
5
6
48
49
PWR
PWR
2/22
2/22
Kenny
Kenny
CYNTEC is not on DELL's AVL
CYNTEC is not on DELL's AVL
Change the vender from DELTA to CYNTEC on PL9 and PL10
Change the vender from DELTA to CYNTEC on PL12
0.4
0.4
0.4
7 47 PWR2/22 Kenny
Follow COE schetmatic for A06 version Modify net name from +3.3V_ALW to +3.3V_RTC_LDO for PU7_PIN5 0.4
8 51 PWR 2/23 Kenny Follow COE schetmatic for A11 version Modify PQ18 and PQ19 from SI4825 to SI4835
9 47 PWR 2/24Kenny
No 2nd source for PC25 Change from SGA00001A8L to SGA1933131L for 2 pcs. (PC25)
0.4
0.4
10 47 PWR 3/6 Kenny+3.3V_RTC_LDO voltage drop issue Add PU10, PC143, PC142, PR160, PR162 and PR161 0.4
1145
PWR 3/8 Kenny +3.3V_RTC_LDO voltage drop issue Move PU10, PC143 and PC142 from page47 to page45
12 50 PWR 3/17 Mike Error description for Dual Core load line Dual Core Load Line change to 2.1mohm
13
0.4
0.4
0.547 PWR 4/25 Kenny +3.3V_RTC_LDO voltage drop issue change PR40 from 470K to 4.7K,
- change PR159 from 470K to 2.2M, - change PC32 from 0.1U to 0.01uF, - add UN-STYFF Schottky diode PD21 in parallel to PR159
14 48
15 49
PWR 4/25
PWR 4/25
Kenny
Kenny
Delta ckoke has dimension issue
Delta ckoke has dimension issue
Change the vender from CYNTEC to DELTA on PL9 and PL10
Change the vender from CYNTEC to DELTA on PL9 and PL10
0.5
0.5
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3071P 1.0
Changed-List History 2
59 59Friday, May 12, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
1 PWR 4/25CPU noise issue Kenny For Dual CPU: Modify PR101 from 10K to 20K
PC88 from 820P to 470P PC90 from 390P to 470P
500.5
2 50 PWR 4/28 Kenny CPU noise issue No STUFF PC80 for DUAL CORE CPUhe
xainf
@ho
tmail
.com