department of electrical and ecse-330b electronic circuits

Department of Electrical and Computer Engineering ECSE-330B Electronic Circuits I

BJTs 1

Outline of Chapter 5• 1- Introduction to The Bipolar Junction Transistor• 2- Active Mode Operation of BJT• 3- DC Analysis of Active Mode BJT Circuits• 4- BJT as an Amplifier• 5- BJT Small Signal Models• 6- CEA, CEA with RE, CBA, & CCA• 7- Integrated Circuit Amplifiers


BJTs 2

CBA with ro (Resistance Coupling C-E)

α==in

outIS i

iAShort circuit current gain

COUT RR =

Open circuit voltage gain Cm

in

outVO Rg

vvA ==

eIN rR =

• Original results neglecting RS, RL, & ro:


BJTs 3

CBA with ro-Voltage Gain

( )Coo

mVO Rrr

gA ⎟⎟⎠

⎞⎜⎜⎝

⎛+=

1

Large ro has little effect on gain

Inputbe vv −=

0)(

=+−

+C

Output

O

InputOutputbem R

vr

vvvg

0)(

=+−

+−C

Output

O

InputOutputInputm R

vr

vvvg


BJTs 4

CBA with ro Short-Circuit Current Gain

o

e

o

e

in

outIS

rr

rr

iiA

+

+==

1

α

If ro is large, it will have little effect on the overall gain

iX

Oxee riri =

0=++ Outputxe iiiα

0=−−− xeInput iii


BJTs 5

CBA with ro-Input Resistance

( )⎥⎦

⎤⎢⎣

⎡⎟⎟⎠

⎞⎜⎜⎝

⎛+−= LCo

omoeIN RRr

rgrrR 11

If ro large, has little effect

+

-VIN

IIN

INININ IVR /=

IX

0=−+ Xe

beIN I

rvI

beIN vV −=

0=−+− YXbem IIvg

IY

0)//( 0 =++ beXLCY vrIRRI


BJTs 6

CBA with ro-Output Resistance

If ro large, has little effect

( )( ) 21

//// ' oC

Sem

SeoCOUTCOUT

rRRrg

RrrRRRR ≈

++

==

VOut IOut

OutOutOut IVR /' =

R’Out

IX0=+−− XbemOut IvgI

0

))((r

vVI beOutX

−+−=

0=−+ XS

be

e

be IRv

rv


BJTs 7

CCA Operation – Voltage Buffer• Good voltage buffer

– The VOLTAGE gain is almost unity, and the DC component is only reduced by 0.7V

– Large short circuit current gain

– High input resistance (which reduces loading to the circuits before)

– Low output resistance (which reduces the loading to the circuits after)


BJTs 8

CCA with ro– Voltage-Gain Analysis

⎟⎟⎠

⎞⎜⎜⎝

⎛+ΩΩ

=eo

oinout rkr

krvv4//

4//

+

- -+

Since re small, Almost vout=vin

Voltage Division:


BJTs 9

CCA with ro - Input/Output Resistance• Input Resistance; by

inspection using β+1 rule:

RIN

HIGH INPUT RESISTANCE

• Output Resistance, vin= 0

EoeOUT RrrR ////=

ROUTLOW OUTPUT RESISTANCE

( )( ){ }EoeIN RrrkR //1//8 ++Ω= β


BJTs 10

( )( ){ }LEoeIN RRrrkR ////1//8 ++Ω= β

CCA with ro , Source and Load

EoeS

OUT RrrkRR ////1

8//⎟⎟⎠

⎞⎜⎜⎝

⎛+

+Ω

=β ROUT

RIN


BJTs 11

CEA with RE- Internal Feedback• Consider the small-signal

T-model for the CEA configuration

• Base is input, collector is output

• re (or rπ – in Hybrid-πmodel) AND ro both represent internal feedbacks from output to input; if emitter is grounded, feedback broken; if RE is present, feedback exists.


BJTs 12

Internal Feedback – Summary• CBA configuration:

– ro produces internal feedback between C & E terminals

• CCA configuration:– rπ or re produces internal feedback between B & E terminals

– expect effects to be weak since ro large

– expect strong effect on RIN & ROUT

• CEA with RE amplifier configuration:– ro provides internal feedback between E & C terminals

– expect weak effects since ro large (More in EC2)– occurs because emitter not at signal ground

• CEA (no RE) amplifier configuration:– no internal feedback between B & C terminals


BJTs 13

Multistage Amplifier – DC Analysis• Cascade of C-E stages• Output of Q1 stage is

direct-coupled (DC) to input of Q2 stage

• Coupled DC analysis!


BJTs 14

Multistage Amplifier – RIN & ROUTFind: RIN1, RIN2,

ROUT1, ROUT2, AVO1, AVO2


BJTs 15

Outline of Chapter 5• 1- Introduction to The Bipolar Junction Transistor• 2- Active Mode Operation of BJT• 3- DC Analysis of Active Mode BJT Circuits• 4- BJT as an Amplifier• 5- BJT Small Signal Models• 6- CEA, CEA with RE, CBA, & CCA • 7- Integrated Circuit Amplifiers


BJTs 16

Integrated Circuits• Concept:

– Integrate multiple transistors and passive components (R’s and C’s) on a single chip

– Circuit performs application-specific function (ASIC)

– Physically smaller, faster

• Issues:– Limited area available– Size of R’s and C’s limited

• Coupling capacitors:– On-chip: ~ pF’s only– Off-chip: ~ μF’s

• Resistors: – Pure resistors are difficult to

make on an IC– Process variations

– Alternative: a transistor


BJTs 17

Active Loads• Replace RC with

PNP transistor, Q2

• Q2 base held at constant voltage.

• Q1 load resistance becomes ro of Q2.

Q2

Q1Q1


BJTs 18

CEA Gain with Active Load

( )21 oomV rrgA ⋅−=

T

Cm V

Ig =C

Ao I

Vr =

T

AV V

VA⋅

−=2


BJTs 19

Current Mirrors• CBA and CCA conveniently

biased with current sources

• On an IC, a current source is implemented using transistors

• IREF can be implemented off-chip, resistor

• Transistor Q2 pulls current from attached circuit

• Collector current of Q1 and Q2 identical because of VBE is the same (ro neglected)

Pulled fromCircuit

I

Q1 Q2


BJTs 20

Current Mirror DC Analysis• Neglect ro (in EC1 DC analysis)

and assume Q1 and Q2 active• If Q1 has a collector current of I,

then there must be a base current of I/β.

• This sets-up a Q1 VBE1 that is “mirrored” across to the base emitter of Q2, VBE2.

• VBE2 draws a current of I from the Q2 collector.

βIIIREF 2+=

β21

1

+=

REFII

Pulled fromCircuit

Q1 Q2


BJTs 21

Current Mirror DC Analysis

I


BJTs 22

Current Mirror AC Analysis

VC1 &VB1 VB2 VC2

VE1VE2

Impact of current mirror is to add a load ro to circuit that is drawing current

Note: In AC analysis ro is included


BJTs 23

Current Mirroring – Multiple Copies

• Can make many copies of reference current• Each copy adds another base current draw,

reduces IREF – I matching

β11

1+

+= NI

I

REF


BJTs 24

Current Mirroring – Scaling• Can produce multiples of I by

connecting transistors in parallel• However, the output resistance is decreased

by a factor


BJTs 25

Current Mirroring – Pushing and Pulling

Note: β is assumed to be very large thus the current pushed to circuit B is approximated equal to 2I. The exact answer is 2I/(1+2/β)


BJTs 26

Outline of Chapter 5• 1- Cut-off and Saturation Modes• 2- Digital Circuits


BJTs 27

The npn BJT Operational Modes

B-E Junction B-C JunctionCutoff reverse reverseActive forward reverse

Saturation forward forwardReverse Active reverse forward

4 Modes of operation

EMITTER BASE COLLECTOR


BJTs 28

Cutoff Mode

• Cutoff mode:– B-E pn junction

reverse-biased– B-C pn junction

reverse-biasedI (small) I (small)




• Drift currents:–From E to B–From C to B

• Reverse-bias drift currents are SMALL


BJTs 29

Saturation Mode





BJTs 30

Saturation Mode – Operation (1)

• Saturation mode:– B-E pn junction

forward-biased– B-C pn junction

forward-biased

• Electron diffusion current from E to B– Base recombination– Traverses base

into collector

• Electron diffusion current from C to B– Base recombination– Traverses base

into emitter

I (large) I (large)

0.7 0.5


BJTs 31

Saturation Mode – IC, IB, and IE

• β (and α) as we know it only applies in active mode

• “new” β (βforced) set by external components

VV SATCE 2.0=−

BCE III +=B

Cforced I

I=β


BJTs 32

Saturation DC Analysis• For RC = 5kΩ, BJT enters saturation• Apply voltage drop criteria, solve

for currentsmA

kIE 303.1

3.357.0=

+−=

mAk

IC 1.15

5.05=

+=-0.7V

-0.5V

AIII CEB μ203=−=

βμ

β <<=== 4.5203

1.1 mII

B

Cforced


BJTs 33

Comments

• βforced << β in saturation• Current directions (IC, IB, IE)

same as for active mode• All concepts & expressions

same for PNP in saturation

VV SATEC 2.0=−

BCE III +=B

Cforced I

I=β


BJTs 34

CEA as an Inverter• The large negative voltage gain of

the CEA was:

• This produces a sharp linear region that describes Vout/Vin for device in active-mode.

• Max. output (cut-off) and min. output (saturation).

• Through analysis, we can describe the Voltage Transfer Characteristic (VTC)

( )Combe

outVO Rrg

vvA −==


BJTs 35

CEA Inverter

• When VIN = 5– BJT is in saturation– VOUT = 0.2

SATCEOL VV −=CCOH VV =

• When VIN = 0– BJT is in cutoff– IC = 0– VOUT = VCC


BJTs 36

CEA Inverter - VIL

• BJT remains in cutoff until VIN ≈ 0.7V, then enters active mode because B-E junction goes into FWD bias

• As VIN rises in active mode, VOUT decreases

VVIL 7.0≈

( )CbemOUTINB

be RrvgvvRr

rv //0−=+

=π

π

( ) ( )CB

CB

m

IN

OUTV Rr

RrRr

Rrrg

vvA //// 00 +

−=

+−

==ππ

π β


BJTs 37

CEA Inverter - VIH

• To find VIH:– Must use the “Edge-of-

Saturation” (EOS)– The Max. IB at the threshold of

Active/Sat. defined as IB-EOS

C

SATCECCSATCEOSB R

VVIIββ

−−−

−==

BBIN RIV += 7.0

BC

SATCECCBEOSBIH R

RVVRIVβ

−−

−+=+= 7.07.0


BJTs 38

CEA Inverter Voltage Transfer Characteristic (VTC)

Consider VCC=5V, RB=10kΩ, RC=1kΩ, β=100, VA=100V

VVOH 5=

VVIL 7.0≈ VVOL 2.0≈

VVIH 18.1=

Hand-analysis: VTC (simulation)

Asymmetric VTC

VNM H 82.3= VNM L 5.0=

Noise margins:BEOSBIHOHH RIVVCCVVNM −−−=−= 7.0

VVVVVNM SATCEOLILL 5.07.0 =−=−= −


BJTs 39

Resistor-Transistor Logic (RTL) Inverter

RC

VCC

VIN

RB

VOUT

VCC = 3VRC = 640ΩRB = 450Ω

• Popular technology in 1960’s

VVOH 3=

VVIL 7.0≈ VVOL 2.0≈

VVIH 72.0=

VNM H 28.2= VNM L 5.0=

• Using equations:

• Why is NMH >> NML?– Fanout considerationsMore in EC2

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