dependable communication synthesis for distributed embedded systems

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Dependable communication synthesis for distributed embedded systems. Nagarajan Kandasamy, John P. Hayes, Brian T. Murray Presented by John David Eriksen and Jamie Unger-Fink. Overview. Real-time distributed systems Network Sensors Processors Actuators Requirements - PowerPoint PPT Presentation


  • Dependable communication synthesis for distributed embedded systemsNagarajan Kandasamy, John P. Hayes, Brian T. Murray

    Presented by John David Eriksen and Jamie Unger-Fink

  • OverviewReal-time distributed systemsNetworkSensorsProcessorsActuatorsRequirementsStrict performance targetsFault-toleranceSafety-critical operation

  • Related WorkNetwork ProtocolsController Area Network protocol (CAN)Common protocol used in embedded systems networks.Messages scheduled using variable priority levelsTime-Division Multiple Access (TDMA)Time-multiplexed frame-based protocolNetwork topology considerationsFixed network topology assumptionSynthesize topology given application requirementsCan be accomplished using a task graph modelCan be accomplished assuming a CAN or TDMA network protocol

  • TDMA OverviewTime-Division Multiple Access (TDMA) communication protocolFaster than CANUsed in this paper TTP and FlexRay networking protocols

  • TDMA in FlexRayA round is a set of identical-sized slots determined by a given communication schedule.A processor Pj is allocated one or more sending slots during a round.Number of slots and size of slots determined by designer.A processor can only place messages in the slots allocated to it.

  • Topology OverviewTopology restricted to multiple-bus systemsMultiple-buses used for fault tolerance and to spread larger communication loads network media typically low-bandwidth and inexpensive.Each processor connects to subset of communication busesCoprocessor attached to each processor handles message communication without interrupting process execution

  • Summary of ApproachTarget: a low-cost and reliable communication network

    Use a set of distributed applications modeled as task graphs {Gi}.

    Allocated messages to minimum number of buses {Bj} where each Bj has a fixed bandwidth.

  • Summary of ApproachTarget a generic TDMA protocol (FlexRay)

    Assume a multi-rate system where each graph Gi may have a different execution period period(Gi)

    Support dependable message communication by establishing redundant transmission paths between between processors.

    Maintain efficient network usage by reusing transmission slots allotted to a given processor between multiple messages sent by it.

  • Topology DevelopmentHow is final number of necessary buses determined?Initially, each message is assigned its own bus.Iterative clustering heuristic used to minimize the number of buses used.Clustering is NP-completeClustering heuristic SYNTH({mi}) used instead

  • Topology Development

  • Message ClusteringSYNTH({mi})Cluster synthesisGroup message mi with existing cluster Cj if:No two replicas of one k-FT message is allocated to CjAll messages in Cj continue to meet deadlines.Length of Cj communication schedule does not exceed application specifications.Memory size of Cj communication schedule must fit in memory size of communication network co-processor.This grouping process is considered to be a bin-packing problem (NP-Complete) so a heuristic used.Results in efficient use of bus bandwidth through sharing and re-use of transmission slots between multiple messages whenever possible.Each cluster assigned to separate bus in final topology.

  • Task Deadline AssignmentTask scheduling range [ri, di]ri Release (start) timedi DeadlineDeadline computation NP-CompleteHueristic used instead (Natale and Stankovic)

  • Task SchedulingInitial task graph with execution times parenthesized and fixed execution period of 2000 microseconds.Path selection and slack allocation.Path {T1,T2,T4,T5} scheduled and removed. {T3} then scheduled.Final release/deadline scheduling range.

  • Task SchedulingTasks assigned priorities according to the parameters of their schedule (release time and deadline)A processor executes the highest-priority task that has been released for executionFeasible only if:All tasks can complete by their deadlinesAll messages can be received by their deadlines

  • Case StudyApplications modeledAdaptive cruise control - Maintain safe following distance behind moving carElectric Power Steering - Provide steering assistanceTraction Control - Maintain intended path on slippery terrain

  • Case Study ParametersBus bandwidth of 250 KB/sTransmission slot width of 50 microsec.Max number of slots 16Slot reuse on or offRound lengths fixed at three different sizes: 12, 16, and 10. Round lengths are harmonic multiples of three base periods: 3, 4, and 5.

  • Case Study ResultsNo slot reuse yielded designs with less free slots that can be used for non-critical messages.Slot reuse yielded more free slots.Optimal solution used a period base 4 and yielded solution with three buses and plenty of free slots.

  • ConclusionSynthesis of low-cost TDMA communication network for distributed system showed to be feasible.Proven via formal mathematical proofs.Demonstrated via realistic case study.Future work:Message scheduler on co-processors not part of this design.Fault-tolerant allocation of tasks to processors not addressed.


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