des0239 7-18-14

.

Production BoardEP10xxA & EP20xxA 1.1

(DES0239)User Manual

Developing Embedded Applications and Products Utilizing FreescaleTM QorIQTM

Integrated Multicore Communication Processors

Production Board, EP20xxA

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Copyright © 2014 Embedded Planet, Inc. All Rights Reserved.

This manual is copyrighted by Embedded Planet, Inc. No part of this document may be copied or reproduced in any form or by any means without the express written permission of Embedded Planet, Inc.

Embedded Planet, Inc., reserves the right to modify the information contained herein as necessary. Embedded Planet assumes no responsibility for any errors which may appear in this document. Information in this document is provided solely to enable system and software implementers to use Embedded Planet products.

This manual in whole or in part, is to be considered the intellectual property of Embedded Planet. This document is intended for the sole purpose of the owner of an Embedded Planet product. Neither the document, nor reproductions of it, nor information derived from it is to be given to others, nor used for any other purpose other than for development of Embedded Planet computing engine applications, by original, authorized owners of Embedded Planet products.

Embedded Planet, Linux Planet, Blue Planet, RPX LITE, and RPX LICC are trademarks or registered trademarks of Embedded Planet.

AdvanceTCA and ATCA are registered trademarks of PCI Industrial Computer Manufacturers Group (PICMG). AdvancedMC and MicroTCA are trademarks of PICMG.

Freescale, QorIQ, PowerQUICC, and QUICC Engine are trademarks of Freescale Semiconductor, Inc.

RapidIO is a registered trademark of the RapidIO Trade Association.

Wind River Systems, VxWorks, and Tornado are registered trademarks of Wind River Systems, Inc.

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Notice

Trademarks

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All other names and trademarks are the property of their respective owners and are hereby acknowledged.

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Chapter 1 - Introduction.................................................................................................................................... 9Functions...........................................................................................................................9First Steps........................................................................................................................10How to Use this Manual...................................................................................................10About Embedded Planet..................................................................................................10

Customer Support...............................................................................................11Contact Embedded Planet...................................................................................11

Document Conventions...................................................................................................12

Chapter 2 - Description.................................................................................................................................... 15QorIQ Processor...............................................................................................................18DDR3 SDRAM Organization..............................................................................................19FLASH Organization.........................................................................................................19I/O Interface Signals.........................................................................................................20I2C Devices.......................................................................................................................20Thermal............................................................................................................................20Firmware..........................................................................................................................20

Restoring MAC Addresses...................................................................................20

Chapter 3 - Getting Started............................................................................................................................. 23Serial Monitor Connection...............................................................................................23Network Connection .......................................................................................................23Power Up.........................................................................................................................24

Chapter 4 - Setup................................................................................................................................................ 25Boot Configuration..........................................................................................................25Reset Configuration Word...............................................................................................25SerDes Port Configuration...............................................................................................26SRIO Host or Agent Configuration....................................................................................26JTAG/COP Mode Select....................................................................................................26

Chapter 5 - Connectors and Headers...........................................................................................................29Power...............................................................................................................................29Power Connector.............................................................................................................29EBC Bus............................................................................................................................29Trace and JTAG/COP Port................................................................................................30Monitor Port....................................................................................................................30USB Port...........................................................................................................................31Ethernet Port...................................................................................................................31Expansion Bus Connector................................................................................................32

Chapter 6 - Operation............................................................................................................................. 33

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System Reset...................................................................................................................33Board LEDs.......................................................................................................................33Ethernet Port LEDs...........................................................................................................34User Switch......................................................................................................................34RS-232 Connection...........................................................................................................34User Applications.............................................................................................................34

Chapter 7 - Board Control and Status Registers......................................................................................35

Chapter 8 - I2C Devices and Addressing.....................................................................................................41SEP Interface Structure....................................................................................................41

Restoring the Boot EEPROM...............................................................................41SRTC Interface Structure..................................................................................................41

Chapter 9 - Memory and Interrupts.............................................................................................................43Memory Map...................................................................................................................43External Interrupts...........................................................................................................44

Appendix A: Mechanical Dimension............................................................................................................47

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TABLE 1-1. HARDWARE FEATURES...........................................................................................................9TABLE 1-2. REFERENCE DOCUMENTS......................................................................................................13TABLE 2-1 BOARD CLOCKS...................................................................................................................15TABLE 4-1. CONFIGURATION SWITCH (SW-CFG1)...................................................................................25TABLE 4-2. BOOTSTRAP CONFIGURATION (SW-CFG1)..............................................................................25TABLE 4-3. JTAG/COP CONFIGURATION (J1).........................................................................................26TABLE 5-1. POWER CONNECTOR PINOUT (J7).........................................................................................29

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Production Board, EP20xxA Chapter 1 – Introduction

No table of figures entries found.In your document, select the words to include in the table of contents, and then on the Home tab, under Styles, click a heading style. Repeat for each heading that you want to include, and then insert the table of contents in your document. To manually create a table of contents, on the Document Elements tab, under Table of Contents, point to a style and then click the down arrow button. Click one of the styles under Manual Table of Contents, and then type the entries manually.IntroductionThe EP10xx/EP20xx board is a highly integrated single-board computer (SBC) based on one of six possible Freescale PowerPC 20xx or 10xx processors. This EP board is a small form factor development board with PCI-Express functionality.

FunctionsThe functions included on the EP board are listed in Table 1-1.

Table 1-1. Hardware Features

Entity DescriptionForm factor -EP custom form factor 56 X 90mm

(2.205’’ X 3.543’’)-Fanless design

Processor PowerPC QorIQ P10xx or P20xx x64 depending on configuration (up to 1.33 GHz)

Memory Up to 1 GB x32 DDR3 SRAM @ 667MHz or 800MHz depending on board configuration, SODIMM1

NOR FLASH x16 up to 128 MBMicroSDSerial port (RJ-45) UART1, EBC RJ-45Ethernet Onboard SGMII Ethernet via RJ45

connector1 x 10/100/1000 BASE-T, Port0 EBC connector via RGMII, disables above Ethernet

GPIO Signals brought out to EBC bus

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Chapter 1 - Introduction Production Board, EP20xxA

Entity DescriptionSerDes -4 SerDes lanes available via EBC

connector, and dependent on CPU for available features:

-PCI ver.2.0 up to 2.5Gbps-SRIO ver.? up to 3.125Gbps-SGMII, Ethernet Controller

I2C Serial EEPROM – user/boot @ address 0xA0, 0xA2Serial EEPROM – boot @ address 0xAC, 0xAESerial temperature @ address 0x90Serial real-time clock @ address 0xD0

SPI Direct connection to user via EBC connector

BCSR Board control and status registers (CPLD)

LEDs Power, status, reset, 2-user programmable via control register

Debug 16-pin JTAG/COP port access for software debug and programming (requires adapter)Aurora high speed serial debug link

Power Requirements 3.3 VDC stand-alone 2x3 headerOperating Temperature2 -40° C to 85° C

NOTES: 1. Contact Embedded Planet for information about an industrial

temperature version board.2. No serviceable parts.

First StepsWhile it may be tempting to jump right into application development, it is recommended that you take a few minutes to review the Getting Started material, paying special attention to the following recommended first steps. Complete the steps in Chapter 3 when ready to connect and power up the EP board for development.

How to Use this Manual1. Refer to Chapter 2 for a description of the board features

and functions.

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2. Refer to Chapter 3 for quick start information: connection, configuration, and power up.

3. Refer to Chapter 4 for setup information including switch settings.

4. Refer to Chapter 5 a description of the connectors and headers available on the board.

5. Refer to Chapter 6 for information about the operation of this EP board.

6. Refer to Chapter 7 for board control and status register (BCSR) programming information.

7. Refer to Chapter 8 for programming information for the onboard I2C devices.

8. Refer to Chapter 9 for memory map and interrupt information.

About Embedded PlanetEmbedded Planet is a leading single board computer and embedded systems solution provider. Our capabilities range from standard off the shelf single board computer products and embedded operating systems to full custom design and intellectual property solutions.

In 1997, Embedded Planet pioneered the Design, Develop, Deploy process for embedded systems engineering. This process allows our customers to take advantage of production tested, reusable product designs in all phases of system development to reduce time to market, project risk, and development costs.

Design Embedded Planet products help remove risk and shorten the design cycle through production tested, integrated hardware and software designs. CPU module design is becoming more complicated with advanced memory interfaces and highly integrated communications processors. Our production proven modules help OEMs eliminate the risky and time intensive design and verification of the CPU module and focus on their value added application.

Develop Embedded Planet products provide early access to production modules for all members of the engineering team to allow for a parallel development path. Soft- ware developers get access to turnkey platforms with the operating system of their choice ready to run out of the box. Hardware developers gain access to production designs and prototyping systems to test advanced system functionality. Fully integrated software and hardware platforms simplify and shorten the development cycle.

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Deploy Embedded Planet products are ready to go to market today. Our designs are production proven and ready to be manufactured in quantity. We offer full lifecycle management to simplify the deployment of your embedded solution.

Customer Support

Embedded Planet provides complete support for our product line. Embedded Planet technical support includes product assistance for EP firmware and hardware. Technical support can assist with setup, installation, configuration, documentation, product related questions, and expansion guidelines. Second level software support for SDP’s is handled through our partners. We also provide development tools for all of our PowerPC boards.

Using our online support system our technical support engineers can assist you with questions regarding Embedded Planet products. Via a browser our support team can access your system directly and quickly answer your technical questions. Please contact us today to learn more; refer to Contact Embedded Planet in this chapter.

Contact Embedded Planet

Embedded Planet4760 Richmond Road, Suite 400, Warrensville Heights, OH 44128 Phone: 216.245.4180Fax: 216.292.0561

www.embeddedplanet.com

Company E-mailDirectory Marketing: [email protected]

Sales: [email protected] Request: [email protected] Technical Support: [email protected]: [email protected]

Document ConventionsThis document uses standard text conventions to represent keys, display items, and user data inputs:

Display Item Italic - Identifies an item that displays on the screen such as a menu option or message (e.g., File > Open).

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mailto:[email protected]





http://www.embeddedplanet.com/


User Data Input Bold - Identifies any part of a command or user entry that is not optional or variable and must be entered exactly as shown.Italic - Identifies any part of a command or user entry that is a variable parameter. [ ] - Identifies any part of a command or user entry that is an optional parameter; text within the brackets follows the previously described conventions.KEY - Identifies a specific key that is not alphabetic, numeric, or punctuation:

Press ENTERPress ESC V M (press and release each key in sequence)Press CTRL-ALT-DEL (press all keys in sequence simultaneously).

File Name Name - Indicates a file or directory name. Example:

file.h/bin

Table 1-2 lists reference documents for the board.

Table 1-2. Reference Documents

Document Number DescriptionP700D0107R00 EP10xx/20xx User ManualEREF_RM EREF_RM, EREF: A Programmer’s Reference

Manual for Freescale Power Architecture Processors – Reference Manual

P1011EC P1011 QorIQ Integrated Processor Hardware Specifications – Data Sheets

P1011RM P1011 QorIQ Integrated Processor Reference Manual






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Document Number DescriptionP2020EC P2020 QorIQ Integrated Processor Hardware

Specifications – Data SheetsP2020RM P2020 QorIQ Integrated Processor Reference

Manual

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Production Board, EP20xxA Chapter 2 - Description

Chapter 1 - Description

This chapter provides some description of the EP10xxA/P20xxA board features including the QorIQ processor, external interfaces, and u-boot firmware. Figure 2-1 is a simplified block diagram of the EP board. Figure 2-2 shows the top view of the board layout. This figure shows the headers unpopulated (i.e., without pins or connectors).

Processor Refer to QorIQ Processor in this chapter.

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Chapter 2 – Description Production Board, EP20xxA

Table 2-3. Clock subsystem block diagram

Clocks All clocks used on the EP board are generated locally and user-ready. Therefore, the user is not required to make any additional adjustments to operate the EP board. There are a few distinct clocking environments on the board:

System clock. Ethernet clock. SerDes clock.Table 2-4 Board Clocks

Speed Device66.66 MHz System Clock (Y1)32.768 MHz Real-Time Clock (Y2)

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26 MHz Onboard USB 1 (Y4)25 MHz Ethernet PHY Clock100/125 MHz SerDes REF clock (Y5)125 MHz RGMII Clock (Y6)

An onboard clock oscillator provides the system clock (SYSCLK) input to the processor and various internal PLLs will generate the required clocking for the CPU peripherals. See figure 2-1 for the clock locations and names.

Power A 2 x 3 header or expansion bus connector connects a 3.3 VDC to power the board.

Memory The board supports two Micron MT41J256M4 DDR3 SDRAM parts at 667MHz for P10xx boards or 800MHz for P20xx boards using a dedicated DDR3 interface. The SDRAM will support up to 1 GBytes of data via a 32-bit bus width. There is no ECC option. Refer to SDRAM Organization in this chapter for additional information.

Ethernet One dedicated RGMll to 10/100/1000BASE-T Ethernet port is available on the expansion bus connection (EBC) depending on the processor. One SGMII Ethernet port connected to an onboard PHY is available via onboard RJ45 or SGMII to EBC.

The board supports numerous hardware configurations. In all cases, PHY to a protocol 1588 and at least one RGMII Ethernet interface are available through the expansion bus connection (EBC). The PHY Ethernet port with SGMII interface communicates via TSEC port 1 on the processor, disabling the onboard RJ-45 connector also available. The dedicated RGMII to Base-T Ethernet port(s) communicate via TSEC port 2 of the processor. Both ports each use a Marvell® 88E1512 transceiver device; the interface to the processor is RGMII.

An SBM management connection (MDC/MDIO) to the processor is for configuration and monitoring of the transceiver devices. The default Ethernet PHY addresses is 0x0 (VSS) unless the design is custom configured to a default value of 0x1.

The interface to the RGMII port(s) is 10/100/1000 Mbps (10/100/1000BASE-T). The interface to the PHY is SGMII for 1 Gbps Ethernet (1000BASE-BX).

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BCSR Board control and status registers (BCSR) provide hardware control and status to the processor. BCSR bits selectively enable/disable and configure board features, and control LEDs, read switch settings, and provide status indications. The BCSR registers of the EP board are implemented in control logic within a complex programmable logic device (CPLD). Refer to the Chapter 7 for BCSR programming information.

EEPROM The board has two Atmel AT24C EEPROM. One EEPROM is adjusted for configuration settings and the other is designed for the user. Both are connected to the primary I2C bus with the user EEPROM located at 0xA0 (or 0xA2?)and the configuration EEPROM at 0xAE (or 0xAC?). Both these addresses are hard-wired and cannot be modified. The EEPROM also allows for data write protection (Table 7-3).

USB The EP10xx/20xx supports both host and device USB 2.0 devices. The micro USB 2.0 host is built into the CPU and includes onboard enhanced host controller interface (EHCI) and ULPI to PHY interfaces. The micro USB 2.0 device requires an external PHY placed on the external board and proper signaling to and from the board.

RS-232 There is one RS-232 serial port available through a micro-USB connector. The port communicates via UART0 of the processor. The serial ports use Silicon Labs CP2102 single chip USB transceivers or equivalent.

STTM There is one serial temperature and thermal monitor (STTM) device on the local I2C port 0 bus; refer to Table 2-3 for its I2C address. The STTM is an Analog Devices AD7414 2-wire, digital temperature sensor. The minimum resolution provided by this part is a 10-bit temperature conversion.

SRTC There is one serial real-time clock (SRTC) device on the local I2C port 0 bus; refer to Table 2-3 for its I2C address. It provides clock and calendar functions for the board. Counters for tenths/hundredths of seconds, seconds, minutes, hours, day, date, month, year, and century are provided. Its functionality is equivalent to the STMicrodevices M41T81 part.

JTAG/COP The J4 header provides access to the COP port of the processor for debug access. Additionally J4 can be configured with jumper settings to give access to the CPLD JTAG. Refer to JTAG/COP Mode Select in Chapter 4.

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Expansion Bus ConnectorOn the EP10xx/20xx board, a Molex or Samtec 300-pin connector is used to provide signaling off-board (EP102.271). Designed as a direct interface to the EP10xx/20xx board, the 10 × 30 connector contains address, control and data signals for general connectivity, but it also provides several specialized signal groupings such as the clock, UART, SerDes x4, RGMII, SGMII, GPIO, I2C/SPI, MDC/MDIO, NAND FLASH I/F/LGPL, interrupts signals, and power signals.

I/O The board has:

One expansion bus connector which provides address, data memory control, clocking, UART, RGMII, SGMII, GPIO, I2C/SPI, MDC/MDIO, NAND FLASH I/F/LGPL, SerDes x4, interrupts signals, and power signals.

One dedicated micro-USB 2.0 connector. The serial port communicates via UART0 of the processor and uses a CP2102 RS-232 transceiver.

One JTAG/COP port header for debugger and CPLD programming use.

Refer to Chapter 5 for more information and pinouts for the connectors.

QorIQ ProcessorThe EP board incorporates a QorIQ P20xx or QorIQ P10xx communications processor depending on board configuration. This 36-bit processor includes two Power Architecture™ e500 cores and peripheral interfaces that can be used for combined control, data path, and application layer processing. The P20xxprocessor incorporates:

One or two high-performance e500 cores at up to 1.33 GHz.

64-bit (72-bit with ECC) DDR3/3L memory controllers at up to 1.3 GHz data rate.

Three 10/100/1000 Mbps enhanced three-speed Ethernet controllers (eTSECs)

Ethernet interfaces: 10 Gbps Ethernet and 1 Gbps Ethernet controllers.

4 SerDes to 3.125 GHz multiplexed across controllers. Enhanced local bus controller

(eLBC).

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Two I2C controllers, SD/MMC, SPI, DUART, I2C, USB 2.0 with integrated PHY.

Multicore programmable interrupt controller (PIC). Two four-channel DMA controllers.

DDR3 SDRAM Organization1 GByte 1024 Mbit (256M x 16 bit) devices

2 Micron MT41J256M1632 Mbytes x 8 banks x 16 bits= 1024 Mbytes total3 bit bank address at 8 (BA0-BA2)13 bit row address at 32k (A0-A12)10 bit column address at 1k (A0-A9)

FLASH OrganizationThis section summarizes the FLASH memory device currently used on the EP10xx/20xx board. Refer to the Spansion MirrorBit data sheet for detailed information about this FLASH memory device. Figure 2-4 shows the address and data line connections. An offset is needed when issuing commands to the FLASH device due to the address line connections. Table 2-2 lists the FLASH memory devices IDs.

CAUTION: The FLASH memory device is subject to change depending on the availability of memory devices. Please refer to Spansion’s S29GL-P MirrorBit Flash Family data sheet before implementing the below values.

Table 2-5. FLASH Device ID

Device MFG ID Device IDS29GL01GP 0x0001 0x7E2801S29GL512P 0x0001 0x7E2301S29GL256P 0x0001 0x7E2201S29GL128P 0x0001 0x7E2101

The following guidelines apply to x16 ported FLASH memory:

FLASH device configured in 16-bit mode. Sector and chip erases should be performed only on a

word (16-bit) basis. Programming should be done on a word (16-bit) basis if

possible.

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I/O Interface SignalsTable 2-3 lists the I/O interface output signals via the expansion bus connector (EBC) on the EP20xxA board.

Table 2-6. I/O Signals

Interface SignalSerial UART1_SOUT01

UART1_SIN01 UART 1CTS UART 1RTSUART2_SOUTUART2_SIN

I2C IIC2_SDAIIC2_SCL

SPI SPI_MOSISPI_MISOSPI_CLK

SPICS [0]SPI_CS[0]_B/SDHC_DATA04SPI_CS[1]_B/SDHC_DATA05SPI_CS[2]_B/SDHC_DATA06SPI_CS[3]_B/SDHC_DATA07

Ethernet EC_MDIOEC_MDCOFF_BRD_EC_GTX_CLK125TSEC_1588_CLK_OUTTSEC_1588_TRIG_IN1TSEC_1588_TRIG_IN2TSEC_1588_ALARM_OUT1TSEC_1588_ALARM_OUT2TSEC_1588_PULSE_OUT1TSEC_1588_PULSE_OUT2TSEC2_RX_CLKTSEC2_GTX_CLKTSEC2_TX_ENTSEC2_TXD0TSEC2_TXD1TSEC2_TXD2TSEC2_TXD3TSEC2_RX_CTLTSEC2_RXD0TSEC2_RXD1

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Interface SignalTSEC2_RXD2TSEC2_RXD3TSEC3_RX_CLKTSEC3_GTX_CLKTSEC3_TX_ENTSEC3_TXD0TSEC3_TXD1TSEC3_TXD2TSEC3_TXD3TSEC3_RX_CTLTSEC3_RXD0TSEC3_RXD1TSEC3_RXD2TSEC3_RXD3

SerDes SD_TX[0:9] SDTX [0: 9]SD_RX[0:7] SDRX [0:7 ]SD_REF_CLK_IN SD¿SD_REF_CLK_OUT SD¿

GPIO GPIO00/IRQ7/TDM_TX_DATAGPIO01/IRQ8/TDM_TFSGPIO02/IRQ9/TDM_TX_CLKGPIO03/IRQ10/TXM_RFSGPIO04/IRQ11/TDM_RX_DATAGPIO05GPIO06GPIO07GPIO12GPIO13GPIO14GPIO15GPIO08/SDHC_CDGPIO09/SDHC_WPGPIO10/USB_PCTL0GPIO11/USB_PCTL1

NOTE:

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FirmwareU-boot is open source firmware for the embedded Power Architecture. It is installed in a boot ROM, and is used to initialize and test hardware and to download and run application code.

The EP20xx board is shipped with the u-boot firmware residing in FLASH memory. U-boot loads at the address 0xEFF80000. U-boot utilities provide the ability to initialize the board and auto executes an operating system or application. Refer to online u-boot documentation for complete information about u-boot and its utilities.

Restoring MAC Addresses

The EP board can have up to four media access control (MAC) addresses assigned to it. The MAC address is the physical address of a device connected to a network, expressed as a 48-bit hexadecimal number. The boards are assigned MAC addresses during manufacture using the following convention:

Enet controller 1 MAC = 0x0010ECxxxxxx ORed with 0x000000000000Enet controller 2 MAC = 0x0010ECxxxxxx ORed with 0x000000800000Enet controller 3 MAC = 0x0010ECxxxxxx ORed with 0x000000400000Enet controller 4 MAC = 0x0010ECxxxxxx ORed with 0x000000C00000

Where

xxxxxx EP board serial number. The serial number can be found in decimal form on a label affixed to the Ethernet port on board (e.g., 007573).

For example, a board with a serial number of 007573 decimal (001D95 hexadecimal) has a MAC address of:

00:10:EC:00:1D:95 for Enet controller 100:10:EC:80:1D:95 for Enet controller 2

If it becomes necessary to restore a missing or corrupted MAC address, use the above convention to determine your EP board’s MAC addresses and issue the following commands in u-boot.

setenv ethaddr <MAC ADDRESS1>ENTERsetenv eth1addr <MAC ADDRESS2>ENTERsetenv eth2addr <MAC ADDRESS3>ENTERsetenv eth3addr <MAC ADDRESS4>ENTER

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saveenv ENTER

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Production Board, EP20xxA Chapter 3 – Getting Started

Chapter 2 - Getting Started

This chapter describes how to get the EP board up and running in stand-alone mode including initial configuration, connection, and power up. The board comes preprogrammed with u-boot firmware. An RS-232 serial monitor connection is required to access u-boot utilities. A network connection is required to transfer files to the EP board using TFTP.

To start up and begin communicating with the EP board:

1. Establish a serial connection; refer to Serial Monitor Connection in this chapter.

2. Establish a network connection, if required; refer to Network Connection in this chapter.

3. Apply power; refer to Power Up in this chapter.

Serial Monitor ConnectionA terminal emulator program on the host machine (e.g., minicom, Tera Term, or HyperTerminal) or dumb terminal and a Silicon Labs CP2101 driver are required to interact with the EP board. To establish a serial monitor connection with the host system, connect the RJ-45 monitor port (see Fig. 2-2) to a serial port on the host machine (or dumb terminal) using a USB A-type to micro USB B-type cable.

The default settings for the monitor port are:

115200 baud. 8 data bits. 1 stop bit. No parity. No flow control.

Network Connection A network connection between the development target (i.e., EP board) and host system is needed if planning to use TFTP services to transfer files to the EP board. A TFTP server must be running on the host machine to use the network connection for file transfer. Connect to the EP

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Chapter 3 – Getting Started Production Board, EP20xxA

board in one of two ways: directly or through a network hub or switch.

Direct To directly connect to the host machine, use an Ethernet crossover cable (CAT5e) connected between the RJ-45 Ethernet port on the EP board (Fig. 2-2) and the Ethernet port on the host machine.

NOTE: Most new Ethernet cards, hubs, and switches have auto-crossover capabilities which means the same cable may be able to be used for either direct, hub, or switch connection.

Hub or Switch To connect to the host machine via a hub or switch, use a standard Ethernet patch cable connected between the RJ-45 Ethernet port on the EP board (Fig. 2-2) and a free port on the hub.

Power Up

NOTE: Start the terminal emulation program (e.g., minicom, Tera Term, or HyperTerminal) or make sure the dumb terminal is connected before powering up the EP board.

After all connections have been properly made, connect the 3.3 VDC power supply to the onboard 6-pin connector using the provided power cable and power supply (Fig. 2-2). The EP board will boot up into u-boot automatically. Refer to online u-boot documentation for complete information about u-boot and its utilities.

CAUTION:

Disconnect the serial monitor connection in the terminal emulation program before removing either network connection or serial connection.

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Production Board, EP20xxA Chapter 4 - Setup

Chapter 3 - Setup

This chapter describes the various configuration options that setup the EP10xx/20xx board for operation.

Reset Configuration WordFor the P10xx/20xx processor, a reset configuration word (RCW) configures many of the processor features. The RCW is a 512 bit long word that is factory set; it is read from external memory. The default location for the RCW is in the first sector of NOR FLASH. Additionally, the EP board supports using an I2C EEPROM as the RCW source.

Refer to the P10xx/20xx Reference Manual for additional information about the RCW and the RCW fields.

SerDes Port ConfigurationFor the P10xx/P20xx processor, SerDes lane configuration is factory set.

The EP board ships with an RCW residing in NOR FLASH that matches the build option for the board. Table 2-2 shows the SerDes configuration options supported, and the SerDes protocol for that configuration.

Refer to the P10xx/P20xx Reference Manual for additional information about the SerDes protocol options.GET RID OF?

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Chapter 4 - Setup Production Board, EP20xxA

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Production Board, EP20xxA Chapter 4 - Setup

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Production Board, EP20xxA Chapter 5 – Connectors and Headers

Chapter 4 - Connectors and Headers

The EP10xx/20xx board has the following connectors for I/O functions and expand- ability:

One 2x 3 header for power. One 2x 8 header for debugging and CPLD programming. One 2 x 3 header for a RS-232 monitor port and reset. Two micro-USB connectors. One SGMSII connector for the 10/100/1000 Ethernet port. A Molex or Samtec 300-pin expansion bus connector

(ECB).

This chapter describes these connectors and headers. Refer to Figure 2-2 and 2-3 for the locations of these connectors and headers.

PowerThere are two options for powering the EP10xx/20xx board:

+3.3 VDC supplied through a 2 x 3 pin power header. +3.3 VDC supplied through the EBC connector.

The 3.3 VDC power option requires a regulated 3.0 to 3.6 VDC supply. The EP10xx/20xx board itself draws 5A maximum at VCC =3.0 VDC to 3.6 VDC, T=-45°C to 85°C (-49°C to 185°C).

Power Connector

The power connector (PI) is a 2 x 3 (0.1 x 0.1) pin header. Table 5-1 shows the power connector pinout.

Table 5-7. Power Connector Pinout (J7)

Pin Function Pin Function2 GND 1 +3.3VDC4 GND 3 +3.3VDC6 GND 5 +3.3VDC

EBC Bus

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Chapter 5 – Connectors and Headers Production Board, EP20xxA

The EP20xx board can be powered from the +3.3 VDC pins of the EBC connector (Figure 5-1).

JTAG/COP PortThe JTAG/COP port is J4. It is a 2 x 8 (0.1 x 0.1) header. Table 5-4 shows the JTAG/COP port pinout.

Table 5-8. JTAG/COP Port Pinout (J1)

Pin

Function Pin

Function

1 TDO 2 -3 TDI 4 TRST5 - 6 +3.3V7 TCK 8 JTAG_CKSTP_I

N9 TMS 10 I2C1 SCL11 SRESET 12 GND13 HRESET 14 I2C1 SDA15 JTAG_CKSTP_OU

T16 GND

NOTE:1. Current limited with a 10.01% ohm resistor.

Monitor PortThe RS-232 monitor port (UART0) is connector J10. It is an RJ-45 connector. Table 5-1 shows the port pinout.

IMPORTANT: To establish a connection between the host computer and EP board, Silicon Laboratories CP21xx Tools driver must be installed on the host computer. If not already done so, please refer to Virtual COM Port Driver Installation in the CP2102 User’s Guide.

Table 5-9. Monitor Port Pinout (J10)

Pin Function Device IDS29GL01GP 0x0001 0x7E2801S29GL512P 0x0001 0x7E2301S29GL256P 0x0001 0x7E2201S29GL128P 0x0001 0x7E2101

NOTE:Pin numbering is from right (1) to left (8) when looking into the RJ-45 jack with the locking tab on top.

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Production Board, EP20xxA Chapter 5 – Connectors and Headers

USB PortThe USB port is J2 or J5 depending on the connector device populated on the EP20xx board. P4 uses an AMP 292303-1 connector. P6 uses a Harwin M30-60000846 connector. Tables 5-4 and 5-5 show the USB port pinouts. All connectors are tied to ground.

Table 5-10. USB Port Pinout (J2 & J5)

Pin

Function Pin

Function

1 VCC 2 USB D-3 USB D+ 4 GND5 GND 6 SHIELD6 SHIELD 7 SHIELD8 SHIELD 9 SHIELD

Ethernet PortThe 1GbE Ethernet port is connector U1F. The connector is a shielded RJ-45 jack. Table 5-3 shows the RJ-45 jack pinout.

Table 5-11. Ethernet Port Pinout (J4)

1000Base-T 100Base-TXPin

Function Pin

Function

1 BI_DA+ 1 TXD+2 BI_DA- 2 TXD-3 BI_DB+ 3 RXD+4 BI_DC+ 4 -5 BI_DC- 5 -6 BI_DB- 6 RXD-7 BI_DD+ 7 -8 BI_DD- 8 -NOTE:1. Pin numbering is from right (1) to left (8) when looking into the RJ-45 jack with the locking tab on top.

Expansion Bus ConnectorThe expansion bus connector is P1. It is a 10 x 30 pin connector. Figure 5-3 shows the expansion bus connector pinout.

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Chapter 5 – Connectors and Headers Production Board, EP20xxA

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Production Board, EP20xxA Chapter 6 – Operation

Chapter 5 - Operation

This chapter describes the reset switch and board LED indications for the EP20xx board. It also provides some firmware description and communication information.

System ResetA system reset signal is available at the extension bus connector (EBC) (Table 5-3). Pulling this signal low activates a power-on reset (SRESET) to the processor and board. Refer to Figure 2-2 for the location of the header.

Board LEDsTable 6-1 describes the indications for the EP board LEDs. Refer to Figure 2-2 for the location of the LEDs. Refer to Table 7-4 for LED control bit information.

Table 6-12. Board LED Definitions

LED Definition (On) Color

CR-PWR1 +3.3VDC Green

CR-PWR2 +3.3VDC Yellow

CR1 USUER_LED0 Green

CR1 USER_LED1 Yellow

CR2 SYSERR Green

CR2 SYSRST Yellow

Ethernet Port LEDsTable 6-2 describes the indications given by the Ethernet port (J4). Refer to Figure 2-2 for the location of the Ethernet port.

Table 6-13. Ethernet Port LEDs (J4, J5)

State Indication

LED0 (Green) LED1 (Green)

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Chapter 6 – Operation Production Board, EP20xxA

LED2 (Green)

Off Else Else No Link

On 1000 Mbps (green) 100 Mbps (green) (Blink)

User SwitchThe four-pole user switch (SW-USR1) located on the board is readable via the onboard status register (Table 7-4). The switch is intended for user applications.

RS-232 Connection A DB-9 (or DB-25) to RJ-45 connection is required for RS-232 communication. Table 5-1 provides the pinouts for the RJ-45 connector. The EP20xx board has its serial ports wired as DTE. A null modem type of connection is required when interfacing to a DTE port.

For DTE:

DB9-3 = TXDDB9-2 = RXDDB9-8 = CTSDB9-7 = RTSDB9-5 = GND

IMPORTANT: To establish a connection between the host computer and EP board, Silicon Laboratories CP21xx Tools driver must be installed on the host computer. If not already done so, please refer to Virtual COM Port Driver Installation in the CP2102 User’s Guide.

User ApplicationsThe u-boot firmware assumes the board is connected to a dumb terminal or a PC-based terminal emulator, and requires user intervention for the utilities. The dumb terminal or PC serial port should be set as follows:

115200 baud (default). 8 data bits. 1 stop bit. No parity.

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Production Board, EP20xxA Chapter 6 – Operation

No hardware handshake.Proper interfacing to the serial port via the correct RS-232 connections must be insured as described in RS-232 Connection in this chapter.

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Production Board, EP20xxA Chapter 7 – Board Control and Status Registers

Chapter 6 - Board Control and Status Registers

The EP5020A board has onboard control and status registers. These registers are configured as x8 ports. The registers are defined as shown in Tables 7-1 through 7-10.

NOTES:1. Bit 0 is the MSB and bit 7 is the LSB.2. The base address of the BCSR is determined by the firmware or

application; refer to Table 9-1.3. Any unused or reserved BCSR bits should always write back the value

read. This will help guarantee that revisions to the board will be backward compatible with existing software.

Register values at reset (values in binary):

Register 0 = ID Board IDRegister 1 = CPLD REV CPLD revisionRegister 2 = x000 0000 FLASH and EEPROMRegister 3 = 1100 xxxx User SettingsRegister 4 = 0000 0000 Reset ControlRegister 5 = 0000 0000 ReservedRegister 6 = 0000 0000 ReservedRegister 7 = 0000 0000 Reserved

Table 7-14. BCSR0 - Board ID

Byte Address Description Bit R/

W ResetBase address

+ 0x00reset value =

ID = 0x10

ID = EP10xx/20xx revision 1.0

0 RO 0001 00001 RO2 RO3 RO4 RO5 RO6 RO7 RO

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Chapter 7 – Board Control and Status Registers Production Board, EP20xxA

Table 7-15. BSCR1 - CPLD Revision


W ResetBase address

+ 0x01reset value =

0x00

CPLD revision 0 0 RO 0x001 RO2 RO3 RO4 RO5 RO6 RO7 RO

Table 7-16. BSCR2 – CPU Type, FLASH Status Read Only

Byte Address Description Bit R/W Reset

Base address + 0x02

reset value

CPU_Type0-2CPU_TYPE_SEL = 000 = P1011CPU_TYPE_SEL = 001 = P1012CPU_TYPE_SEL = 010 = P1020CPU_TYPE_SEL = 011 = P1021CPU_TYPE_SEL = 100 = P2010CPU_TYPE_SEL = 101 – P2020

0-2 ? 000

TEST_SELnTEST_SEL = 1 = P2020TEST_SEL = 0 = P2010TEST_SEL = 0 = P1011TEST_SEL = 0 = P1012TEST_SEL = 0 = P1020TEST_SEL = 0 = P1021

3 ? 0

Reserved 4 ? ?FLASH Ready Status Bit 5 RO NAReserved 6-7 RO 00

Table 7-17. BCSR3 - Reserved


W ResetBase address

+ 0x03reset value

? 0 RW 0

Reserved 1-7 RO NA

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Table 7-18. BCSR4 - FLASH LED Control


W ResetBase address

+ 0x04reset value = 0

FLASH Write Protect (1=Write Protect)

0 RW 0 = Not Protected

EEPROM Write Protect (1=Write Protect)

1 RW 0 = Not Protected

User LED1_GRN (1=LED ON)

2 RW 0

User LED2_GRN (1=LED ON)

3 RW 0

User LED1_RED (1=LED ON)

4 RW 0

User LED2_RED (1=LED ON)

5 RW 0

Reserved 6 RW 0Reserved 7 RW 0

Table 7-19. BCSR5 - Reset Control


W ResetBase

address + 0x05

reset value = 0

DDR1_RESET_EN 0 RW 0=Disabled1 RW 0=Disabled2 RW 0=Disabled

Reserved 3 RW NAPHY1 Software Reset (1=PHY Reset)

4 RW 0=Not Reset

Reserved 5 RW 0=Not ResetRST_USB_PHYn 6 RW 0=Not ResetSW_PORST (1=software power on reset)

7 WO 0=Not Reset

Table 7-20. BCSR6 - Monitor Control


W ResetBase

address + 0x06

reset value =

Reserved 0-6 RW

Monitor Port 7 RW

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0 0=Disable monitor transceiver



W ResetBase

address + 0x07

reset value

Reserved 0-7 RW

Table 7-22. BCSR8 - SerDes Clock Control


W ResetBase

address + 0x08

reset value

SERDESCLK OVERRIDE, set this bit to 1 for bit 4 to have any effect

0 RW 0

1 RW 02 RW 0

SERDES CLK OE, default = enabled

3 RW 1

SERDES CLK (1=125MHz, 0=100MHz)

4 RW 0

Reserved 5-7 NA X

Table 7-23. BCSR9 - MMC Status/Control


W ResetBase

address + 0x08

reset value

0 RO NAReserved 1-7 NA 00000000

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W ResetBase

address + 0x10

reset value = 000000000

Reserved 0-7 RW 00000000

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Production Board, EP20xxA Chapter 8 – I2C Devices and Addressing

Chapter 7 - I2C Devices and Addressing

The EP20xxA board has three devices on the IC2 bus. These devices are a serial EEPROM (SEP) for user settings, a serial EEPROM (SEP) for boot configuration settings, and a serial real-time clock (SRTC).

Device Function I2C AddressingSEP User Information 0xAC for 4k device (512 x 8)TEMP TEMP sensor 0xA9 for 4K device (512 x 8)SRTC Serial real-time

clock0xDD (20 bytes in device)

There are two I2C ports on the EP20xxA board. Port 0 of the I2C is used by the onboard devices. Port 1 can be configured as a second I2C port or SPI port and is accessible on the EBC connector.

SEP Interface StructureUser SEP The user SEP is available for application use. EEPROM write

protect is provided under the BCSR control (Table 7-3).

Restoring the Boot EEPROM

The procedure for restoring the boot SEP if necessary is:

1. Power down the board.2. Set SW-CFG1 for the EBC boot configuration (option C);

refer to Table 4-1. 3. Power up the board.4. Give the following commands to reprogram the boot SEP:

=> mm 0x 10000000 ENTER00100000: 87788252 ? 0x87788252 ENTER00100004: 0957a030 ? 0x0957a030 ENTER00100008: 40082350 ? 0x40082350 ENTER0010000c: 0d050000 ? 0x0d050000 ENTER00100010: ffd77fdf ? . ENTER=> eeprom write 0x54 0x10000000 0x0 0x10 ENTER

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5. Remove power from the board.6. Set SW-CFG1 for SEP boot configuration (option G); refer

to Table 4-1.7. Power up the board.

SRTC Interface StructureThe real-time clock device (M41T81) supports the setting of alarms and will generate an interrupt when an alarm is triggered. The interrupt is connected to IRQ 0 of the processor. This interrupt is also available at the expansion bus connector.

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Production Board, EP20xxA Chapter 9 – Memory and Interrupts

Chapter 8 - Memory and Interrupts

This chapter contains memory map and interrupt information for the EP20xxA board.

Memory MapTable 9-1. Memory Map (36-bit Address Map)

Table 9-1 describes the default memory map for the EP board.

NOTE: The address map is recommended for the EP board and is as defined in u-boot. Other mappings can be utilized for any given application.

Chip Select Function Address Size Description

D1_MCS0DDR SDRAM 0x000000000 2 GB mapped2

GB unmapped 64-bit, DDR controllerD1_MCS1

D1_MCS2 — — — Unused


D2_MCS0DDR SDRAM 0x100000000 4 GB unmapped 64-bit, DDR controller

D2_MCS1



LCS0 FLASH 0xFE0000000 256 MB 16-bit, GPCM

LCS1 — — — Unused

LCS2 BCSR 0xFF1000000 256 KB 8-bit, GPCM

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Chapter 9 – Memory Interrupts Production Board, EP20xxA


LCS4 NAND 0xFF1040000 256 KB 8-bit, FCM




— BMAN 0xFF4000000 2 MB Buffer manager software portal

— QMAN 0xFF4200000 2 MB Queue manager software portal

— CCSRBAR 0xFFE000000 1 MB Memory mapped processor registers

External InterruptsThe polarity of all external interrupts can be programmed. Table 9-2 identifies the IRQ lines used by the EP board. All IRQ lines should be programmed as active low signals since each IRQ line has an onboard 10 K-ohm pull-up resister.

Table 9-25. External Interrupts

IRQ Interrupt Source

IRQ0 Real-time clock

IRQ1 TEMP sensor

IRQ2 Reserved

IRQ3 Unused

IRQ4 Unused

IRQ5 Unused

IRQ6 Unused

IRQ7 IRQ OUT

IRQ8 Unused

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Production Board, EP20xxA Chapter 9 – Memory and Interrupts

IRQ9 Unused

IRQ10 Unused

IRQ11 Unused

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Chapter 9 – Memory Interrupts Production Board, EP20xxA

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Production Board, EP20xxA Appendix A: Mechanical Dimensions

Appendix A: Mechanical Dimension

This appendix contains mechanical dimension drawings needed to design the EP20xxA board into a product. Figures A-1, A-2, and A-3 show the dimensions for the EP20xxA board.

NOTES:1. The Dimensions in this document are believed correct, but if this unit is to

be placed into a housing that has cut outs, an actual unit must be procured to verify all required connector cut outs. In addition, the vendor’s data sheets for the connectors should be referenced to determine the tolerances of the connectors.

2. The pin headers can optionally be populated with either straight pins or right-angle pins. Figure A-3 shows the pin dimensions. The right-angle pins extend 0.33 inches (8.44 millimeters) past the edge of the board as shown in the figure.

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Appendix A: Mechanical Dimensions Production Board, EP20xxA

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