Appl i c at i on Not e AN4138Desi gn Consi der at i ons f orBat t er y Char gerUsi ng Gr een Mode Fai r c hi l d PowerSw i t ch (FPSTM) www.fairchildsemi.com2003 Fairchild Semiconductor CorporationAbstractThisapplicationnotepresentspracticaldesignconsider-ationsforbatterychargersemployingGreenModeFPS(FairchildPowerSwitch).Itincludesdesigningthetransformerandoutputfilter,selectingthecomponentsandimplementingconstantcurrent/constantvoltagecontrol.Thestep-by-stepdesignproceduredescribedinthispaperwillhelpengineersdesignbatterychargersmoreeasily.Inordertomakethedesignprocessmoreefficient,asoftwaredesigntool,FPSdesignassistantthatcontainsalltheequationsdescribedinthispaperisalsoprovided.Thedesignprocedureisverifiedthroughanexperimentalprototype converter.Rev. 1.0.0 1. IntroductionAs penetration rates of portable electronics devices such ascellularphones,digitalcamerasorPDAshaveincreasedsignificantly,thedemandsforlowcostbatterychargersarerisingthesedays.FairchildPowerSwitch(FPS)reducestotal component count, design size, weight and, at the sametime increases efficiency, productivity, and system reliabilitywhencomparedtoadiscreteMOSFETandcontrollerorRCCswitchingconvertersolution.Table1showstheFPSlineupforabatterychargerapplication.Figure1showstheschematicofthebasicbatterychargerusingFPS,whichalsoservesasthereferencecircuitforthedesignprocessdescribedinthispaper.Anexperimentalflybackconverterfromthedesignexamplehasbeenbuiltandtestedtoshowthe validityof the design procedure. Table 1. FPS lineup for a battery charger Figure 1. Basic Battery charger Using FPSNpNSRsn Csn-Vsn+VDC+-AC lineDsnDRCODrainVccGNDFBFPSNaDaRaCaH11A817ARdBridgerectifierdiodeVOLPCPCBCDCIOIOrefVOrefCurrentControllerVoltageControllerVbiasH11A817ADevice Switching frequencyCurrent limitRdson (typ.)FSDH0165 100 kHz 0.35 A 15.6 FSD31167 kHz 0.55 A 14 FSD200 134 kHz 0.32 A 28 FSD210 134 kHz 0.32 A 28 AN4138 APPLICATION NOTE2 2002 Fairchild Semiconductor Corporation2. Step-by-step Design Procedure Figure 2. Flow chart of design procedureIn this section, a design procedure is presented using theschematic of Figure 1 as a reference. Figure 2 illustrates thedesignflowchart.Thedetaileddesignproceduresareasfollows:(1) STEP-1 : Define the system specifications - Line voltage range (Vlinemin and Vlinemax). - Line frequency (fL). - Maximum output power (Po). -Estimatedefficiency(Eff):Itisrequiredtoestimatethepower conversion efficiency to calculate the maximum inputpower.Inthecaseofabatterycharger,theefficiencyisrelativelylowduetothelowoutputvoltageandlossintheoutput current sense resistor. The typical efficiency is about0.65-0.7. Withtheestimatedefficiency,themaximuminputpowerisgiven by(2) STEP-2 : Determine DC link capacitor (CDC) and the DC link voltage range.It is typical to select the DC link capacitor as 2-3uF per wattofinputpowerforuniversalinputrange(85-265Vrms)and1uF per watt of input power for European input range (195V-265Vrms). With the DC link capacitor chosen, the minimumlink voltage is obtained aswhereDchistheDClinkcapacitorchargingdutyratiodefinedasshowninFigure3,whichistypicallyabout0.2and Pin, Vlinemin and fL are specified in step-1. The maximum DC link voltage is given as where Vlinemaxis specified in step-1. Figure 3. DC Link Voltage Waveform1. Determine the system specifications(Vlinemin, Vlinemax, fL, Po, Eff)2. Determine DC link capacitor (CDC) and DC link voltage range3. Determine the reflected output voltage(VRO)6. Determine the proper core and theminimum primary turns (Npmin)7. Determine the number of turns for eachoutput8. Determine the wire diameter for eachwinding9. Choose the proper rectifier diode for eachoutput10. Determine the output capacitor11. Design the RCD snubber12. Control Circuit design5. Choose proper FPS considering inputpower and Idspeak4. Determine the transformer primary sideinductance (Lm) and maximum duty (Dmax)Is the winding windowarea (Aw) enough ?Design finishedYNIs it possible to change the core ?YNPi nPoEf f------- = (1)VDCmi n2 Vl i nemi n( ) 2 Pi n1 Dch ( ) CDCfL------------------------------------ = (2)VDCmax2Vl i nemax= (3)DC link voltageMinimumDC link voltageT1T2Dch =T1 / T2=0.2 APPLICATION NOTE AN41383 2002 Fairchild Semiconductor Corporation(3) STEP-3 : Determine the reflected output voltage(VRO). WhentheMOSFETintheFPSisturnedoff,theinputvoltage(VDC)togetherwiththeoutputvoltagereflectedtothe primary (VRO) are imposed on the MOSFET as shown inFigure4.AfterdeterminingVRO,themaximumnominalMOSFET voltage (Vdsnom) is obtained aswhere VDCmax is specified in equation (3). The typical valuefor VRO is 65-85V. Figure 4. The output voltage reflected to the primary(4) STEP-4 : Determine the transformer primary side inductance (Lm) and the maximum duty ratio (Dmax).AFlybackconverterhastwokindsofoperationmodes;continuousconductionmode(CCM)anddiscontinuousconductionmode(DCM).TheoperationchangesbetweenCCM and DCM as the load condition and input voltage varyandeachoperationmodehastheirownadvantagesanddisadvantages,respectively.ThetransformersizecanbereducedusingDCMbecausetheaverageenergystoredislower compared to CCM. However, DCM inherently causeshigher RMS current, which increases the conduction loss ofthe MOSFET and the current stress on the output capacitors. For low power applications under 10W where the MOSFETconductionlossisnotsosevere,itistypicaltodesigntheconvertertooperate in DCM for the entire operating range,or to operate in CCM only for low input voltage conditionsin order to minimize the transformer size. Figure 5. Simplified flyback converterThedesignproceduresforCCMandDCMareslightlydifferent.Oncethereflectedoutputvoltage(VRO)isdetermined in step-3, the flyback converter can be simplifiedasshowninFigure5byneglectingthevoltagedropsinMOSFET and diode.For CCM operation, the maximum duty ratio is given bywhereVDCminandVROarespecifiedinequations(2)andstep-3,respectively.ForDCMoperation,themaximumdutyratioshouldbedeterminedassmallerthanthevalueobtainedinequation(5). By reducing Dmax, the transformer size can be reduced.However,thisincreasestheRMSvalueoftheMOSFETdraincurrentandDmaxshouldbedeterminedbytrade-offbetween the transformer size and MOSFET conduction loss. Withthemaximumdutyratio,theprimarysideinductance(Lm)ofthetransformerisobtained.TheworstcaseindesigningLmisfullloadandminimuminputvoltageVdsnomVDCmaxVRO+ =(4)-VRO+VDC+-DrainGNDF PS+Vds-0 VVDCVROLmVDCmin VROIdsIDImImImIdsIdsDmaxDmaxIDIDminDC ROROV VV+=minDC ROROV VV+DmaxVROVROVDCmi n+------------------------------------- = (5)AN4138 APPLICATION NOTE4 2002 Fairchild Semiconductor Corporationcondition. Therefore, Lm is obtained in this condition as

where VDCmin is specified in equation (2), Dmax is specifiedin equation (5), Pin is specified in step-1, fs is the switchingfrequencyoftheFPSdeviceand KRFistheripplefactorinfullloadandminimuminputvoltagecondition,definedasshowninFigure6.ForDCMoperation,KRF=1andforCCM operation KRF < 1. The ripple factor is closely relatedto the transformersize and the RMS valueof the MOSFETcurrent. In the case of low power applications such as batterychargers,arelativelylargeripplefactorisusedinordertominimize the transformer size. It is typical to set KRF = 0.5-0.7fortheuniversalinputrangeandKRF=1.0fortheEuropean input range. Once Lm is determined, the maximum peak current and RMScurrent of the MOSFET in normal operation are obtained aswherePin,VDCmin,DmaxandLmarespecifiedinequations(1), (2), (5) and (6) respectively and fs is the FPS switchingfrequency.Figure 6. MOSFET Drain Current and Ripple Factor (KRF) (5) STEP-5 : Choose the proper FPS considering inputpower and peak drain current.WiththeresultingmaximumpeakdraincurrentoftheMOSFET (Idspeak) from equation (7), choose the proper FPSofwhichthepulse-by-pulsecurrentlimitlevel(Iover)ishigher thanIdspeak.Since FPS has 12% toleranceof Iover,thereshouldbesomemargininchoosingtheproperFPSdevice. (6) STEP-6 : Determine the proper core and the minimum primary turns.Table 2 shows the commonly used cores for battery chargerswithoutputpowerunder10W.Thecoresrecommendedintable 2 are typical for the universal input range and 100kHzswitching frequency. With the chosen core, the minimum number of turns for thetransformer primary side to avoid the core saturation is givenbywhere Lm is specified in equation (6), Iover is the FPS pulse-by-pulse current limit level, Ae is the cross-sectional area ofthe core as shown in Figure 7 and Bsat is the saturation fluxdensity in tesla. Figure 8 shows the typical characteristics offerritecorefromTDK(PC40).Sincethesaturationfluxdensity(Bsat)decreasesasthetemperaturegoeshigh,thehigh temperature characteristics should be considered.If there is no reference data, use Bsat =0.3~0.35 T. Since theMOSFET drain current exceeds Idspeak and reaches Iover in atransitionorfaultcondition,Ioverisusedinequation(11)instead of Idspeak to prevent core saturation during transition.Figure 7. Window Area and Cross Sectional AreaLmVDCmi nDmax ( )22Pi nfsKRF---------------------------------------------- =(6)IdspeakIEDCI2----- + = (7)Idsrms3 IEDC( )2 I2-----! "# $2+Dmax3-------------- = 8 ( ) IEDCPi nVDCmi nDmax-------------------------------------- = (9) IVDCmi n DmaxLmfs----------------------------------- =(10)I EDCIEDCRFIIK2=CCM operation : KRF