Design flow of VLSI circuitsDesign flow of VLSI circuits

Preliminary Specifications

Draw detailedSpecifications

and block diagram

FreezeSpecifications

No

Yes

Contact User

Get UserConcurrence

A

Need moreInputs ?

Design flow of VLSI circuits Design flow of VLSI circuits (continued)(continued)

Code in C or Matlab & test

RTL coding

Simulate

NoYes

C

A

Finalize hardware

Architecture

Compile

Fix errors

YesCorrect code

No

B

B

Errors?

Bugs?

Design flow of VLSI circuits Design flow of VLSI circuits (continued)(continued)

Place & route

NoYes

C

Synthesis

Fix errors

Yes

Correct codeor change

constraintsNo

B/E

B

D

F

Errors?

Constraintsmet ?

E

Design flow of VLSI circuits Design flow of VLSI circuits (continued)(continued)F

Back annotate B

NoYes

Compile& Simulate Correct code

FPGA Implementation

D

Layout

ASICImplementation

Layout Verification

Timing OK?

TopTop--down Design Methodologydown Design Methodology

Top level Design module

Lower level module 1

Lower level module 2

Lower level module n

Lowest level

module 1

Lowest level

module p

Lowest level

module 1

Lowest level

module q

Lowest level

module 1

Lowest level

module r

BottomBottom--up Design Methodologyup Design Methodology

Top level Design module

Lower level module 1

Lower level module 2

Lower level module n

Lowest level

module 1

Lowest level

module p

Lowest level

module 1

Lowest level

module q

Lowest level

module 1

Lowest level

module r

Simulation using Modelsim

Create a new projectCreate a new project

Compile windowCompile window

Load DesignLoad Design

Signals windowSignals window

Wave windowWave window

Run -allRestart

Break

Zoom out

Zoom in

Zoom Full

Main Window of later versions of ModelSim

Simulate Window of later versions of ModelSim

Simulation result of Simulation result of ‘‘and_2inand_2in’’ designdesign

Simulation result of Simulation result of ‘‘comb_cktscomb_ckts’’ design design -- basic logic gatesbasic logic gates

Simulation result of Simulation result of ‘‘comb_cktscomb_ckts’’ design design –– concatenation and shift operations

Simulation result of Simulation result of ‘‘comb_cktscomb_ckts’’ design design –– MUX and DEMUX

Simulation result of Simulation result of ‘‘comb_cktscomb_ckts’’ design design –– full adder

Find next transition

Find previous transition

Simulation result of Simulation result of ‘‘comb_cktscomb_ckts’’ design design –– magnitude comparator

Simulation result of Simulation result of ‘‘comb_cktscomb_ckts’’ design design –– an example

Simulation result ofSimulation result of sequential circuits - D flip-flop with reset

Simulation result of sequential circuits - Realization of registers

Simulation result of Simulation result of sequential circuits - Realization of Realization of a counter (continued)a counter (continued)

Simulation result of Simulation result of sequential circuits - Realization of a counterRealization of a counter

Simulation result of Simulation result of sequential circuits - Realization of Realization of a nona non--retriggerable monoshot (continued)retriggerable monoshot (continued)

Simulation result of Simulation result of sequential circuits - Realization of Realization of a nona non--retriggerable monoshotretriggerable monoshot

Simulation result of Simulation result of sequential circuits - Realization of Realization of a shift register (continued)a shift register (continued)

Simulation result of sequential circuits - Realization of a shift register (continued)

Simulation result of sequential circuits - Realization of a shift register

Simulation result of sequential circuits - Realization of parallel to serial converter (continued)(continued)

Simulation result of Simulation result of sequential circuits - Realization of Realization of parallel to serial converter (continued)parallel to serial converter (continued)

Simulation result of sequential circuits - Realization of parallel to serial converter (continued)

Simulation result of sequential circuits - Realization of parallel to serial converter (continued)

Simulation result of sequential circuits - Realization of parallel to serial converter

Simulation result of sequential circuits - Realization of a model state machine (continued)

Simulation result of sequential circuits - Realization of a model state machine

Simulation result of sequential circuits - Realization of a pattern sequence (0110) detector (continued)

Simulation result of sequential circuits - Realization of a pattern sequence (0110) detector (continued)

Simulation result of sequential circuits - Realization of a pattern sequence (0110) detector