Design for High-Level Model Based on an Eight Bit Entertainment System

Alejandro Lizaola, Ricardo Castro, Gilberto Beltran. Manuel Salim and Alejandro Moreno

Departamento de electronica , Systemas e InformaticaInstituto Tecnologico y de Estudios Superiores de Occidente

Guadalajara, Mexico.

Outline

Introduction

NES Main Block Description

Design Methodology

Verification Strategies

Results

Conclusions

2

Introduction

NES prototype has been developed in order to increase engineering skills on this area.

This one was not verified, formal verification process has not been executed.

Design lifecycle must be complete.

3

…Introduction

A model reference will be developed in a hardware description and verification language.

Design.

Implementation.

Verification.

Validation.

Reverse engineering will help to speed up the knowledge and design of the NES.

4

NES Arquitecture

5

Design Methodology

1. NES functionality understanding.

2. Emulator election.

3. Reference model design.

4. Reference model main blocks implementation.

5. Reference model integration modules.

6

Main Block Description

7

Main Block Proposal:

…Verification Strategies

Reference Model Verification:

8

Verification Plan:

All functional areas as well as monitors and checkers are described through the specification of the console.

Monitor and checkers are used to know the status of :

Memory.

Flags.

I/O Signals.

Variables.

Verification Strategies

9

…Results

Mapper comparison between output files using

Soccer Game ROM.10

Reference Model Emulator

Results

Triangular channel outputs for Soccer game.

11

Emulator

Reference Model

Comparison Results

…Results

Delta Modulation outputs for Soccer game.

12

Emulator

Reference Model

Comparison Results

…Results

Audio buffer outputs for Soccer game.

13

Emulator

Reference Model

Comparison Results

…Results

Scroll results for Soccer game.

Sprites results for Soccer game.

14

Emulator

Reference Model

Comparison Results

Comparison Results

Reference Model

Emulator

…Results

Game’s name MapperNumber

Funtionality Comparision

Soccer, Demo Sound, Donkey Kong, Súper Mario Bros 1 0 Correct

Contra 2 Correct

Castlevania I, Legend of Zelda, Techno Baseball, Road Race, Megaman I, III

1 Correct

Hudson Island I,II, III 3 Correct

Punch Out 9 Correct

Megaman II 3 Incorrect

Castlevania III Japanese version 24 Incorrect

Súper Mario Bros III 5 Correct

Nintendo World Cup, Tiny Toons, Mitsufatoru 4 Correct

Dragon Ball Z 16 Incorrect

Result table games. 15

Conclusions

NES functionality, interconnection and architecture was developed.

After several attempt to select an PC emulator, NesCore has been selected .

Reference model was implemented in SystemVerilog in a modular way, adding two none existing modules in the NES prototype.

16

…Conclusions

An automated verification strategy was implemented:

Human Factor Reduction.

Improve efficiency.

Faster results comparison.

The performance of the model behaves as expected due to results comparison.

17

Future Work

Mappers and more expansion chips can be implemented.

Verification´s framework must be implemented.

NES prototype verification can be done.

18

Question & Answers…

Any question ?

Slides Background

Central Processing Unit:

The CPU emulated by the NES is an 8-bit microprocessor produced by Ricoh based on MOS Technology 6502 core. The NTSC version (North America and Japan) of the console use the Ricoh 2A03 (or RP2A03), which operates at 1.78MHz, PAL version (Europe and Australia) use the Ricoh 2A07 (or RP2A07), this is identical to version NTSC with the difference that it works on 1.66MHz.

Slides Background

Audio Processing Unit:

The APU is responsible for generating the game sound. It is implemented in two chips, RP2A03 for NTSC and RP2A07 for PAL. The APU has 5 channels:

1. Square channel, frequency ranges 54 Hz – 28 KHz.

2. Square channel, frequency ranges 54 Hz – 28 KHz.

3. Triangle channel, frequency ranges 27 Hz – 56 KHz.

4. Noise channel, LFSR, two modes and sixteen programmable frequencies.

5. DPCM channel.

Slides Background

MAPPERS:

Mappers are chips designed for videogames developers to use them in NES cartridges.

Mappers are used to access memory beyond the limits of the 64k memory, allowing special effects in the video and sound, such as forcing some interruptions and instructions among other things.

The memory used by the NES is implemented in two blocks, Rom program (PRG-ROM) and Rom Character (CHR-ROM). This includes the memory area where the current code will be executed by the micro as well as the video memory data .

Slides Background

Picture Processing Unit:

The PPU used by the NES was designed by Ricoh. This unit is responsible for transforming the digital information received from the CPU into video signal to display the game on screen. This process is known as image rendering

The PPU contains the following:1. Background render unit.

2. Sprites render unit.

3. Records of entry and exit.

4. Internal RAM 32B.

5. External RAM 256B.