design of an analogue transceiver for speech communication systems

7
Design of an analogue transceiver for speech communication systems Thilo Sauter a, * , Nikolaus Kero ¨ b a Vienna University of Technology, Institute of Computer Technology, Gußhausstraße 27/E384, A-1040 Vienna, Austria b Vienna University of Technology, Institute of General Electrical Engineering, Gußhausstraße 27/E359-10, A-1040 Vienna, Austria Received in revised form 5 October 1998 Abstract The objective of the present design was to create a unified analogue frontend for air traffic control systems. The audio tranceiver is capable of directly driving headset earphones together with high capacitive loads. A distinct feature of the device is a built-in loop-back function allowing for a self-test of the signal path. The design was carried out for an Austrian SME and fabricated on a 1.2 mm CMOS process by AMS. Apart from being an example for a successful co-operation between university and industry, the project is interesting also because it refutes the common prejudice that an ASIC pays off only for high-volume production. q 1999 Elsevier Science Ltd. All rights reserved. Keywords: Analogue transceiver; Speech communication; Air traffic control 1. Introduction Modern communication systems for air traffic control are based on digital speech processing facilities. There is, however, still one analogue device required: the headset transceiver (HST) forms the interface between the com- munication system and the air traffic controllers. As this comes down to a simple amplification of audio signals, what are the benefits to be gained from an integrated solu- tion? In a typical application, each working place has three or more sockets to which headsets can be connected. So, obviously, the first advantage is a reduction of space on the printed circuit boards needed to implement the interfaces. A similarly clear advantage is the increased reliability together with a lower power consumption and the possibility of including additional functions. The third, and somehow unusual, benefit in this particular case was a standardization aspect. Speech communication systems are unique solu- tions, and so far, despite a modular design of the digital parts of the system, the interface boards had to be developed anew for each customer. An ASIC, however, is a fixed start- ing point for future designs and may thus also help to reduce development and maintenance costs. Apart from merely technical benefits, a successful ASIC design project has to meet several important economic criteria. Originally, the main limiting factor was thought to be the amount of ASICs produced. The more sophisti- cated a design becomes, the higher the volume quantity needs to be. Especially for analogue designs this statement was widely accepted throughout the EDA community. The present case study, however, shows that small volume designs can be reasonable as well. 2. Function of the HST The basic function of the ASIC is the amplification and conditioning of the voice-band signals that come in from the headset’s microphone or are applied to the earphones, respectively. In addition, the presence of a headset must be detected. If no headset, or more precisely no microphone, is attached to the module, then a loop-back function is to be activated such that the outgoing earphone signals are added and fed back to the system in place of the microphone signal. This function is also useful for testing purposes because the complete signal path through the system— including the CODECs and most of the analogue ampli- fiers—can be monitored. The electrical specifications are given in Table 1, and Fig. 1 shows a block diagram of one channel of the HST. The ASIC actually comprises two of them. Since there is only a single supply voltage available, the drivers for the loud- speakers need differential outputs to meet the specifications. The detection of an attached headset is based on the addi- tional supply voltage required for the operation of the microphone. If the headset is plugged in, the DC level at the sense input is typically about 3 V. With the headset Microelectronics Journal 30 (1999) 247–253 MEJ 501 0026-2692/99/$ - see front matter q 1999 Elsevier Science Ltd. All rights reserved. PII: S0026-2692(98)00113-X Microelectronics Journal * Corresponding author. E-mail addresses: [email protected] (T. Sauter) keroe@iaee. tuwien.ac.at (N. Kero ¨).

Upload: thilo

Post on 02-Jul-2016

221 views

Category:

Documents


0 download

TRANSCRIPT

Page 1: Design of an analogue transceiver for speech communication systems

Design of an analogue transceiver for speech communication systems

Thilo Sautera,* , Nikolaus Kerob

aVienna University of Technology, Institute of Computer Technology, Gußhausstraße 27/E384, A-1040 Vienna, AustriabVienna University of Technology, Institute of General Electrical Engineering, Gußhausstraße 27/E359-10, A-1040 Vienna, Austria

Received in revised form 5 October 1998

Abstract

The objective of the present design was to create a unified analogue frontend for air traffic control systems. The audio tranceiver is capableof directly driving headset earphones together with high capacitive loads. A distinct feature of the device is a built-in loop-back functionallowing for a self-test of the signal path. The design was carried out for an Austrian SME and fabricated on a 1.2mm CMOS process byAMS. Apart from being an example for a successful co-operation between university and industry, the project is interesting also because itrefutes the common prejudice that an ASIC pays off only for high-volume production.q 1999 Elsevier Science Ltd. All rights reserved.

Keywords:Analogue transceiver; Speech communication; Air traffic control

1. Introduction

Modern communication systems for air traffic control arebased on digital speech processing facilities. There is,however, still one analogue device required: the headsettransceiver (HST) forms the interface between the com-munication system and the air traffic controllers. As thiscomes down to a simple amplification of audio signals,what are the benefits to be gained from an integrated solu-tion? In a typical application, each working place has threeor more sockets to which headsets can be connected. So,obviously, the first advantage is a reduction of space on theprinted circuit boards needed to implement the interfaces. Asimilarly clear advantage is the increased reliability togetherwith a lower power consumption and the possibility ofincluding additional functions. The third, and somehowunusual, benefit in this particular case was a standardizationaspect. Speech communication systems are unique solu-tions, and so far, despite a modular design of the digitalparts of the system, the interface boards had to be developedanew for each customer. An ASIC, however, is a fixed start-ing point for future designs and may thus also help to reducedevelopment and maintenance costs.

Apart from merely technical benefits, a successful ASICdesign project has to meet several important economiccriteria. Originally, the main limiting factor was thought

to be the amount of ASICs produced. The more sophisti-cated a design becomes, the higher the volume quantityneeds to be. Especially for analogue designs this statementwas widely accepted throughout the EDA community. Thepresent case study, however, shows that small volumedesigns can be reasonable as well.

2. Function of the HST

The basic function of the ASIC is the amplification andconditioning of the voice-band signals that come in from theheadset’s microphone or are applied to the earphones,respectively. In addition, the presence of a headset mustbe detected. If no headset, or more precisely no microphone,is attached to the module, then a loop-back function is to beactivated such that the outgoing earphone signals are addedand fed back to the system in place of the microphonesignal. This function is also useful for testing purposesbecause the complete signal path through the system—including the CODECs and most of the analogue ampli-fiers—can be monitored.

The electrical specifications are given in Table 1, and Fig.1 shows a block diagram of one channel of the HST. TheASIC actually comprises two of them. Since there is only asingle supply voltage available, the drivers for the loud-speakers need differential outputs to meet the specifications.The detection of an attached headset is based on the addi-tional supply voltage required for the operation of themicrophone. If the headset is plugged in, the DC level atthe sense input is typically about 3 V. With the headset

Microelectronics Journal 30 (1999) 247–253

MEJ 501

0026-2692/99/$ - see front matterq 1999 Elsevier Science Ltd. All rights reserved.PII: S0026-2692(98)00113-X

MicroelectronicsJournal

* Corresponding author.E-mail addresses: [email protected] (T. Sauter) keroe@iaee.

tuwien.ac.at (N. Kero¨).

Page 2: Design of an analogue transceiver for speech communication systems

detached, this input is pulled towards the positive supply,and the comparator, whose reference voltage is set to 4 V,toggles. In this case, an external series resistor limits thecurrent through the protection diodes of the input pad.The output signal of the comparator is made available tothe system and on the other hand controls an analoguemultiplexer that switches between the microphone signaland the sum of the loudspeaker signals used for the loop-back function. The output of the multiplexer is buffered,which allows us to employ internal op-amps with relativelyhigh impedant outputs for the microphone and summingamplifier and small devices inside the multiplexer.

To be independent of the DC levels of the signals gener-ated by the CODEC, capacitive coupling is used. Thus theinternal reference potential could be set to its optimum valueVDD/2, which is derived from the supply by means of asimple resistive divider. An optional external capacitorconnected to the divider improves the PSRR, and this

analogue ground is carefully buffered to minimise crosstalkbetween the signals.

Like all circuits in air traffic control applications, thewhole system must comply with IEC 61000-4-2, whichrequires the circuitry to withstand ESD pulses of 8 kVapplied to its ports. Therefore all connections to the headsetare protected by additional transient voltage absorbers.Unfortunately, these devices impose a significant capacitiveload on the output drivers of the HST. Another importantrequirement is that for reliability reasons the drivers mustsurvive shorts between the output terminals as well asbetween the outputs and ground (a typical cause of such ashort is a mechanical damage of the headset cable). A shortto the positive supply, on the other hand, is practicallyprecluded by the system design and need not be providedfor.

3. Implementation details

While most building blocks of the HST could be takenstraight from the manufacturer’s library with only slightmodifications, the off-chip drivers for the loudspeakershad to be designed from scratch. The differential outputsare realised as a parallel combination of two single-endedamplifiers in inverting and non-inverting configuration (Fig.2). A series combination of an amplifier and a 1:1 inverter(as it often appears in textbooks [1]) would have been evensimpler, but turned out to suffer from an excessive phaseshift due to the capacitive load even at low frequencies.

The driver itself is based on an idea by Babanezhad andGregorian [2] with a few modifications. Its schematic andlayout are shown in Figs. 3 and 4, respectively. In contrast tothe original op-amp, which employed a folded-cascadeinput stage, we got by with a simple differential inputstage. The class A/B output stage uses two strings ofmatched transistor pairs to adjust the quiescent current ofthe output devices to a low level. In the present implemen-tation, the balance was disturbed by increasing the aspectratio of the output p-device. While this had only a moder-ately deteriorating effect on the offset voltage and thequiescent current, it greatly enhanced the positive outputvoltage swing. Still the output stage apparently has onlylimited sourcing (other than sinking) capability. This is,however, an advantage rather than a deficiency since no

T. Sauter, N. Kero¨ / Microelectronics Journal 30 (1999) 247–253248

Table 1Electrical requirements of the HST

Power supply voltage 1 5 VLoudspeaker driver

Output power 10 mWrmsLoad impedance 150–600V, 0.5–3 nFVoltage gain 20 dB

Microphone amplifierLoad impedance 20 kV 15 pFVoltage gain 0 dB

Summing amplifierVoltage gain 220 dB

Harmonic distortion ,1%

Fig. 1. Block diagram of the HST.

Table 2Op-amp characteristics

Offset voltage 21 mVQuiescent current 1.22 mAOutput voltage swing

RL � ∞ 0–5 VRL � 600V 0.45–4.6 VRL � 150V 1.25–3.75 V

Short circuit currentto GND 26.5 mAto VDD 44.4 mA

Page 3: Design of an analogue transceiver for speech communication systems

additional precautions need to be taken to limit the currentin case of a short to ground. A summary of the op-ampcharacteristics is given in Table 2.

The op-amp was compensated with the usual Millercapacitance. To achieve a good performance over the fulloutput voltage swing, the zero-nulling resistor in serieswith the capacitor was implemented as a transmission gate[3], which turned out to be superior to the single MOSdevice used in Ref. [2]. Fig. 5 shows the frequency response

of the op-amp with respect to the load. As can be seen, thefrequency compensation was designed for a nominalcapacitive load of 3 nF. For smaller loads, over-compensa-tion effects occur.

In order to judge the quality of the output signal deliveredto the loudspeakers, two criteria were regarded. The firstwas the total harmonic distortion due to a small input signalwith varying offset voltage, the second was the distortion ofa symmetric input signal with variable amplitude. Fig. 6

T. Sauter, N. Kero¨ / Microelectronics Journal 30 (1999) 247–253 249

Fig. 2. Block diagram of the differential loudspeaker driver.

Fig. 3. Schematic of the op-amp used for the loudspeaker driver.

Page 4: Design of an analogue transceiver for speech communication systems

shows the results, which exhibit the expected dependenceon the resistive load (particularly with respect to the voltageswing) but are practically independent of the load capaci-tance. Note that the graphs reflect the behaviour of the entireamplifier configuration of Fig. 2, hence the small range ofinput voltages.

Fig. 7 shows the layout of the entire HST. As mentionedabove, the IC contains two modules that are separatedroughly by the diagonale from the lower left to the upperright corner. The core is arranged in three columns, the outerones being occupied by the amplifier pairs for theloudspeaker drivers. The feedback resistors have beenplaced in the pad ring. At the top and bottom of the middlecolumn, one can see the low-noise microphone amplifiers inclose proximity of the respective IO-pads. Finally, thesumming amplifiers and the analogue ground buffer arelocated in the centre of the core. Some characteristics ofthe design are summarized in Table 3.

4. A note on the design project

At the beginning of the project, the economic constraintsseemed too stringent to be met by an ASIC design even if aonly cheap standard CMOS process with some analogueoptions such as a high resistive polysilicon was considered.

The initial development schedule was rather tough andwould not allow for a redesign. Even worse, the expectedannual quantity was only about 2000 pieces. Under normalcircumstances, these preconditions would have led directlyto a discrete design. Yet the pure technical advantages of anASIC made it worthwhile to thoroughly re-investigate theproject plan, and in the end the decision was made in favourof an integrated solution.

Apparently a number of essential requirements had to bemet for a successful design. The most important criterionwas the choice of the manufacturer. Apart from an appro-priate process, a suitable cell library had to be available aswell. Consequently the actual design work could focus onthe development of the loudspeaker drivers. Moreover, inorder to ensure a quick and frictionless sign-off procedure, acontinuous and close co-operation with the manufacturerhad to be established at a very early stage of the project.These conditions being satisfied, we could complete theactual design task within a short time. To our great satisfac-tion, the prototypes did fully meet the specification, and noredesign was necessary.

5. Conclusion

We have presented the design of an integrated transceiver

T. Sauter, N. Kero¨ / Microelectronics Journal 30 (1999) 247–253250

Fig. 4. Layout of the loudspeaker driver.

Page 5: Design of an analogue transceiver for speech communication systems

for speech communications systems. The key features arethe direct driving capability of headset earphones with anadditional capacitive load due to external ESD protectiondevices and a loop-back function for monitoring purposes.The development of an analogue ASIC helped the companyto reduce the system costs, increase the reliability by imple-menting additional monitoring functions, and to a certainextent standardize their products. The project proved thateven for small volume quantities an analogue ASIC design

can pay off compared with a discrete solution, as long ascertain boundary conditions apply.

Acknowledgements

The project was supported in part by the ‘Gesellschaft fu¨rMikroelektronik’. We also wish to thank Helmut Horvat

T. Sauter, N. Kero¨ / Microelectronics Journal 30 (1999) 247–253 251

Fig. 5. Frequency response of the driver amplifier depending on the capacitive and resistive load.

Page 6: Design of an analogue transceiver for speech communication systems

T. Sauter, N. Kero¨ / Microelectronics Journal 30 (1999) 247–253252

Fig. 6. THD simulation results of the loadspeaker driver.

Page 7: Design of an analogue transceiver for speech communication systems

from AMS for drawing our attention to the driver topologyand for valuable discussions.

References

[1] P.E. Allen, D.R. Holberg, CMOS Analog Circuit Design, SaundersCollege Publishing, 1987.

[2] J.N. Babanezhad, R. Gregorian, A programmable gain/loss circuit,IEEE J. Solid State Circuits SC-22 (1987) 1082–1090.

[3] K.R. Laker, W.M.C. Sansen, Design of Analog Circuits, McGraw-Hill,New York, 1994.

T. Sauter, N. Kero¨ / Microelectronics Journal 30 (1999) 247–253 253

Fig. 7. Layout of the HST.

Table 3HST characteristics

Process AMS 1.2mmChip area 4.7 mm2

Quiescent current 12 mA typically