development of an off-line silicon wafer warpage measuring

Development of an off-line silicon wafer warpage measuring tool

Linas Čapas

Master of Science Thesis TRITA-ITM-EX 2021:8

KTH Industrial Engineering and Management

Machine Design SE-100 44 STOCKHOLM

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Examensarbete TRITA-ITM-EX 2021:8

Utveckling av formmätningsverktyg för off-line mätning av vrängning hos kiselplattor

Linas Čapas

Godkänt

2021-01-18

Examinator

Ulf Sellgren

Handledare

Björn Möller

Uppdragsgivare

ASML Netherlands B.V.

Kontaktperson

Gijs Kramer

Sammanfattning Vrängda kiselplattor och de problem som uppstår på grund av det är ett känt fenomen inom

halvledarindustrin. För att kringgå dessa problem behövs god mätnoggranhet och det nuvarande

sättet att hantera vrängda kiselplattor på inom företaget är långt från idealt. En batch kiselplattor

hämtas hos kunden med antagandet att alla kiselplattor är identiskt vrängda. Ett enda exemplar

som representerar hela batchen väljs sedan ut och skickas till ett externt mätföretag. Metoden som

används för att mäta kiselplattan innehåller föroreningar och metoden repar även kiselplattan, som

därmed inte kan användas efteråt. Utöver mätmetodens brister tillkommer även en utökad logistik

och större materialspill som tillför kostnader för företaget.

Examensarbetets syfte är att förbättra mätmetoden som används för att utvärdera kiselplattornas

vrängning och målet med projektet är att utveckla en prototyp som tillåter att mätmetoden görs

internt inom företaget.

Rapporten innehåller metodiken som användes för att uppnå det slutgiltiga konceptet samt

resultatet, och innehåller planeringsmoment samt projektets delmoment som: WBS, GANNT,

funktionsnedbrytning, kravspecifikationer samt urvalsmatriser.

Det valda konceptet består av en sorteringsmaskin kombinerat med mätutrustningen och liknar en

FOUP (Front Opening Unified Pod), vilket tillåter sorteringsmaskinen att tillföra och byta ut

kiselplattorna som ska mätas. Mätutrustningen består av en roterande rörelse hos kiselplattan och

en linjär rörelse hos en konfokal sensor placerad ovanför kiselplattan. Kombinationen av de båda

rörelserna tillåter att hela kiselplattans yta mäts med ett givet vinkel- och radiellt steg. Genom att

vända kiselplattan uppochner med sorteringsmaskinen och utföra samma mätning igen kan

kiselplattans korrekta form estimeras genom att eliminera gravitationseffekten.

Konceptet utvecklades i detalj och tillverkningsunderlag och ritningar togs fram samt

komponenter avsedda för tillverkning av en prototyp beställdes. På grund av COVID-19 pandemin

uppstod dock kommunikationssvårigheter och förseningar i ledtider. Detta påverkade leveranserna

och en del komponenter kom inte fram förrän i slutet av examensarbetet och det fanns därmed

ingen tid över för montering eller tester som kan styrka konceptet, vilket får lämnas över till

företagets anställda.

Nyckelord: Mikrolitografi, Halvledare, Kisel, Kiselplatta, Vrängning.

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Master of Science Thesis TRITA-ITM-EX 2021:8

Development of an off-line silicon wafer warpage measuring tool

Linas Čapas

Approved

2021-01-18

Examiner

Ulf Sellgren

Supervisor

Björn Möller

Commissioner

ASML Netherlands B.V.

Contact person

Gijs Kramer

Abstract Warped wafers and all the issues arise with them. are known issue in semiconductor industry. To

solve those issues, the shape of the wafer needs to be known precisely. Current way of working

when it comes to warped wafers is far from ideal within the company. A batch of wafers is acquired

at customer’s site and it is assumed, that all the wafers in the batch are warped identically. A single

specimen, representing the whole batch, is then taken to external company to be measured. As the

method of measuring currently used contaminates and scratches the wafer, wafer must be scrapped

afterwards. All the logistics and scrapped wafers add unnecessary costs to the company.

To optimize the warpage measuring procedure, a graduation internship project was initiated with

a goal to develop a prototype of the tool, enabling inhouse warpage measuring.

The report contains all the methodology used to reach the final concept and results and includes

methods such as: WBS, GANTT chart, Functional breakdown, Design requirement specification,

Morphological matrix and PUGH’s matrix.

Final concept of warpage measuring tool consisted of implementing wafer sorting apparatus for

wafer handling and enclosing the measuring tool to a custom housing, resembling a FOUP (Front

Opening Unified Pod), allowing wafer sorting apparatus to load and unload test specimen for

measuring. The measuring concept consists of rotary stage, where the wafer is loaded and rotated

in addition to linear stage, that holds a confocal sensor above the wafer and moves it across the

surface of the wafer, measuring the profile of the wafer, rotated every defined number of degrees

between the measurements. Gravity induced deflection is eliminated by flipping the wafer using

same wafer sorting apparatus and measuring the wafer inverted, thus allowing to estimate the true

shape of the wafer.

The concept was developed in more detail, drawings for manufacturing the parts were created and

the parts for building a functional prototype were ordered. Because of the COVID-19 pandemic,

there were inevitable communication difficulties and delays in lead times, resulting in parts

arriving on the last days of the internship, leaving no time for assembling and testing the actual

prototype, therefore proof of concept is yet left to be tested by the employees of the company.

Keywords: Photolithography, Semiconductor, Silicon, Wafer, Warpage

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FOREWORD

I express my sincerest gratitude to ASML and all the people inside the organization for providing

me with the opportunity to write my master’s thesis at this astonishing company and always

helping me on the way even through this uncertain time of worldwide pandemic.

I would like to thank Gijs Kramer for trusting me with the assignment, welcoming me and guiding

me in every aspect during my stay at ASML.

Additionally, I would like to thank colleagues from the Service Lab, Modelshop, Wafer Processing

groups and everyone involved in general.

Finally, I am grateful for my academic supervisor Björn Möller and examiner Ulf Sellgren for all

the help while writing this thesis.

Thank you all.

Linas Čapas

Eindhoven, October 2020

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NOMENCLATURE

This chapter presents the notations and abbreviations used in the document.

Abbreviations and expressions

3D Three-dimensional

CAD Computer Aided Design

D&E Design and Engineering

DUV Deep Ultraviolet

EUV Extreme Ultraviolet

FEA Finite Element Analysis

FOUP Front Opening Unified Pod

FOSB Front Opening Shipping Box

Off-line External or separate, i.e., not within the photolithography machine

PEEK Polyether ether ketone

RFID Radio-Frequency Identification

TTV Total Thickness Variation

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TABLE OF CONTENTS

1 INTRODUCTION 12

1.1 Background 12

1.2 Purpose 12

1.3 Delimitations 13

1.4 Method 13

1.5 Sustainability and ethical considerations 14

2 FRAME OF REFERENCE 15

2.1 Introduction to chip fabrication process 15

2.2 Silicon wafers 16

2.3 Commercial wafer warpage measuring 18

2.4 Wafer handling and contamination 19

2.5 Warpage measuring 29

2.5.1 Measuring principle 29

2.5.2 Measuring sensor 32

2.6 Gravity induced deflection 37

3 IMPLEMENTATION 41

3.1 Functional breakdown 41

3.2 Product requirement specification 41

3.3 Concept generation 43

3.3.1 Concept 1 - Stationary measuring 44

3.3.2 Concept 2 - Line scanning 45

3.3.3 Concept 3 - XY vertical measuring 46

3.4 Concept evaluation 48

3.5 Concept development 49

3.5.1 Detailed design of mechanical system 49

3.5.2 Detailed design of electronics and control system 61

3.5.3 Wafer sorter integration 64

4 RESULTS 66

4.1 Manufactured parts 66

4.2 Assembled prototype 67

4.3 Measuring results 67

5 DISCUSSION AND CONCLUSIONS 68

5.1 Conclusion 68

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5.2 Discussion 69

6 RECOMMENDATIONS AND FUTURE WORK 70

6.1 Recommendations 70

6.2 Future work 70

7 REFERENCES 71

APPENDIX A: RISK ASSESSMENT TABLE 73

APPENDIX B: GANTT CHART 74

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1 INTRODUCTION

This chapter describes the background, the purpose, the limitations, and the methods used in the

presented project.

1.1 Background

This document is a documented report of a graduation internship project at ASML Netherlands

B.V. The graduation internship and the project results achieved during it will act as a master thesis

project to obtain master’s degree from KTH Royal Institute of Technology in Stockholm, Sweden

in Engineering Design study program, Machine Design study track.

The off-line warpage measuring tool is a part of an ongoing project within the company. The tool

is intended to change the way of working when it comes to issues that warped silicon wafers cause

as they are not perfectly flat and as they are used for production of semiconductor chips, even the

smallest imperfections of wafer geometry can cause issues. Current way of working is inefficient

and rather uncertain due to its nature. Currently, silicon wafer warpage is measured outside of the

company, thus many additional potential risks arise since silicon wafers are brittle and fragile to

handle. Transporting them to outside facilities and back takes multiple days and causes a risk of

wafers being damaged. Usually, a batch of warped wafers is acquired at a customer’s site. One

sample from the whole batch is then taken to external supplier for measuring. Measuring is done

by contact probe method in non-cleanroom environment, both factors contributing to

contaminating and scratching the wafer, irreversibly damaging it, which leads to scrapping the

wafer. It is assumed afterwards, that the measured warpage value is valid for the whole batch of

wafers.

The off-line warpage measuring tool would enable to measure and (or) verify every wafer

individually inhouse without having to scrap the wafer once it has been measured as the measuring

process now would-be non-contact and wafers would be handled in cleanroom environment by

automated machinery, leaving less error for human factor errors. All this combined results in wafer

warpage being measured faster and cleaner, allowing for potential financial savings as well.

1.2 Purpose

The purpose of this project is to develop a worked thorough concept of measuring the amount of

warpage present on silicon wafers in a clean, contamination free and non-contact way inhouse

cheaper, faster, while meeting the accuracy requirements, as well as to design, manufacture and

test a worked thorough prototype. To fulfil the purpose of the project, following research questions

will be addressed:

How to handle silicon wafers and measure silicon wafer warpage in a contamination free

way?

How deflection of a silicon wafer due to gravity could be eliminated during the measuring

procedure?

What methods and what hardware components could be implemented to measure the

warpage of silicon wafers to reach desired levels of measuring accuracy?

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1.3 Delimitations

Because of limited period of the Master Thesis internship as well as rather broad scope of the

project, the following delimitations apply to the project:

Due to Master Thesis project including manufacturing and testing an actual prototype, the

concept generation will be limited to an extent, that allows choosing the most feasible

concept to be developed in detail further on.

The parts will be designed with professional attitude, having economic, environmental and

performance impacts in mind, but no in depth FEA calculations will be performed to

optimize the parts once they are manufactured, unless they do not meet the performance

requirements.

Final appearance and user friendliness of the prototype will not be emphasized and will not

be considered to be a critical requirement since the project work will focus on functional

prototype that proves the concept and thus will be operated by qualified member of D&E

team.

A boundary condition is established, that silicon wafer handling equipment present in

premises of the company is capable of handling silicon wafers that are warped up to ± 1

mm, thus everything related to warped wafer handling is left outside of the scope of the

project.

No active particle measurement will be performed to estimate the cleanliness inside the

operating environment, the result is meant to be clean by design.

1.4 Method

Because of a broad project scope and a limited time available, a strong emphasis was put on project

planning and structuring the workflow. Using WBS, presented in Figure 1, following main stages

of the project were identified: Project planning, product development, product realization, project

closure and administrative. Each of the main stages were divided into smaller sub-stages.

A GANTT chart was created to plan and schedule the work throughout duration of the project. To

minimize uncertainty and risks, a risk assessment table was created. All are added as Appendices.

Since ASML has extensive knowledge in the field that is well documented, major source of

information was confidential documents of the company as well as interviews and meetings with

employees of ASML.

Because of the size and complexity of the company, variety of different departments get involved

in projects. For that reason, meetings were conducted with multiple employees from different

departments and a design requirement specification was finalized and approved by people of

multiple competences.

14

Functional breakdown of expected wafer warpage measuring tool was developed and the functions

were used in morphological matrix to generate multiple possible concepts. The concepts were

presented in an organized meeting with multiple team and group leaders from different

departments of the company and the final concept to be developed further was chosen.

1.5 Sustainability and ethical considerations

Throughout entire design process, a strong emphasis was put on sustainability and environmental

impact. The primary source of materials, manufacturing facilities and components was intended

to be internal facilities and resources of the company, the reason being faster lead times, no

transportation of the parts between multiple suppliers, better communication, allowing to notice

possible design and drawing flaws, leaving less room for errors. The initial sensor of choice was

chosen to be a different one that ended up in the final design, the reason being that a relatively old

sensor, which is not being produced by the manufacturer anymore, was found in stock at the

company’s measuring facilities. The sensor met all the performance requirements, however quite

a few design changes were needed to implement the sensor successfully, due to new sensor being

older, therefore bulkier, taking more space and having different mounting interfaces. Functionality

of the prototype could be easily further improved if needed and more features could be

implemented without having to completely discard the old version.

Figure 1. Work breakdown structure

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2 FRAME OF REFERENCE

This chapter provides the information about wafer warpage in terms of the warpage phenomenon

itself, its causes, and consequences as well as how warpage influences the work of ASML.

2.1 Introduction to chip fabrication process

Fabrication of semiconductor chips is a highly complicated process, involving many steps within

multiple disciplines. To fully understand the role ASML plays in the process as well as what is a

silicon wafer, what causes it to warp and what are the issues that arise with it, a simplified flowchart

of semiconductor chip fabrication process is presented below in Figure 2, and process step 5 is

where ASML’s machines are the key contributors.

Figure 2. Simplified flowchart of semiconductor chip fabrication process (van Gerven, 2017)

The first step of the long process is fabrication of a silicon wafer, which is the fundamental element

of a semiconductor chip. An ingot of crystalline silicon is formed by melting silicon and drawing

the molten silicon upwards, allowing it to cool down and form a solid cylinder-shaped ingot. The

ingot is then sliced into thin pieces, that are known as wafers. Wafers are then further processed

by lapping, etching, polishing to achieve needed geometric and physical properties.

Once the wafer has been processed, materials are applied to the wafer, such as silicon oxide layer,

silicon nitride layer and layer of photoresist. Once the wafer has been coated, this is the stage,

where ASML comes in. ASML manufactures photolithography machines, that use Deep

Finally, the chips are

enclosed in special plastic packaging in

another plant

Wafers are sawed out of a block (ingot) of very

pure crystalline

silicon

Polishing

Material deposition or modification

The resist is applied to a

spinning wafer to achieve a

uniform layer

Lithography for semiconductor manufacturing in a nutshell:

lenses shrink a mask pattern and project it

onto a wafer

Light

Reticle

mask

Lens

The chip pattern is “burned” into the

resist in an exposure step

The print is developed

through etching and

heating

Ion implantation The resist is

removed

The wafer processing cycle is complete, and

a single chip layer has been

fabricated

After all the required cycles

have been completed, the chips can be cut out of the

wafer and

tested

Wafer

Pattern being transferred onto wafer

Repeat thirty to

forty times

16

ultraviolet (DUV) or Extreme ultraviolet (EUV) light to expose reticle mask and transfer mask’s

patterns onto the wafer. This step, while briefly described in a single sentence, requires state-of-

the-art machines of enormous complexity. Exposed photoresist can then be chemically removed.

These patterns, where photoresist is removed, are then etched. Etched regions are exposed to

ionized gases, implementing ions to the features. These steps are then repeated multiple times for

multiple layers of the chip to be created.

When all layers are exposed, the wafer is cut into individual chips and then individually tested,

packaged, and proceeded for further usage.

Whole semiconductor chip fabrication process is explained in a very brief manner with plenty of

simplifications. It is done so to introduce the reader to the process, so further stages of thesis work

are understood better.

2.2 Silicon wafers

Silicon wafer is a thin slice of semiconductor, such as crystalline silicon, used for fabrication of

integrated circuits. The wafer serves as substrate for microelectronic devices built in and upon the

wafer as silicon has semiconductor material properties.

Wafers are formed of highly pure, nearly defect free single crystalline material. In the industry of

electronics, wafers are generally varying from 25 mm to 450 mm in diameter, most common being

the 300 mm ones. Wafer size has been increasing throughout the years due to the fact, that with

increasing wafer area, proportionally increasing amount of chips can be produced, while the price

of production step increases at slower rate than the area of wafer increases.

Basic properties of 200 mm and 300 diameter wafers can be found in Table 1 and multiple sized

patterned wafers can be seen in Figure 3 below:

Table 1. Silicon wafer properties

Wafer diameter, mm 200 300

Thickness, µm 725 775

Thickness variation, µm ± 10 ± 3

Weight, g 53 125

Figure 3. Patterned silicon wafers

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Warpage is a term used to define the height difference between the highest and the lowest points

of median surface of a free, unclamped wafer versus a reference plane that is globally parallel to

the wafer (ASML, 2020). Schematically warpage is depicted below in Figure 4.

Figure 4. Silicon wafer warpage (ASML, 2020)

Silicon wafers have orthotropic crystalline structure, therefore X, Y and Z axes are defined and

depicted in Figure 5 below.

Depending on the warp per axis, a few typical warpage shapes can be identified, and those terms

are commonly used within the company when referring to warped wafers:

Table 2. Terms used to define warpage shape

Shape Warp on X axis Warp on Y axis

Bowl + +

Umbrella - -

Saddle + -

Saddle - +

Taco 0 +/-

Taco +/- 0

In Figure 6 below, saddle, umbrella and taco shaped wafers are depicted.

Warp

+Y

+X

+Z

Figure 5. Axes of a silicon wafer

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Figure 6. Saddle, umbrella, and taco shaped wafers (Microchemicals GmbH, 2020)

2.3 Commercial wafer warpage measuring

Semiconductor industry being one of the most complex and technologically demanding industries,

requires cutting-edge equipment and machinery to keep pushing the limits and driving the world

further. Silicon wafer warpage is a well-known phenomenon and warpage measurement frequently

comes along with measuring additional properties of the wafer, such as thickness, total thickness

variation (TTV), bow, roughness, etc.

Commercial equipment for measuring mentioned properties exists with exceptional performance.

High performance of these instruments is valuable for wafer metrology purposes, however, the

measuring tool to be designed within this thesis is meant to be used for less accurate wafer

measuring than the commercial measuring equipment.

Several well-known tools can be seen summarized in a table below:

Table 3. Comparison of well-known commercial warpage measuring tools

Name KLA-Tencor PWG Ultratech 4G+ Sentronics

SemDex A31

FRT MicroProf

300

Picture

Warpage limit (mm) 0.5 0.7 8 0.6

Wafer handling Automatic Automatic Automatic Automatic

XY resolution (mm) 0.2 0.2 0.2 0.2

Z resolution (nm) 0.1 0.1 20 20

Warpage measuring

accuracy (µm) <0.1 <0.1 <1 1

Number of measured

points >1M >1M >1M >1M

Measurement method Optical, contactless Optical, contactless Optical, contactless Optical, contactless

Other measured

properties

Thickness, flatness, nano-

topography -

Thickness, flatness,

nano-topography -

Approximate cost €10M €4M €4M €4M

The tools mentioned above are highly complex, enabling them to be integrated into the

manufacturing and processing processes in semiconductor fabs. Less complex equipment and

methods for wafer warpage measurement can be found as well and are presented below.

E&H MX2012

Whole product series MX 20x from E+H is based on two heavy plates mounted parallel to each

other. In the plates, there are capacitive distance sensors mounted. The wafer can be loaded

automatically and manually depending on the tool’s model. MX 2012 (Figure 7.) allows measuring

thickness, TTV, warpage, stress of the wafers of 300 mm in diameter, 500-1000 µm in thickness,

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with an accuracy of 1 µm. MX2012 has an array of 69 capacitive measuring sensors, thus resulting

in 69 measured points across the wafer.

Figure 7. E&H MX2012 (E+H Metrology GmbH, 2020)

Contact probe measuring

This warpage measuring method is the most primitive one out of all mentioned. Warpage

measuring is carried out by using coordinate measuring machine (CMM), whilst the test specimen

is resting on 3 points on the bottom surface. An array of 177 points is probed, showing height

deviations across the wafer and curve fitting is performed within the points to get more detailed

results. To minimize gravity induced the deflection, the wafer is flipped, and corresponding points

are measured on a flipped wafer. This measuring method, while being simple, irreversibly

scratches and contaminates the wafer due to measurements happening outside the cleanroom,

mechanical probe touching the surface of the wafer and the wafer touching 3 metal support points

on both front and back surfaces. Another downside of this method could be added to the list as the

wafers are intended to be used further after warpage inspection, however, as the wafers are

scratched and can’t be used anymore, it is assumed that a single wafer represents a whole batch of

warped wafers. This assumption reduces the accuracy and result certainty for exact wafer

specimen. The advantages of this method over other methods are that warpage, thickness, and size

of the wafer are not limiting factors and even highly warped wafers can be measured. The setup

for contact probe measuring is depicted below in Figure 8.

Figure 8. Contact probe warpage measurement setup (ASML, 2020)

2.4 Wafer handling and contamination

Silicon wafers being such fragile items must be handled with extreme care. While blank wafers

are expensive, they become significantly more expensive once exposed and require even more care

when handling. As much as silicon wafers are vulnerable to handling, in production they are as

vulnerable to contamination. A single dust particle might ruin entire batch of chips on the wafer.

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Even though all wafers are handled in cleanroom environment, the wafer must be stored in a

special container – industry standard front opening unified pod (FOUP) and cannot even be opened

surrounding cleanroom environment if the wafer is meant to be further processed.

For those reasons, handling silicon wafers is usually done by automated equipment with enclosed

environment. One type of such machines is called wafer sorters. These machines allow multiple

FOUPs to be loaded and once loaded, wafers can be aligned, sorted, inspected, and moved from

one FOUP to another in enclosed environment with high positioning accuracy, gentle and

contamination-free handling. One of the wafer sorters is presented in Figure 9. Wafers of 300 mm

in diameter are industry standard, therefore wafers of such size can be handled by majority of the

equipment. For smaller, 200 mm diameter wafers, a different end effector of the robotic

manipulator is needed, therefore the same wafer sorter cannot be used to handle wafers of both

sizes without additional tweaks and hardware changes.

Figure 9. Wafer sorting machine by Brooks Automation (Brooks Automation, Inc, 2020)

Inside every wafer sorter, there is a robotic manipulator, which moves along the wafer sorter,

which is capable of gripping and manipulating the wafers. Such wafer handling manipulator can

be bought off-the-shelf and used for developing a custom solution for wafer handling. An example

of wafer handling robot is presented in Figure 10 below.

Figure 10. Wafer handling robot by Brooks Automation (Brooks Automation, Inc, 2020)

Looking into the scope of master thesis project, as it involved building and testing actual prototype

of the tool, the choice on wafer handling solutions becomes even more narrow. Developing a

device for wafer handling that has custom interfaces for loading and measuring the wafers would

be expensive and complicated multi-disciplinary project on its own and it would be unrealistic to

develop such machine in addition to actual warpage measuring instrument.

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Interface for wafer handling

In the semiconductor industry, silicon wafers are typically stored, carried, and transported in either

FOUP or FOSB (Front Opening Shipping Box) containers. These containers have unified top,

bottom, and frontal interfaces so they are compatible with all wafer processing equipment and

wafers are possible to load/unload for processing. The top interface consists of a flange, allowing

robotic carriers clamp and transport the container around the fab. The bottom interface

accommodates three V-shaped grooves acting as a kinematic coupling for precisely locating the

container on the tool, a rounded rectangle groove for securing and clamping the container to the

tool, and occasionally a RFID tag, so the container and stored wafers could be recognized by the

tool allowing for custom settings for a specific container. The front interface of both FOUP and

FOSB consists of a front frame with a removable door. All the standard tools in semiconductor

fabs are capable of opening and closing the door automatically after ensuring a tight connection

between the container and the tool. The plastic body of the container with removable door prevents

the stored wafers from external contamination.

Figure 11. Universal interfaces of a FOUP

Figure 12. Interface of a wafer sorting apparatus, where a FOUP is placed (ASML, 2020)

In case a custom solution is chosen to be developed to handle the wafers, it must be able to

accommodate the FOUP and open the front door automatically. In addition to that, FOUP must be

accommodated, meaning there must be three protruding pins, that allow FOUP to be accurately

located and seated every time it is loaded.

All mentioned features already exist on the standard wafer sorting equipment at premises of

ASML. This leaves no other rational option than to design the warpage measuring tool in a such

way, that usage of existing wafer sorting equipment is implemented. As adding additional

hardware to the inside of expensive commercial equipment is risky and yet results are uncertain,

the design choices are narrowed down to the warpage measuring tool resembling a FOUP.

Top interface

Frontal interface

Bottom interface

22

All the reasoning above would lead to the following design choices and realization of previously

mentioned functions – wafer handling, preventing contamination and providing interface for wafer

handling in a way, which is schematically depicted from the top view in Figure 13.

Specimen of warped wafers are stored in up to three FOUPs (depending on the configuration of

the wafer sorter), whereas one of the load ports is occupied by the warpage measuring tool itself.

The robotic manipulator inside the wafer sorter can pick up warped wafer from any of the FOUPs,

move and load it to the tool for measuring. Once the measuring is completed, the robotic

manipulator unloads the warped wafer and returns it to the same slot in the same FOUP or into

different FOUP if desired. A 3D visualization of the wafer sorter with warpage measuring tool and

a FOUP loaded can be seen in a Figure 14 below.

Figure 14. 3D CAD render of warpage measuring tool (green) as an add-on to the wafer sorting

apparatus with a standard FOUP (orange) loaded

Designing warpage measuring tool, that resembles a standard FOUP, so it can be integrated with

a wafer sorter is possible in a few methods that are covered below.

First option of providing required interfaces is modifying a standard FOUP by drilling holes and

adding supplementary parts and equipment needed to measure the warpage. This ensures all the

interfaces of a FOUP are correct and the tool can be successfully integrated with the wafer sorter.

There are a couple of downsides to this method, however. First and most important of all, FOUPs

are meant to be used for transporting and storing the wafers, not to be used as a base for precise

Warpage

measuring

tool FOUP FOUP FOUP

Wafer sorter

Test wafer

pickup/return

Test wafer loaded

for measuring

Wafer sorter moves the test wafer

Figure 13. Schematic drawing of warpage measuring tool as an add-on to the wafer

sorting apparatus

23

measuring equipment. The main body of a FOUP is made of polycarbonate material which is not

stiff enough to be used as a base for measuring equipment, where normally thick granite or steel

plates are being used. Secondly, using standard FOUP leaves very little to almost no space for

adding supplementary structures and parts to hold the sensor(s) and other parts or apparatus should

they be needed. A similar execution of a tool (not warpage measuring related) can be seen in one

of Estion-Technologies GmbH products below in Figure 15, where additional equipment is added

to a standard FOUP.

Figure 15. E-Wafer-Dockingstation of Estion-Technologies GmbH (Estion-Tech GmbH, 2020)

The second option is to design a custom enclosure, that resembles standard FOUP. This method

allows for designing stiff and robust structure with better utilization of the space available on the

wafer sorter between the load ports. While this method should lead to a better performance of the

warpage measuring tool, it is more challenging task to design the body of the tool, as it has to have

matching interfaces with a FOUP – the V grooves with a center hole for kinematic pins and active

clamping on the bottom surface, as well as the frontal interface, to accommodate the door from a

FOUP, ensuring a tight seal between the frame and the door, and also ensuring that door latch

correctly and can be automatically opened by the wafer sorter. Similar solutions of executing a

tool such way (not warpage measuring related) can be found in products from Brooks Automation

and are presented in Figure 16 below.

Figure 16. Custom tool for calibrating wafer sorting apparatus with interfaces of a FOUP

(MicroTool Technology, 2020)

24

Throughout the procedure of measuring the wafer, it is important to have the wafer located and

supported accurately and steadily the whole time. Ideally, the wafer should be supported without

adding any additional loads and stresses that lead to distortion from the original shape of the wafer.

In case the measuring procedure involves moving the wafer itself, wafer support shall be robust

against forces, vibrations and similar disturbances caused by the wafer moving mechanism.

During the research phase and talks with employees from ASML, many potential ways of

supporting the wafer were found. The complexity varies from having the wafer to sit on three

support points, to mechanically gripping the wafer by the edges and even suspending the wafer

mid-air by implementing vacuum and compressed air in cases where the requirements are the most

demanding.

In the sections below, a few most feasible options of supporting the wafer are presented and

explained in more detail.

Vacuum chuck

One of commonly used methods to support the wafer is using a vacuum chuck and a common

example of a vacuum chuck can be seen in Figure 17. A vacuum chuck is a cylinder with milled

pocket grooves on the top surface, where a flow of vacuum is provided to the grooves. When

silicon wafer is placed on top of the chuck, a tight seal appears between the pocket and the wafer

surface, resulting in silicon wafer being clamped to the chuck.

Figure 17. Vacuum chuck (MTI Corporation, 2020)

This method of wafer clamping is already used in some of the modules within ASML machines.

Implementing this method of supporting the wafer allows rotating the wafer while it is clamped.

Since warped wafers are in interest in this project, clamping not a flat wafer results in applied

clamping force over circular area, therefore the wafer is distorted from its original shape and to

get accurate results of wafer warpage, the additional deformation must be taken in to account.

Using this method, both 200 mm and 300 mm diameter wafers can be supported with no additional

tweaks. The downside to this method is that silicon wafers can only be supported on the bottom

surface, as flipping, and clamping the wafer would result in top surface being contaminated and

this would result in failing to meet the performance requirements stated in upcoming chapters.

Three-point support on the bottom surface

A plane can be defined by three points in space. Having three support points around the

circumference of the wafer it is guaranteed that wafer will stay stable, despite the shape of the

wafer. The supports are spaced 120° apart of each other. Three-point support on the surface case

is presented in Figure 18 below.

25

Figure 18. Schematic of three-point wafer support on the bottom surface (Ito, Natsu, & Kunieda,

2010)

In case the wafer is supported using this method, the stability of the wafer depends entirely on the

weight and the friction between the surface of the wafer and the support, since there is no active

clamping mechanism present, such as vacuum or mechanical clamping. In case the wafer needs to

be moved or rotated while being supported using this method, friction between the wafer and the

support and acceleration are the key factors for a stable wafer support.

This support method, however, would not fully comply with performance requirements (stated in

upcoming chapters) in case the wafer had to be flipped, as it would result in the top wafer surface

being touched, thus limiting the number of options to compensate for gravity induced deflection.

What is more, due to natural shape of wafer warpage, which tends to be mostly symmetrical with

respect to X and Y axes of the wafer, the wafer will most likely not rest horizontally, since the

supports are not symmetric with respect to X and Y axes. Depending on the measuring principle,

this might be a factor that needs addressing when measuring or processing measured data.

Using this method, both 200 mm and 300 mm diameter wafers can be supported with no additional

tweaks.

Three-point support on the edge

Like the previous method, the only difference is that the support points are moved further away

from the center and the wafer rests on the edge rather than resting on the surface as in the previous

method.

Figure 19. Schematic of three-point wafer support on the edge (Natsu, Ito, Kunieda, Naoi, &

Iguchi, 2005)

Having the wafer to rest on three points touching the very edge of the wafer, complies with design

requirement (described in upcoming chapters), which states that the wafer cannot be touched

further away than two millimeters from the edge and thus allowing the wafer to be flipped and

supported on the other surface should it be needed.

Supports

Wafer

120°

26

To simplify the post processing of measuring data in case the wafer cross-section is scanned, a

cutout slit for the beam of the sensor can be added to the support pins if wafer is supported by the

edge. Such case is presented in Figure 20. This would result in sensor registering only the values

while reading the distance to the wafer and registering no values while outside the range of the

wafer. This is only valid, when increments of rotation are chosen in a such way, that once the

support is located underneath the sensor, the sensor beam is located within the slot, not above the

protruding edges of the support.

Figure 20. Wafer support pin with a slit.

According to W.Natsu et al. (2005), three-point support is better in terms of positioning

repeatability and anti-disturbance ability when compared to one-point support (vacuum chuck).

Using this method, both 200 mm and 300 mm diameter wafers cannot be supported without

additional tweaks. Supporting a 200 mm diameter wafer on the edge would result supports sitting

on the surface of 300 mm diameter wafer. In case this support method should be implemented for

both type of wafers, support arms, holding the support pins, would have to be made extendable,

so in both cases wafer is supported by the edges.

Four-point support on the edge

This method is identical to the three-point support on the edge method, mentioned above, the only

difference being added fourth support point and now the supports being spaced symmetrically with

respect to X and Y axes of the wafer. While having fourth support might seem counter-intuitive,

as only three points are needed to define a plane, and four points would result in over constrained

system, in ideal case silicon wafer warpage follows symmetrical shape with respect to X and Y

axes of the wafer, the wafer would rest horizontally, as both wafer warpage and the supports would

be symmetrical with respect to the X and Y axes of the wafer.

However, the ideal case scenario mentioned is highly unlikely as even the smallest inaccuracies

would contribute significantly to inaccurate end results. Even though silicon wafer would deform

and comply to the four support points resting stable, this would result in deformed wafer, therefore

unreliable warpage measurement results.

Silicon wafer

Wafer support pin

27

Figure 21. Schematic drawing of saddle shaped warped wafer supported on four points on the

edge

Like for the three-point support on the edge mentioned above, same additional adjustments would

need to be implemented to support wafers of different diameters.

Mechanical edge grip

One of the methods available to grip and securely locate the wafer, commonly used in wafer sorting

equipment is mechanical grip. Supporting the wafer in such way does not contaminate nor scratch

any of wafer’s surfaces. This method requires at least three supports spaced 120 degrees apart and

at least one support to be extendable on longitudinal direction to apply the force and mechanically

clamp the edge of the wafer. Schematically, the method is depicted below.

Figure 22. Schematic drawing of mechanical edge grip (top view)

This method requires force being applied to the silicon wafer. As silicon wafer is very thin in

comparison to its diameter, even minor forces can cause unwanted deflections of the wafer. While

these minor deflections are not that critical when it comes to wafer handling in mentioned wafer

High

zone

High

zone

Low

zone

Low

zone

Support

point

Support

point Support

point

Support

point

Fclamp

Silicon wafer

Support in clamped

position

Support in unclamped

position Stationary support

Stationary edge supports

Retractable edge support

Silicon wafer

Figure 23. Schematic drawing of mechanical edge grip (side view)

28

sorting equipment, when measuring the wafer is in interest, deflections due to external forces

ideally should be non-existing, so the wafer is in its true shape.

Vertical wafer support

In case gravity induced deflection compensation method (discussed in further chapters) is chosen

to be to measuring the wafer vertically, the wafer must be supported accordingly. Horizontally and

vertically supported wafers are schematically presented below in Figure 25.

Figure 24. Horizontally and vertically supported wafer (Jansen, 2006)

To support silicon wafer vertically, it should be done by locating the wafer on 2 stationary V-

grooves on the bottom of the wafer and gently clamp it to a third support point. Such clamping

mechanism is schematically depicted in Figure 25. Even though such clamping method would

cause additional deformation on the wafer, it has been observed by Jansen (2006), that

deformations of a 200 mm diameter wafer with a thickness of 0.6 mm can be as low as 0-3 µm.

Figure 25. Schematic drawing of supporting the wafer vertically (Jansen, 2006)

As it is most likely for the wafers to be loaded and unloaded by existing wafer sorting machine, it

means that wafers will be handled in a horizontal orientation, eventually meaning that once the

wafer is loaded onto the measuring tool, the wafer will have to be rotated 90 degrees to a vertical

position. This results in additional tilting mechanism or stage that must be implemented, adding

even more complexity to the final design.

29

2.5 Warpage measuring

2.5.1 Measuring principle

Stationary multi sensor array

One of the least complex methods, requiring no moving actuators, stages or gantries is to place the

silicon wafer stationary and have multiple sensors to measure different points of the wafer.

Illustration of such principle is presented in Figure 26 below. The XY resolution of measured

results is dependent on the number of sensors. Such method is used in E+H instruments mentioned

in Chapter 2.2. Some of the instruments have as much as 69 sensors for wafers of 300 mm in

diameter. (E+H Metrology GmbH, 2020)

Figure 26. Multiple distance sensors measuring different locations of a surface (Keyence

Corporation, 2020)

The benefits of this method are that silicon wafer is measured stationary, meaning no additional

vibrations occur and affect the results and that it requires no moving mechanisms to measure the

wafer. The downside to it is that the number of sensors limits result resolution. In case dense

measuring grid is needed, the number of sensors and peripheral equipment to process sensor data

might become unacceptably expensive. Another limiting factor for the XY resolution is the size of

the sensor – resolution of measuring grid can be as dense, as densely sensors are mounted next to

each other. As an example, if a measuring sensor is a cylinder, 20 mm in diameter, and measures

a single point, physical spacing between measured points of two sensors is 20 mm and that is

excluding any additional space for hardware required to mount the sensors.

XY scanning

Like the contact measuring probe method, mentioned in Chapter 2.2, a contact probe can be

replaced with a contactless measurement sensor and wafer can be measured non-contact way,

eliminating, or reducing contamination and wafer damaging related to contact measuring method.

XY resolution of the measured grid now is limited by the measuring spot size of the sensor in

addition to the mechanical positioning resolution.

This measuring method allows to have a grid of points measured across the surface of the wafer.

Depending on the resolution requirements, number of points measured can be easily adjusted for

the optimal ratio between the measuring time and XY resolution of the results.

Positioning of the sensor above the wafer can be achieved using cartesian positioning gantry or

also a polar coordinate gantry. In case of cartesian gantry, silicon wafer shall remain stationary,

whereas the XY gantry is located above the wafer. A cartesian gantry wafer measuring setup was

implemented in a research by H.Liu, et.al. (2013) and is presented in Figure 27 below.

30

Figure 27. XY stage for wafer warpage measuring (Liu, et al., 2013)

The other option, polar gantry, is a convenient solution, providing more design freedom and better

utilization of the space available, since silicon wafer has a circular shape. Instead of having two

linear stages, positioning the measuring sensor on X and Y coordinates accordingly, one linear

stage is replaced with a rotary stage, thus resulting in positioning the measuring sensor in polar

coordinate system. Measuring grid and schematic drawing of such measuring system is presented

in Figure 28 below.

Figure 28. Polar coordinate system and schematic drawing of polar measuring system

Having a polar coordinate positioning system, and knowing the coordinate of a linear actuator and

rotation angle of a rotary stage, the position of the sensor can be transformed into cartesian

coordinates with a following relation:

{𝑥 = 𝑟 cos 𝜃𝑦 = 𝑟 sin 𝜃

(1)

where x, y – cartesian coordinates of the sensor, r – position of a linear stage, 𝜃 – angular position

of the rotary stage.

Using either of the methods to measure the wafer warpage would result in a point grid with height

values. Knowing X and Y coordinates, data fitting could be performed to get more dense height

map of the wafer in case measured grid is too sparse. Measurement grid can be plotted, and the

visual representation of measurement results can be expected to be as below in Figure 29.

31

Figure 29. Height measurement grid (ASML, 2020)

Line scanning

Same hardware setup as mentioned in the paragraph above allows for a slightly different execution

of measuring the wafer – section scanning. Instead of creating XY grid of measured points, the

wafer is scanned across a straight line through its center, and then another line across the wafer is

measured, rotated by defined angle around the center point of the wafer. Measuring method is

depicted below in Figure 30.

Figure 30. Wafer line scanning principle (Kobelco, 2020)

The resolution of measurement results using this method would be the same as using the XY

scanning method described in previous paragraph. Using the line scanning method, however, the

line scan is performed in one continuous movement in a single direction, in comparison to multiple

bi-directional steps when the grid is scanned. Using a single continuous movement minimizes the

influence on backlash of the mechanical components in the gantries improving the accuracy and

repeatability of the results.

Alternatively, instead of scanning a straight line and then rotating the wafer by an increment, it is

possible to perform a scan while rotating the wafer at fixed linear position and then moving the

sensor by an increment on the linear direction. This would result in multiple concentric circles

measured going from outside towards the center of the wafer. This method gives no advantage, it

might be more convenient to have measured data in that circular order for ease of post-processing.

Measured cross sections can be plotted in polar coordinates, resulting in 3D height map of the

wafer.

32

Edge scanning

The last method to be discussed is measuring the edge height of the wafer around the

circumference. This can be done either having a distance sensor mounted on XY positioning

gantry, as mentioned in previous paragraphs, yet using such measuring method on XY positioning

gantry would be inefficient, or using dedicated edge measuring sensor, while rotating the wafer

around its center point. While the latter method is commonly used for inspection of wafer edges,

detecting cracks and chipped edges, the height variation of the edge can be measured as well.

Measuring method is schematically depicted below in Figure 31.

This method requires only a rotary stage with a vacuum chuck wafer support and a single sensor

while providing detailed height measurements around the edge. The downside to this method is

that using such setup, a major part of the wafer is not measured. By placing the sensor to a known

position in relation to the vacuum chuck, the height of center part, that is clamped by the vacuum

chuck can be known in addition to the height of the wafer’s edge. The situation is schematically

depicted below from the top view, where the blue zone represents known or measured area,

whereas the orange color shows the unmeasured or unknown area. Wafer diameter depicted is 300

mm, diameter of the vacuum chuck is 50 mm and measured area around the edge is 20 mm wide,

as the measuring range is taken from product’s catalog by BRS-Bright Red Systems GmbH (BRS

- Bright Red Systems GmbH, 2020).

2.5.2 Measuring sensor

There are multiple ways of measuring silicon wafer warpage depending on the accuracy and

resolution needed. Majority of commercially available tools, some of them mentioned in Chapter

2.2, use highly expensive optical interferometers, that are unmatched in terms of accuracy and

resolution. For this project, considering the accuracy requirements, that are roughly an order of

magnitude lower, compared to commercially available equipment, interferometers were omitted,

and more conventional measuring tools and methods were evaluated.

Warped wafer

Rotary stage

Edge measuring

sensor

Warped wafer

Edge measuring

sensor

Vacuum chuck

Measured edge

height

Unmeasured area

Figure 31. Schematic drawing of wafer edge scanning

Figure 32. Schematic drawing of wafer edge scanning and the area that is scanned/not scanned]

33

According to definition of the term warpage in Chapter 2.3, warpage is defined as a difference

between minimum and maximum deviation of a mid-plane points from a reference plane, parallel

to the wafer. To measure true wafer warpage, mid plane of the wafer must be precisely known and

therefore wafer’s thickness would need to be measured, for the thickness variation of the wafer

not to affect the result accuracy.

In scope of this project, according to design requirement specification, requirement P.4 (stated in

upcoming chapters), the results of measured warpage must be within ±10 µm of actual warpage.

According to the document with a list of wafers used within the company provided by the company

itself, it can be observed that all 300 mm wafers come with TTV from 0 to 0.6 µm and wafer’s

center thickness within ±3 µm. This indicates, that even without measuring wafer’s thickness and

calculating the real distance to the median plane, but only by measuring the distance to wafer’s

surface, as long as the measuring sensor’s accuracy is within a range of ±6.4 µm, the performance

requirement is still met, and the necessity of measuring wafer’s thickness can be abandoned.

As stated by the product requirement specification in further chapters, requirement P.3, the

measurable warpage must be ±1 mm, meaning the sensor must have a measuring range of at least

two millimeters in an ideal case scenario.

While there are no hard requirements on XY resolution of the measurements, the measuring spot

size of the sensor might be one of the factors limiting the XY resolution. Depending on the type

of sensor, for measuring range of at least 2 mm and resolution of ±10 µm, measuring spot size

could vary from approximately 5 mm all the way down to 3 µm (Micro-Epsilon, 2020).

A several sensors to measure wafer warpage are covered in more detail below.

Capacitive displacement sensors

Capacitive proximity sensors are non-contact measuring devices, capable of high-resolution (up

to nanometer level) distance and thickness measurements. Working principle of capacitive sensor

is based on change of capacity between electrodes of the sensor when the distance between the

measured object and the sensor changes. Fairly simple construction of the sensor provides high-

accuracy measurements for relatively low price. The downside to capacitive sensors is relatively

large measuring spot size, meaning capacitive sensor is not well suited for measuring the warpage

by scanning the wafer with a single sensor for a high-resolution measuring grid and therefore well

suited for a stationary multi sensor array measuring.

For the criteria mentioned above, a suitable capacitive displacement sensor for measuring wafer

warpage can be found with following performance specifications:

Table 4. CSH2-CAm1,4 performance specification

Sensor code, manufacturer CSH2-CAm1,4, Micro-Epsilon

Measuring range, mm 2

Extended measuring range, mm 4

Linearity, µm ±0,5

Resolution, nm 1,5

Active measuring area (spot size), mm Ø 8.1

35

Confocal distance sensors

Confocal sensors optical distance measuring sensors based on reflected light principle.

Polychromatic white light is focused onto target surface by a multiple lens system, that are

arranged in a such way, that white light is dispersed into multiple color light. Depending on the

distance to the measuring target, one specific wavelength is focused on the target and it is being

reflected to a light sensitive sensor element. Depending on the color, thus wavelength, of the color

reflected to the light sensitive sensor element, the distance to a target object is determined.

Confocal sensors are capable of measuring thickness of transparent objects using a single sensor;

therefore, the thickness of a silicon wafer can be measured at any point as well, increasing the

measuring accuracy by eliminating the wafer thickness error.

Figure 33. Confocal sensor working principle (Micro-Epsilon, 2020)

While confocal distance sensors are highly compact, accurate and versatile, they are significantly

more expensive than the rest. Confocal sensors typically have a measuring spot size within the

range ≥ 60µm, going down all the way even to 3 µm. Such small measuring spot size makes these

sensors ideal for measuring the warpage by scanning the wafer using a single sensor. Using such

sensor, the XY measuring resolution is more likely to be limited by positioning accuracy of the

positioning mechanism rather than the sensor itself.

A confocal sensor, matching criteria mentioned above can be found with such performance

specifications:

Table 5. IFS2405-3 performance specification

Sensor code, manufacturer IFS2405-3, Micro-Epsilon


Linearity (distance), µm ±0,75

Linearity (thickness), µm ±1,5

Resolution, nm 36

Active measuring area (spot size), µm 9

While searching for a suitable measuring sensor, an existing confocal sensor was found at the

premises of the company. Even though the sensor is a relatively old one and is no longer produced

by the manufacturer, the performance specifications of the sensor match the ones needed for the

purpose. The specifications of the existing sensor can be found in the table below:

36

Table 6. IFS2401-3 performance specification

Sensor code, manufacturer IFS2401-3, Micro-Epsilon



Resolution, nm 120


Laser displacement sensors

Laser displacement sensors typically use a laser light source and a CMOS (Complementary metal–

oxide–semiconductor) detector. The light beam is projected through a lens to a target object, then

it is reflected from the surface and through another lens is focused to a CMOS detector. Depending

on the change of the distance to a measured object, the angle between projected and reflected beam

will change and that change is registered by the CMOS detector which translates the reflection

angle into distance. Working principle of laser triangulation sensor can be found in Figure 34.

below:

Figure 34. Laser triangulation sensor schematic and working principle (MTI Instruments Inc,

2019)

Like confocal sensors, laser triangulation sensors also tend to have small measuring spot size,

making them ideally suited for scanning the wafer with a single sensor. Suitable laser triangulation

sensor can be found with the following performance specification:

Table 7. ILD1750-2 performance specification

Sensor code, manufacturer ILD1750-2, Micro-Epsilon




37

2.6 Gravity induced deflection

Since silicon wafers have a large diameter over thickness ratio, wafers sag and deform significantly

when placed onto supports in comparison to the magnitude of wafer warpage. Gravity induced

deflection could be in order of tens of micrometers for a 200 mm diameter wafer all the way over

100 micrometers for a 300 mm diameter wafer according to Jansen (2006). As only the

deformation due to warpage is in interest, all the other causes of deformation must be eliminated

or reduced to a minimum, one of them being the weight of the wafer.

Figure 35 below illustrates the principle of eliminating gravity induced deflection. In the figure,

wafer is depicted supported by a single chuck, however, the principle stands for three-point support

as well. When wafer is horizontally resting on three support points, total deflection of the wafer

(y(x,y)) is superposed of deflection of the true shape of the wafer (s(x,y)) and also deflection due

to gravity (g(x,y)).

Figure 35. Schematic principle of wafer deflection due to gravity (Natsu, Ito, Kunieda, Naoi, &

Iguchi, 2005)

There are several methods of how gravity induced deflection could be minimized, each having

pros and cons compared to each other.

Measuring the wafer vertically

By placing silicon wafer vertically and freely supporting it, the wafer becomes substantially more

rigid and does not sag as if it was placed horizontally. Vertical wafer measurement is used in

commercial, high precision wafer inspection tools. It should yield the most accurate results out of

all methods proposed. However, such method is the most complex out of all, due to the reasons

mentioned in vertical wafer support section above.

Figure 36. Horizontally and vertically supported wafer (Jansen, 2006)

38

Inverting the wafer

This method is one of the most used methods amongst researchers and it is also the one used in

current way of measuring wafer warpage. What is more, using such method allows geometric error

of measuring equipment to be eliminated as the wafer would be measured twice, i.e., front, and

back surfaces. When the top surface of the wafer is measured, total deflection of the wafer can be

expressed as follows:

𝑦𝑓(𝑥, 𝑦) = 𝑔𝑓(𝑥, 𝑦) + 𝑠𝑓(𝑥, 𝑦) (2)

where according to Figure 35, y(x, y), g(x, y) and s(x, y) are total deflection, deflection due to

gravity and deflection of the wafer true shape accordingly, index t meaning top surface of the

wafer.

Similarly, the wafer is inverted and now the bottom surface is measured the same way and the

deflection of the bottom surface can be expressed the same way as for top surface:

𝑦𝑏(𝑥, 𝑦) = 𝑔𝑏(𝑥, 𝑦) − 𝑠𝑏(𝑥, 𝑦) (3)

where index b represents the bottom surface.

As the thickness deviation of the wafer is significantly smaller than the total deformation of the

wafer, it is assumed that deformation of the true wafer shape is the same for top and bottom

measurements:

𝑠𝑓(𝑥, 𝑦) = 𝑠𝑏(𝑥, 𝑦) = 𝑠(𝑥, 𝑦) (4)

It is also assumed, that gravity induced deflection is the same for measured top and bottom

surfaces, therefore expressed:

𝑔𝑓(𝑥, 𝑦) = 𝑔𝑏(𝑥, 𝑦) = 𝑔(𝑥, 𝑦) (5)

Subtracting two measurements at corresponding points yields the result of wafer warpage, which

can be expressed:

𝑠(𝑥, 𝑦) =𝑦𝑓(𝑥, 𝑦) − 𝑦𝑏(𝑥, 𝑦)

2 (6)

Gravity induced deflection can be acquired using the following equation:

𝑔(𝑥, 𝑦) =𝑦𝑓(𝑥, 𝑦) + 𝑦𝑏(𝑥, 𝑦)

2 (7)

Equations and description acquired from W.Natsu et al. (2005)

Implementing this method for minimizing the effect of gravity induced deflection requires no

additional hardware in case existing wafer sorting apparatus is implemented to manipulate the

wafers, as the apparatus has wafer flipping mechanism within itself already. After top surface of

the wafer is measured the data is stored. The operator would use the wafer sorting apparatus to

pick up the wafer from the tool, flip it, align the notch for precise grip and accurate placement, and

put the flipped wafer back to the measuring tool. It is worth mentioning, that once the wafer is

measured, in case it was rotated, it should be moved back to its initial position, then flipped and

39

loaded back. All the actions are executed automatically, therefore the accuracy of wafer alignment

and positioning is limited by performance of the wafer sorting apparatus, should it be used. As

finding information on existing wafer sorting apparatus was complicated, alternative industrial

solutions are found to be positioning the wafer within accuracy of ± 0.1 – 0.3 mm as well as rotary

aligning the wafer within ± 0.1 – 0.3°, depending on the model (Jel Corporation, 2020). The

performance of wafer sorting apparatus at the company’s premises is expected to match or even

outperform similar equipment with mentioned positioning and alignment accuracies, therefore the

positioning and alignment accuracy of the existing wafer sorting apparatus will be considered to

be the same. After surface of flipped wafer is scanned and data is stored, a calculation script would

be run where the data is stored to align corresponding measured points and perform the calculations

as described above. This method, however, is not possible if the measured wafer is supported on

a vacuum chuck or three-point support closer to the center, since if the wafer is flipped, wafer’s

top surface would be scratched and damaged while there is a “need” requirement, that wafer must

not be touched on the top surface.

Limitations of such method are that there are several assumptions made during the calculations

described above. For very accurate results, these assumptions should be replaced by actual and

weighted numbers, such as wafer thickness variation. Additionally, slope of wafer placement,

deflection due to stress of surface treatments should be considered. It is also assumed that stiffness

is linear throughout the warpage range, and that is something that should be investigated in more

detail for more accurate results.

Subtracting the sag of a flat silicon wafer

Another method to compensate for gravity induced deflection is to measure the sag of a flat silicon

wafer that comes with warpage ≤ 5.00 µm according to the documentation provided by the

company. After the top surface of a test wafer specimen is measured, for each corresponding point

of the measured wafer, sag value of corresponding point of flat silicon wafer, would be subtracted,

resulting in warpage of a free form wafer. This method, however, while requiring least effort and

no additional hardware is most likely to provide least accurate results as in this case it is assumed,

that the gravity induced deflection of a flat and warped wafer would be the same, even though with

higher amount of warpage on the wafer, the stiffness will change accordingly therefore

gravitational sag will change as well. The accuracy of this method could be easily tested and

compared to other methods once the prototype is assembled.

Subtracting FEA calculated sag

Last of the methods proposed to compensate for gravity induced deflection once more consists of

subtracting known sag value on corresponding measured points. Using this method, a FEA must

be performed to get gravitational sag values, which are then subtracted from measured deflection

of the wafer surface. This method requires no additional hardware mechanisms, only accurate

results of FEA. The downside of this method would be that result is dependent of quality of FEA.

Many factors contribute to the accuracy of the simulation results, one of which being mechanical

properties of the silicon wafer. Silicon wafer has orthotropic structure which results in different

material properties, depending on the orientation of the wafer, such as Young’s modulus, Poisson’s

ratio and similar. Multiple sources provide different values of mentioned properties. Depending

on the loading type and orientation of the crystalline structure of the wafer, Young’s modulus can

vary all the way from 130 GPa to 169 GPa (Hopcroft, Nix, & Kenny, 2010). What is more, while

measuring the wafer with gravitational sag, the true shape of the wafer is unknown and therefore

FEA might be inaccurate, as gravitational sag would be different for a flat wafer, bowl or saddle

warped wafers. As mentioned, such method requires no additional hardware mechanisms,

40

therefore if accurate FEA is performed, the results could be relatively easy compared to other

proposed methods.

All the proposed methods, expect measuring the wafer vertically, can be implemented without

additional hardware if wafer sorting apparatus is used for handling the wafers and the results can

be compared, leaving options for improvements.

41

3 IMPLEMENTATION

In this chapter the process leading to generated concepts is defined, including identifying the main

functions of the product, defining product requirement specification, and describing potential

solutions for executing the functions and therefore ensuring requirement criteria is met.

3.1 Functional breakdown

The first step in product implementation stage was to break down the intended functionality of the

product into sub-functions so the means to execute the functions could be found and developed.

The resulting function breakdown tree is presented in Figure 37. Resulting sub-functions were

used for product requirement specification in the upcoming stage of the project.

The functionality of the tool was divided into 3 categories: wafer handling, wafer measuring and

data acquisition, interpreting and result display.

Wafer warpage measuring

tool

1. Wafer handling 2. Wafer measuring3. Data acquisition, analysis

and result display

2.1 Measure the wafer warpage

2.2 Compensate gravity induced deflection

3.1 Process raw sensor data

3.2 Display results

1.1 Provide interface for loading specimen

1.2 Pick up the test wafer

1.4 Load the wafer

1.3 Orient/align the wafer

1.5 Support/fix the wafer

1.6 Unload the wafer

1.7 Prevent contamination of the test specimen

Figure 37. Functional breakdown of the warpage measuring tool

3.2 Product requirement specification

Since the project was initiated by the company to design and manufacture a functional prototype

so it can contribute to and enhance system testing and verification workflow, several employees

and stakeholders were invited to participate in finalizing design requirement specification that the

final product must meet. The criteria of the most critical requirements were identified as a need

whereas additional features, that would benefit the user, but are not critical, were identified as a

want. The full product requirement specification can be seen in Table 8 below.

42

Table 8. Product requirement specification

No. Requirement Criteria Verification Need/want

Performance

P.1 Measurable wafer diameter 300 mm Analysis/Testing Need

P.2 Measurable wafer diameter 200 mm Analysis/Testing Want

P.3 Measurable wafer warpage ± 1 mm Analysis/Testing Need

P.4 Measuring accuracy ± 10 µm Analysis/Testing Need

P.5 Measurable wafer thickness 775 ± (3 + coating thickness) µm Testing Need

P.6 Measurable wafer thickness 725 ± (15 + coating thickness) µm Testing Need

P.7 Measurable wafer thickness 1.2 mm ± (thickness variation + coating thickness) Testing Want

P.8 Measuring method Non-contact Analysis/Testing Need

P.9 Compensation for deflection due to

gravity

Accurate enough to satisfy measuring accuracy

requirement Analysis/Testing Need

P.10 Robust against wafer coatings,

exposed and processed features No influence on measuring performance Analysis/Testing Need

P.11 Coated and processed wafers must not

be damaged during the measuring

Sensor must not cause any damage to coated and

processed wafers (e.g., cure photosensitive resist) Analysis/Testing Need

P.12 Display magnitude of measured

warpage Absolute value of the warpage of the wafer is displayed Testing Need

P.13 Identify warpage shape Display amount of warpage on X and Y axis Analysis/Testing Need

P.14 Display 3D height map of the wafer Height map on measured points presented in a plot Testing Need

P.15 Amount of measuring points Enough to do curve fitting on X and Y axis to see how

measured points deviate from the curve Analysis/Testing Need

Operation

O.1 Step by step manual operation by the

operator

Wafer measuring sequence executed step by step by

operator input Demonstration Need

O.2 Automatic measuring via single

button push

Wafer measuring sequence fully automatic after pushing

the button Demonstration Want

O.3 Control via external computer Convenient enough for a trained member of D&E to use

it with an operation manual Testing Need

O.4 Single screen GUI Custom single screen GUI to be used alongside GUI of

wafer sorter Inspection Want

Wafer handling

W.1 Clean interface to load test specimen Accommodate FOUP of test specimen Analysis/Testing Need

W.2 Clean, closed environment handling Wafers loaded and unloaded automatically in enclosed

surrounding Analysis/Testing Need

W.3 Wafer support throughout the

measuring process Wafer supported either by edges or bottom surface only Analysis/Testing Need

W.4 No touching the wafer on the top

surface

Wafer can’t be touched or supported on the top surface

at any time Analysis/Testing Need

W.5

No touching wafer on the bottom

surface further than 2 mm away from

edge

Wafer can’t be touched or supported further away than 2

mm from the outer edge on the bottom surface Analysis/Testing Want

W.6 Wafer support must not scratch,

contaminate, or damage the wafer Non-metal wafer support Analysis/Testing Need

Spatial requirements

S.1 Weight Must be light enough to fit wafer sorter should it be

needed Inspection Need

S.2 Dimensions Must fit wafer sorter on outermost FOUP slots should it

be needed Inspection Need

Maintenance

M.1 Easily disassembled Easy to disassemble to improve the prototype, change

parts if needed Demonstration Want

43

3.3 Concept generation

To generate potential concepts of the final product in organized and structured way, a

morphological matrix was created and can be seen in Table 9. Functions that were identified in the

functional breakdown stage previously, were now listed vertically and multiple methods to execute

those functions were presented in the columns alongside in the matrix. As several functions could

be executed by the same means, therefore they were combined into the same function tabs and the

methods proposed could fulfill the combined functionality. Such case is seen in the second function

tab in the morphological matrix, where the body and housing of the tool would provide both

interfaces for wafer handling and protecting the inside of the tool and the test specimen from

outside contamination.

The concepts are generated going from top to bottom of the matrix by choosing one method per

function.

Table 9. Morphological matrix

Function Method 1 Method 2 Method 3 Method 4 Method 5 Method 6

1. Handling the

wafer

Wafer sorting apparatus Custom wafer

handling equipment

2.

Interface for

wafer

handling and

preventing

contamination

Modified FOUP Custom FOUP Custom housing

(not a FOUP type)

3. Supporting

the wafer

Vacuum chuck 3-point support on the

bottom surface

3-point support on the

edge Mechanical edge grip

4-point support on

the edge

Vertical

support

4. Measuring

sensor Capacitive sensor Confocal sensor Laser sensor

5. Measuring

the wafer

Stationary multi sensor

array XY scanning Line scanning Edge scanning

6.

Compensating

gravity

induced

deflection

Measuring the wafer

mounted vertically Inverting the wafer

Subtract FEA acquired

deflection value

Subtracting sag value

of a flat wafer

44

3.3.1 Concept 1 - Stationary measuring

Generation of the first concept is presented in morphological matrix below, going from top to

bottom for every function of the tool.

Table 10. Morphological matrix – concept 1

The first proposed concept makes use of wafer sorting apparatus for wafer handling. The main

structure of the tool resembles all the interfaces of a FOUP, so it can be easily integrated with the

wafer sorting apparatus for loading/unloading the wafers as well as protecting the wafers from

external contamination. Silicon wafers would be supported by three points on the edge of the

wafer. To measure the warpage, a stationary array of nine capacitive distance sensors should be

used. This arrangement of distance sensors would allow five points per axis measured on

orthogonal X and Y axes. Sparse array of measured points would require fitting a curve between

the points. Sensor arrangement is presented in Figure x. below. To minimize gravity induced

deflection, gravitational sag value, acquired by FEA could be subtracted, instead of inverting the

wafer, as it requires no additional mechanical hardware.


1. Handling the

wafer


handling equipment

2.

Interface for

wafer

handling and

preventing

contamination


(not a FOUP type)

3. Supporting

the wafer


bottom surface



4-point support on

the edge

Vertical

support

4. Measuring


5. Measuring

the wafer


array XY scanning Line scanning Edge scanning

6.

Compensating

gravity

induced

deflection

Measuring the wafer



deflection value


of a flat wafer

45

Figure 38. Concept 1 schematic top and front views

3.3.2 Concept 2 - Line scanning Generation of the first concept is presented in morphological matrix below, going from top to

bottom for every function of the tool. Dashed line indicates an alternative possible solution.



1. Handling the

wafer


handling equipment

2.

Interface for

wafer

handling and

preventing

contamination


(not a FOUP type)

3. Supporting

the wafer


bottom surface



4-point support on

the edge

Vertical

support

4. Measuring


5. Measuring

the wafer


array

XY scanning Line scanning Edge scanning

6.

Compensating

gravity

induced

deflection

Measuring the wafer



deflection value


of a flat wafer

46

The second proposed concept follows the first one for wafer handling and providing the

interface for that. Silicon wafer should be supported by three points on the edge. To measure

the wafer, both laser triangulation and confocal sensors are suitable options, as they both have

sufficient measuring accuracy and small measuring spot diameters. Confocal sensors are more

expensive than laser triangulation sensors, therefore laser triangulation sensor is preferred for

less expensive prototype. However, there was a possibility to use already existing confocal

sensor for this project, therefore the warpage should be measured using a confocal sensor.

Measuring the wafer itself should be done by line scanning method, i.e., wafer should be

supported on a rotary stage, and above it, a linear stage should move the sensor across the

wafer. To minimize gravity induced deflection, both wafer inversion method and subtracting

deflection value, acquired by FEA could be used as wafer sorting apparatus allows flipping the

wafer. The concept is schematically depicted below in Figure x.

Figure 39. Concept 2 schematic front view

3.3.3 Concept 3 - XY vertical measuring

Generation of the third concept is presented in morphological matrix below, going from top to

bottom for every function of the tool in Table 12.

The third proposed concept once again incorporates usage of wafer sorting apparatus and

embodiment of a custom FOUP. As the name of the concept suggests – wafer should be supported

vertically. Bottom of the wafer should be placed in V-shaped grooves and a small force should be

applied to the top of the wafer, pushing it against a support point and preventing the wafer tipping

over. Since wafer sorting apparatus can only load and unload the wafers in a horizontal orientation,

there should be a tilting mechanism added, so once the wafer is loaded to the tool by the wafer

sorting apparatus and is clamped in position, the wafer is rotated 90 degrees to a vertical

orientation. To measure the warpage, an XY positioning stage with a laser triangulation sensor

should be used, which should be located parallel to the vertical wafer. Measuring the wafer

vertically causes no significant gravity induced deflection on the shape of the wafer.

47



1. Handling the

wafer


handling equipment

2.

Interface for

wafer

handling and

preventing

contamination


(not a FOUP type)

3. Supporting

the wafer


bottom surface



4-point support on

the edge

Vertical

support

4. Measuring


5. Measuring

the wafer


array

XY scanning Line scanning Edge scanning

6.

Compensating

gravity

induced

deflection

Measuring the wafer



deflection value


of a flat wafer

Concept generation overview

Looking into 3 generated concepts a few observations can be made. First, handling silicon wafers

is a delicate process, requiring complex machinery, it was inevitable choice for this project to use

wafer sorting apparatus, as developing a custom wafer handling solution would be too

complicated. Following that, housing of the tool must also resemble standard FOUP with all its

interfaces to successfully integrate it with a wafer sorting apparatus. An existing FOUP could have

been implemented, but as it is dedicated for transporting and storing the wafers only, the space

inside is limited as well as plastic body of the FOUP makes it not a robust choice for a measuring

instrument. Therefore, all three concepts follow same wafer sorter and custom FOUP combination.

What is more, robotic arm inside wafer sorting apparatus is designed to handle wafers of one size.

That means, that handling multiple sized wafers is not possible and for that, the concept of the tool

will be designed for handling the most common sized wafers – 300 mm ones. If concept is proven

to be working, a similar tool can be designed for handling 200 mm diameter wafers. Compensating

gravity induced deflection is also a task, which can be executed in multiple ways. In case wafer is

measured horizontally, all but the first options of compensating gravity induced deflection can be

implemented and the most convenient one, yielding best results can be chosen for the future use.

48

3.4 Concept evaluation

While multiple concepts were generated in Chapter 3.3, to choose the one for further development,

a PUGH’s evaluation matrix was implemented. The criteria for ranking and evaluation were

generated both according to design requirement specification and also recommendations and

comments from experts within the company, including the ones to be using the tool if proven to

be successful and meeting the performance requirements.

PUGH’s matrix, however, served a purpose of being a guideline or recommendation. The choice

of the final concept was made during a meeting held with the same group of experts and fellow

employees of the company, and some ratings from the matrix came second to expert knowledge.

Importance factor was added to emphasize the key performance aspects of the tool (3 being the

most important, 1 – least important). Each concept was ranked in terms of how well it performs or

how well it matches the requirement (3 being good, 1 being bad). Score for how well concepts

meet the criterion is multiplied by the importance factor and the weighted sum of points is

presented in the last row.

Table 13. Scoring matrix

No. Criterion Importance Concept 1 Concept 2 Concept 3

1. Overall feasibility 3 3 2 1

2. Overall warpage measuring result quality 3 1 2 3

3. Z measuring accuracy 3 3 3 3

4. XY resolution 2 1 3 3

5. Mechanical system complexity 2 3 2 1

6. Price 2 3 2 1

7. Differently sized wafers can be measured 1 1 1 1

8. Electronics and control system

complexity 1 3 2 1

Sum: 18 17 14

Sum weighted: 39 38 33

The weighted results show that concept 1 got the highest score rating, while concept 2 came only

1 point short. Concept 3 has fallen behind the first two, due to higher mechanical complexity,

involving mechanisms that clamp the wafer, tilt it by 90 degrees, and XY stage to move the sensor.

This order of concepts turned out as expected. The simplicity of concept 1 results in highest

feasibility of manufacturing a prototype, as there would be only simple, easily manufacturable

parts and no off the shelf components, that could have a long lead time and result in delayed

assembly of the prototype. However, concept 1 would result in a very sparse measuring grid,

providing results that are merely satisfying and very reliant on polynomial curve fitting between

the measured points.

For that reason, it was decided to proceed with a concept 2 for further design and development.

49

3.5 Concept development

3.5.1 Detailed design of mechanical system

Concept overview

To better understand detailed design process later, a final CAD model of the concept is presented

below in Figure 40. The tool is shown without front door, which keep the inside of the tool clean

and the door is meant to be opened and lowered automatically by the wafer sorting apparatus.

Figure 40. Final 3D CAD model of the warpage measuring tool

In Figure 41, warpage measuring tool (green) is shown integrated with a wafer sorting apparatus

(white) and a FOUP container with warped wafer specimen inside (orange). Operation of the

tool, such as loading and unloading the wafers is covered in further chapters.

Figure 41. Wafer sorting apparatus (white) with integrated warpage measuring tool (green) and

a FOUP (orange)

50

Baseplate

Baseplate is intended to be used as a base to mount all additional components and assemblies on.

The baseplate needs to accommodate a linear stage, rotary stage, enclosure, and the bottom

interface grooves of a FOUP. The baseplate must be stiff and robust to make the warpage

measuring tool as an instrument robust and accurate, yet also light enough to make the tool easy

to transport and set up. Aluminum 5083-H111 is an ideal candidate for that purpose. Material stock

comes already machined within acceptable flatness and thickness tolerances. By choosing right

thickness of the baseplate, the part does not need to undergo various surface machining operations

to get the stock flat for further machining. CAD model of the baseplate is presented below in

Figure 42.

Figure 42. Baseplate from top and below

Initial choice of thickness was assumed to be 5 mm. To accommodate the depth of bottom grooves

of FOUP’s interface, additional bolted parts were designed. After design of complete mechanical

system reached the point where total mass of the system could have been evaluated, a rough FEM

analysis was performed on the baseplate.

The baseplate was constrained with enforced displacement Z=0 on two vertices furthest away from

the center on the slots, as well as displacement constraints X=0 and Y=0 on the same vertices on

one of the grooves to represent the kinematic pins from the wafer sorting apparatus, where the

baseplate will be seated. Mesh elements were chosen to be a size of 1 mm, judged by absence of

high local stress concentrations and continuous smooth gradient of deflection. FEA setup is

presented in Figure 43 below.

Figure 43. FEA mesh and constrains on a 5 mm baseplate

51

Initial FEM analysis shows vertical displacement results of roughly 370 µm, on the location, where

the pillars of linear stage are attached, since linear stage, which is meant to move the sensor and

scan the wafer will be attached to pillars, that are mounted towards the edges of the baseplate,

where the deflection is the highest. Too high deflections would cause unwanted stress on the

structure supporting the linear actuator and therefore robust and repeatable performance of the tool

would be compromised. The acquired deformation was deemed to be too high as it is more than

an order of magnitude higher than the wanted measuring accuracy of the tool. This resulted in

increased thickness from 5 mm to 15 mm. New thickness was sufficient to machine the interface

grooves directly on the plate, instead of having additional parts. Running the FEA again with same

conditions, resulted in vertical deflection less than 10 µm on the same locations, which is deemed

to be acceptable, as it is on the same order of magnitude as accuracy required.

Figure 44. FEA on the 15mm thickness baseplate. Red triangles show areas of interest of

deflection.

Rotary stage

The rotary stage consists of a housing, shaft-bearing assembly, wafer support arms, and a stepper

motor driven belt-pulley system with a gearing ratio i = 4. A CAD model of the rotary stage alone

is presented below in Figure 45.

52

Figure 45. Front and side view of the rotary stage with a silicon wafer loaded

The structure of the rotary stage consists of two vertical structural members, two cover plates and

a horizontal structural plate. All the parts have dowel pin holes and grooves for precise alignment

and assembly.

Belt-pulley gear system was designed to add more torque for driving the shaft and to prevent direct

coupling of the motor to the shaft, as it would result in relatively long drivetrain compromising the

spatial limits. The belt-pulley drive system also dampens the vibration better, compared to direct

coupling. What is more, belt-pulley system reflects less inertia to the motor by the square of the

gear ratio, in this case 42 = 16 times, causing less stress for the motor. The small pulley on the

motor is press-fitted and the big pulley is located by a setscrew. A section view of the rotary stage,

showing the essential components is presented in Figure 46 below.

Figure 46. Section view of the rotary stage

Wafer support

arms

Vertical

structure plate

Stepper

motor

Motor

mount

Belt-pulley

drive

Shaft-bearing

assembly

Top structure

plate

Hard homing

column and

pin

Silicon wafer

53

Vertical shaft is supported by two deep groove ball-bearings, that are pre-loaded by tightening the

bolt on the end of the shaft, as well as spring washers, for constant and even preload at any time.

The load path of the bearing assembly is shown in dashed red lines in Figure 47 below.

Figure 47. Shaft-bearing assembly

The big pulley is designed to have a protruding pin, limiting its’ rotation. The purpose of the

protruding pin is to ensure same home position of the rotary stage once the hard limit of rotation

is reached. Current design limits the rotation of the shaft to 340°, meaning the wafer can be rotated

in equal steps at minimum of 20°, meaning that line scanning is performed every 20°. To get full

360° of rotation, hard homing option should be replaced with more elegant solution, such as

contactless sensor to register home position or a rotary encoder on the shaft.

Figure 48. Rotary stage in home and 340° positions

Shaft

Bearing

housing

Deep-groove

ball bearing

Collar

Pulley

Preload

springs

Setscrew

Tensioning

bolt

54

Since the solution for finding home position for the rotary stage is chosen to be “hard homing”, it

means that few elements will be pushed against each other and cause stress. Stiffnesses of the

components can be roughly estimated, to identify the least stiff elements, suffering the most due

to such homing method. Parts that are mostly affected by the hard homing are labeled can be seen

in Figure 49 and Figure 50 below. Labelled items are listed in a Table 14 below.

Figure 49. Rotary stage assembly with labelled parts mostly affected by hard homing

Figure 50. Rotary stage assembly with labelled parts mostly affected by hard homing

Both motor and main shafts were modelled as cylinders of 5 and 15 mm in diameter respectively,

protruding pins were modelled as cantilever beams.

Stiffness of the cantilever beams were calculated using the following equation:

𝑘 =3𝐸𝐼

𝑙3 (8)

where 𝐸 – Young’s modulus of the material, 𝐼 – area moment of inertia and 𝑙 – length of the beam.

Area moments of inertia were acquired from CAD software.

Similarly, torsional rigidities of the shafts were calculated using the following equation:

1.

2.

3.

4.

5.

2.

4. 5.

55

𝑘𝑡𝑜𝑟 =𝐺𝐼𝑝

𝐿 (9)

where 𝐺 – shear modulus of elasticity, 𝐼𝑝- area moment of inertia, 𝐿 – length of the shaft. Area

moment of inertia for a circular section can be calculated as:

𝐼𝑝 =𝜋𝐷4

32 (10)

where 𝐷- diameter of the shaft.

Stiffness of the belt was calculated using equation presented below (Gates Mectrol, 2020):

𝑘𝑏𝑒𝑙𝑡 = 𝑐𝑠𝑝 ∙𝑏

𝐿 (11)

where 𝑐𝑠𝑝 – specific stiffness of the belt, provided by manufacturer, 𝑏 – width of the belt, 𝐿 – total

length of the belt not engaged to pulleys.

Calculated stiffness values are presented in Table 14 below:

Table 14. Stiffnesses of parts affected by hard homing the most

No. Part Stiffness

1. Shaft of the motor 54.43 Nm/rad

2. Belt 2.61 ·106 N/m

3. Shaft (smallest part) 16524.15 Nm/rad

4. Pin 22.9·106 N/m

5. Column 7.42·106 N/m

Wafer support pins are designed to be made from polyether ether ketone (PEEK). PEEK is one of

a few materials, that can be in contact with silicon wafers. The wafer is meant to rest on three

supports with no additional clamping mechanism, meaning that only friction force prevents wafer

from moving once it is being rotated. Friction force between the wafer support and the wafer itself

resists the inertial torque of the rotating support mechanism. Since the torque is dependent on the

rotating inertia and angular acceleration of that inertia, the angular acceleration becomes a limiting

factor if the wafer will remain stable.

Figure 51. Silicon wafer resting on the support

Silicon

wafer

Supporting

arm

Supporting

pin

56

A rough estimation of the critical acceleration is presented below. When shaft rotates with a wafer

on it, it accelerates and creates the torque, that can be expressed as:

𝑇 = (𝐽𝑠ℎ𝑎𝑓𝑡 + 𝐽𝑤𝑎𝑓𝑒𝑟)�̈� (12)

where 𝐽𝑠ℎ𝑎𝑓𝑡 is rotational moment of inertia of the shaft assembly including pulley, wafer support

arms, mounted on the shaft, 𝐽𝑤𝑎𝑓𝑒𝑟 is rotational moment of inertia of the wafer, and �̈� is angular

acceleration.

When a silicon wafer is placed on the supporting pins, it creates a friction torque, between the

wafer and surface of supporting pins, when shaft starts to rotate. Friction torque can be expressed

as:

𝑇𝑓𝑟 = 𝐹𝑓𝑟𝑅 (13)

where 𝐹𝑓𝑟 is a friction force between the wafer and support pins and R is radius of the wafer. 𝐹𝑓𝑟

can be calculated with the formula:

𝐹𝑓𝑟 = µ𝑚𝑔 (14)

where µ is friction coefficient between silicon wafer and support pins, 𝑚 is mass of the wafer.

Slippage between the wafer and the rotating supports will occur, when 𝑇𝑓𝑟 = 𝑇. Rearranging the

equations results in formula to find the critical acceleration:

�̈� =µ𝑚𝑔𝑅

𝐽𝑠ℎ𝑎𝑓𝑡 + 𝐽𝑤𝑎𝑓𝑒𝑟 (15)

𝐽𝑠ℎ𝑎𝑓𝑡 of rotating assembly is acquired from a CAD model and is equal to 0.596*10-3 kg·m2. µ is

assumed to be equal to 0.2, based on a rule of thumb figure, commonly used within the company,

when doing rough calculations to get a ballpark range. Mass of the wafer is 127.5 grams and 𝐽𝑤𝑎𝑓𝑒𝑟

can be calculated as a rotational moment of inertia for a disk and is equal to 1.4*10-3 kg·m2.

Performing the calculation yields a critical angular acceleration of the shaft assembly to be 18.48

rad/s2. Since the shaft assembly is connected to the motor via belt drive with a gear ratio i=4,

critical angular acceleration of the motor is correspondingly 4 times higher, which corresponds to

73.92 rad/s2.

57

Linear stage

Linear stage is meant to move measuring sensor across the wafer’s surface. For that purpose, a

stepper motor driven leadscrew actuator was used. Since linear actuators are common components

in machine design industry, a broad range of choices exist. Since the wafer will be measured both

ways – normal and inverted (flipped), systematic error can be identified and corrected, therefore

the linear actuator can be rather simple and does not need to be high precision one. For that reason,

an actuator of choice was Haydon Kerk BGS 06.

The leadscrew has a pitch of 6.25 mm and the stepper motor has a step angle of 1.8°. In addition

to that, stepper motor drive enables micro stepping mode, reducing the step angle up to 64 times.

Theoretically, in ideal case scenario, the maximal actuation resolution of the drive can be

calculated as follows:

𝑟𝑒𝑠𝑜𝑙𝑢𝑡𝑖𝑜𝑛𝑚𝑎𝑥 =𝑝𝑖𝑡𝑐ℎ ∗ 𝑠𝑡𝑒𝑝 𝑎𝑛𝑔𝑙𝑒

360 ∗ 𝑚𝑖𝑐𝑟𝑜𝑠𝑡𝑒𝑝𝑝𝑖𝑛𝑔 𝑣𝑎𝑙𝑢𝑒=

6.25 ∗ 1.8

360 ∗ 64= 0.000488 (𝑚𝑚) = 0.488 (µ𝑚)

This number is however unrealistic in real life scenario, as thermal expansion, precision of the

parts, backlash and similar factors will contribute to the inaccuracies. What is more, such high

positioning accuracy is not needed for measuring wafer warpage. Therefore, it is safe to assume,

that positioning accuracy for the linear stage can go as low as 0.2 mm.

To support linear actuator, a portal shaped structure was designed. The structure consists of two

vertical stainless-steel pillars and a horizontal, stainless-steel connecting plate. Mating surfaces

were machined for precise alignment and assembly.

Figure 52. Baseplate with linear actuator mounting gantry

One of the vertical pillars has a hole and a slot for alignment pins, to locate the assembly precisely

in relation to the baseplate and the rotary stage and is directly bolted to the baseplate from

underneath. To provide repeatable results in case the structure must be disassembled and

reassembled again, the structure is meant to be assembled by aligning the parts to each other, then

whole assembled structure is located using two dowel pins on one of the pillars, whereas the other

pillar rests on a small contact area on the baseplate. Milled pockets around the contact area

58

accommodate displacements, if any, instead of over constraining the assembly and causing

unpredictable deflections are internal stresses, which result in unreliable measuring results. The

pillar, resting over small contact area is attached to the baseplate via intermediate block, that has

holes with a significantly larger clearance between a hole and a bolt, therefore allowing the pillar

to be attached without over constraining and without internal stresses (Figure 53).

Figure 53. Intermediate connecting plate, attaching the gantry to the baseplate

To precisely locate and mount linear actuator to the structure, the plate has milled surface and

machined dimples, two on the bottom and one on the right side, where the actuator is accurately

positioned before attaching it to the plate. Dimple locations are shown in Figure 54 and attached

linear actuator is shown in Figure 55.

Figure 54. Locating dimples on a mounting plate

Figure 55. Linear actuator located on the mounting plate

59

Enclosure

To provide enclosed environment and prevent sensitive wafer surface from contamination, an

enclosure was designed. The enclosure consists of a frame made from Bosch-Rexroth aluminum

extrusion profiles, polycarbonate cover plates and 3D printed protruding covers.

Aluminum extrusion profiles were chosen as the structure because they are easily accessible and

quick to work with and require very little additional machining. What is more, aluminum

extrusions come with anodized surface as per standard, requiring covering only machined ends,

where bare aluminum is exposed. To prevent particle emission, bare ends of machined extrusions

were covered by thin layer of epoxy glue/masking tape. Extrusions on the front side of the

enclosure, have through holes for attaching the frontal FOUP’s interface, where bare aluminum

surface is also exposed. To cover surfaces of the holes, press-fit bushings were designed out of

POM.

Figure 56. Enclosure with covers on

Figure 57. Aluminium extrusion with a bushing, securing the frontal interface

To fully enclose the frame, polycarbonate plates were designed to be laser cut and attached to the

aluminum construction. Side and top plates have cutouts to allow protruding elements of the tool

60

to be mounted. To cover protruding elements, covers were designed to be 3D printed in-house. To

route all cables and wires outside of the enclosure, a cable entry system from company Icotek was

added to the top cover. The solution consists of a frame and square grommets with cutouts for

wires, that are clamped and provide tight seal when cables transition from the inside to the outside

of the tool.

Figure 58. Cable entry system

A standard FOUP consists of the pod itself and removable front door. Since the tool must be

integrated with the wafer sorter, the enclosure must accommodate FOUP’s door. For that reason,

a set of parts were designed to be mounted on the frontal side of the aluminum frame. For ease of

manufacturing, whole frontal piece was designed to be an assembly instead of a single part. Parts

were designed to be made from polyoxymethylene better known as POM. Top and bottom pieces

of frontal interface have milled pockets, where FOUP’s door latch to fully enclose the inside of

the tool.

Figure 59. Frontal interface of the tool

Rigid

frame

Compressible

elastic grommets

with cutouts for

cables and wires

Grooves for

latching FOUP

front door

61

3.5.2 Detailed design of electronics and control system

Operation logic flowchart

To present the operating logic of the tool, flowcharts below were implemented. Since the chosen

concept allows several ways to scan the wafer, two different flowcharts were presented. Since all

the hardware used is the same, the only difference between the two methods would be only visual

representation of the results, which is entirely preference of the user, for convenience of further

data processing.

The first flowchart in Figure 60 presents the operation of the tool, when wafer is scanned line by

line, rotating the wafer by an increment in between each scan.

Figure 60. Operation flowchart for line scanning method

62

The flowchart in Figure 61 presents operation logic of the tool, where wafer is scanned by rotating

it by 360° and moving it closer to the center every increment once it has been rotated.

Figure 61. Operation flowchart for concentric scanning method

Electronics system overview

From the previous chapters it can be observed that there are two motorized actuators that need to

be controlled. In addition to that, data from the sensor needs to be recorded, stored, and accessed

afterwards. A schematic overview of a general control system to execute the functions can be seen

in Figure 62. below. PSU in Figure 62 stands for power supply unit.

PLC

Motor driver

Motor driver

Stepper motor

Stepper motor

PSU Logic

Measuring sensor

Sensor controller

PSU Motor

Figure 62. Schematic overview of the electronic and control system.

63

The red arrows represent power signals whereas green arrows represent logic signals.

To reduce the number of hardware components, a solution from Haydon-Kerk was chosen. Since

the performance of the tool has no requirements on dynamic performance, nor needs high

computational power, a simple hardware can be implemented.

IDEA Smart stepper motor drives are easily programmable through graphic user interface (GUI)

on a computer. These drives can provide up to 2.6 A continuous current and each has 4

programable digital input and output channels allowing to trigger data recording and storing on

the sensor’s controller as well as triggering actuation of the stepper motors once the reading of the

sensor changes. Therefore, stepper motor drives serve the purpose of the programmable logic

controller (PLC)

There are few options of how to execute the actuation of the drives. For the first stage of testing

the concept, it is suggested to connect both drives and control them manually, meaning once the

line scan is complete, the operator manually sends the command to rotate the rotary stage by one

increment and then sends another command to trigger the linear stage and data logging.

To synchronize and control both linear and rotary actuator, both drives can be connected to the

same bus and same computer using RS-485 communication protocol. Using this method, a unique

identifier is assigned to each drive, and every command line from the computer must be sent to the

drive with the identifier, so it is ignored by other axis.

Since there are only two motorized actuators in the warpage measuring tool, another option is to

use master-slave principle, where only one drive is connected to the computer and both drives are

connected together. The master drive is then programmed through USB connection through IDEA

Graphic Interface Software and digital outputs of the master drive can be sent to the slave drive

and act as triggers to execute the wanted commands. To illustrate the case using warpage

measuring tool, the master drive could be the one driving linear actuator, whereas slave could be

the one driving rotary stage. A command is sent to the master drive to drive the actuator until the

end of stroke, scanning the cross section of the wafer. Once the command is executed, a triggering

signal is sent from the master drive to the slave to rotate the rotary stage with the wafer by one

increment and then steps are repeated until complete wafer is scanned.

While the first proposed method has a lot of unnecessary manual work for the operator, it is a

beneficial to run the tool this way as it reduces the risk of malfunctioning and the operator has

more control over the process in case something goes wrong.

The pros and cons of the other, more automated methods are not that significant and depends more

on the preference of the operator. The method of connecting both drives together and assigning

each drive a unique identifier should allow programming the whole sequence in the same window,

making it slightly more convenient and easier to handle.

More accurate schematic representation of the control system with the chosen components is

depicted below in Figure 63.

64

Master motor drive

Slave motor driver

Stepper motor (rotary stage)

Stepper motor (linear stage)

PSU

Measuring sensor

Sensor controller

Figure 63. Overview of the electronic and control system

3.5.3 Wafer sorter integration

As the warpage measuring tool is meant to be integrated with the wafer sorter, there are quite a

few challenges to be faced. While there are only few types of FOUPs being used, for every type,

there is a list of wafer sorter parameters stored, defining coordinates and additional parameters,

such as offsets, for smooth and successful wafer handling.

The way this warpage measuring tool is designed, is that wafer sorting apparatus is ”tricked” into

thinking, that a standard FOUP is loaded. Warpage measuring tool does not have RFID tag yet

implemented, that would allow wafer sorting apparatus to only access a single slot, where the

warped wafer specimen needs to be loaded and unloaded for measuring. All the interfaces and

wafer supports in the warpage measuring tool are designed at such height, that even without having

the ability to adjust the placement coordinates of the wafer sorting apparatus (because no RFID

implementation yet), wafers can be set to be loaded onto 11th slot of a standard FOUP (counting

from bottom towards the top). Figure 64 shows a standard FOUP and warpage measuring tool

stacked on each other in CAD environment and Figure 65 shows a close-up of wafer placement in

both FOUP and warpage measuring tool.

Figure 64. Warpage measuring tool together with a standard FOUP located on the same height

on the bottom interface

65

Figure 65. Warpage measuring tool together with a standard FOUP located on the same height

on the bottom interface. Matching slot heights

Standard wafer loading/unloading procedure consists of lifting up/lowering down the wafer

roughly by 5 mm, prior to moving it outside the FOUP. This ensures and allows current design of

wafer supports to be implemented, even though the wafer sits flush with respect to the top of the

support. In Figure 66 below, isolated rotary stage, silicon wafer and a purple robotic gripper from

wafer sorting apparatus is shown. Normally, the gripper is inside wafer sorter. When a wafer needs

to be loaded/unloaded, it comes all the way inside to a FOUP, grabs the wafer, lifts it up slightly

and takes it back to wafer sorter for further actions. Wafer unloading sequence is presented in solid

arrows, whereas unloading sequence is presented in dashed lines in Figure 66 below.

Figure 66. Top and side views of the wafer being loaded by the robotic end effector of wafer

sorting apparatus

66

4 RESULTS

In the results chapter the results that are obtained with the process/methods described in the

previous chapter are compiled and analyzed and compared with the existing knowledge and/or

theory presented in the frame of reference chapter.

4.1 Manufactured parts

Majority of the parts for the prototype, as described in the previous chapters, were CNC milled

and turned. All the cover parts were laser-cut, as they were made of polycarbonate and thin

stainless steel. Protruding parts were 3D printed using a FDM technique. As per standard of the

company, all aluminum parts for tooling equipment were anodized in red color to protect the

surfaces and prevent particles of bare aluminum contaminating inside of the tool.

Some of manufactured parts can be seen in figures below:

Figure 67. Manufactured baseplate

Figure 68. Manufactured parts

Figure 69. Manufactured actuator mounting plate

67

4.2 Assembled prototype

Once majority of the parts arrived, the prototype was assembled. Before graduation internship

came to an end, there were parts that had not been delivered, therefore a complete prototype could

not have been assembled. Assembled prototype, without the sensor and cable entry system can be

found below in Figure 70.

Figure 70. Assembled prototype (excluding the sensor and cable entry system)

4.3 Measuring results

Before graduation internship came to an end, some parts still had not been delivered, therefore full

measuring tests could not have been performed and the actual performance of the tool is yet to be

tested. However, it is possible to theoretically evaluate the factors contributing to measuring

accuracy and results.

The list of factors is presented in a Table 15 below.

Table 15. Factors contributing to an error of measuring results

Factor

Measuring accuracy of the sensor

Wafer placement position and the Z position difference once placed

Inverted wafer placement position and the Z position mismatch from non-inverted

wafer placement position

Mismatch of wafer support pin geometry

Gravity induced deflection estimation error

Thickness variation of the wafer

68

5 DISCUSSION AND CONCLUSIONS

A discussion of the results and the conclusions that the authors have drawn during the Master of

Science thesis are presented in this chapter. The conclusions are based on the analysis with the

intention to answer the formulation of questions that is presented in Chapter 1.

5.1 Conclusion

Warped wafers are a well-known problem within the company and the way of working when it

comes to measuring wafer warpage is far from ideal. To optimize the process by measuring the

warped wafers inhouse, this graduation internship project was initiated.

As a result, a concept of off-line warpage measuring tool is proposed. The concept was developed

in a structured and organized way, implementing tools and methodologies of a new product

development. The final proposed concept could also be suitable for in-line usage. However, in-

line usage would require additional changes or improvements, such as improved contamination

protection, ensuring the components and parts can be used in machine environment.

Three concepts were proposed for a measuring tool, that should perform and execute the functions

according to the design requirement specification.

Automatically handling warped silicon wafers is a complicated task and the handling equipment

is highly complex and expensive. For that reason, measuring tool was designed as an add-on to

the wafer sorting apparatus, enabling wafers to be loaded and unloaded onto the tool. Wafer sorting

apparatus is however limited in terms of handling warped wafers to what is currently successfully

tested at ±800 µm according to the employees of the company and the tests are still ongoing.

Limitations of wafer sorting apparatus might result in performance requirement P.3 from design

requirement specification not to be fully met. The process of integrating warpage measuring tool

with a wafer sorting apparatus is a challenging task, ensuring no failures happen, therefore the

integration process must be thoroughly and carefully tested.

To measure true shape of the wafer, several methods were proposed to minimize the effects of

gravity induced deflection. Most of the methods required no additional mechanisms, besides

already existing wafer flipping module inside the wafer sorting apparatus. The methods are

described in the report, nonetheless, they are well known to the employees of the company. The

current design of the tool leaves options for testing all, but vertical wafer measuring method, so

the results can be compared and the most accurate one could be chosen.

The proposed concept is based on rotating the wafer around its’ center point and scanning the

surface in straight lines, measuring the deflection of the wafer. This method allows for simple

visualization of the results and quick testing. Both rotary and linear axes could be coupled to scan

the XY grid of the wafer, so existing scripts and methods of analyzing and plotting the results can

be retrofit if needed. The measuring tool is equipped with an existing confocal sensor, even though

the specifications of the sensor are too advanced for the required performance of the tool. The

confocal sensor, however, can be changed to a laser triangulation sensor for slightly worse

measuring results, yet still meeting design requirement specification, while costing less.

69

5.2 Discussion

The proposed concept of the warpage measuring tool has potential of becoming highly valuable

addition to the portfolio of measuring instruments of ASML and change the current way of

working when it comes to measuring warped silicon wafers. If the prototype is proven to be

performing as intended and it can be successfully integrated with the wafer sorting apparatus, the

off-line warpage measuring tool would result in low-cost method of solving wafer warpage

measuring related issues if compared to current expanses that include transporting, measuring and

then discarding the wafers.

Due to long process of budget approval for the manufacturing of the prototype, part ordering was

delayed by roughly 3 weeks in addition to summer holiday period in the Netherlands, therefore

manufactured parts started arriving only during the last week of graduation internship, meaning

no time for assembly and testing of the prototype.

Absence of assembled prototype means the performance of the tool cannot be evaluated yet. This

report should serve as foundation and documentation for actual assembly and testing.

As COVID-19 pandemic emerged during the beginning of the internship, access to the premises

and face-to-face interactions were highly compromised, resulting in less frequent and less

thorough design reviews, leaving rooms for flaws and errors in final design and drawings. In

addition, the learning curve of the author was negatively affected and thus yielding less satisfactory

outcome of the internship, both in terms of personal development and the end result of the warpage

measuring tool.

70

6 RECOMMENDATIONS AND FUTURE WORK

In this chapter, recommendations on more detailed solutions and/or future work in this field are

presented.

Since the warpage measuring tool is yet to be assembled, the functionality and performance of the

tool cannot be evaluated yet. However, several suggestions and recommendations for future work

can already be proposed in bullet points below, as due to limited time of the graduation internship,

compromises had to be made for accelerating manufacturing and assembly of a physical prototype.

6.1 Recommendations

To test, compare and choose the best method for eliminating gravity induced deflection

from the proposed ones, requiring no additional hardware.

To add more elegant solution than hard homing for both linear and rotary stages, such as

mechanical end switches or sensors and therefore enabling unlimited rotation of the rotary

stage.

To optimize the parts by reducing the mass while maintaining the stiffness to make the tool

lighter, yet still having robust performance.

To test and verify, to what magnitude of warpage wafer sorting apparatus can handle

warped wafers to prevent malfunctioning and potentially damaging the wafer sorting

apparatus.

6.2 Future work

To assemble the prototype, check if stages are moving as intended.

To set up data acquisition using the sensor, controller and the software that comes with it.

To check the functionality by manually loading the wafers and measuring them.

To check the integration of the bottom and front interface, meaning how accurately the tool

is resting on the three kinematic pins of the wafer sorting apparatus and also how well the

door of the FOUP is accommodated by the warpage measuring tool.

To add RFID tag to the tool so the warpage measuring tool can be recognized by the wafer

sorter and therefore custom settings for loading/unloading both the tool and wafers can be

programmed and stored.

71

7 REFERENCES

1. ASML. (2020). Veldhoven.

2. Brooks Automation, Inc. (2020). Spartan™ Sorters. Retrieved from

https://www.brooks.com/products/semiconductor-automation/factory-

automation/spartan-sorters

3. Brooks Automation, Inc. (2020). Wafer Handling Robotics. Retrieved from

https://www.brooks.com/products/semiconductor-automation/wafer-handling-robotics

4. BRS - Bright Red Systems GmbH. (2020). BRS - Inline Wafer Edge Inspection

Metrology. Retrieved from Bright Red Systems: https://www.bright-red-

systems.com/quality-assurance-products/inline-wafer-edge-inspection/

5. E+H Metrology GmbH. (2020). MX 2012. Retrieved from https://www.eh-

metrology.com/products/manual-tools/mx-20x-series/mx-2012.html

6. Estion-Tech GmbH. (2020). Products: E-Wafer-Dockingstation. Retrieved from

http://www.estion-tech.com/products/e-wafer/e-wafer-dockingstation

7. Gates Mectrol. (2020, 12 01). Product Sourcing and Supplier Discovery Platfrom.

Retrieved from https://www.thomasnet.com/pdf.php?prid=101106

8. Hopcroft, M. A., Nix, W. D., & Kenny, T. W. (2010). What is the Young’s Modulus of

Silicon? JOURNAL OF MICROELECTROMECHANICAL SYSTEMS, VOL. 19, NO. 2,

229.

9. Ito, Y., Natsu, W., & Kunieda, M. (2010, May). Simultaneous Measurement of Warp and

Thickness of Silicon Wafer Using Three-Point-Support Inverting Method. Journal of the

Japan Society for Precision Engineering.

10. Jansen, M. J. (2006). Development of a wafer geometry measuring system : a double

sided stitching interferometer. Technische Universiteit Eindhoven.

11. Jel Corporation. (2020). Leading Manufacturer of Clean Robot. Retrieved from

https://www.jel-robot.com/products/index.html

12. Keyence Corporation. (2020). Laser displacement sensors. Retrieved from Keyence:

https://www.keyence.com/products/measure/laser-1d/

13. Kobelco. (2020). Profile measurement system. Retrieved from Flatness profile

measurement system: https://www.kobelcokaken.co.jp/leo/en/item/sbw/

14. Liu, H., Kang, R., Gao, S., Zhou, P., Tong, Y., & Guo, D. (2013). Development of a

Measuring Equipment for Silicon Wafer Warp. Advanced Materials Research Vol. 797,

561-565.

15. Microchemicals GmbH. (2020). Wafer specification. Retrieved from Microchemicals

website: https://www.microchemicals.com/products/wafers/wafer_specification.html

16. Micro-Epsilon. (2020). Sensors for displacement, distance & position. Retrieved from

Micro-Epsilon: https://www.micro-epsilon.com/displacement-position-sensors/

17. MicroTool Technology. (2020). Product catalog. Retrieved from MicroTool technology -

Semiconductor Equipment Enhancment Products: https://microtooltech.com

18. MTI Corporation. (2020). 4" Vacuum chuck - EQ-ECO-402. Retrieved from 4" Vacuum

chuck - EQ-ECO-402: https://www.mtixtl.com/4vacuumchuck-eco402.aspx

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19. Natsu, W., Ito, Y., Kunieda, M., Naoi, K., & Iguchi, N. (2005). Effects of support method

and mechanical property of 300 mm siliconwafer on sori measurement. Precision

Engineering, 19-26.

20. van Gerven, P. (2017). ASML for beginners. Bits&Chips.

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APPENDIX A: RISK ASSESSMENT TABLE

No. Risk Probability Effect Consequence Risk mitigation

1. Violating the

NDA 1 3 Potential lawsuit

Consult the mentor and Technical

Publication Board prior to sharing any

information in any way.

2.

Failure to find

and develop a

solution that

meets the

requirements

2 3

Dissatisfaction of both

the company and the

author

Weekly meetings with the mentor.

Brainstorming sessions with more people

involved.

3.

Too much time

spent on

background

research and

concept

generation

2 2

Delayed detail design,

manufacturing and

testing as well as final

deliverables of the

project

Plan the project with great care. Stick to the

GANTT chart. Ask for guidance from people

with higher competences instead of trying to

overcome some difficulty entirely on my

own.

4.

Running short on

time for

manufacturing

and testing the

prototype

2 2 Delayed final results

Company is willing to extend the duration of

the internship/thesis project in order to have

a good end result or to reduce the scope of

the project so the thesis work can act as a

solid foundation for future work.

5.

Delayed delivery

of manufactured

parts or standard

components

2 2 Delayed assembly,

testing and final results

Check the lead times of manufactured parts

with people in charge as well as lead times

for the standard components. Add some

reserve to lead times

6. Design errors,

flaws 2 2

Need of re-design, re-

manufacturing resulting

in delayed assembly,

testing and final results

Pay high attention to detail when doing

design work. Organize design review

meetings with people of multiple

competences to minimize all potential risk or

errors.

7. Manufacturing

flaws 1 1

Re-ordering and re-

manufacturing parts

delay testing and final

results

Low chance of happening because of

company’s high standards and trusted list of

suppliers. Human errors might occur though,

that are inevitable.

8. Sickness/injury 1 1 Delayed work, as well as

results

Impossible factor to predict. Possible re-

arrangement of GANTT chart might be

needed resulting in extended period of the

internship or narrowed project scope

74

APPENDIX B: GANTT CHART

development of an off-line silicon wafer warpage measuring

Documents