diff amp active load

Figure 2: BJT differential amplifier with active load.

EEEB273/EEEB 314 Electronics II – Differential and Multistage Amplifiers (Part 3)

Differential and Multistage Amplifiers (Part 3) – Diff-Amp with Active Load

Active loads

used to increase differential-mode gain transistor current sources used in place of resistive loads BJTs (MOSFETs) in active load biased at Q-point in forward-

active (saturation) mode diff-pair induces change in Ic (ID), VEC (VSD) changes (Figure 1) VEC (VSD) small-signal output resistance Ro

value of Ro larger than resistive loads, so small-signal voltage gain will be larger

Figure 1: Current-voltage characteristic of active load device.

BJT Diff-Amp with Active Load

Q1 and Q2 differential pair biased with constant current IQ

Q3 and Q4 load circuit One-sided output taken at

collectors of Q2 and Q4

Dr. Ungku Anisa, UNITEN, 2007 1

(2.1)

(2.1)

Figure 3: BJT differential amplifier with three-transistor active load and 2nd gain stage.


Ideally, assuming matched transistors and pure common-mode voltage applied, i.e. vB1 = vB2 = vcm:

IQ splits equally between Q1 and Q2

Neglecting base currents, I4 = I3 through the current source Hence, with no load at the output, I1 = I2 = I3 = I4 = IQ /2

However, actually: Base currents are non-zero A 2nd amplifier stage is connected to the diff-amp output

Figure 3 shows a diff-amp with an active load (three-transistor current source) and a 2nd amplifying (gain) stage:

Assuming all transistor current gains are equal

IO = dc bias current from gain stage assuming matched transistors and

pure common-mode voltage applied, i.e. vB1 = vB2 = vcm

IQ splits evenly, i.e.

I1 = I2

To ensure Q2 and Q4 are biased in forward-active mode, the dc currents must be balanced, i.e. I3 = I4

From Figure 3,(3.1)

Then,(3.2)

If the base currents and IO are small, then I3 + I4 . Therefore,

(3.3)



Hence, for the circuit to be balanced, i.e. I1 = I2 and I3 = I4, we must have:

(3.4)

Eq. (3.4) implies that the 2nd amplifying stage must be designed and biased such that bias current IO:

direction is as shown in Figure 3 magnitude is equal to eq. (3.4)

Small-Signal Analysis of BJT Active Load

From Figure 4, Resistance RL = small-signal input

resistance of the gain stage Assume that pure differential

input voltage is applied Common-emitters of Q1 & Q2 are at

signal ground Signal voltage at base of Q1

produces a signal collector current i1

.

Assuming base currents negligible, i3 = i1 is induced in Q3

current mirror produces i4 = i3. Signal voltage at base of Q2

produces signal current i2 with direction shown.

The two signal currents, i2 and i4 add to produce a signal current in the load resistance RL.

Output voltage & Differential gainTo determine the output voltage, need to consider the equivalent small-signal collector-emitter output circuit, i.e. Figure 5(a).


Figure 4: BJT diff-amp with three-transistor active load, showing signal currents.


Figure 5: (a) Small-signal equivalent circuit of BJT diff-amp with active load and (b)rearrangement of small-signal equivalent circuit.

From Figure 5(b), the output voltage is

(3.5)

and the small-signal differential-mode gain is

(3.6)

or

(3.7)

where gm = IQ /2VT, ro2 = VA2 /I2, ro4 = VA4 /I4. The parameters go2, go4 and GL are the corresponding conductances.

Assume I2 = I4 = IQ /2, hence

(3.8)


Figure 6: MOSFET differential amplifier with active load.


Output resistanceOutput resistance looking back into the common collector node is

(3.9)

To minimize loading effect, RL > RO. See Example 11.13, Exercise 11.13.

MOSFET Diff-Amp with Active Load

M1 and M2 NMOS differential pair biased with constant current IQ

M3 and M4 PMOS load circuit One-sided output taken at common

drains of M2 and M4

When a pure common-mode voltage is applied, i.e. v1 = v2 = vcm:

IQ splits equally between M1 and M2

iD1 = iD2 = IQ /2 There are no gate currents, iD3 = iD1

and iD4 = iD2.

When a pure differential-mode voltage vd = v1 - v2 is applied,

and

where signal current for small vd.Finally, since M1 and M3 are in series,

(3.11)

and the current mirror consisting of M3 and M4 produces

(3.12)


(2.1)

(2.1)

(3.10)


Small-Signal Analysis of MOSFET Active Load

From Figure 7, the negative sign for iD2 in eq. (3.10) shows as a change in current direction in M2.

Figure 8, shows the small-signal equivalent circuit at the drain node of M2 and M4.

If the output is connected to the gate of another MOSFET, i.e. equivalent to an infinite impedance at low frequency, the output terminal is effectively an open circuit.

Output voltage & Differential gainFrom Figure 8(b), the output voltage is

(3.13)

and the small-signal differential-mode gain is

(3.14)


Figure 8: (a) Small-signal equivalent circuit, MOSFET diff-amp with active load and (b) rearranged small-signal equivalent circuit.

Figure 7: The ac equivalent circuit, MOSFET diff-amp with active load, showing signal currents.

Figure 9: MOSFET diff-amp with a cascade active load.


or

(3.15)

where , and .

Therefore,

(3.16)

Output resistanceOutput resistance looking back into the common drain node is

(3.17)

See Design Example 11.14, Exercise 11.14.

MOSFET Diff-Amp with Cascode Active Load

The diff-amp voltage gain is proportional to the output resistance RO looking into the active load transistor.

voltage gain increased if RO increased.

For a cascode active load,

(3.18)

Therefore, the small-signal differential-mode voltage gain is:


Figure 10: A MOSFET cascode diff-amp with a cascode active load.


(3.19)

See Example 11.15, Exercise 11.15.

The differential-mode voltage gain can be further increased by incorporating a cascode configuration in the differential pair as well as in the active load. An example is shown in Figure 10.

M1 and M2 NMOS differential pair biased with constant current IQ

M3 and M4 cascode transistors for differential pair

The differential-mode voltage gain is now:

(3.20)

where and

The gain of this type of amplifier can be in the order of 10,000.

Note: other types of MOSFET differential amplifiers will be considered in Chapter 13 when operational amplifier circuits are discussed.

Active loads review (Chapter 10)


(2.1)

(2.1)


Figure: BJT common-emitter circuit resistive load

Assuming CC acts as short circuit at signal frequency,

where

Assuming Q-point at centre of load-line:

Hence,

Small-signal voltage gain Av Rc

to increase gain, need to increase Rc

But practically, there is a limited range of values for Rc and Vcc.

DC analysis: BJT Active load circuitSimple BJT amplifier with active load:

Q1 & Q2 pnp active load Active load has incremental

value of resistance due to non-linear I-V curve.

Advantages of active load: occupy less are higher resistance value (ro2 > RC) increases AV

Voltage transfer characteristics of BJT circuit with active load:



Establish Q-point in region where Q0 & Q2 in forward-active mode.

Only small range of vI

available

Driver transfer characteristics and load curve for BJT circuit with active load:

Q-point corresponds to VI = VIQ

As input changes between VIH and VIL Q-point moves up and down load curve

When VI = VI2 Q0 driven into saturation When VI = VI1 Q2 driven into saturation


Characteristics of driver transistor Q0 at several VI

values

IC vs VEC curve of active load Q2 at constant VEB

Output voltage


Active loads review (Chapter 10)

Figure: MOSFET common-source circuit with active load

M1 & M2 PMOS active load M2 active load device I-V characteristic of M2

DC analysis: MOSFET Active load circuit

Voltage transfer characteristics of MOSFET circuit with active load:

Establish Q-point in region where M0 & M2 in saturation mode.

Only small range of vI available



Driver transfer characteristics and load curve for MOSFET circuit with active load:

Q-point corresponds to VI = VIQ

As input changes between VIH and VIL Q-point moves up and down load curve

When VI = VI2 M0 driven into nonsaturation region When VI = VI1 M2 driven into nonsaturation region


Characteristics of driver transistor M0 at several VI

values

ID vs VSD curve of active load M2 at constant VSG

Output voltage

diff amp active load

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