difference between cpu and microprocessor

8/3/2019 Difference Between CPU and Microprocessor

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Difference Between CPU and MicroProcessor

Categorized underHardware,Technology | Difference Between CPU and MicroProcessor

The term central processing unit or CPU was developed a longtime ago as a term used to identify the portion of the machine that did the actual processing.This term was coined long before the presence of microprocessors and integrated circuits. As

technology developed from one form to another, the CPU started to shrink in size. OlderCPUs consisted of large vacuum tubes wired together that took up huge spaces, then theappearance of discrete transistors reduced the size of the CPU.

The CPU was further miniaturized with the advent of integrated circuits and microprocessor.The once extremely large and cumbersome CPU was reduced to a very minute piece ofsilicon with all the connections etched into it already.

A microprocessor is a very advanced integrated circuit that houses millions of transistorwithin a single package. Along with the transistors within is the circuitry that allows themicroprocessor to function and requires little else. The microprocessor was so advanced thatit immediately wiped out any other forms of computing. It has managed to contain the CPU,at first in a couple of microprocessors, then finally into a single microprocessor. It hasmanaged to include a few components along the way like a little bit of memory that we nowcall as the cache.

It is then understandable why the microprocessor and CPU have become interchangeable.The technology of the microprocessor has become so advanced that it has the ability tocontain not just one but up to four CPUs inside it, as in the case of quad coremicroprocessors. And that is not even the limit of what a microprocessor can do.

To put it in perspective, given todays technology. All CPUs are microprocessors, but not allmicroprocessors are CPUs. The use of the microprocessor has become so widespread that in asingle computer system, there now a number of microprocessors working and they have all

but replaced the transistors that were once the king of computer components. The GPU(Graphics Processing Unit) is also contained in a microprocessor. Even the northbridge andsouthbridge of the computer are both in microprocessors.

To sum up this whole article, the CPU is the brain of a whole computer system. This is wherethe entire decision making process happens. All the other parts of the computer just obey therequests of the CPU. The microprocessor is an advancement in transistor technologies thatallow multiple transistors to be placed in a certain package. It is so advanced and economical

that it has become advantageous for manufacturers to utilize the microprocessor in almostevery part of the computer.
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A processor is the logic circuitry that responds to and processes the basicinstructions thatdrive a computer.

The term processor has generally replaced the term central processing unit (CPU). Theprocessor in a personal computer or embedded in small devices is often called amicroprocessor.

Transmeta Crusoe Processor for EmbeddedApplications

Transmeta, the leader in effi cient computing, offers a line of low power, high-performanceprocessors designed to meet theunique requirements of embedded applications. The Transmeta Crusoe is an energy effi cientprocessor built upon innovativetechnology that provides embedded devices a performance per watt ratio that is unmatched byany other x86-based processorin its class.Available in a variety of low power versions, the Transmeta Crusoe processor is ideal forapplications that require highperformance processing within small and thermally constrained environments. Its inherentlyenergy effi cient design allowsgigahertz processor speeds without the need for active cooling and external CPU fans. Integratedpower managementtechnology further enhances effi ciency by dynamically scaling both processor frequency and

voltage according to theinstantaneous demands of the computer system.

Transmeta Crusoe processors provide full x86-compatible software execution and seamlessoperation with all standard x86-compatible operating systems including Microsoft Windows, Linux, and a variety of real timeoperating systems (RTOS) fromcompanies including LynuxWorks, MontaVista, QNX, Red Hat, and Wind River. Transmetaworks closely with partners,customers and commercial laboratories to ensure validated ineroperability and continuedadherence to high quality andreliability standards. High Performance with Low Heat Dissipation- A family of energy effi cient processors for every performance/thermal requirement Highest System Quality and Reliability

- All CrusoeSE processors are rated for 24/7, 10yr operating life- Fan-less designs enhance system reliability High Integration for Small Form Factor designs- Integrated northbridge functionality reduces board real estate Transmeta stands committed to Embedded Product Lifecycles- Extended Product Availability- Comprehensive Engineering and Marketing supportA Special Embedded version of the Transmeta Crusoe processor the Transmeta CrusoeSE processor enables embedded designs that require superior reliability. To support awide range of embedded applications, processors are rated to run at full speed over theentire operating temperature range of 0C to 100C twenty four hours a day, seven days aweek. Product life is rated to exceed 10 years while running at these performance andenvironmental extremes.

Transmeta Crusoe and Crusoe SE processors are designed for embedded applications in the areas

of offi ce automation,networking/communications, storage, server-based computing, science and medicine,transportation, automotive/telematics,
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and industrial automation. Some example devices in these markets include: thin clients, bladeservers, printers and copiers,point-of-sale, smart displays, hand held and portable consumer devices, ultra-personal computers,set top boxes and manyother applications.

TM

667MHz 128KByte L1 Cache (64KByte L1 cache

and 64KByte L1 D-cache) 256KB L2 write-back cache Integrated Northbridge- 64-bit, 133MHz DDR memory controller- 64-bit, 133MHz SDR memory controller- 32-bit, 33MHz, 3.3V PCI bus MMX Instruction Support 0.13m process Compact 474-pin Ceramic BGA Package Max TDP: 5.1W(includes Northbridge power)Transmeta Crusoe ProcessorModel TM5500 800MHz - 1GHz 128KByte L1 Cache (64KByte L1 I-cacheand 64KByte L1 D-cache) 512KB L2 write-back cache Integrated Northbridge- 64-bit, 133MHz DDR memory controller- 64-bit, 133MHz SDR memory controller- 32-bit, 33MHz, 3.3V PCI bus MMX Instruction Support 0.13m process Compact 474-pin Ceramic BGA Package Max TDP: 6.8 - 9.0W(includes Northbridge power)Transmeta Crusoe ProcessorModel TM5800 667MHz 128KByte L1 Cache (64KByte L1 I-cacheand 64KByte L1 D-cache) 256KB L2 write-back cache Integrated Northbridge- 64-bit, 133MHz DDR memory controller- 64-bit, 133MHz SDR memory controller- 32-bit, 33MHz, 3.3V PCI bus MMX Instruction Support 0.13m process Compact 474-pin Ceramic BGA Package Max TDP: 5.1W and 6.2W(includes Northbridge power) Supports T-junction temperatures of 100C Rated for 24/7 operation for 10 years

Transmeta Crusoe SE ProcessorModel TM55E 800MHz & 933MHz 128KByte L1 Cache (64KByte L1 I-cacheand 64KByte L1 D-cache) 512KB L2 write-back cache Integrated Northbridge- 64-bit, 133MHz DDR memory controller- 64-bit, 133MHz SDR memory controller- 32-bit, 33MHz, 3.3V PCI bus MMX Instruction Support 0.13m process Compact 474-pinCeramic BGA Package Max TDP: 6.8W-9.0W(includes Northbridge power) Supports T-junction temperatures of 100C Rated for 24/7 operation for 10 yearsTransmeta Crusoe SE ProcessorModel TM58E2003 Transmeta Corporation. All rights reserved. Information in this document is provided in connection with Transmeta Products. No license, express or implied, or otherwise to

any intellectual property rights are granted bythis document. Except as provided in Transmetas Terms and Conditions of Sale for such products Transmeta assumes no liability whatsoever including liability, warranties,infringement of any patent, copyright or other intellectualproperty right.

For more information, visit www.transmeta.comUNITED STATES

Transmeta Corporation3990 Freedom CircleSanta Clara, CA 95054USA

JAPANTransmeta JapanKDDI Bldg Annex 3FS2-3-3 Nishi-ShinjukuShinjuku-ku Tokyo 160-0023

Japan

ASIA-PACIFICTransmeta Taiwan7F-1, No.167,Fu-Hsing North Road

Taipei, Taiwan

R.O.C. 105EUROPETransmeta Europe9 Eglinton Road


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BrayCounty WicklowIreland

TM

Transmeta Crusoe Processor CoreAt the heart of the Transmeta Crusoe processor lays a verystreamlined, effi cient 128-bit VLIW (Very Long Instruction Word)hardware engine. Surrounding that heart is the Code Morphing

Software (CMS), a software engine that works in tandem with theVLIW hardware engine to morph and execute x86 instructions innative VLIW code. This innovative approach has led to a numberof compelling advantages, the largest of which is the reduction inthe number of power hungry logic transistors. This streamlining ofprocessor design allows Transmeta to greatly improve performanceto-power consumption while allowing heat dissipation to be kept to aminimum.

Code Morphing Software (CMS)CMSthe software component of the TransmetaCrusoe processortranslates x86 instructionsinto highly optimized and extremely fast VLIWnative instructions which are then processed withgreat effi ciency. These translations are stored and

reused in subsequent execution, further enhancingperformance over standard x86 architectures.

Integrated Northbridge ControllerTransmeta further reduces electrical consumptionand thermal requirements within the system byintegrating Northbridge controller functionalitydirectly onto the processor core. Thisfunctionalityconsisting of SDR and DDR DRAMmemory controllers, a serial ROM interface, and aPCI bus interfaceeases system design, reducesboard space, and enhances performance. As aseparate chip, a Northbridge chipset consumes 23 watts of additional power whereas the TransmetaCrusoe processor consumes just a fraction of that.

Transmeta LongRun PowerManagement

Transmeta LongRun is a power managementtechnology that further reduces thermal constraintsby dynamically adjusting the operating voltage andclock frequency of the processor core based onapplication demands. By evaluating the demandon the processor, LongRun delivers just enoughperformance to satisfy the workload at hand.

This conserves power and improves battery-life.If desired, LongRun can be confi gured to deliverdifferent performance characteristics dependingon the application, making it possible for designersto build smaller enclosures than were previously

possible. Best of all, Transmeta LongRuntechnology provides more responsiveness thanconventional power management schemesused by operating systems and is completelytransparent to the end-user.

Crusoe Special Embedded (SE) processors

SANTA CLARA, Calif.- Transmeta Corporation (Nasdaq:TMTA) today announced newenergy efficient Crusoe(TM) Special Embedded (SE) processors targeting a wide range ofx86 embedded applications, including industrial automation, scientific instrumentation,

retail kiosks, point-of-sale terminals, automotive infotainment, process control and homeautomation systems. Transmeta also announced an Embedded Partners Program forleading BIOS/firmware companies, embedded operating system companies and silicon


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component suppliers committed to supporting customers developing efficient embeddeddesigns based on Crusoe SE processors.

Crusoe SE processors meet the growing requirement for combining x86-compatibility,high performance, power efficiency, low heat dissipation and chipset integration tocreate compact, passively cooled embedded systems. Crusoe SE processors useLongRun, an advanced power management technology, to dynamically optimizeprocessor frequency and voltage while monitoring chip temperature, keeping power useand heat at minimum levels. Embedded system developers can now take advantage ofalmost 1GHz of x86-compatible performance, with an integrated Northbridge, in a smallpackage that does not require a cooling fan. The Crusoe SE product family is anexceptional solution for developers of today's high performance, x86 embedded systemsand an excellent performance upgrade path for systems developed using lower-end SOCembedded technology.

Crusoe SE processors are designed and tested for long-term use in harsh environments,

where a chip's temperature can reach as high as 100(degrees) C. Future versions ofCrusoe SE processors will be available for extreme embedded applications that requireeven wider temperature ranges. "The introduction of Crusoe SE processors for x86embedded applications complements Transmeta's existing mobile business and meetstwo important company goals," said Dr. Matthew R. Perry, president and CEO,Transmeta Corporation. "We are expanding target markets for Crusoe processors to newgrowth segments and geographic regions."

Crusoe SE processor specifications include:

-- Crusoe SE parts available at 667 MHz, 800 MHz and 933 MHz, optimized for x86embedded applications.

-- Each processor available in a standard or low power version.-- Reduced operating temperatures enabling fanless system designs to minimize end


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product reliability challenges associated with fan-cooled systems.-- LongRun power and thermal management maximizes embedded system performancewhile reducing power consumption and heat dissipation.-- Upgraded Code Morphing Software (CMS) enhanced to maximize real-timeperformance while maintaining complete x86-compatibility.-- Integrated Northbridge reduces board space use allowing compact designs.

-- Reliable operation twenty-four hours a day, seven days a week at full-rated speed andtemperature to meet the high reliability requirements of mission critical embeddeddesigns.-- Extended Crusoe SE availability program to support long-term embedded product lifecycles.-- Crusoe SE processors immediately available to customers.-- Pricing example: 667 MHz Crusoe SE less than $50 per unit in volume.

Crusoe SEProcessor

TM5500EX-667

TM5500EL-667

TM5800EX-800

TM5800EL-800

TM5800EL-933

FrequencyRange

667 MHz 667 MHz 800 MHz 800 MHz 933 MHz

Voltage Level 0.9-1.2V 0.9-1.3V 0.9-1.3V 0.9-1.3V 0.8-1.3VPower Level(Maximum)*

6.2W 5.1W 8.0W 6.8W 9.0W

L1 Cache 128KB 128KB 128KB 128KB 128KB

L2 Cache 256KB 256KB 512KB 512KB 512KB

Main Memory

DDRAM-SDRAM(100 to

133MHz)

DDRAM-SDRAM(100 to

133MHz)

DDRAM-SDRAM(100 to

133MHz)

DDRAM-SDRAM(100 to

133MHz)

DDRAM-SDRAM(100 to

133MHz)

North Bridge Integrated Integrated Integrated Integrated Integrated

Package 474 BGA 474 BGA 474 BGA 474 BGA 474 BGA

Sample Now Now Now Now Now

Production Now Now Now Now Now

Transmeta's Embedded Partners Program

Embedded system developers face challenging business and technical requirements, asproduct operation and reliability specifications are complex and life cycles can last formany years. In addition to a dependable, long-term supply of strategic components suchas Crusoe SE processors, these customers require a reliable structure of complementarycompanies to support a multitude of embedded system needs.


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To that end, Transmeta is working closely with many partners to provide essentialsupport services and products that benefit customers in the development of embeddedapplications. These include BIOS/firmware companies, embedded operating systemcompanies and silicon component suppliers. Through these partnerships, customers have

available a wide platform of hardware and software that are pre-tested for use withCrusoe SE processors for easy development and fast time-to-market.

Transmeta is preparing a comprehensive section of its Web site to serve the needs ofembedded customers. The section is scheduled to be live later this week atwww.transmeta.com.

BIOS/Firmware Companies

Crusoe SE processors' x86 compatibility means easy integration with the alreadyestablished base of x86 BIOS software. Transmeta is collaborating with several leadingembedded BIOS companies to offer attractive feature sets that are optimized for

embedded applications, in addition to those in the traditional PC market. Transmeta'sBIOS company partners include:

General Software, Inc.

General Software provides superior enabling firmware and world-class support for OEMmanufacturers of telecommunications, data communications, consumer electronics,dedicated servers and other specialized computing devices.

"General Software's support for the Transmeta's Crusoe embedded processors meansbreakthrough technology for the x86 embedded market and an attractive solution forTransmeta customers," stated Dick Dorton, business development manager, General

Software, Inc.


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Insyde Software

Insyde Software offers a full line of embedded ROM firmware, Windows CE, Microsoft XPEmbedded and Linux enabling software, power management solutions, USB support, and

system integration services. "Insyde Software is pleased to be working with Transmetato provide a complete hardware and software enabling solution in support of the newlyannounced Crusoe SE processors," said Stephen Gentile, vice president of businessdevelopment and marketing, Insyde Software. "By leveraging our respective embeddeddesign expertise, we can deliver a high performance, differentiated solution to consumerelectronics, information appliance, and thin-client/POS manufacturers."

Phoenix Technologies

Phoenix Technologies delivers an industry-leading BIOS solution for mobile applicationsthat has often been chosen by Transmeta's customers for notebooks and other powersensitive systems. As Transmeta launches its new Crusoe SE processors for embedded

markets, Phoenix and Transmeta strengthen their commitment to deliver world-classsolutions by combining their respective technologies across a wide range of customerproducts. In addition to its traditional BIOS product, Phoenix is offering a new core-managed environment, FirstView Connect, which enables delivery of open Internet-standards content via set-top boxes, Web terminals, information kiosks, portable videorecorders (PVRs), enhanced DVD players and media players. "With FirstView Connect,Phoenix provides instant Internet connectivity at the core of devices that enable newforms of entertainment, e-commerce and information on demand," said Bob Gager,senior director of product marketing for Phoenix. "The new Crusoe SE processors are aperfect fit for our software solution, offering an unmatched combination of performance,cool-operation and energy efficiency to this exciting category."

Embedded Operating System Companies


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The complete x86 compatibility and reduced power requirements of Crusoe SEprocessors enable embedded operating system companies to expand sales into newareas of the market. Transmeta has established close working relationships with marketleaders across the embedded operating system space, offering easy out-of-the-boxbring-up of multiple offerings. These partners include:

LynuxWorks

LynuxWorks is a leader in the embedded software market, providing operating systems,software development products and consulting services for the world's most successfulcommunications, aerospace/defense, and consumer products companies. "Transmeta'sCrusoe processors provide a very unique solution to the historical challenge of achievinghigh processor performance within a useable, embedded power budget," said Art Lee,director of business development, LynuxWorks. "Combining this high performance,power efficient technology with our choice of Linux compatible, embedded operatingsystems, creates an ideal platform for a wide range of end market applications."

Microsoft Corporation

Microsoft Corporation certified Transmeta's existing Crusoe processors for the WindowsCE .NET operating system, allowing new opportunities for Transmeta in mobile andembedded markets. Windows CE .NET is Microsoft's modular, small footprint, embeddedoperating system for a variety of computing devices such as PDAs, digital cameras,printers, scanners, retail point-of-sale terminals and set-top boxes, among many otherintelligent computer products. Transmeta's new energy efficient, high performance, x86-compatible Crusoe SE processors are also designed to take full advantage of Microsoft'sWindow's XP Embedded operating system. The combination of the powerful MicrosoftWindows XP Embedded operating system and high performance Crusoe SE processors

allows developers to rapidly design and deploy complex solutions for highly reliable, full-featured embedded applications.


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MontaVista Software, Inc.

Montavista Software Inc. provides leading solutions for embedded applications, includingMontaVista Linux Professional Edition, named "Best Embedded Linux Solution" at theNew York Linux World and Expo. This offering provides Transmeta's customers with asophisticated, off-the-shelf solution including a rich tool chain, extensive library support,and state of the art networking capabilities. The collaboration between Transmeta andMontaVista Software Inc. will enable customers of both companies to bring Linux-basedconsumer electronics products to market more quickly and cost-effectively. "Montavistais committed to help our customers deliver compelling consumer electronics products,"said Bill Weinberg, director of strategic marketing, MontaVista Software Inc. "Thecombination of Montavista's Linux solutions and Transmeta's energy efficient Crusoeembedded processors offer impressive capabilities to the market."

QNX Software Systems

QNX Software Systems is an industry leader in realtime, micro kernel operating systemtechnology. The inherently reliable and scalable QNX(R) Neutrino(R)RTOS and powerfulQNX(R) Momentics(R) development suite together provide the most trusted foundationfor embedded systems in the networking, automotive, medical and industrial markets."The QNX history of ultra reliability, combined with Transmeta Crusoe's x86 compatibilityand efficient power management, is a powerful combination for OEMs building next-generation embedded devices," said Linda Campbell, director of strategic alliances, QNXSoftware Systems.

Red Hat

Red Hat is recognized as a worldwide market share leader in delivering compellingenterprise-grade Linux solutions. Red Hat develops and supports the Red Hat Linux

Advanced Server and Red Hat Linux Advanced Workstation operating systems fordeployment in a wide range of markets. For example, Red Hat Linux helps to enablesupercomputer-level performance in the Los Alamos National Laboratory's 480-node"Green Machine" compute cluster based on Transmeta's Crusoe processors. With therollout of Transmeta's Crusoe SE processors, system designers can now more readilyleverage the power of Red Hat's enterprise-grade operating systems with the attractivefeatures of these new processors.

Wind River Systems, Inc.

Wind River Systems, Inc. is the worldwide leader in embedded software and services. Itis the only company to provide market-specific embedded platforms that integrate real-

time operating systems, development tools and technologies. WIND RIVER(R)PLATFORMS are new, standardized integrated platforms that provide a completefoundation to meet the specific requirements of vertical markets. A VxWorks(R) BoardSupport Package (BSP) for the Crusoe TM5800 System Development Kit is available fromTransmeta's Web. "Combining Wind River's market-specific integrated embeddedplatforms with Crusoe's high performance and power efficient operation offers ourcustomers new levels of capability and portability in multimedia devices, industrialcontrol applications, and wireless-networked devices," said Caroline Yao, director ofpartner solutions for Wind River.

Silicon Component Companies

Silicon component companies are developing new graphics, networking and peripheralcomponents aimed at taking advantage of the reduced power, low-temperature and high


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performance requirements of the x86 compatible embedded processor market. TheseTransmeta partners include:

ALi Corporation

ALi Corporation (ALi) is one of the world's leading suppliers of integrated circuits forpersonal computers and embedded systems. The ALI M1535-family is the most widelychosen southbridge by customers of Transmeta's Crusoe processor to date. The M1535+generation southbridge shipping in mass production today delivers rich ACPI-compliantpower management support, fast I/O using the industry-standard PCI bus, as well as arichly integrated solution that incorporates an advanced full-function Super I/O on-chip,an AC-Link Host controller, two channels of IDE, Fast IR and many other interfaces. "ALiand Transmeta have long collaborated to deliver attractive notebook solutions to themarket and with the launch of Transmeta's Crusoe SE processors, ALi is eager tocontinue this relationship by offering cutting edge southbridge solutions for embeddedcustomers," said Dr. Chin Wu, president of ALi Corp. "Platform stability is a criticalconcern in the embedded space, and ALi joins Transmeta's commitment to deliver theM1535+ solution to embedded customers over an extended lifetime."

Silicon Motion, Inc.

Silicon Motion Inc. is a leading provider of high-performance, low-power multimediaaccelerators that enable a rich experience on mobile access devices. Combining CrusoeSE processors with Silicon Motion's multimedia accelerator chips provides an idealsolution for embedded mobile market segments such as smart displays, wirelessbroadband terminals, car information systems, ATMs, point-of-sale systems and kiosks."Transmeta and Silicon Motion share the goal of continued expansion and developmentof energy efficient solutions for the embedded market," said Wallace Kou, president andCEO, Silicon Motion. "Together, our solution provides a compelling platform for the nextembedded generation."


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Transmeta's Embedded Customers

Transmeta's customers provide innovative, embedded solutions based on the existingfamily of energy efficient Crusoe processors and several companies have already

committed to designs based on the new Crusoe SE processors. Examples of current andnew embedded designs include:

Advantech

Advantech is one of the world's largest suppliers of industrial PCs and manufactures PCplatforms for communications, industrial automation and embedded computing.Transmeta and Advantech have collaborated on several embedded products, including a3.5-inch, single board computer (SBC) based on the Crusoe TM5400 processor. ThePCM-9370 fanless SBC simplifies the configuration and installation process because theprocessor is mounted directly on board. Transmeta's LongRun power managementtechnology allows this product to consume very little power and eliminates the need for

a processor fan.

Evalue Technology, Inc.

Evalue Technology, Inc. is an innovator of applied computing solutions, whose mission isto become a leading embedded & IA solution provider. Evalue's SOM-144 (System-On-Module) product line is a series of complete CPU system modules that can be mountedonto any easily designed application-specific carrier boards. These ready-to-use SOMmodules integrate all aspects of PC functionality with a variety of platforms, all within avery small 68 mm x 100 mm area. The ESM-2615 is an ultra small SOM-144 CPUmodule integrated with most PC functionality and includes an energy efficient,Transmeta Crusoe TM5400 processor.

Gespac


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Gespac, a leading European manufacturer of standard form factor and custom embeddedboards and systems, will develop a number of embedded products based on Transmeta'snew Crusoe SE processor line. The Swiss-based company, which is focused on leadingedge embedded systems for the automation, telecommunications, medical andtransportation market, will initially develop a series of products aimed at thetransportation industry. These Crusoe SE-based products will ship in early 2003. "The

fact that Transmeta's Crusoe embedded processors give our system designers significantx86 processing power with improved reliability due to the elimination of a cooling fan,makes it a natural fit for train-based applications where system up-time is key," saidVincent Gachet, projects manager, Gespac.

IBASE

IBASE, a leader in standard form factor embedded boards, currently offers a wide varietyof Crusoe-based boards in a number of form factors. The Taiwan-based company will beexpanding its product line of Crusoe-based CPU board products to include the newCrusoe SE processors. IBASE target applications include networking, automation, mini-server, firewall, medical, military and point-of-sale devices. "The new Crusoe SE

processor line gives us the long term product availability that many of our embeddedsystem customers demand," said Ben Liao, vice president of sales, IBASE. "The reducedpower requirements coupled with passive cooling enables us to design x-86 compatible,high performance embedded systems with low cost enclosures."

ICP America, Inc.

ICP America offers a comprehensive line of industrial computer products designed tomeet the demanding requirements of today's industrial applications, including factorycontrol and automation, computer telephony, medical instrumentation, and mobilecomputer systems. The "Suppliers of Innovative Industrial Computer Products," ICPAmerica's extensive product line, includes single board computers, chassis, backplanes,LCD workstations, IDE flash drives and industrial power supplies. The company offers theCrusoe TM5400-based Wafer-6820, a 3.5" single board computer, with fanless operationdue to the energy efficient qualities of Crusoe processor technology.


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TransDominion Technologies

TransDominion Technologies, which offers a line of Crusoe-based firewall appliances, is aleader in the security appliance industry, specializing in the design, integration,

production, and support of customized embedded solutions. The company has partneredwith some of the premier vendors in the security industry to help develop embeddedappliances based on leading software architectures. "For the TrueGate TG-23 and TG-27,we needed a processor that could provide high performance and enable an efficientdesign, a perfect fit for Transmeta's Crusoe processor," said Nate Carmody, chieftechnology officer, TransDominion Technologies. "The Crusoe processor exceeded ourexpectations and provided reduced power consumption, making it the best solution forour needs."

TransLink USA

TransLink USA is an embedded board and systems company located in Plano, Texas.

TransLink is focused on leveraging Transmeta's power-efficient, high performanceCrusoe processor technology to provide superior solutions in both standard andproprietary form factors for a number of key industries in the embedded marketsegment. TransLink is developing board solutions for a number of embedded marketsegments including industrial control, communications, gaming, vending, point-of-sale,kiosk and data security. Crusoe SE processors will allow TransLink to provide previouslyunavailable single board computer solutions for the embedded market. Products basedon the new Transmeta Crusoe SE product line will be in volume production starting in Q12003. "TransLink is excited about the opportunity to partner with Transmeta to provideflexible, price competitive products with superior performance and long life cycles to theembedded market," said Rob Orsini, vice president of sales and marketing, TransLinkUSA.

Tri-M Systems, Inc.


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Tri-M Systems and Engineering of Port Coquitlam, BC, Canada provides hardware andturnkey solutions for embedded systems, specializing in PC/104 products. For the past20 years, the company has been both a manufacturer and distributor specializing in thePC/104 field. Tri-M Systems is introducing the TMZ104, a breakthrough x86, singleboard computer in PC/104 format featuring the energy efficient, Transmeta Crusoe SEprocessor. With a compact size of 3.55" x 3.77" and off-the-shelf extended temperature

rating, this board will be of interest to customers looking for embedded x86 technologyin hostile, mobile, industrial, military, medical, or telecom environments where minimalpower consumption, small board size and fanless operation are key design factors.

About Transmeta Corporation

Transmeta develops and sells software-based microprocessors and develops additionalhardware and software technologies that enable computer manufacturers to buildcomputers that simultaneously offer long battery life, high performance and x86compatibility. Transmeta's family of Crusoe microprocessors is targeted at the notebook,Tablet PC and Internet appliance segments of the mobile Internet computer market, aswell as a range of embedded applications. To learn more about Transmeta visit

www.transmeta.com. Transmeta, Crusoe, LongRun and Code Morphing Software aretrademarks of Transmeta Corporation. All other product or service names mentionedherein are the trademarks of their respective owners.

Transmeta Corporation (Nasdaq:TMTA) has announced that Tsinghua Unisplendour Group,China's second largest notebook supplier, has selected the energy efficient Crusoe TM5800

processorfor a new notebook in the Chinese market.

Source: http://www.allbusiness.com/technology/computer-hardware/440480-1.html#ixzz1eWSSNeQa

The C3 VIA and Transmeta Crusoe were two supporting during the fight betweenthe Athlonand the Pentium III and 4 from Intel. Although sales have been weak, they werethe focus of great curiosity.

The C3 had a troubled history, changing its name several times (Jedi, Gobi, Cayenne, Joshua,Samuel ...) and taking samples produced with various configurations of cache andarchitectural changes, until it was finally released in 2001:

He was a successor to 6 86 and MII, produced by VIA on the basis of previous projects ofCyrix. It it was a low-power processor, which had 128 KB of L1 cache and 64 KB of L2cache (similar to the Duron), which was produced in a hybrid technique of production, withsome components being produced using a technique of 0.15 and other a technique of 0.13micron.

Being a manufacturer of chipsets, VIA had licenses for the GTL + bus, which allowed the C3would be compatible with Socket 370 boards for the Pentium III and Celeron. At the timeIntel was making the transition to the Pentium 4 and there was a large supply of Socket 370

boards of low cost, which helped sales.

The C3 architecture offered a fairly simple, with only two execution units (such as Pentium1) and a very weak arithmetic coprocessor, which made him a passable choice for office
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applications (the performance was slightly lower than a Celeron of the same clock ) but quiteinadequate for gaming.

Moreover, the simplicity of the processor has a fairly cheap to produce. Even with 128 KBL1 cache, it occupied an area of only 55 mm , which allowed VIA to produce almost twice

as many processors per wafer that Intel could get with the Celeron Coppermine, forexample.This allowed the VIA processor offered at low prices, enabling the emergence of alarge number of PCs and low-cost notebooks, which (despite the poor performance) had somesuccess at the time.

The C3 was produced in three versions. All use the same configuration of caches (128 KB L1and 64 KB of L2, but differ in the manufacturing technique and architecture.

The first was based on Samuel 2 core, 0.15 micron and was produced in small quantities inversions from 667 to 800 MHz The following was the Erza, which pioneered the use ofhybrid technique of 0.15 micron and 0.13 and was produced in versions 800 MHz to 1.0 GHz

The third was Nehemiah, who held the same fabrication technique, but adopted the use of alonger pipeline (16 stages against the earlier 12), which allowed it to be released in versions1.0 to 1.4 GHz

Although outdated, the C3 is still sold in small quantities in the following years, serving as akind of waste to manufacturers interested in selling low-cost PCs and low-performing, a

position similar to that currently occupied by Atom.

With the end of the socket 370 platform, the VIA has to focus on the production of the EPIAplatform, a line of miniature cards, which combined C3 processor (and possibly C7) chipsetsthemselves.

However, the low performance processors, combined with VIA's difficulties in selling thecards at competitive prices have made it never made much success, despite the technicalmerits.Here we have an EPIA SP8000E, with a C3 800 MHz:

The Crusoe in turn was a project far more exotic and ambitious, who adopted the use of aradically different architecture, which was an attempt to solve the problem of load legacy ofx86 chips, without compromising compatibility with existing software .

Unlike the other current processors, which use instruction decoders and computers to sort and

convert x86 instructions (running a good deal of processing before they reach the executionunits), the Crusoe used a simplified design, where the chip processing a own set ofinstructions, consisting only of simple instructions, as in a RISC processor.

The compatibility with the x86 instruction set was obtained through a translation software,called "Code Morphing Software, which was supposed to convert x86 instructions sent by the

programs in simple instructions understood by the processor, arrange them in order to beexecuted faster and coordinate the use of registers, tasks that in other processors areimplemented via hardware.

The Code Morphing software was stored in a small amount of ROM integrated processor. By

connecting the PC, it was the first thing to be born (even before the BIOS) and was residing


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in a protected area of RAM, running as an intermediary between the physical processor andoperating system.

All instructions translated by the Code Morphing Software were stored in a special cache,called translation cache. This cache occupying part of the L1 and L2 caches of the processor

and also an area of RAM that can vary in size according to the volume of differentinstructions processed. He avoided the processor to waste time translating the same block ofstatements repeatedly, but in return consume part of their own caches and RAM, againreducing the amount of resources devoted to processing itself.

Internally, the Crusoe chip was a 128-bit VLIW, which processed the x86 instructions intogroups of 4 instructions of 32 bits, in a design similar to that used in the implementation ofSSE, but applied to the processing of all instructions. The symbol "VLIW" stands for "VeryLong Instruction Word" and rightly emphasizes the use of execution units wide, capable of

processing many bits at a time.

Thanks to the combination of two factors, the Crusoe chip was a much simpler and energyefficient. The TM5420 600 MHz, for example, consuming less than 2 watts operating at full-load, less than a 486. The big problem is that the Code Morphing Software consumed muchof the processor resources, leaving fewer resources for processing instructions. This meantthat the Crusoe was very slow compared to an Athlon or Pentium III to the clock, whichreduced the demand for the processor as to derail the project.

The Crusoe existed in versions of 500 MHz to 1.0 GHz All offer a very low powerconsumption, which caused it to be used in some ultra-compact notebooks and also Desknotemanufactured by ECS. However, the performance was 50% lower than a Pentium III to theclock, which made the notebooks based on it slow.

In 2004, Transmeta Efficeon released, an updated version of the processor, which was basedon a 256-bit architecture (ie, processed 8 groups of 32-bit instructions) and offered a

performance cycle by almost two times higher than the original version. The Efficeon wasreleased in versions up to 1.7 GHz and provided a much more competitive performance, buthe eventually came too late to save the Transmeta, which ceased production of the processorsin 2005.

More posts

1.What does Transmeta do?Transmeta creates, markets and sells the Crusoe processor, a family of software based, smartmicroprocessor solutions. Crusoe processors are specifically designed to combine PCsoftware compatibility with high performance and extremely long battery life.

The Crusoe processor solutions are the only ones designed to span the complete range ofultra-light (less than four pounds) mobile PCs and Internet devices.

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2.What are the details behind the smart microprocessor architecture?

The smart microprocessor architecture, as used in the Crusoe Processor, relies on software toperform a carefully selected set of functions that are performed in today's hardware-based
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processors. This repartitioning of functionality allows for a great deal of flexibility in offeringsolutions that are more tailored to specific market segments

The Crusoe processor takes advantage of a key benefit in this repartitioning: the significantreduction in the number of transistors needed to perform a task. This reduction results in a

power consumption as low as 10 to 20 milliwatts while users run everyday PC applicationslike email and Internet browsing. For heavy-duty multimedia applications like DVD, the

processor typically consumes just 1 - 2 watts. It also leads to a very small die size that iseconomical to build.

The smart microprocessor consists of a hardware VLIW core as its engine and a softwarelayer called Code MorphingTM software. The Code Morphing software acts as a "shell" thatsurrounds the VLIW core but resides beneath the operating system "morphing" or translatingx86 instructions to native Crusoe instructions. In addition, the Code Morphing softwarecontains a dynamic compiler and code optimizer to search out blocks of software that makeup the repetitive sequences commonly found in applications and reduces them to a smaller set

of executable instructions. The result is increased performance at the least amount of power.

The final benefit offered by the smart microprocessor architecture is that it allows Transmetato evolve the VLIW hardware and Code Morphing software separately without affecting thehuge base of software applications. Upgrades to the software portion of a microprocessor can

be rolled out independently from chip revisions. Likewise, decoupling the hardware designfrom the system and application software frees hardware designers to evolve (or eventuallyreplace) their designs without perturbing the legacy software base.

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3.How is the Crusoe processor different from today's mobile processors from Intel andAMD?

Today's Intel and AMD mobile processors are really desktop processors that have beenderated for the mobile market and as such, they represent the culmination of severalgenerations of increasingly burdensome hardware complexity. While these processors have

been the driving force behind desktop computing since the 1970s, they have shown theirlimitations in mobile computers as they become smaller and smaller and have had to maketradeoffs between performance, excessive heat, and battery life.

Transmeta believes, as do a number of industry experts, that a new architectural approach is

needed in order for the mobile computing market to reach its full potential. One such expert,John Hennessey, a professor of electrical engineering and computer science at StanfordUniversity, confirmed this trend when he said, "Microprocessor designers need to adopt freshtechniques and new kinds of metrics to align their work with the coming "post-desktop era."He continued, "Requirements for compact, low-power, highly reliable embedded devices andtechniques... will drive the next generation of processor designs."

The Crusoe smart microprocessor architecture implements a carefully selected set offunctions in software, as opposed to hardware. By choosing this method, Transmeta is able tocreate a much more streamlined VLIW hardware core which, when combined with CodeMorphing software and LongRun power management, results in both the high performance

and low power required for today's demanding mobile computing environment.
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4.How is the Crusoe processor different from today's StrongARM and MIPs processorsused in Handheld PCs?

The StrongARM and MIPs processors are part of a class of architecture known as RISC

(Reduced Instruction Set Computing). The RISC processors have been used in a wide rangeof first-generation handheld computers, because their average power of one watt or less leadsto devices with very long battery life. However, success in the marketplace has been limited,since RISC processors are not compatible with many of today's PC and Internet softwareapplications.

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5.What is "Crusoe"?"Crusoe" is the brand name for what will become a family of smart microprocessors for awide range of fully compatible mobile Internet computers.

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6.How many Crusoe processor solutions are there?Three processor solutions are currently available. The first version of the Crusoe processor(TM3200) is targeted at mobile Internet devices operating with the Mobile Linux O/S.

The other versions (TM5400/TM5600) are targeted at performance-oriented, ultra-light PCs.With up to 700MHz in performance and its new LongRun power management feature, theTM5400/TM5600 will deliver the highest performance and lowest power solution for mobilecomputing.

LongRun power management is the key to bringing full functionality with the longest batterylife to the ultra-light mobile PC, because it analyzes the application workload dynamicallyand continuously adjusts the processor's voltage and speed (MHz) to provide the required

performance at the lowest power. In essence, LongRun power management is aboutmaximizing battery life while optimizing performance.

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7.Is Transmeta a public company?

Transmeta Corporation is a publicly traded company (NASDAQ: TMTA).

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8.How many versions of the Crusoe processor are planned?The number of Crusoe processor solutions will grow over time to become a family of

products that are differentiated by both hardware and software features. The resulting productbreadth has the potential to address virtually every need in the span of mobile computing.

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9.Why did Transmeta choose to focus on ultra-light mobile PCs and mobile Internetdevices?
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Prior to Crusoe, mobile processors were simply desktop processors that were de-rated for themobile market. Transmeta viewed this as a significant opportunity and specifically designedthe smart microprocessor for this underserved market. The Crusoe processor solves a numberof problems (excessive heat, low battery life, and underperformance) that have frustrated endusers.

The Crusoe Processor, along with the emergence of affordable, high-speed, wirelesscommunications will accentuate the shift by users to mobile PCs as they begin to understandthat a high-performance, fully compatible solution for all day computing now exists.

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10.Are Crusoe processors available now?The first Crusoe processors, the TM3200, TM5400, and TM5600 are available and shippingnow.

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11.What will the Crusoe processor mean for mobility?The Crusoe processor will enable a whole class of Mobile Internet Computers that until nowhave suffered from tradeoffs in performance, compatibility, and low battery life. In addition,the Crusoe brand itself will serve as the guidepost for users trying to make the correct mobilecomputer buying decisions.

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12.What is included in the Crusoe processor solution?The Crusoe processor consists of two components. The first is a VLIW processor packaged ina 474 BGA. The second is a layer of software called Code Morphing Software, which residesin the mobile system's Flash ROM. Both components work together as a complete x86instruction-set-compatible solution.

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13.How does the Crusoe processor interface with other components in a mobilecomputer?

The Crusoe processor contains an on-chip SDRAM memory controller and a PCI controller

to interface with industry standard memory and I/O devices (for example, graphics andcommunications solutions).

The model TM5400 has an additional memory controller that interfaces with the DRAMindustry's newest low power, high performance memory called DDR-SDRAM (Double DataRate).

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14.What is the power consumption of a Crusoe processor?The Crusoe processor can operate on as low as 10 to 20 milliwatts when running everyday

applications like email or Internet browsing. On heavy-duty multimedia applications, likeDVD movie playback the processor will consume fewer than two watts.
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The extremely low power consumption delivered on multimedia applications can be directlyattributed to a new feature called LongRun power management. LongRun has the distinctability to analyze the application workload dynamically and to adjust continuously the

processor's speed (MHz) and voltage to provide the necessary performance. This new feature

promises to extend the battery life of all applications, most specifically those requiring theconstant attention of the processor. This is a dramatic departure from today's ultra-light PCs,which are incapable of delivering over one and a half or two hours of runtime for DVDmovies.

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15.How does Crusoe processor's LongRun power management compare to Intel'sSpeedStep (Geyserville) technology found on the Mobile Pentium III processor?

Intel's SpeedStep technology was designed to bring additional desktop-like performance tomobile computers when they are residing in a docking station. The docking station is

specially designed to provide additional cooling to the thermally hotter processor. When themobile computer is taken on the road, performance is reduced, since the processor has to runat a lower speed to avoid overheating.

The LongRun power management feature within the Code Morphing Software allows theprocessor to run at peak performance independent of its power source (AC outlet or DCbatteries). In addition, LongRun power management analyzes the application workloaddynamically and continuously adjusts the processor's speed (MHz) and voltage accordingly.This procedure is performed without any user intervention and is the most efficient method ofoperating a processor.

LongRun power management will make its biggest impact in ultra-light (less than fourpound) portables that up to now have had difficulty in running multimedia applications forlonger than an hour or two.

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16.What are the benefits to companies that use the Crusoe processor in their mobilecomputers?

Companies will benefit from using the entire family of Crusoe processors across a wholerange of mobile Internet computers. Whether it's a web slate or a four-pound ultra-light PC

with a 13-inch LCD display and a DVD drive, the Crusoe Processor ensures the highestperformance with the lowest power consumption.

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17.Can users expect a full day's operation with a mobile PC based on a CrusoeProcessor?

The Crusoe Processor with its very low operating power creates an opportunity for PC OEMsto create all-day computers that deliver the full PC and Internet experience.

Transmeta has not only delivered on a low power processor, but it is also developing

reference designs for customers to use in developing mobile systems that consume just fourwatts when active. At four watts of power consumption, a light-weight mobile system with a
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32 watt-hour Lithium battery can deliver eight hours of use.

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18.Will the Crusoe processor be found in handhelds or web slate computers?

The Crusoe processor with the Midori Linux operating system makes for a very favorablesolution in a web slate or handheld Internet device. It delivers the performance andcompatibility necessary to provide users with the full Internet experience while consumingvery little power.

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19.What is Midori Linux?Transmeta has created a Linux distribution to support its OEM customers called MidoriLinux. Midori Linux is designed for systems without hard disks, such as Mobile Internetdevices (for example, Web slates, clients). The principal enhancements for Midori Linux are

in power management and in the reduction of the memory footprint.

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20.Is Transmeta getting into the Linux distribution business like RedHat?No. Transmeta does not intend to support end users.

The purpose for creating Midori Linux for OEM customers is to provide a total solutionincluding the Crusoe processor, the Code Morphing software, all the required driver supportfor our motherboard platform and the Midori Linux operating system. This will provide ourOEM customers with the best combination of features and time to market for the emergingInternet device marketplace.

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21.Does Transmeta intend to release Midori Linux to the open source community?Yes. This was done on March 13, 2001. It is available for download athttp://midori.transmeta.com/.

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22.Who builds Transmeta's Crusoe processor solution?The hardware piece of the Crusoe Processor solution, the VLIW chip, is fabricated andpackaged by IBM's Microelectronic Division. The Code Morphing software is developed anddistributed along with the processor by Transmeta as a complete solution.

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23.When was Transmeta founded?Dave Ditzel, along with seven colleagues founded Transmeta in 1995. Transmeta is based inSanta Clara, California.

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24.What is Linus Torvalds's role at Transmeta?Linus Torvalds is a member of the very talented software team that created Transmeta's

patented Code Morphing Software.

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25.How are the two versions of the Crusoe processor designated?The two versions of the Crusoe Processor will be known by the common Crusoe brand, sincethey share the same attributes required for truly mobile computing.
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Chapter 4

Processor ArchitectureModern microprocessors are among the most complex systems ever created by humans. A singlesiliconchip, roughly the size of a fingernail, can contain a complete high-performance processor, large cachememories, and the logic required to interface it to external devices. In terms of performance, the

processorsimplemented on a single chip today dwarf the room-sized supercomputers that cost over $10 million

just20 years ago. Even the embedded processors found in everyday appliances such as cell phones,

personaldigital assistants, and handheld game systems are far more powerful than the early developers ofcomputersever envisioned.

Thus far, we have only viewed computer systems down to the level of machine-language programs.Wehave seen that a processor must execute a sequence of instructions, where each instruction performssome

primitive operation, such as adding two numbers. An instruction is encoded in binary form as asequenceof 1 or more bytes. The instructions supported by a particular processor and their byte-level encodingsare known as its instruction-set architecture (ISA). Different families of processors, such as IntelIA32,IBM/Freescale PowerPC, and the ARM processor family have different ISAs. A program compiledfor onetype of machine will not run on another. On the other hand, there are many different models of

processorswithin a single family. Each manufacturer produces processors of ever-growing performance andcomplexity,

but the different models remain compatible at the ISA level. Popular families, such as IA32, haveprocessors supplied by multiple manufacturers. Thus, the ISA provides a conceptual layer ofabstraction

between compiler writers, who need only know what instructions are permitted and how they areencoded,and processor designers, who must build machines that execute those instructions.In this chapter, we take a brief look at the design of processor hardware. We study the way a hardwaresystemcan execute the instructions of a particular ISA. This view will give you a better understanding of howcomputers work and the technological challenges faced by computer manufacturers. One importantconceptis that the actual way a modern processor operates can be quite different from the model ofcomputationimplied by the ISA. The ISA model would seem to implysequentialinstruction execution, whereeachinstruction is fetched and executed to completion before the next one begins. By executing different

partsof multiple instructions simultaneously, the processor can achieve higher performance than if itexecuted

just one instruction at a time. Special mechanisms are used to make sure the processor computes the

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results as it would with sequential execution. This idea of using clever tricks to improve performancewhilemaintaining the functionality of a simpler and more abstract model is well known in computerscience.317318 CHAPTER 4. PROCESSOR ARCHITECTUREExamples include the use of caching in Web browsers and information retrieval data structures suchas

balanced binary trees and hash tables.Chances are you will never design your own processor. This is a task for experts working at fewerthan 100companies worldwide. Why, then, should you learn about processor design?It is intellectually interesting and important. There is an intrinsic value in learning how thingswork.It is especially interesting to learn the inner workings of a system that is such a part of the daily livesof computer scientists and engineers and yet remains a mystery to many. Processor design embodiesmany of the principles of good engineering practice. It requires creating a simple and regular structure

to perform a complex task. Understanding how the processor works aids in understanding how the overall computer systemworks. In Chapter 6, we will look at the memory system and the techniques used to create an image ofa very large memory with a very fast access time. Seeing the processor side of the processor-memoryinterface will make this presentation more complete.Although few people design processors, many design hardware systems that contain processors.Thishas become commonplace as processors are embedded into real-world systems such as automobilesand appliances. Embedded-system designers must understand how processors work, because thesesystems are generally designed and programmed at a lower level of abstraction than is the case fordesktop systems. You just might work on a processor design. Although the number of companies producing

microprocessorsis small, the design teams working on those processors are already large and growing. Therecan be over 1000 people involved in the different aspects of a major processor design.In this chapter, we start by defining a simple instruction set that we use as a running example for our

processor implementations. We call this the Y86 instruction set, because it was inspired by theIA32instruction set, which is colloquially referred to as x86. Compared with IA32, the Y86 instructionset hasfewer data types, instructions, and addressing modes. It also has a simpler byte-level encoding. Still, itissufficiently complete to allow us to write simple programs manipulating integer data. Designing a

processor

to implement Y86 requires us to face many of the challenges faced by processor designers.We then provide some background on digital hardware design. We describe the basic building blocksusedin a processor and how they are connected together and operated. This presentation builds on ourdiscussionof Boolean algebra and bit-level operations from Chapter 2. We also introduce a simple language,HCL (forHardware Control Language), to describe the control portions of hardware systems. We will lateruse thislanguage to describe our processor designs. Even if you already have some background in logicdesign, read

this section to understand our particular notation.As a first step in designing a processor, we present a functionally correct, but somewhat impractical,Y86


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processor based onsequentialoperation. This processor executes a complete Y86 instruction on everyclockcycle. The clock must run slowly enough to allow an entire series of actions to complete within onecycle.Such a processor could be implemented, but its performance would be well below what could beachievedfor this much hardware.With the sequential design as a basis, we then apply a series of transformations to create apipelined

processor.This processor breaks the execution of each instruction into five steps, each of which is handled4.1. THE Y86 INSTRUCTION SET ARCHITECTURE 319%%%%eeeebacdxxxx %%%%eeeebdssppii ZFSFOFFigure 4.1:Y86 programmer-visible state. As with IA32, programs for Y86 access and modifythe programregisters, the condition code, the program counter (PC), and the memory. The status code indicateswhether the program is running normally, or some special event has occurred.

by a separate section orstage of the hardware. Instructions progress through the stages of the pipeline,with one instruction entering the pipeline on each clock cycle. As a result, the processor can beexecutingthe different steps of up to five instructions simultaneously. Making this processor preserve thesequential

behavior of the Y86 ISA requires handling a variety ofhazardconditions, where the location oroperandsof one instruction depend on those of other instructions that are still in the pipeline.We have devised a variety of tools for studying and experimenting with our processor designs. Theseinclude an assembler for Y86, a simulator for running Y86 programs on your machine, and simulatorsfortwo sequential and one pipelined processor design. The control logic for these designs is described byfiles inHCL notation. By editing these files and recompiling the simulator, you can alter and extend the

simulatorsbehavior. A number of exercises are provided that involve implementing new instructions andmodifyinghow the machine processes instructions. Testing code is provided to help you evaluate the correctnessofyour modifications. These exercises will greatly aid your understanding of the material and will giveyou anappreciation for the many different design alternatives faced by processor designers.Web Aside ARCH:VLOGpresents a representation of our pipelined Y86 processor in the Veriloghardwaredescription language. This involves creating modules for the basic hardware building blocks and forthe

overall processor structure. We automatically translate the HCL description of the control logic intoVerilog.By first debugging the HCL description with our simulators, we eliminate many of the tricky bugsthatwould otherwise show up in the hardware design. Given a Verilog description, there are commercialandopen-source tools to support simulation and logic synthesis, generating actual circuit designs for themicroprocessors.So, although much of the effort we expend here is to create pictorial and textual descriptionsof a system, much as one would when writing software, the fact that these designs can beautomaticallysynthesized demonstrates that we are indeed creating a system that can be realized as hardware.

4.1 The Y86 Instruction Set Architecture


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Defining an instruction set architecture, such as Y86, includes defining the different state elements,the set ofinstructions and their encodings, a set of programming conventions, and the handling of exceptionalevents.320 CHAPTER 4. PROCESSOR ARCHITECTURE

4.1.1 Programmer-Visible StateAs Figure 4.1 illustrates, each instruction in a Y86 program can read and modify some part of theprocessorstate. This is referred to as theprogrammer-visible state, where the programmer in this case is eithersomeone writing programs in assembly code or a compiler generating machine-level code. We willsee inour processor implementations that we do not need to represent and organize this state in exactly themannerimplied by the ISA, as long as we can make sure that machine-level programs appear to have accessto the

programmer-visible state. The state for Y86 is similar to that for IA32. There are eightprogramregisters:

%eax, %ecx, %edx, %ebx, %esi, %edi, %esp, and %ebp. Each of these stores a word. Register%esp

is used as a stack pointer by the push, pop, call, and return instructions. Otherwise, the registers havenofixed meanings or values. There are three single-bit condition codes, ZF, SF, and OF, storing

informationabout the effect of the most recent arithmetic or logical instruction. The program counter (PC) holdstheaddress of the instruction currently being executed.The memory is conceptually a large array of bytes, holding both program and data. Y86 programsreferencememory locations using virtual addresses. A combination of hardware and operating system software

translatesthese into the actual, orphysical, addresses indicating where the values are actually stored in memory.We will study virtual memory in more detail in Chapter 9. For now, we can think of the virtualmemorysystem as providing Y86 programs with an image of a monolithic byte array.A final part of the program state is a status code Stat, indicating the overall state of programexecution.It will indicate either normal operation, or that some sort ofexception has occurred, such as when aninstructionattempts to read from an invalid memory address. The possible status codes and the handling ofexceptions is described in Section 4.1.4.

4.1.2 Y86 InstructionsFigure 4.2 gives a concise description of the individual instructions in the Y86 ISA. We use thisinstructionset as a target for our processor implementations. The set of Y86 instructions is largely a subset of theIA32 instruction set. It includes only 4-byte integer operations, has fewer addressing modes, andincludesa smaller set of operations. Since we only use 4-byte data, we can refer to these as words withoutanyambiguity. In this figure, we show the assembly-code representation of the instructions on the left andthe

byte encodings on the right. The assembly-code format is similar to the ATT format for IA32.Here are some further details about the different Y86 instructions.

The IA32 movl instruction is split into four different instructions: irmovl, rrmovl, mrmovl,and


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rmmovl, explicitly indicating the form of the source and destination. The source is either immediate

(i), register (r), or memory (m). It is designated by the first character in the instruction name. The

destination is either register (r) or memory (m). It is designated by the second character in the

instructionname. Explicitly identifying the four types of data transfer will prove helpful when we decide

how to implement them.The memory references for the two memory movement instructions have a simple base anddisplacementformat. We do not support the second index register or any scaling of a registers value in theaddress computation.4.1. THE Y86 INSTRUCTION SET ARCHITECTURE 321B yte0 12 34 5pushlrA A 0rAF

jXXDest 7fnDestpoplrA B 0rAFcallDest 80DestirrmrrmmmooovvvlllrrVAA,,,rrBDB(rB) 234 000rrFAArrrBBB DV mOrPmlovrAl,DrB(rB),rA 56f0nrrAArrBB Dret 90hnaoplt 01 00cmovXXrA,rB 2fnrArB

Figure 4.2:Y86 instruction set. Instruction encodings range between 1 and 6 bytes. An instructionconsists of a 1-byte instruction specifier, possibly a 1-byte register specifier, and possibly a 4-byteconstantword. Field fn specifies a particular integer operation (OPl), data movement condition (cmovXX), or

branchcondition (jXX). All numeric values are shown in hexadecimal.aasnudbddlll 666 012 xorl 63

jjjmllpe777 012 je73jjjnggee 777 456OperationsBranchescrmrmovovlle22 01 ccmmoovvel 22 23cccmmmooovvvnggee222 456Moves

Figure 4.3: Function codes for Y86 instruction set. The code specifies a particular integeroperation,branch condition, or data transfer condition. These instructions are shown as OPl, jXX, and cmovXX

inFigure 4.2.

322 CHAPTER 4. PROCESSOR ARCHITECTUREAs with IA32, we do not allow direct transfers from one memory location to another. In addition, wedo not allow a transfer of immediate data to memory. There are four integer operation instructions, shown in Figure 4.2 as OPl. These are addl, subl,andl, and xorl. They operate only on register data, whereas IA32 also allows operations on

memory

data. These instructions set the three condition codes ZF, SF, and OF (zero, sign, and overflow). The seven jump instructions (shown in Figure 4.2 as jXX) are jmp, jle, jl, je, jne, jge, andjg. Branches are taken according to the type of branch and the settings of the condition codes. The

branch conditions are the same as with IA32 (Figure 3.12). There are six conditional move instructions (shown in Figure 4.2 as cmovXX): cmovle, cmovl,cmove, cmovne, cmovge, and cmovg. These have the same format as the register-register move

instruction rrmovl, but the destination register is updated only if the condition codes satisfy the

required constraints. The call instruction pushes the return address on the stack and jumps to the destination address.The ret instruction returns from such a call.

The pushl and popl instructions implement push and pop, just as they do in IA32.

The halt instruction stops instruction execution. IA32 has a comparable instruction, called hlt.IA32 application programs are not permitted to use this instruction, since it causes the entire systemto suspend operation. For Y86, executing the halt instruction causes the processor to stop, with the

status code set to HLT. (See Section 4.1.4.)

4.1.3 Instruction EncodingFigure 4.2 also shows the byte-level encoding of the instructions. Each instruction requires between 1and 6

bytes, depending on which fields are required. Every instruction has an initial byte identifying theinstructiontype. This byte is split into two 4-bit parts: the high-order, orcode, part, and the low-order, or

function, part.As you can see in Figure 4.2, code values range from 0 to 0xB. The function values are significant

only


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for the cases where a group of related instructions share a common code. These are given in Figure4.3,showing the specific encodings of the integer operation, conditional move, and branch instructions.Observethat rrmovl has the same instruction code as the conditional moves. It can be viewed as an

unconditionalmove just as the jmp instruction is an unconditional jump, both having function code 0.

As shown in Figure 4.4, each of the eight program registers has an associated register identifier(ID)rangingfrom 0 to 7. The numbering of registers in Y86 matches what is used in IA32. The program registersarestored within the CPU in a register file, a small random-access memory where the register IDs serveasaddresses. ID value 0xF is used in the instruction encodings and within our hardware designs when

weneed to indicate that no register should be accessed.Some instructions are just 1 byte long, but those that require operands have longer encodings. First,

therecan be an additional register specifier byte, specifying either one or two registers. These register fieldsarecalled rA and rB in Figure 4.2. As the assembly-code versions of the instructions show, they canspecify theregisters used for data sources and destinations, as well as the base register used in an addresscomputation,4.1. THE Y86 INSTRUCTION SET ARCHITECTURE 323

Number Register name0 %eax

1 %ecx

2 %edx

3 %ebx4 %esp

5 %ebp

6 %esi

7 %edi

F No register

Figure 4.4:Y86 program register identifiers. Each of the eight program registers has an associatedidentifier (ID) ranging from 0 to 7. ID 0xF in a register field of an instruction indicates the absence of

aregister operand.

depending on the instruction type. Instructions that have no register operands, such as branches andcall,

do not have a register specifier byte. Those that require just one register operand (irmovl, pushl,andpopl) have the other register specifier set to value 0xF. This convention will prove useful in our

processorimplementation.Some instructions require an additional 4-byte constant word. This word can serve as the immediatedataforirmovl, the displacement forrmmovl and mrmovl address specifiers, and the destination of

branchesand calls. Note that branch and call destinations are given as absolute addresses, rather than using thePCrelativeaddressing seen in IA32. Processors use PC-relative addressing to give more compact encodings of

branch instructions and to allow code to be copied from one part of memory to another without theneed to


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update all of the branch target addresses. Since we are more concerned with simplicity in ourpresentation,we use absolute addressing. As with IA32, all integers have a little-endian encoding. When theinstructionis written in disassembled form, these bytes appear in reverse order.As an example, let us generate the byte encoding of the instruction rmmovl

%esp,0x12345(%edx) in

hexadecimal. From Figure 4.2, we can see that rmmovl has initial byte 40. We can also see that

sourceregister%esp should be encoded in the rA field, and base register%edx should be encoded in the

rB field.Using the register numbers in Figure 4.4, we get a register specifier byte of42. Finally, the

displacement isencoded in the 4-byte constant word. We first pad 0x12345 with leading zeros to fill out 4 bytes,

giving abyte sequence of00 01 23 45. We write this in byte-reversed order as 45 23 01 00.

Combining these,

we get an instruction encoding of404245230100.One important property of any instruction set is that the byte encodings must have a uniqueinterpretation.An arbitrary sequence of bytes either encodes a unique instruction sequence or is not a legal bytesequence.This property holds for Y86, because every instruction has a unique combination of code and functionin its initial byte, and given this byte, we can determine the length and meaning of any additional

bytes.This property ensures that a processor can execute an object-code program without any ambiguityaboutthe meaning of the code. Even if the code is embedded within other bytes in the program, we canreadilydetermine the instruction sequence as long as we start from the first byte in the sequence. On the otherhand,if we do not know the starting position of a code sequence, we cannot reliably determine how to splitthe324 CHAPTER 4. PROCESSOR ARCHITECTUREsequence into individual instructions. This causes problems for disassemblers and other tools thatattemptto extract machine-level programs directly from object-code byte sequences.Practice Problem 4.1:Determine the byte encoding of the Y86 instruction sequence that follows. The line .pos 0x100

indicates that the starting address of the object code should be 0x100..pos 0x100 # Start code at address 0x100

irmovl $15,%ebx # Load 15 into %ebx

rrmovl %ebx,%ecx # Copy 15 to %ecx

loop: # loop:

rmmovl %ecx,-3(%ebx) # Save %ecx at address 15-3 = 12

addl %ebx,%ecx # Increment %ecx by 15

jmp loop # Goto loop

Practice Problem 4.2:For each byte sequence listed, determine the Y86 instruction sequence it encodes. If there is some invalid

byte in the sequence, show the instruction sequence up to that point and indicate where the invalid valueoccurs. For each sequence, we show the starting address, then a colon, and then the byte sequence.A. 0x100:30f3fcffffff40630008000000

B. 0x200:a06f80080200000030f30a00000090

C. 0x300:50540700000010f0b01f

D. 0x400:6113730004000000

E. 0x500:6362a0f0


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Aside: Comparing IA32 to Y86 instruction encodings

Compared with the instruction encodings used in IA32, the encoding of Y86 is much simpler but also less compact.The register fields occur only in fixed positions in all Y86 instructions, whereas they are packed into variouspositions in the different IA32 instructions. We use a 4-bit encoding of registers, even though there are only eightpossible registers. IA32 uses just 3 bits. Thus, IA32 can pack a push or pop instruction into just 1 byte, with a 5-bitfield indicating the instruction type and the remaining 3 bits for the register specifier. IA32 can encode constantvalues in 1, 2, or 4 bytes, whereas Y86 always requires 4 bytes. End Aside.

Aside: RISC and CISC instruction setsIA32 is sometimes labeled as a complex instruction set computer (CISCpronounced sisk), and is deemedto be the opposite of ISAs that are classified as reduced instruction set computers (RISCpronounced risk).Historically, CISC machines came first, having evolved from the earliest computers. By the early 1980s, instructionsets for mainframe and minicomputers had grown quite large, as machine designers incorporated new instructionsto support high-level tasks, such as manipulating circular buffers, performing decimal arithmetic, and evaluatingpolynomials. The first microprocessors appeared in the early 1970s and had limited instruction sets, because theintegrated-circuit technology then posed severe constraints on what could be implemented on a single chip. Microprocessorsevolved quickly and, by the early 1980s, were following the path of increasing instruction-set complexityset by mainframes and minicomputers. The x86 family took this path, evolving into IA32, and more recently intox86-64. Even the x86 line continues to evolve as new classes of instructions are added based on the needs ofemerging applications.

4.1. THE Y86 INSTRUCTION SET ARCHITECTURE 325The RISC design philosophy developed in the early 1980s as an alternative to these trends. A group of hardware

and compiler experts at IBM, strongly influenced by the ideas of IBM researcher John Cocke, recognized that theycould generate efficient code for a much simpler form of instruction set. In fact, many of the high-level instructionsthat were being added to instruction sets were very difficult to generate with a compiler and were seldom used.A simpler instruction set could be implemented with much less hardware and could be organized in an efficientpipeline structure, similar to those described later in this chapter. IBM did not commercialize this idea until manyyears later, when it developed the Power and PowerPC ISAs.The RISC concept was further developed by Professors David Patterson, of the University of California at Berkeley,and John Hennessy, of Stanford University. Patterson gave the name RISC to this new class of machines, and CISCto the existing class, since there had previously been no need to have a special designation for a nearly universalform of instruction set.Comparing CISC with the original RISC instruction sets, we find the following general characteristics:CISC Early RISCA large number of instructions. The Intel documentdescribing the complete set of instructions

[28, 29] is over 1200 pages long.Many fewer instructions. Typically less than 100.Some instructions with long execution times.These include instructions that copy an entireblock from one part of memory to another and othersthat copy multiple registers to and from memory.No instruction with a long execution time. Someearly RISC machines did not even have an integermultiply instruction, requiring compilers to implementmultiplication as a sequence of additions.Variable-length encodings. IA32 instructions canrange from 1 to 15 bytes.Fixed-length encodings. Typically all instructionsare encoded as 4 bytes.Multiple formats for specifying operands. In IA32,

a memory operand specifier can have many differentcombinations of displacement, base and indexregisters, and scale factors.Simple addressing formats. Typically just base anddisplacement addressing.Arithmetic and logical operations can be appliedto both memory and register operands.Arithmetic and logical operations only use registeroperands. Memory referencing is only allowedby loadinstructions, readin

difference between cpu and microprocessor

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