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Digital p. 1/1 Digital Circuits Part I : Binary Logic, Boolean Algebra, Codes Thus far we have dealt with analog electronics. The signals (voltage and current) could have any value. For the balance of the course we will be dealing with digital electronics, specifically binary logic. In binary logic there are only two possible states: these could be called True (T) and False (F), On and Off, or 1 and 0. Initially we will just discuss the logic combinations of these two states, then we will see how to construct circuits from logic chips to put the logic into action. Binary Logic has two states: They can have different names, and we can use different voltages to represent them. True On 1 +5 V 0 V False Off 0 0 V +5 V Analog circuits remain the fastest, and most sensitive. In the lab we almost always start with an analog signal. Making analog circuits, as we have seen, requires combinations of resistors, capacitors, diodes, transistors, and op- amps. The circuits have lots of components, and noise (static, …) can cause odd behavior. Digital circuits, by contrast, are insensitive to noise. The TTL family of logic that we will describe later defines logic 0 (F, off) as any voltage below 0.8 V, typically around 0.4 V, and logic 1 (T, on) as any voltage larger than 2.4 V, typically 3 or 4 V. Digital circuits consist of logic chips with wires connecting different pins, and rarely a resistor or capacitor. 5.0 V 2.4 V 0.8 V 0.4 V 0.0 V 3.4 V TTL chips are powered with +5 V and ground. Shaded regions are possible voltages at the input of a TTL chip that will be interpreted as logic 0 or logic 1. Solid lines are voltages that the output of a TTL chip will produce. Voltage (not to scale) A transition between logic 0 and logic 1 always entails a delay (due to slew rate) and we must take this into account in designing a digital circuit. We can stay strictly in the digital realm, and just talk about using wires to program the logic. Often however we must have an interface between the analog and digital worlds—ADC’s, analog to digital converters, and DAC’s, digital to analog converters will be discussed at the end of the course. Consider recorded music. We start with a non-electronic source of music (voice, string, reed,) and use a transducer (microphone, pickup) to produce an analog voltage or current that is proportional to the sound. This analog signal is then amplified, various filters or creative distortion can be applied, and then the signal is converted into digital form (Analog to Digital Converter, ADC) and recorded onto a CD (non-electronic storage). You put the CD into a player, the digital signal is read and converted into an analog signal (DAC) that is amplified, has filters to change the sound (boost bass, treble as desired), amplified again and sent to the speakers.

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Page 1: Digital Circuits Part I : Binary Logic, Boolean Algebra, Codes · PDF fileDigital Circuits Part I : Binary Logic, Boolean Algebra, Codes ... indicates binary numbers by using a prefix

Digital p. 1/1

Digital Circuits Part I : Binary Logic, Boolean Algebra, Codes Thus far we have dealt with analog electronics. The signals (voltage and current) could have any value. For the balance of the course we will be dealing with digital electronics, specifically binary logic. In binary logic there are only two possible states: these could be called True (T) and False (F), On and Off, or 1 and 0. Initially we will just discuss the logic combinations of these two states, then we will see how to construct circuits from logic chips to put the logic into action.

Binary Logic has two states: They can have different names, and we can use different voltages to represent them.

True On 1 +5 V 0 V

False Off 0 0 V +5 V

Analog circuits remain the fastest, and most sensitive. In the lab we almost always start with an analog signal. Making analog circuits, as we have seen, requires combinations of resistors, capacitors, diodes, transistors, and op-amps. The circuits have lots of components, and noise (static, …) can cause odd behavior.

Digital circuits, by contrast, are insensitive to noise. The TTL family of logic that we will describe later defines logic 0 (F, off) as any voltage below 0.8 V, typically around 0.4 V, and logic 1 (T, on) as any voltage larger than 2.4 V, typically 3 or 4 V. Digital circuits consist of logic chips with wires connecting different pins, and rarely a resistor or capacitor.

5.0 V

2.4 V

0.8 V

0.4 V 0.0 V

3.4 V

TTL chips are powered with +5 V and ground.

Shaded regions are possiblevoltages at the input of a TTL chip that will be interpreted as logic 0 or logic 1.

Solid lines are voltages thatthe output of a TTL chip willproduce.

Voltage (not to scale)

A transition between logic 0 and logic 1 always entails a delay (due to slew rate) and we must take this into account in designing a digital circuit.

We can stay strictly in the digital realm, and just talk about using wires to program the logic. Often however we must have an interface between the analog and digital worlds—ADC’s, analog to digital converters, and DAC’s, digital to analog converters will be discussed at the end of the course.

Consider recorded music. We start with a non-electronic source of music (voice, string, reed,) and use a transducer (microphone, pickup) to produce an analog voltage or current that is proportional to the sound. This analog signal is then amplified, various filters or creative distortion can be applied, and then the signal is converted into digital form (Analog to Digital Converter, ADC) and recorded onto a CD (non-electronic storage). You put the CD into a player, the digital signal is read and converted into an analog signal (DAC) that is amplified, has filters to change the sound (boost bass, treble as desired), amplified again and sent to the speakers.

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Preamp Amp Filter

ADC

CD playerDAC Amp Tone Power Control Amp

8.1 Boolean Algebra: The basics Boolean Algebra is a subject encountered both in philosophy (Logic) and electronics. While many of the same ideas are common, each field has its own spin. Here we will define logical functions that combine logic signals—NOT (Negate or Invert), AND, OR, NAND, NOR, XOR—and list some of the theorems of Boolean Algebra..

Names of variables: as with ordinary algebra, we will use letters or names for variables. Thus A, B, C, Q are common, as are names such as Reset or Reset (read as “reset-bar”).

Values of variables: We will use 0 or 1, later we will also introduce x which means “either 0 or 1, it doesn’t matter.”

Identities: In regular algebra we have two identity values, 0 for addition (0 + x = x) and 1 for multiplication (1*x = x). We will also have identities in Boolean algebra.

Truth Tables: We sometimes make a table showing all possible combinations of inputs and outputs.

Circuit Symbols: Each Boolean Operator will have a circuit symbol.

Now let’s examine the Boolean operators. The NOT operator is unary, that is it take a single input. The rest of the operators are binary or above, taking 2 or more inputs. In general there is a single output.

The next table shows the operator name and number of inputs, the Boolean statement that uses the operator and how to say it in words, the circuit symbol, and a sample truth table.

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Operator Boolean Statement Words Circuit symbol Truth Table

NOT

(one input) Y = A Y equals NOT A

Or

Y = A-bar

A Y

A Y

0 1

1 0

AND

(2, 3, or more inputs)

Y = A ! B = A B

Y = A ! B !C = A BC

Y equals A and B

Y equals A and B and C

The output is 1 ONLY when all inputs are 1

A single input of 0 forces output to 0

A

B Y

C

A

B Y

A B Y

0 0 0

0 1 0

1 0 0

1 1 1

OR

(2, 3, or more inputs)

Y = A + B

Y = A + B + C

Y equals A or B or C

The output is 1 when ANY ONE input is 1

A

B Y

C

A

B Y

A B Y

0 0 0

0 1 1

1 0 1

1 1 1

NAND

(2, 3, or more inputs)

Y = A ! B = A B

Y = A ! B !C = A BC

Y equals A nand B

This is AND followed by NOT

The output is 0 ONLY when all inputs are 1

A single input of 0 forces output to 1

A

B Y

C

A

B Y

A B Y

0 0 1

0 1 1

1 0 1

1 1 0

NOR

(2, 3, or more inputs)

Y = A + B

Y = A + B + C

Y equals A nor B

This is OR followed by NOT

The output is 0 when ANY ONE input is 1

A

B Y

C

A

B Y

A B Y

0 0 1

0 1 0

1 0 0

1 1 0

XOR (2)

(2 inputs)

Y = A! B Y = A exclusive or B

The output is 1 if the inputs are different.

A

B Y

A B Y

0 0 0

0 1 1

1 0 1

1 1 0

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8.2 Boolean Algebra: Postulates and Theorems (Scherz Section 12.2.4) I am not concerned with the formal difference between postulates and theorems. Some of the following will be almost obvious from inspection (although more rigorous mathematicians may insist of proofs), while others require proofs. I will use the same numbering scheme as the text, p. 645, but will group them in a way that seems more logical. Several of the initial ones need no proof.

Class AND OR Basic identities

7) 1 = 0 8) 0 = 1 15) A = A

Identities 9) A !0 = 0

10) A !1 = A

14) A ! A = A

17) A ! A = 0

11) A + 0 = A

12) A +1 = 1

13) A + A = A

16) A + A = 1

Commutative, Associative, Distributive

2) A ! B = B ! A

4) A ! B !C( ) = A ! B( ) !C

5) A ! B + C( ) = A ! B + A !C

1) A + B = B + A

3) A + B + C( ) = A + B( ) + C

6) A + B( ) ! C + D( ) = A C + A D + B C + B D

Theorems requiring proof

20) A + A B = A + B

22) A! B = A B + A B = A + B( ) " AB

21) A + A B = A + B

23) A! B = A " B + A " B

DeMorgan’s Theorems:

19) A ! B = A + B

A ! B !C = A + B + C

18) A + B = A ! B

A + B + C = A ! B !C

Here are two ways to prove theorem 20. Notation “= ?” means “Does this equal?”

Proof by logic:

A + A B = ? A + B

A + A B = ? A + B !1

A + A B = ? A + B ! A + A( )A + A B = ? A !1+ B ! A + A B

A + A B = ? A ! 1+ B( ) + A B

A + A B = ? A !1+ A B

A + A B = A + A B

Q.E.D.

Proof by Truth Table

A B A A B A + A B A + B

0 0 1 0 0 0

0 1 1 1 1 1

1 0 0 0 1 1

1 1 0 1 1 1

Q.E.D.

DeMorgan’s Theorems are very useful, and can be expressed in terms of logic symbols.

A ! B = A + B

A

B Y

C

A

B Y

A

B Y

C

A

B Y

A + B = A ! B

A

B Y

C

A

B Y

A

B Y

C

A

B Y

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The circles that represent NOT are called bubbles, and we are engaged in bubble pushing: push a bubble from output to all inputs by changing the gate from OR to AND. A bubble can be pushed from one end of a wire to the other with no change in gate type, as we will see later. Scherz page 647-8 shows examples of bubble pushing.

8.3 What Is This Used For? So far we have just dealt with the logic in an abstract sense. What do we do with all the 0’s and 1’s?

The individual 0’s and 1’s may represent states of interest by themselves. Thus 0 could represent a door that is open, or a temperature below 40°C, or a LED that is off. A 1 could represent a door that is closed, a temperature above 40°, or an LED that is on.

We may wish to monitor the temperature of a refrigerator, and light an LED to warn that the temperature is too warm even though the door is closed. If we use D, T, and L for the door, temperature, and LED, we would have a logic statement, L = D � T .

Often we use a combination of individual logic variables to form a group that can have various meanings. Thus a group “01010011” could mean the letter S, the number 53, the number 83, or a command to add two numbers. Microcomputer commands are specific to types of computers, and we will not discuss them, however codes for numbers and letters are useful.

8.4 Codes A single Boolean variable is often referred to as a bit, short for binary digit. Codes consist of groups of bits. A group of 8 bits is called a byte, half of this is called nibble. Most computers operate on data and commands in groups of one or more bytes. Collections of bytes are called words, but words have variable lengths. Here are some of the common meanings for collections of bits.

Binary numbers, Octal, and Hexadecimal In base 10, “128 = 1 x 102 + 2 x 101 + 8 x 100” and we extend this idea to base 2. Thus

01010011 = 0 x 27 + 1 x 26 + 0 x 25 + 1 x 24 + 0 x 23 + 0 x 22 + 1 x 21 + 1 x 20 = 83

Google’s calculator indicates binary numbers by using a prefix of 0b. Conversions can be done easily such as “0b01010011 in decimal” --returns “0b01010011 = 83”-- and “55 in binary” returns “55 = 0b110111”. Notice that this is only 6 bits, so we add a pair of 0’s to the start to get the byte 0b00110111.

It is hard for humans to read binary numbers, but it is easy to convert the answers into base 8 (octal) or base 16 (hexadecimal, hex for short.). Starting from the right group a byte into groups of 3 digits: 01 010 011, convert each group into decimal to get the octal equivalent, 1238 = 1 x 82 + 2 x 81 + 3 x 80 = 8310, where the subscripts tell us the base. In Google the prefix 0o indicates octal, and statements like “0o123 in decimal”, or “83 in octal” allow conversions.

When we use base 16 we need extra digits for the numbers 10 to 15. The letters A through F are used, thus

0101 00112 = 6316 = 6 x 161 + 3 x 160, and 1011 11102 = BE16 = 19010. In Google the prefix 0x is used for numbers in hex, and conversions are done by “0xBED in decimal” and “2007 in hex”.

You can also do arithmetic in Google, even in mixed bases. So “0xBED +54” returns “0xBED + 54 = 0xC23” while “54 +0xBED” returns “54 +0xBED = 3107”. The answer is given in the base of the first number.

Binary Coded Decimal, BCD Other codes exist that are not so straight forward. Binary Coded Decimal takes a byte and translates each nibble into a decimal number between 0 and 9. Thus 0101 0011BCD = 5310. Google does not do this conversion as far as I know.

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ASCII—American Standard for Computer Interchange of Information, UNICODE

We also want to store information in the computer corresponding to letters and symbols. Codes exist for letters, numbers and other symbols. A byte can represent 28 = 256 unique characters, and is the basis of the ASCII code (both 7-bit and 8-bit codes exist.) In ASCII the code 01010011 represents upper-case S, 00020001 is the code for !, and 00110111 is the code for 7.

English speaking programmers who developed ASCII did not consider the variety of symbols that need to be represented. Recently UNICODE has been developed. UTF-32 uses a fixed length of 4 bytes to represent each character. More compact versions use a variable code length of 1 to 4 bytes and are called UTF-8 or UTF-16. Unicode’s goal is to have a unique digital representation of every language and symbol.

Barcodes: The UPC One other widespread code regularly seen is the UPC barcode (Google onto howstuffworks.com). The code consists of two parts, the first, 639382 is the manufacturer, and the second, 00039, is the number that the manufacturer has assigned to a specific product. The last digit, 3, is a check sum to help identify any errors in reading the code. (add up the digits in odd places, 6 + 9 + 8 + 0 + 0 + 9 = 32, multiply by 3 and add the digits in even places, 3*32+3+3+2+0+3 = 107. Finally determine the number which when added to the result gives an even multiple of 10. In this case, 3.)

Now for the code. The UPC must be error proof as much as possible. If you look carefully you will see that there are black bars of 4 different widths (call them 1 to 4) separated by white spaces also of 4 different widths. Each digit is a combination of 2 bars and two spaces, for example 6 = 1-1-1-4 while 3 = 1-4-1-1. How many possible states can we code with 4 bar/spaces? Each bar or space has 4 values and there are 4 of them, so each combination could code 256 values, of which we only choose 10. This allows a robust system of error checking—if a coe scans incorrectly it is almost always possible to tell that there was a mistake, and in some cases to make corrections.

Check out HowStuffWorks for lots more information on UPC bar codes.

8.5 From Logic to Electronics How do we turn the mathematics into electronics? There are two main families of logic chips that have developed. One is based on transistors, and called TTL, transistor-transistor logic. The other is based on MOSFET transistors and called CMOS, complementary MOS logic. The tables on pages 672 and 673 of Scherz gives a partial list of children within these two families.

A quick overview: TTL was originally faster, but used considerably more power. TTL is powered from a single (5.0 ± 0.5)V power supply. CMOS was originally slower, but low in power. CMOS is powered from a supply ranging between 3 and 6 V or even wider. CMOS variants that operate interchangeably with TTL are now available, with speeds as fast as TTL, but with low power requirements. These variants operate off a 5 V supply.

Both TTL and newer CMOS chips follow the same numbering scheme, XX74YNNN. The first characters (XX here) represent the manufacturer, and generally will not be mentioned except by the manufacturer. The Y represents the “children” in the TTL family. The original chips had no symbol here, but as new children are developed we get 74LSNNN, 74HNNN, 74ALSNNN etc. (54YNNN chips are identical in function, but rated for the mor stringent requirements of the military.)

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The last 2 or three numbers (NNN) tell the function of the chip. A 7400, 74LS00, 74ALS00 etc all are “Quad 2-input NAND’s.” This means that on a single 14-pin chip there are four (quad) logic gates, each of which is a 2-input NAND.

The original CMOS chips were numbered 40NN, such as 4001, 4011, etc. The 4001 is a “Quad 2-input NOR” while the 4011 is a “Quad 2-input NAND.” Later CMOS children tend to use the 74NNN numbers, thus a 74HC00 is a “High Speed CMOS” equivalent to the 7400.

Important Quantities for a Logic Chip:

Supply voltage: What is the required power supply? Without power the chip will not work! Since power should always be the first thing wired in a circuit, it is NEVER shown in a circuit diagram. TTL requires a voltage close to 5.0 V.

Power dissipation: This is generally given in terms of Power per gate, and represents the average power used by the chip. A 7400 chip with 4 gates uses 10 mW/gate or a total of 40 mW.

Logic levels: There will be two sets of numbers, one for input, one for output. For a 7400 chip,

Logic 0 means input < 0.8 V, and output < 0.4 V. Why the difference? If we interconnect output form one gate to input of another, the state will definitely be interpreted as logic 0 even if a little noise or offset creeps onto the line joing the gates.

Logic 1 means input > 2.0 V and output > 2.4 V.

These are the threshold values for voltages. In reality the voltages on the inputs and outputs will be closer to 0 and 5 volts.

Maximum Frequency: The delay times mean thaat we there is an upper frequency limit to the chip. For standard TTL this is 35 MHz. This is related to the delay times.

Current into the chip: Different current are required at the input for a gate to recognize logic 0 and logic 1. For standard TTL, a low state requires IIL(max) = -1.6 mA. This means that a current of 1.6 mA leaves the input pin heading back to the output pin of another chip. A high state has IIH = 0.040 mA = 40 µA heading into the input pin.

1 0 1 0

When an output of logical 0 is connected to inputs of other chips, a LARGE current flows as shown on the left.

When an output of logical 1 is connected to inputs of other chips, a small current flows as shown on the right.

Current out of a chip: In the low state IOL(max) = 16 mA, meaning current must enter the pin. In the high state IOH(max)

= -0.4 mA = -400 µA, meaning current must leave the pin. These currents are true maxima. If you hook an output to nothing, the high output current is 0, hooked to one input the high output current is 40 µA, hooked to two High inputs, the output current is 80 µA, etc.

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Fanout: Notice that the output current for standard TTL is 10 times the input current, called a fanout of 10. This means that the output of one gate can be attached to as many as 10 inputs of the same “child” chip. If you are interconnecting chips from different children you must be careful to match up currents.

Unconnected inputs: If an input is unconnected it has a current of 0. This is closer to logic 1 current (40 µA) than logic 1 current (-1.6 mA), so for standard TTL open inputs act as if they were logic 1.

Time Delay: We talked about slew rates when we looked at op-amps. There is always a delay in the response of a chip to a change in the inputs. Often this is symnmetrical, mening that the transition from logic 0 (Low) to logic 1 (High) takes just as long as the transition from logic 1 (H) to logic 0 (L).

For standard TTL the delay times are tPHL = 8 ns and tPLH = 13 ns.

tPHL

tPLH

In

Out

The output is delayed relative to the input. Delay times are shown for an output Pulse going High to Low and vice versa.

Unused gates: For TTL, unused gates can be left unconnected. For CMOS unused gates should have their inputs

connected to ground. (See Scherz Sect 12.5.3)

Size of chips: All chips require power and ground. Packages are 14, 16 or more pins. Thus a 14 pin chip has 12 pins for inputs and outputs of logic gates. A chip can thus have 6 inverters, or 4 two-input NAND’s, or 3 three-input NAND’s. Usually all the pins have some function.

8.6 Scale of logic and availability of chips The chips we will use are called Small Scale Logic, SSL. As more gates are added we get Medium Scale, Large Scale, and Very Large Scale logics. Before LSL and VLSL became common and inexpensive, there were hundreds of choices of chips. Most of these are no longer available, and instead Programmable Logic Arrays (PLA) are used. PLA’s allow you to design the logic and then burn a chip to make the logic work.

8.7 Naming conventions For simple SSL letters are used for inputs and outputs. For a 7400 the inputs are labeled 1A, 1B and the output 1Y, with 2, 3, and 4 used for the other gates on the chip.

As we move to more complicated chips, certain pins have definite meaning and a mnemonic convention is used. If a pin is used to reset a chip, and it is called RESET, it will reset the chip when it is at logic 1. If we want the chip to reset when this pin is logic 0, we call it RESET . On a circuit diagram we can use an alternate convention of having a wire directly connected and called RESET, or connected to a bubble (NOT) and called either RESET or RESET.

Reset Reset

Two possible naming conventions for reset. Both reset the chip whenthe input signal is 0.

8.8 Universal Capability of NAND’s and NOR’s You will notice that SSL gates in common use are dominated by NAND’s and NOR’s. This is because any of the other gates can be built from these. Page 648 in Scherz has a complete list with circuit diagrams; here I will list just

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two in logic form. If you build a circuit with a 7400 quad-NAND chip, you often have unused gates left over that can be put to other use.

Inverter: Given Y get Y = Y !1 = Y !Y = Y + 0 = Y +Y

AND: Given A and B get Y = A B

Here are some circuits that do these two things.

Y Y Y Y

1

A

B Y = A B

8.9 Sum-of-Products Design Here is one path to the design of a digital circuit using NAND’s, NOR’s, and Inverters.

1. Make a truth table of inputs and output.

2. Write down each combination of inputs that lead to a logic 1 output using AND’s (“product”.)

3. Combine these combinations with OR’s (“sum”) and

4. Simplify.

As an example, look at a seven segment display that has seven LED or LCD bars that we wish to turn on to provide a visual expression of a number.

For inputs consider a 4-bit nibble that tells us a number between 0 and 9. What logic circuit will take these inputs and light the segment e when appropriate?

Most Significant Least Significant Output

Decimal D C B A e

0 0 0 0 0 1

1 0 0 0 1 0

2 0 0 1 0 1

3 0 0 1 1 0

4 0 1 0 0 0

5 0 1 0 1 0

6 0 1 1 0 1

7 0 1 1 1 0

8 1 0 0 0 1

9 1 0 0 1 0

a

f b

c e

d

g

Easy way to set up a truth table: In Column A alternate 0 and 1, in Column B alternate two 0’s with two 1’s, in Column C alternate four 0’s with four 1’s, etc. This systematic approach ensures that all logic combinations are written down.

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Step 2. There are 4 input combinations that lead to the output e = 1. I write the required inputs with a bar if the input is a 0 and no bar if it is 1. The states are 0

10= A B C D , 2

10= A B C D , 6

10= A B C D , and 8

10= A B C D .

Step 3. We then combine these to get e = A B C D + A B C D + A B C D + A B C D

Step 4. Now for the “fun” stuff, simplification. I have written the steps out and use various of the theorems/postulates discussed before.

e = A B C D + B C D + B C D + B C D( )

e = A C D B + B( ) + B C D + B C D( )e = A C D + B C D + B C D( )

e = A C D + B D( ) + B C D( )e = A C D + B( ) + B C D( )

e = A C D + C B + B C D( )

e = A C B + D C + B C( )( )e = A C B + D C + B( )( )e = A C B + D C + DB( )

This result looks easier than what we began with. Here is a circuit that does the above logic. The solution is not unique.

A

B

C

D

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We can simplify the building of the circuit by trying to stick with NAND’s, NOR’s, and NOT’s. The following show two steps in bubble pushing to achieve this.

A

B

C

D

A

B

C

D

Once I have a basic circuit, I find bubble pushing one way to make the circuit more friendly to being built. The final version above would require one each of a 7400 Quad 2-input NAND, a 7404 Hex Inverter, and a 7410 Triple 3-input NAND.

8.10 Karnaugh Maps One of the systematic approaches to finding good logic solutions to a truth table is the Karnaugh map.

The following is the frame of a Karnaugh map for 4 inputs. Each blank cell represents the output from one combination of inputs: the top left cell refers to D C B A inputs. In going from one cell to an adjacent cell, only one bit changes.

In the second map I have entered values for the e bar of a seven segment display. Notice that some cells contain x’s—these represent states that are not valid, and for the purposes of the Karnaugh map can be either 0 or 1.

DC / BA--> 00 01 11 10

00

01

11

10

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DC / BA--> 00 01 11 10

00 1 0 0 1

01 0 0 0 1

11 X X X X

10 1 0 X X

00 01 11 10

00 1 0 0 1

01 0 0 0 1

11 X X X X

10 1 0 X X

B A

C A To use the Karnaugh map, I look for clusters of two, four, or eight 1’s, hoping for as large a cluster as possible. Consider the column for which BA = 10. This includes two x’s, which we conveniently take as 1’s. That column can be represented as B A . The four corners form another group that can be represented as C A .

Thus a possible logic solution for e is e = CA + BA = A B + C( ) = A B C , and in circuit form, using 7400 and 7404 chips

A

B

C