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S.Padmini Assistant Professor/EEE Dept. of EEE SRM University

DIGITAL SYSTEMS PURPOSE

To develop a strong foundation in the field of Digital Electronics. The subject gives the students an in – depth knowledge about Digital logic families, Combinational

circuits and enable them to analyse and design any sequential circuits.

INSTRUCTIONAL OBJECTIVES

At the end of the course, student will be able to :

1. Understand the basic concepts of digital logic circuits. 2. Gain knowledge about various digital logic families 3. Design combinational and sequential logic circuits. 4. Design Programmable logic devices.

NUMBER SYSTEMS AND BOOLEAN ALGEBRA

Review of Number systems – Binary ,Octal, Decimal , Hexadecimal and conversions - Complements - Subtraction using complements - Binary codes - Theorems of boolean algebra - Canonical forms - Logic gates, Simplification of Boolean functions-K maps-Tabulation method.

L T P C

EE 0307 DIGITAL SYSTEMS 3 0 0 3

Prerequisite

Nil


LOGIC FAMILIES

Digital Logic Families - Introduction to RTL, DTL, TTL, ECL and MOSL families - Details of digital logic family -Wired and operation, characteristics of digital logic family - comparison of different logic families.

COMBINATIONAL LOGIC CIRCUITS

Combinational Logic - Representation of logic functions - Simplification and Implementation of combinational logic - Multiplexers and demultiplexers - Code converters,comparator, adders- full adder-half adder-decimal adder, subtractors-half subtractor- full subtractor.

SEQUENTIAL LOGIC CIRCUITS

Sequential Logic-Flip flops - SR, JK, D and T flip flops - Level triggering and edge triggering - Excitation tables - Counters - Asynchronous and synchronous type - Modulo counters - Shift registers - Ring counters.

DESIGN OF DIGITAL SYSTEMS

Design aspects; asynchronous type: concept of state - state reduction - analysis of asynchronous sequential logic circuits–introduction to design; programmable logic array and devices; finite state machine.


TEXT BOOKS

1. Morris Mano,M .Digital logic and computer design Prentice Hall of India, 1997. 2. Donald D. Givone, Digital Principles and Design, Tata McGraw Hill, 2002. 3. Tocci R.J.,Neal S. Widmer, Digital Systems: Principles and Applications,

Pearson Education Asia, Second Indian Reprint 2002.

REFERENCE BOOKS

1. Floyd, Digital Fundamentals, Universal Book stall, New Delhi, 1986R.P. Jain, Modern Digital Electronics Tata Mcgraw Hill, 3rd edition ,1997.William I. Fletcher, An Engineering Approach to Digital Design, Prentice Hall of India ,1980

2. Morris Mano, Digital Logic and Design, Prentice Hall of India, 1979 3. William I.Fletcher, An Engineering approach to Digital Design, Prentice Hall of

India, 1980


EE 0307 - DIGITAL SYSTEMS (R)

Course designed by Department of Electrical and Electronics Engineering

Student outcomes a b c d e f g h i j k

x x x x x x x

Category

General (G)

Basic Sciences (B)

Engineering Sciences and Technical Arts(E)

Professional Subjects(P)

x

Broad area (for ‘P’category)

Electrical Machines

Circuits and Systems

Electronics Power System

Intelligent Systems

x X

Course Coordinator Mrs. S.Padmini


Types of Number Systems

I. DECIMAL NUMBER SYSTEM II. BINARY NUMBER SYSTEM

III. OCTAL NUMBER SYSTEM IV. HEXADECIMAL NUMBER SYSTEM

103 102 101 100 10-1 10-2 10-3

=1000 =100 =10 =1 . =0.1 =0.01 =0.001

Most Significant Digit

Decimal point

Least Significant Digit

8973 is Eight Thousand Nine Hundred and Seventy Three:


8 = 8000 = 8 x 103 (Thousands Place)

9 = 900 = 9 x 102 (Hundreds Place)

7 = 70 = 7 x 101 (Tens Place)

3 = 3 = 3 x 100 (Units Place)

An n-bit binary number a n-1a n-2…a1a 0 has a value:

N = a n-1 x 2 n-1 + a n-2 x 2 n-2 +…+ a 1 x 2 1 + a 0 x 2 0


This base-2 system can be used to represent any quantity that can be represented in decimal or other number system.

e.g. A 4-bit binary number 10112 is:

N = 1 x 23 + 0 x 22 + 1 x 21 + 1 x 20

= 8 + 0 + 2 + 1 = 1110

e.g. A 6-bit binary number 1100102 is:

N = 1x25 + 1x24 + 0x23 + 0x22 + 1x21 + 0x20

= 32 + 16 + 0 + 0 + 2 = 5010

23 22 21 20 2-1 2-2 2-3

=8 =4 =2 =1 . =1/2 =1/4 =1/8

Most Significant Bit Binary point Least Significant Bit


Decimal Equivalent of given binary number

Octal Number System

Octal Numbers are base 8

Octal has 8 digits: 0, 1, 2, 3, 4, 5, 6, 7

An n-bit octal number a n-1a n-2…a1a 0 has a decimal value:

a n-1 x 8 n-1 + a n-2 x 8 n-2 +…+ a 1 x 8 1 + a 0 x 8 0


The conversion of octal to decimal can be done with the above equation

e.g. 2638 = 2x82 + 6x81 + 3x80

= 128 + 48 + 3 = 17910

e.g 24.68 = 2 x (81) + 4 x (80) + 6 x (8-1) = 20.7510

Hexadecimal Number System

Hexadecimal Numbers are base 16

There are 16 digits: 0 to 9, A, B, C, D, E, F

163 162 161 160 16-1 16-2 16-3

=4096 =256 =16 =1 . =1/16 =1/256 =1/4096


Hexadec. Point

Least Significant Digit

83 82 81 80 8-1 8-2 8-3

=512 =64 =8 =1 . =1/8 =1/64 =1/512


Octal point

Least Significant


An n-bit hexadecimal number a decimal value:

a n-1 x 16 n-1 + a n-2 x 16 n-2 +…+ a 1 x 16 1 + a 0 x 16 0

The conversion of hexadecimal to decimal can be done with the above equation

e.g. B5E16 = 11x162 + 5x161 + 14x160 =

2816 + 80 + 14 = 291010

POSITIONAL WEIGHTS Decimal Number System

Binary Number System

Octal Number system


Hexadecimal Number System

NUMBER SYSTEMS CONVERSTIONS


Binary - Decimal Number Conversion

Binary numbers can be converted to Decimal numbers by using:

N = a n-1 x 2 n-1 + a n-2 x 2 n-2 +…+ a 1 x 2 1 + a 0 x 2 0

1 1 0 1 1 2 (binary)

24+23+0+21+20 = 16+8+0+2+1

= 2710 (decimal)

1 0 1 1 0 1 0 1 2 (binary)

27+0+25+24+0+22+0+20 = 128+0+32+16+0+4+0+1

= 18110 (decimal)

Decimal to Binary

Decimal numbers can be converted to binary numbers by dividing the decimal number by 2 successively.

This method uses repeated division by 2. Ex. Convert 2510 to binary

25/ 2 = 12+ remainder of 1 1 (Least Significant Bit)

12/ 2 = 6 + remainder of 0 0

6 / 2 = 3 + remainder of 0 0

3 / 2 = 1 + remainder of 1 1


1 / 2 = 0 + remainder of 1 1 (Most Significant Bit)

Result 2510 = 1 1 0 0 12


Decimal to Octal Number Conversion

It can be done by successive division of 8

This method uses repeated division by 8.

e.g. Convert 17710 to octal and binary:

177/8 = 22+ remainder of 1 1 (Least Significant Bit)

22/ 8 = 2 + remainder of 6 6


Result 17710 = 2618

Convert to Binary = 0101100012

e.g. 93810 = 16528


Decimal to Hexadecimal Conversion

This method uses repeated division by 16.

e.g. Convert 37810 to hexadecimal and binary:

378/16 = 23+ remainder of 10 A (Least Significant Bit)

23/ 16 = 1 + remainder of 7 7


Result 37810 = 17A16

Convert to Binary

= 0001 0111 10102

e.g. 279310 = AE916


Conversion between Binary and Octal

Conversion between Binary and Octal is convenient.Each Octal digit equals to 3 bits

e.g. 3 6 2 8 - 011 110 010 2

5 4 1 8 - 101 100 001 2

e.g. 010 101 110 2 - 2 5 6 8

111 010 001 2 - 7 2 1 8

Conversion between Binary and Hexadecimal number system

Conversion between Binary and Hexadecimal is also convenient.Each Hexadecimal digit equals to 4 bits


E 2 8 0 16 - 1110 0010 1000 0000 2

F B 1 16 - 1111 1011 0001 2


Conversions for Practice


1S’ & 2’S COMPLEMENTS

1’s Complement Number System

In 1’s complement for a particular Binary Number system the 1’s are replaced by 0’s and the 0’s are replaced by 1’s.

e.g. 1001 its complement will be 0110.

2’s Complement Number System

For the 2’s complement of a number 1 is added to the 1’s complement of the number

e.g. 1001 As seen above the ones complement is 0110

to get the 2’s complement we add a 1 to 0110

0110

+ 1

0111


BINARY CODES

Group of bits assigned to represent, identify or relate to multivalued items of information. By assigning each item of information a unique combination of bits the information is transferred from one form to another. The group of bits may be numbers, alphabets, control functions and special characters.

An n-bit binary code is a group of n bits that assume up to 2n combinations of 1’s and 0’s with each combination representing one element of the set being enclosed.

Types

1. Weighted codes

2. Non – weighted codes

3. Self complementing codes

4. Reflective codes

5. Alphanumeric codes

6. Error detecting and correcting codes

1.Weighted Codes

Each bit has a positional value of 8,4,2 or 1 in binary codes. Examples are 8421, 2421, 3321, 4221, 5211, 5311, 5421, 6311,7421, 742’1’,

842’1’


All the above codes are used to represent a given decimal digit into four bit

binary word.

S.No. Decimal

Number

8421 2421 3321 4221 5311 5421 6311 7421 742’1’ 842’1’

1. 0 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000

2. 1 0001 0001 0001 0001 0001 0001 0001 0001 0111 0111

3. 2 0010 0010 0010 0010 0011 0010 0011 0010 0110 0110

4. 3 0011 0011 0011 0011 0100 0011 0100 0011 0101 0101

5. 4 0100 0100 0101 1000 0101 0100 0101 0100 0100 0100

6. 5 0101 1011 0110 0111 1000 0101 0111 0101 1010 1011

7. 6 0110 1100 0111 1100 1001 0110 1000 0110 1001 1010

8. 7 0111 1101 1101 1101 1010 0111 1001 0111 1000 1001

9. 8 1000 1110 1110 1110 1100 1011 1011 1001 1111 1000

10. 9 1001 1111 1111 1111 1101 1100 1100 1010 1110 1111

2. Non-weighted Codes:

Each bit has no positional value

1. Excess-3 code

2.Gray code

3.Five bit BCD


3. Self complementing codes (or) Reflective codes

Code for one digit will be the complement of other

1.2421

2.5211

3. Excess-3

4. Sequential Codes

Succeeding number is one more than the previous one

1. 8421

2. Excess-3

5. Alphanumeric codes

1. ASCII

2. EBCDIC

3. Hollerith

6. Error detecting and correcting codes

For reliable transmission and storage of digital data, error detection and correction is required. Below are a few examples of codes which permit error detection and error correction after detection

Error Detecting Codes


When data is transmitted from one point to another, like in wireless transmission, or it is just stored, like in hard disks and memories, there are chances that data may get corrupted. To detect these data errors, we use special codes, which are error detection codes.

Parity

In parity codes, every data byte, or nibble (according to how user wants to use it) is checked if they have even number of ones or even number of zeros. Based on this information an additional bit is appended to the original data. Thus if we consider 8-bit data, adding the parity bit will make it 9 bit long.

At the receiver side, once again parity is calculated and matched with the received parity (bit 9), and if they match, data is ok, otherwise data is corrupt.

There are two types of parity:

• Even parity: Checks if there is an even number of ones; if so, parity bit is zero. When the number of ones is odd then parity bit is set to 1.

• Odd Parity: Checks if there is an odd number of ones; if so, parity bit is zero. When number of ones is even then parity bit is set to 1.

Error-Correcting Codes

Error-correcting codes not only detect errors, but also correct them. This is used normally in Satellite communication, where turn-around delay is very high as is the probability of data getting corrupt.

ECC (Error correcting codes) are used also in memories, networking, Hard disk, CDROM, DVD etc. Normally in networking chips (ASIC), we have 2 Error detection bits and 1 Error correction bit.


Hamming Code

Hamming code adds a minimum number of bits to the data transmitted in a noisy channel, to be able to correct every possible one-bit error. It can detect (not correct) two-bits errors and cannot distinguish between 1-bit and 2-bits inconsistencies. It can't - in general - detect 3(or more)-bits errors.

Alphanumeric Codes

The binary codes that can be used to represent all the letters of the alphabet, numbers and mathematical symbols, punctuation marks, are known as alphanumeric codes or character codes. These codes enable us to interface the input-output devices like the keyboard, printers, video displays with the computer.

ASCII Code

ASCII stands for American Standard Code for Information Interchange. It has become a world standard alphanumeric code for microcomputers and computers. It is a 7-bit code representing 27 = 128 different characters. These characters represent 26 upper case letters (A to Z), 26 lowercase letters (a to z), 10 numbers (0 to 9), 33 special characters and symbols and 33 control characters.

The 7-bit code is divided into two portions, The leftmost 3 bits portion is called zone bits and the 4-bit portion on the right is called numeric bits.

An 8-bit version of ASCII code is known as USACC-II 8 or ASCII-8. The 8-bit version can represent a maximum of 256 characters.

EBCDIC Code


EBCDIC stands for Extended Binary Coded Decimal Interchange. It is mainly used with large computer systems like mainframes. EBCDIC is an 8-bit code and thus accomodates up to 256 characters. An EBCDIC code is divided into two portions: 4 zone bits (on the left) and 4 numeric bits (on the right).

Hollerith code

Hollerith developed a way of feeding information into digital computers using punched cards. The code used in this system to represent alphanumeric information is known as Hollerith code. Punch card has 80 columns and 12 rows. Each column represents an alphanumeric character with holes in appropriate rows. A hole is sensed as ‘1’ and absence of hole is sensed as ‘0’ by the circuit in card reader. The 12 rows are marked starting from top as 12,11,0,1,2,3,4,5,6,7,8,9,. Each row is 1-bit information. So, Hollerith code is a12-bit code. The first 3 rows are zone punch rows and the remaining 9 are numeric punch rows. The numbers are represented in the column by single punch whereas alphabets are represented using 2 punches.

Binary Coded Decimal (BCD)

Binary numbers are used by computers and human beings are familiar with decimals.

To facilitate the easy conversion between binary and decimal, BCD is used.

In BCD number system, each decimal digit is represented by 4 bits

Group of 4 binary bits is a nibble. A nibble representing a number greater than 9 is invalid BCD


BINARY GRAY CODE TABLE

BOOLEAN EXPRESSION SIMPLIFICATION


1. Commutative Law AB=BA A+B=B+A

2. Associative Law (AB)C=A(BC) (A+B)+C=A+(B+C)

3. Idempotent Law AA=A A+A=A

4. Identity Law A.1=A A+1=1

5. Null A.0=0 A+0=A

6. Distributive Law A(B+C)=AB+AC

7. Negation (AA)’=0 A+A’=1

8. Double Negation (A)’’=A A+A’=1

9. Absorption A+AB=A A(A+B)=A

A+A’B=A+B

10. De Morgan AB=A’+B’ (A+B)’=A’B’


NEED FOR SIMPLIFICATION

F = X’Y’Z +X’YZ +XY’ ------- EQN 1

= X’Z (Y + Y’) + XY’

= X’Z +XY’ ------- EQN 2

COMPARE EQN 1 AND EQN 2

EQN 1 REQUIRES TWO 3 INPUT AND GATES, ONE 2 INPUT AND GATE AND AN OR GATE WITH 3 INPUTS

EQN 2 REQUIRES TWO 2 INPUT AND GATES AND AN OR GATE WITH 2 INPUTS

SIMPLIFIED EXPRESSION REQUIRES LESSER NUMBER OF GATES AND LESSER NUMBER OF INPUTS. IT IS PREFERABLE SINCE IT REQUIRES LESS WIRES AND LESS COMPONENTS

DISADVANTAGES

1.TIME CONSUMING PROCESS

2.NEED BETTER UNDERSTANDING OF LAWS AND THEOREMS

3.LACK OF SPECIFIC RULES TO PREDICT EACH SUCCEEDING STEP IN REDUCTION PROCESS.


Boolean Variables & Truth Tables

Boolean algebra differs in a major way from ordinary algebra in that Boolean constants and variables are allowed to have only two possible values, 0 or 1. Boolean 0 and 1 do not represent actual numbers but instead represent the state of a voltage variable, or what is called its logic level.

Some common representation of 0 and 1 is shown in the following diagram.

In Boolean algebra, there are three basic logic operations: AND ,OR, and NOT. These logic gates are digital circuits constructed from diodes, transistors, and resistors connected in such a way that the circuit output is the result of a basic logic operation (OR, AND, NOT) performed on the inputs.

Truth Table

A truth table is a means for describing how a logic circuit's output depends on the logic levels present at the circuit's inputs.

In the following two-input logic circuit, the table lists all possible combinations of logic levels present at inputs A and B along with the corresponding output level X.

http://www.eelab.usyd.edu.au/digital_tutorial/chapter3/3_3.html




When either input A OR B is 1, the output X is 1. Therefore the "?" in the box is an OR gate.

OR Operation

The expression X = A + B reads as "X equals A OR B". The + sign stands for the OR operation, not for ordinary addition.

The OR operation produces a result of 1 when any of the input variable is 1.

The OR operation produces a result of 0 only when all the input variables are 0.

An example of three input OR gate and its truth table is as follows:


With the OR operation, 1 + 1 = 1, 1+ 1 + 1 = 1 and so on.

AND Operation

The expression X = A * B reads as "X equals A AND B". The multiplication sign stands for the AND operation, same for ordinary multiplication of 1s and 0s.The AND operation produces a result of 1 occurs only for the single case when all of the input variables are 1.The output is 0 for any case where one or more inputs are 0


An example of three input AND gate and its truth table is as follows:

With the AND operation, 1*1 = 1, 1*1*1 = 1 and so on.

NOT Operation

The NOT operation is unlike the OR and AND operations in that it can be performed on a single input variable. For example, if the variable A is subjected to the NOT operation, the result x can be expressed as x = A' where the prime (') represents the NOT operation. This expression is read as:


x equals NOT A x equals the inverse of A x equals the complement of A

Each of these is in common usage and all indicate that the logic value of x = A' is o pposite to the logic value of A. The truth table of the NOT operation is as follows:

1'=0 because NOT 1 is 0 0' = 1 because NOT 0 is 1

The NOT operation is also referred to as inversion or complementation, and these terms are used interchangeably.

NOR Operation

NOR and NAND gates are used extensively in digital circuitry. These gates combine the basic operations AND, OR and NOT, which make it relatively easy to describe then using Boolean algebra.






NOR gate symbol is the same as the OR gate symbol except that it has a small circle on the output. This small circle represents the inversion operation. Therefore the output expression of the two input NOR gate is:

X = (A + B)'

An example of three inputs OR gate can be constructed by a NOR gate plus a NOT gate:

NAND Operation




NAND gate symbol is the same as the AND gate symbol except that it has a small circle on the output. This small circle represents the inversion operation. Therefore the output expression of the two input NAND gate is:

X = (AB)'

Describing Logic Circuits Algebraically

Any logic circuit, no matter how complex, may be completely described using the Boolean operations, because the OR gate, AND gate, and NOT circuit are the basic building blocks of digital systems.

This is an example of the circuit using Boolean expression:






If an expression contains both AND and OR operations, the AND operations are performed first (X=AB+C: AB is performed first), unless there are parentheses in the expression, in which case the operation inside the parentheses is to be performed first (X= (A+B) +C: A+B is performed first).

Circuits containing Inverters

Whenever an INVERTER is present in a logic-circuit diagram, its output expression is simply equal to the input expression with a prime (') over it.



KARNAUGH MAP METHOD

� KARNAUGH MAP, INVENTED BY MAURICE KARNAUGH OF BELL LABS IN 1953, ALSO KNOWN AS K-MAP, IS A DIAGRAMMATIC METHOD FOR LOGIC MINIMIZATION

� PICTORIAL FORM OF TRUTH TABLE SHOWING THE RELATIONSHIP BETWEEN INPUTS & OUTPUTS

� MORE EFFICIENT THAN BOOLEAN ALGEBRA

� K-MAP IS A DIAGRAM MADE UP OF SQUARES. EACH SQUARE REPRESENTS A MINTERM OR MAXTERM OF THE LOGIC FUNCTION

� K-MAP IDENTIFIES THE GROUP OF MINTERMS WHICH CONTAINS REDUNDANT VARIABLES OF THE FORM X + X’ = 1 AND THEN IT CAN BE ELIMINATED.


CONSTRUCTION OF 2-VARIABLE K-MAP

� TO CONSTRUCT A K-MAP FOR A 2-VARIABLE FUNCTION, A LOGIC 1 IS ENTERED INTO THE SQUARE WHERE THE CORRESPONDING MINTERM EXISTS. A LOGIC 0 IS ENTERED OTHERWISE (OR THE SQUARE IS LEFT BLANK)

O (EX) F = A’B + AB’

O F IS TRUE WHEN AB = 01 OR 10

O F = Σ(1, 2)


CONSTRUCTION OF K-MAP FROM TRUTH TABLE

� A K-MAP CAN BE CREATED DIRECTLY FROM A TRUTH TABLE

� EACH SQUARE OF THE K-MAP CORRESPONDS TO ONE ROW OF THE TRUTH TABLE

� A LOGIC 1 IS ENTERED WHEN THE FUNCTION IS 1

� A LOGIC 0 IS ENTERED WHEN THE FUNCTION IS 0

� FOR EXAMPLE

3-VARIABLE K-MAP

� A 3-VARIABLE LOGIC FUNCTION HAS 8 MINTERMS AND ITS TRUTH TABLE HAS 8 ROWS

� HENCE, A 3-VARIABLE K-MAP HAS 8 SQUARES


LOGIC MINIMIZATION WITH K-MAP

� CONSIDER A LOGIC FUNCTION WITH M2 AND M6

� I.E. F = Σ(2, 6)

� M2 IS A’BC’ AND M6 IS ABC’

� F = M2 + M6 = A’BC’ + ABC’ = BC’(A’ + A) = BC’

� THE 2 MINTERMS HAVE A COMMON FACTOR BC’ IN THE K-MAP, IF WE GROUP THESE 2 ADJACENT MINTERMS, WE CAN REDUCE 1 VARIABLE


EXAMPLES OF LOOPING PAIRS OF ADJACENT 1’S PAIRS


EXAMPLES OF LOOPING PAIRS OF ADJACENT 1’S QUADS


EXAMPLES OF LOOPING PAIRS OF ADJACENT 1’S OCTATE


PROCEDURE TO CONSTRUCT A K-MAP

� CONSTRUCT THE K MAP, PLACE 1S AS INDICATED IN THE TRUTH TABLE.

� CHECK FOR OCTETS (GROUP OF EIGHT 1S)

� IF OCTETS NOT AVAILABLE CHECK FOR QUADS (FOUR ADJACENT 1S)

� LOOP 1S THAT ARE ADJACENT TO ONLY ONE OTHER 1 AND ENCIRCLE SUCH PAIRS.

� LOOP 1S THAT ARE NOT ADJACENT TO ANY OTHER 1S.

� 1S WHICH ARE ALREADY PRESENT IN A GROUP CAN BE INCLUDED IN NEW GROUP TO GROUP THE OTHER 1S.

� FORM THE SUM OF ALL PRODUCT TERMS GENERATED BY EACH LOOP.

EXAMPLES


K-MAP FOR PRODUCT OF SUMS

� COVERING LOGIC-1 SQUARES IN K-MAP GIVES LOGIC FUNCTIONS IN SUM OF PRODUCTS FORM

� COVERING LOGIC-0 SQUARES, WILL GIVE LOGIC FUNCTIONS IN PRODUCT OF SUMS FORM, E.G.

� F’ = B’C + AC

� F = (B’C + AC)’

= (B’C)’ (AC)’

= (B+C’) (A’+C’)


DON’T CARE CONDITIONS

� IN LOGIC FUNCTION, SOMETIMES WE DO NOT HAVE THE SPECIFICATION FOR ALL THE COMBINATIONS

� WE MIGHT DEFINE A LOGIC FUNCTION TO BE 1 FOR SOME COMBINATIONS AND 0 FOR SOME OTHERS BUT THE REST IS NOT DEFINE

� WE DO NOT CARE ABOUT THE LOGIC VALUE OF THE FUNCTION FOR THESE UNDEFINED COMBINATIONS CALLED AS DON’T-CARE CONDITIONS

� DON’T-CARE CONDITIONS ARE USUALLY DENOTED BY ‘X’, OR ‘X’ OR ‘D’

TRUTH TABLE

� F HAS UNKNOWN (OR DON’T CARE) VALUES FOR COMBINATIONS ABC = 100 OR 110

� USUALLY EXPRESSED AS: F(A,B,C) = Σ(1, 2, 5) + D(4, 6)


PROCEDURE

� WHEN CONSTRUCTING A K-MAP FOR A LOGIC FUNCTION WITH DON’T-CARE CONDITIONS, WE ENTER ‘X’ INTO THE SQUARES WHERE THE FUNCTION IS UNDEFINED

� WHEN A K-MAP CONTAINS DON’T-CARE CONDITIONS, WE CAN TREAT THE DON’T-CARES AS EITHER 1 OR 0

� WE MAKE USE OF X=1FOR GROUPING THEM WITH ADJACENT 1’S TO MAKE THE GROUPS LARGER

� WE DON’T GROUP X WHEN IT IS TREATED AS 0

QUINE-McCLUSKEY MINIMIZATION

Quine-McCluskey minimization method uses the same theorem to produce the solution as the K-map method, namely X(Y+Y')=X

Minimization Technique

• The expression is represented in the canonical SOP form if not already in that form.

• The function is converted into numeric notation. • The numbers are converted into binary form. • The minterms are arranged in a column divided into groups. • Begin with the minimization procedure. • Each minterm of one group is compared with each minterm in the group

immediately below. • Each time a number is found in one group which is the same as a number in

the group below except for one digit, the numbers pair is ticked and a new composite is created.


• This composite number has the same number of digits as the numbers in the pair except the digit different which is replaced by an "x".

• The above procedure is repeated on the second column to generate a third column.

• The next step is to identify the essential prime implicants, which can be done using a prime implicant chart.

• Where a prime implicant covers a minterm, the intersection of the corresponding row and column is marked with a cross.

• Those columns with only one cross identify the essential prime implicants. -> These prime implicants must be in the final answer.

• The single crosses on a column are circled and all the crosses on the same row are also circled, indicating that these crosses are covered by the prime implicants selected.

• Once one cross on a column is circled, all the crosses on that column can be circled since the minterm is now covered.

• If any non-essential prime implicant has all its crosses circled, the prime implicant is redundant and need not be considered further.

• Next, a selection must be made from the remaining nonessential prime implicants, by considering how the non-circled crosses can be covered best.

• One generally would take those prime implicants which cover the greatest number of crosses on their row.

• If all the crosses in one row also occur on another row which includes further crosses, then the latter is said to dominate the former and can be selected.

• The dominated prime implicant can then be deleted.


Example

Find the minimal sum of products for the Boolean expression,

f= (1,2,3,7,8,9,10,11,14,15), using Quine-McCluskey method.

Firstly these minterms are represented in the binary form as shown in the table below. The above binary representations are grouped into a number of sections in terms of the number of 1's as shown in the table below.

Binary representation of minterms

Minterms U V W X

1 0 0 0 1

2 0 0 1 0

3 0 0 1 1

7 0 1 1 1

8 1 0 0 0

9 1 0 0 1

10 1 0 1 0

11 1 0 1 1

14 1 1 1 0

15 1 1 1 1

Group of minterms for different number of 1's

No of 1's Minterms U V W X

1 1 0 0 0 1


1 2 0 0 1 0

1 8 1 0 0 0

2 3 0 0 1 1

2 9 1 0 0 1

2 10 1 0 1 0

3 7 0 1 1 1

3 11 1 0 1 1

3 14 1 1 1 0

4 15 1 1 1 1

Any two numbers in these groups which differ from each other by only one variable can be chosen and combined, to get 2-cell combination, as shown in the table below.

2-Cell combinations

Combinations U V W X

(1,3) 0 0 - 1

(1,9) - 0 0 1

(2,3) 0 0 1 -

(2,10) - 0 1 0

(8,9) 1 0 0 -

(8,10) 1 0 - 0

(3,7) 0 - 1 1

(3,11) - 0 1 1

(9,11) 1 0 - 1


(10,11) 1 0 1 -

(10,14) 1 - 1 0

(7,15) - 1 1 1

(11,15) 1 - 1 1

(14,15) 1 1 1 -

From the 2-cell combinations, one variable and dash in the same position can be combined to form 4-cell combinations as shown in the figure below.

Combinations U V W X

(1,3,9,11) - 0 - 1

(2,3,10,11) - 0 1 -

(8,9,10,11) 1 0 - -

(3,7,11,15) - - 1 1

(10,11,14,15) 1 - 1 -

The cells (1,3) and (9,11) form the same 4-cell combination as the cells (1,9) and (3,11). The order in which the cells are placed in a combination does not have any effect. Thus the (1,3,9,11) combination could be written as (1,9,3,11).

From above 4-cell combination table, the prime implicants table can be plotted as shown in table below.


Prime Implicants Table

Prime Implicants

1 2 3 7 8 9 10 11 14 15

(1,3,9,11) X - X - - X - X - -

(2,3,10,11) - X X - - - X X - -

(8,9,10,11) - - - - X X X X - -

(3,7,11,15) - - - - - - X X X X

- X X - X X - - - X -

The columns having only one cross mark correspond to essential prime implicants. A yellow cross is used against every essential prime implicant. The prime implicants sum gives the function in its minimal SOP form.

Y = V'X + V'W + UV' + WX + UW

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