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DOMAIN ENGINEERING HANDBOOK Order No. 002398 Revision 04 Software Release 9.5 THIS DOCUMENT CONTAINS CONFIDENTIAL AND PROPRIETARY INFORMATION WHICH IS \THE SOLE PROPERTY OF APOLLO COMPUTER INC. ITS USE IS RESTRICTED TO EMPLOYEES COMPUTER INC. OF APOLLO APOLLO COMPUTER INC. 330 Billerica Road Chelmsford, MA 01824

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Page 1: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

DOMAIN ENGINEERING HANDBOOK

Order No. 002398

Revision 04

Software Release 9.5

THIS DOCUMENT CONTAINS CONFIDENTIAL AND

PROPRIETARY INFORMATION

WHICH IS \THE SOLE PROPERTY OF APOLLO COMPUTER INC. ITS USE IS RESTRICTED TO

EMPLOYEES COMPUTER INC.

OF APOLLO

APOLLO COMPUTER INC. 330 Billerica Road

Chelmsford, MA 01824

Page 2: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

First printing: September, 1981 Last printing: January, 1987

This document was formatted using the FMT tool distributed with the Apollo Computer system.

THE SOFTWARE PROGRAMS DESCRIBED IN THIS DOCUMENT ARE CONFIDENTIAL

INFORMATION AND PROPRIETARY PRODUCTS OF APOLLO COMPUTER INC. OR ITS LICENSORS.

Page 3: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

The Apollo DOMAIN Engineering HandboQk contains system information for the Apollo DOMAIN nodes and related peripherals. References are made throughout the Handbook to reverse-mapped machines and forward-mapped machines. The reverse-mapped machines include the DN300/320/300, DN400/420/600, DN550/560/570/580, and the DSP80/80A/90. The forward-mapped machines include the DNx60, DN3000, DSP3000, and the DN5xx-T.

This handbook is for Apollo employees only.

This manual contains 12 chapters, two appendices, and an index.

Chapter 1 describes principal control blocks associated with AEGIS internal data structures.

Chapter 2 describes formats of file system data structures.

Chapter 3 describes miscellaneous information useful to those programming in the DOMAIN envirorunent.

Chapter 4 describes system error (status) codes and messages.

Chapter 5 describes system debugging tools, including the mnemonic debugger, extensions to the HLL debugger and system dumps.

Chapter 6 describes characteristics of peripheral I/O devices, including the format of control registers and I/O commands.

Chapter 7 describes the hardware architecture of the DN300/320/330 nodes, including the basic processor, Memory Management Unit (MMU), display hardware, FPU, ring, and serial I/O.

Chapter 8 describes the hardware architecture of the DN400/420/600 nodes, including the basic processor, Memory Management Unit (MMU), display hardware, PEB, ring/disk, and serial I/O.

Chapter 9 describes the hardware architecture of the DN460/660 and DSP160 nodes, including the basic processor, Memory Management Unit (MMU), display hardware, ring/disk, and serial I/O.

Chapter 10 describes the hardware architecture of the DN550/560/570/580 nodes, including the basic processor, Memory Management Unit (MMU), display hardware, FPU, ring, serial I/O, MULTIBUS, and VME.

APOLLO CONFIDENTIAL INTERNAL USE ONLY. iii

Page 4: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU), ring, serial I/O, and M(JLTI8US.

Chapter 12 describes the hardware architecture of the DN3000 nodes, including the basic processor, Memory Management Unit (MMU), display hardware, ring/disk, and serial I/O.

Appendix A describes the ASCII character set.

Appendix B is a powers of :2 table.

R€:;lated pgcuments

For hardware architecture information on the DN5xx-T nodes, refer to the DN570-T/DN580-T Workstations and DSPSOO-T Server Hardware Architecture Handbook (009490).

For hardware architecture information on the PN3000 and 06E'3000 nodes, refer to the DOMAIN Series 3000 Hardware Architeoture _ (007861).

For information about system calls and the program environment, the Prograrmning With General System Calls (005506) and

prggarrmd ng With System Calls for Interprocess Corml\llnicatiop (005696) .

For information about peripheral driver routines, see ~ peyice Drivers with GPID, (000959).

For Shell and PM commands see, DOMAIN System Command Reference, (002547) .

i v APOLLO CONFIDENTIAL INTERNAL USE ONLY.

Page 5: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

Conventions

+00

.. 1taIpe N - 1 -> N •• N

Offset, in hexadecimal Unused bit Range of unused bits Continuation Name for this field If bit N is set, then All bits labeled N

Equal to -> Implies ,--> Pointer to -> Pointer to

Pointer to set of 0 .. 31 32 bits 1 .. 32 32 values; 5 bits <a> Variable [pa I va] Physical address I Virtual address UPPERCASE Uppercase words -> literal conunands or keywords lowercase Lowercase words -> command values that you must

supply

< >

Square brackets enclose optional items in format sand commands

Braces enclose a list from which you must choose an item in formats and command descriptions. A vertical bar separates items in a list of choices Angle brackets enclose the name of a key on the

keyboard

~POUO CONFIDENTIAL INTERNAL USE ONLY.

Page 6: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

TABLE OF CONTENTS

CHAPTER 1 AEGIS . • • •

AEGIS SYSTEM RELATIONSHIPS

ACTIVE OBJECT TABLE (AOT) AND ACTIVE SEGMENT TABLE (AST). ACTIVE OBJECT TABLE (AOT) •

ACTIVE SEGMENT TABLE (AST). •

ACTIVE OBJECT TABLE HEADER

AST PAGE MAPS (REVERSE MAPPED) •

AST PAGE MAPS (FORWARD MAPPED) •

CLOCK ..•.••.••.• DISK CONTROLLER TABLE ENTRY

DISK VOLUME TABLE ENTRY

EVENT COUNT • . • • • • • . FAULT DIAGNOSTIC RECORD • .

MAPPED SEGMENT TABLE (MST).

MAPPED SEGMENT TABLE ENTRY (MSTE)

MEMORY MAP (MMAP) • • • •

MEMORY MAP ENTRY (MMAPE)

OS MAPPING

PAGING SYSTEM . . . •

PROCESS CONTROL BLOCK (PCB)

PROCESSES .••..

RING PACKET FORMAT

Message Header

Type Field Early Acknowledge Field

Message Data

RESOURCE LOCK • . .

SYSTEM BOOT FILES •

SYSTEM DIRECTORIES

TRAP CODES

CHAPTER 2 FILE SYSTEM

ACLs STRUCTURE ACL Header Record

ACL Record

ACL Entry .... BLOCK AVAILABILITY TABLE (BAT)

BLOCK AVAILABILITY TABLE HEADER

DIRECTORY STRUCTURE . . . • . Directory Overview

Directory Information Block

Directory Entry . • •

Directory Entry Block

Dir'-'ctory Header

Notes on directories DISK BLOCK HEADER .

DISK _$ERROR_INFO

DISK/VOLUME FORMAT FILE MAP

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. vii

1-1

1-1

1-2 1-2 1-3 1-4 1-5 1-5

1-6 1-7

1-8 1-8 1-9 1-10

1-11 1-12

1-12

1-14 1-15

1-16

1-17 1-18

1-18

1-18 1-19

1-20 1-20 1-21

1-22

1-23

2-1 2-1 2-1 2-1 2-2 2-2 2-3 2-4 2-4 2-4 2-5 2-5 2-6 2-6 2-8 2-8 2-9 2-10

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REGISTRY FORMAT 2-11

Header Record 2-11 PPO Record • 2-11 Account Header 2-12 Account Record 2-12

Registry Record 2-13 STREAM FILE HEADER 2-14

UNIQUE IDENTIFIER (UID) 2-15

UID Hash Algorithm • 2-15 UIDs -- System • • • 2-16

VOLUME LABEL -- LOGICAL 2-18

VOLUME LABEL -- PHYSICAL 2-20 VTOC BLOCK 2-21

VTOC ENTRY 2-22

VTOC HEADER 2-23 VTOC MAP ENTRY 2-23

VTOC INDEX • • 2-24

CHAPTER 3 PROGRAMMING INFORMATION 3-1 ADDRESSING MODES 3-1

ADDRESS SPACE • • • • • • 3-2 Physical Address Space 3-2

Virtual memory 3-3

CALLING SEQUENCE 3-4 CONDITION CODES • 3-5

CONDITIONAL TESTS 3-6

FILENAME SUFFIXES 3-7 PATHNAME SYNTAX 3-8

STACK FRAME 3-9

STATUS WORD • • 3-10

CHAPTER 4 ERROR CODES AND MESSAGES 4-1

AEGIS ERROR CODES • • • • • • • • 4-1 BOOT ERRORS (PROM) ••••••• 4-17

BOOT PROM DIAGNOSTIC ERROR CODES (EXCEPT 020 MACHINES) • 4-18

BOOT PROM DIAGNOSTIC ERROR CODES (DN330) 4-20 BOOT PROM DIAGNOSTIC ERROR CODES (DSP90) 4-21

BOOT PROM DIAGNOSTIC ERROR CODES (DN5xx-T) 4-21

BOOT PROM DIAGNOSTIC ERROR CODES (DN560/570/580) 4-22 BOOT PROM DIAGNOSTIC ERROR CODES (DN3000) 4-23

MNEMONIC DEBUGGER ERROR CODES (PROM) 4-24

SYSBOOT ERROR CODES • • • 4-25

CHAPTER 5 SYSTEM DEBUGGING 5-1

BOOT SHELL COMMANDS • • • 5-1 DEBUG COMMAND EXTENSIONS 5-2

Apollc DEBUG Commands 5-2

Options to DEBUG Conunands 5-2 Miscellaneous •• • • • • • • • • • • • • • • • • • • • .5-2

DB (MACHINE LEVEL DEBUGGER)

Lights Program • • • • • • MNEMONIC DEBUGGER (PROM)

CRASH ANALYSIS Notes on DNx60 Crash Status

SYSTEM DUMPS

/SYSTEST/SSR_UTIL ••••••

viii

5-3 5-5 5-6 5-15 5-15 5-16 5-17

APOUD CONFIDENTIAL. INTERNAL USE ONLY.

Page 8: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

CHAPTER 6 PERIPHERAL I/O • . . • . . . AT BUS DEVICES (SERIES 300 MACHINES) DEVICE ADDRESSES (PIO) DISK PARAMETERS , .

I/O MAP ALLOCATION I/O MAP •••••• KEYBOARD

880 Keyboard - Map 880 Keyboard Chart - Physical 880 Keyboard Chart - Translated (,~ser mode) Low-Profile I Keyboard - Map Low-Profile I Keyboard Chart - Physical . . Low-Profile I Keyboard Chart - Translated (user mode)

Low-Profile II Keyboard - Map ," • . • . . • . Low-Profile II Keyboard Chart - ASCII Mode Low-Profile II Keyboard Chart - Keystate Mode

MAGTAPE CONTROLLER . . . • . . • . . . . . System Configuration Pointer (at xxxFF6) System Configuration Block Channel Control Block Parameter Block

MULTI BUS DEVICES REGISTER SET TIMERS TOUCHPAD XYLOGICS CONTROLLER

CHAPTER 7 DN300,DN320,DN330 ADDRESS SPACE (DN300/320) ADDRESS SPACE (DN330) . , CACHE CONTROL REGISTER (GACR) CACHE ADDRESS REGISTER (CAAR) CONFIGURATION . , . , . , , . DISK (FLOPPY/WINCHESTER) CONTROLLER DISPLAY CONTROL AND STATUS REGISTER (DCSR) DMA CONTROLLER FAULT FRAME , FAULT TYPES . . FAULT VECTORS . FLOATING-POINT FORMAT

Single-Precision Floating-Point Format Double-Precision floating-point Format

FLOATING-POINT REGISTERS FPU •..••.••....... MEMORY CONTROL/STATUS REGISTERS (MCSR) MEMORY MANAGEMENT UNIT (MMU) (DN300/320)

MEMORY MANAGEMENT UNIT (MMU) (DN330) PAGE FRAME TABLE ENTRY (PFTE) • . . PAGE TRANSLATION TABLE ENTRY (PTTE) PEB ..•.... PROM ENTRY POINTS . . RING REGISTERS SERIAL I/O INTERFACE

APOLLD CONFIDENTIAL INTERNAL USE ONLY. ix

6-1 6-1 6-1 6-1 6-4 6-5 6-6 6-6 6-7 6-8 6-9 6-10 6-11 6-12 6-13 6-14 6-15 6-15 6-15 6-15 6-16 6-18 6-19 6-20 6-20 6-20

7-1 7-1 7-1 7-2 7-2 7-3 7-4 7-8 7-10 7-14 7-17 7-18 7-19 7-19 7-19 7-20 7-21 7-22 7-23 7-24 7-27 7-27 7-27 7-28 7-28 7-32

Page 9: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

CHAPTER 8 DN400,DN420,DN600 ADDRESS SPACE . • • . CONFIGURATION . . . . DISPLAY BOARD JUMPERS

DN4xx ••. DN6xx ..•

BLT REGISTERS DISPLAY CONTROL AND STATUS REGISTER (DCSR)

DN4xx •• DN6xx ••

FAULT FRAME FAULT TYPES FAULT VECTORS FLOATING-POINT FORMAT FLOPPY CONTROLLER . .

I/O MAP .••. ••.

MEMORY CONTROL/STATUS REGISTERS (MCSR) MCSR Control (Write-Only) . .

MCS~ Status Register (Read-Only) MEMORY BOARD JUMPERS MEMORY BOARD •. • • • • • • MEMORY MANAGEMENT UNIT (HMO)

PID/PRIV Register . . . CPU A Control Register MMU Status Register . Clear MMU Stat us Bus Status Register . Enable CPU B Register

MONITOR TIMING (DN600) PAGE FRAME TABLE ENTRY (PFTE) PAGE TRANSLATION TABLE ENTRY (PTTE)

PEB •..•. Definitions . . • . . • . PEB Control Register Bits Useful Combinations • • • PEB Status Register Bits FPP Commands . . . . . .

RING/DISK ........ . DMA Control/Status Registers

SERIAL I/O INTERFACE SIO Write Control/Status Registers SIO Read Control/Status Registers .

8-1 8-1 8-2 8-3 8-3 8-4 8-6 8-8 8-8 8-9 8-11 8-11 8-12 8-13 8-l3 8-15 8-15 8-15 8-16 8-17 8-18 8-19 8-20 8-20 8-20 8-20 8-21 8-2l 8-22 8-23 8-23 8-24 8-24 8-27 8-27 8-29 8-29 8-32 8-44

8-47 8-48 8-50

APOLW CONADOOIAL INTERNAL USE ONLY.

Page 10: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

CHAPTER 9 DN460,DN660,DSP160

ADDRESS SPACE BLT REGISTERS . . . .

CACHE •••.••.•

CPU CONTROL REGISTERS CONFIGURATION • • • •

CONTROL PANEL (CPIO) REGISTERS

CPIO Control Registers CPIO Status Registers

LED Register Micro Machine Control Registers

DISPLAY BOARD JUMPERS •

DISPLAY CONTROL AND STATUS REGISTER (DCSR)

FAULT FRAME . FAULT TYPES • . • •

FAULT VECTORS • • •

FLOATING-POINT FORMAT Single-Precision Floating-point Format

Double-Precision Floating-Point Format

FLOATING-POINT REGISTERS FLOPPY CONTROLLER . .

MEMORY CONTROL/STATUS REGISTERS (MCSR)

MEMORY BOARD JUMPERS MEMORY BOARD

MEMORY MANAGEMENT UNIT (~)

Region Register Array Segment Map • • . . •

MONITOR TIMING (DN660)

RING/DISK ..•••. SERIAL I/O INTERFACE

CHAPTER 10 DN5xx ADDRESS SPACE (DN550)

ADDRESS SPACE (DN560/570/580)

CONFIGURATION . . . . CPU BOARD JUMP ERS • .

DISPLAY BOARD JUMPERS (DN550/560)

DISPLAY BOARD JUMpERS (DN570) DISPLAY BOARD JUMPERS (DN580)

DISPLAY REGISTERS . .

DISK/TAPE/CALENDAR CONTROLLER FAULT FRAME •

FAULT TYPES • . . • •

FAULT VECTORS • . . . FLOATING-POINT FORMAT

FLOATING-POINT REGiSTERS

FPU •.•..•....• MEMORY CONTROL/STATUS REGISTERS (MCSR)

MEMORY BOARD JUMPERS (DN550)

MEMORY MANAGEMENT UNIT (MM:U) MONITOR TIMING (DN550/560)

MONITOR TIMING (DN570) ....

MONITOR TIMING (DN580) •.•• DISPLAY BOARD JUMPERS (DN550/560)

MULTIBUS REGISTERS

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. xi

9-1 9-1 9-2 9-2 9-2 9-3 9-4 9-4 9-4 9-4 9-5 9-6 9-6 9-6 9-7 9-8 9-9 9-9 9-9 9-9 9-10

9-10

9-11 9-12

9-13

9-13 9-13 9-14

9-14 9-14

10-1 10-1

10-2 10-2 10-3

10-4

10-5 10-6 10-7

10-9 10-14

10-14 10-15 10-16

10-16

10-16 10-16

10-17

10-17 10-18

10-19 10-20 10-21

10-15

Page 11: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

PAGE FRAME TABLE ENTRY (PFTE) • • •

PAGE TRANSLATION TABLE ENTRY (PTTE)

PROM ENTRY POINTS • •

RING REGISTERS

SERIAL I/O INTERFACE

VME REGISTERS •

CHAPTER 11 DSP80, DSP80A, Dsp90

ADDRESS SPACE •

CONFIGURATION •

CPU BOARD JUMPERS

DMA CONTROLLER

FAULT FRAME •

FAULT TYPES • •

FAULT VECTORS • FLOATING-POINT REGISTERS

MEMORY CONTROL/ STATUS REGISTERS (MCSR)

MEMORY MANAGEMENT UNIT (MMU)

MULTIBUS REGISTERS

PAGE FRAME TABLE ENTRY (PFTE) •

PAGE TRANSLATION TABLE ENTRY (PTTE)

PROM ENTRY POINTS • .

RING REGISTERS

SERIAL I/O INTERFACE

CHAPTER 12 DN3000

ADDRESS SPACE BY PHYSICAL ADDRESS

BEEPER

CALENDAR •.•

CARTRIDGE TAPE Data Register Coromand Register Control Register Status Register . DMA Go Register . DMA Reset Register

CONFIGURATION . . . .

CPU CONTROL/STATUS REGISTER

DISK (FLOPPY/WINCHESTER) CONTROLLER DISPLAY (COLOR) • • • . • • •

DISPLAY (MONOCHROME)

FAULT FRAMES AND FAULT TYPES

FAULT VECTORS • . . . • •

FLOATING-POINT REGISTERS

PARITY ERROR REGISTER • • PROGRAMMABLE INTERRUPT CONTROLLER

RING .•

SIO •• TIMERS

APPENDIX A ASCII CHARACTER SET

APPENDIX B POWERS OF TWO

INDEX •.•

xii

10-23

10-23

10-23 10-24 10-26 10-26

11-1 11-1 11-2

11-3

11-4 11-4 11-4 11-5 11-6 11-6 11-6 11-7

11-9 11-9 11-9 11-9 11-9

12-1

12-2 12-3 12-4 12-5 12-6 12-6

12-6 12-6 12-6 12-7 12-8 12-9 12-16 12-21 12-25 12-26 12-26

12-27 12-27

12-29 12-35 12-35

A-1

B-1

1-1

APOLLO CONFIDENTIAL INTERNAL USE ONLY.

Page 12: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

CHAPTER 1

AEGIS

AEGIS SYSTEM RELATIONSHIPS

NAME SERVER

,• COMMANDS --t--

~~~~~HERAL~HNAME I UID

c~ USER

~ gg PHYSICAL / DISKS

APOLLO CONFIDENTIAL INTERNAL USE ONLY.

,......-~=::::--,

1-1 AEGIS

Page 13: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

ACTIVE OBJECT TABLE (ACT) AND ACTIVE SEGMENT TABLE lAST)

The AOT/AST is a wired system-wide table that describes the current state of active objects and their associated active segments. Each ASTE has enough information to identify the file segment and, through the associated AST_PMAPS, the location of each page of the segment. All virtual segments mapped to the same file segment will use the same ASTE entry. The AOTE acts as a cache of the VTOC entry. The table is dynamically allocated at startup based on physical memory size.

ACTIVE OB,IECT TABLE

AEGIS

(type naote_tn in vm.ins.pas)

+-----------------------------------+ +00

CACHED VTOCE HEADER . vtoce _ hdr

+-----------------------------------+

+40 I VTOCE POINTER .vtoce_addr +-----------------+-----------------+

+44 FRONT LINK BACK LINK +-----------------+-----------------+

+48 I LINK TO FIRST AST I NUM SEGS. ACTIVE I +-----------------+--------+--------+

+4C I AOTE EVENT NUMBER j VIUGXXXX I DEEEEEEE I +50 +-----------------+--------+--------+

.flink, .blink

. aste _link,

. event

V - vtoce header needs updating (. vhdr mod) - aote in transition (.in_trans) -

U - aote usage bit (. used) G - global transparent mod switch (. gtms) XXXX - volume index into dvt (. volx) D - dtm must be updated (.dtm_fl) E .. E - aote-hold-count (. ehcnt)

1-2 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

Page 14: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

ACTIVE SEGMENT TABLE lAST)

AST: ARRAY[l .. N] OF ASTE_T N is dependent on physical memory si.ze

(type "aste_t" in vm.ins.pas)

+-----------------+-----------------+ +00 I BACK LINK TO AOT I FILE SEGMENT NUM. I

+-----------------+-----------------+ +04 FRONT LINK BACK LINK

+-----------------+-----------------+ +08 I POINTER TO FILE MAP

+-----------------+--------+--------+

+OC I ASTE EVENT NUM I IUFRVVVV I PCCCCCCC I +-----------------+--------+--------+

+10 1 QQQQQQQQ I SSNNNNNN I +12 +-----------------+

Forward mapped machines also include: +-----------------------------------+

.aote_link,

.fsegno . flink,

.blink

. fm_addr

. event

+12 I ASTE TO MSTE BACK THREAD CHAIN .mst_thread +-----------------------------------+

+16 I PHYSICAL ADDR OF PMAP .pmapyhadd +1A +-----------------------------------+

I - aste in transition (.in_trans) U - aste usage bit (. used)

- file-map modified (. fm mod R - true if object is remote (-:-remote) VVVV - index in dvt (. volx)

- padding (.padl) C .. C - aste-hold-count (.ehcnt) Q •• Q - padding (.pad2) SS - padding (.pad3) N .. N - number of pages resident (.npr)

APOLW CONFIDENTIAL INTERNAL USE ONLY. 1-3 AEGIS

Page 15: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

ACTIVE OBJECT TAB1 E HEADER

AEGIS

31 16 15 +-----------------t-----------------t

+00 I I I .hashtb[O .. 60]

+ + HASH TABLE

START POINTERS

+ +

t-----------------t-----------------t

[0 .. 250] for forward mapped

t7A I AOTE FREE POINTER . free_aote_ptr

+-----------------t-----------------+ t7E AOTE FREE LIST I .lru_aote

t-----------------t-----------------t

+80 I ASTE FREE POINTER I . free_asteytr +-----------------t-----------------+

+84 ASTE FREE LIST I-------------DDDDI .lru_aste,

+-----------------+-----------------+ . dm req +88 PROCESSES PER VOLUME .vm_cnt[l. .4]

+-----------------------------------t +90 AOT SEQUENCE NUMBER I .aot_se~num

t-----------------------------------+

+94 AST SEQUENCE NUMBER I .ast_se~num

+-----------------------------------+

+98 NUMBER OF DISMOUNTS + .dism_seqn +-----------------------------------+

+9C I EVENT COUNT FOR DISMOUNTER I. vm _ ec +-----------------------------------+

+AO GRACE RPLC PTR I .lrug +A2 +-----------------------------------+

DODD - Dismount request flags (.dm_req) (bit 16 = volume 1)

1-4 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

Page 16: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

AST PAGE HAPS - REVERSE MAPPED

AST_PMAPS: ARRAY [1 •• N] OF PMAP_T PAGE MAP ENTRY (PMAPE): (type Dpmape_tn in vm.ins.pas)

I f page is resident: +----------------+-----------------+

+00 IWWTRN-----HHHHHHIPHYS PAGE NUMBER I R=l +----------------------------------+

If page is NOT resident: +----------+-----------------------+

+00 IWWTRN-----I FULL DISK ADDRESS I R-O +----------+-----------------------+

WW - Wired count (. wired) T - page is in transition (. in_trans) R - page is resident in memory (. resident) N - Page is null. (no copy on disk) (.null)

AST PAGE MAPS - FORWARD MAPPED

For DNx60, DN5xx-T if page is resident: +----------------+-----------------+

+00 IVUMIXTWWRNHHHHHHI PHYS PAGE NUM I R=l +----------------+-----------------+

For DNx60, DN5xx-T if page is NOT resident: +----------+-----------------------+

+00 IVUMIXTWWRN I FULL DISK ADDRESS I R=O +----------+-----------------------+

V - Entry is valid (. valid) U - Page has been used, set by Hardware (. used) M - page has been modified, set by hardware (. pmod) I - Indirect entry (. indirect) X - Page may be written (.write) H •• H - Disk address high bits Others as above.

For machines with PMMU (Series 3000) if the page is resident: +--------+---------------+----------+

+00 ITNRHHHHHI PHYS PAGE NUM I WW---MUPIV I R=l +--------+---------------+----------+

For machines with PMMU if the page is not resident: +---+----------------------+--------+

+00 ITNRI FULL DISK ADDRESS I---MUPIVI R=O +---+----------------------+--------+ - Write protect (.writeyrot)

Others as above.

APOUO CONFIDENTIAL. INTERNAL USE ONLY. 1-5 AEGIS

Page 17: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

AEGIS

In forward mapped systems, these are the page tables used by the address translation hardware. AST_PMAPS are dynamically allocated one-.for-one with ASTEs.

(type "clock_t n in base.ins.pas)

1<- - - - - -.high- - - - - ->1<- -.low - ->1

47 33 32 16 15 +--------------+--------------+-------------+ I I I I +--------------+--------------+-------------+

1<- .high16- ->1<- - - - - .low32 - - - - ->1

Low-order bit represents four microseconds.

Clock. high is type clockh t (base.ins.pas); low-order bit represents ~pprox. four milliseconds.

Hardware clock is only 16 bits. The upper 32 bits are maintained by clock interrupt routine. There are three hardware clocks (not counting calendar clock) :

Clock 1: 4 microseconds (real-time clock) Clock 2: 8 microseconds (process timer) Clock 3: 128 microseconds (real-time intervals)

1-6 APOUO CONFIDENTIAL INTERNAL USE ONlY.

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PISK eONTROI,T,ER TABT,E ENTRX

(type dcte_t in io.ins.pas)

31 +--------------+--------------+

+00 ICONTROLLER TYPI CONTROLLER t I .ctype, .cnum +--------------+--------------+

+04 I CONTROLLER STATUS I • cstatu3 +-----------------------------+

+08 I LOCK NUMBER I .lock_no +-----------------------------+

+DA I BLOCK HEADER POINTER I .blk_hdrytr +-----------------------------+

tOE I BLOCK HEADER PAGE I .blk_hdrya +-----------------------------+

+12 I I/O REGISTER PAGE POINTER I • csrsytr +-----------------------------+

+22 I PAGE ZERO INTERRUPT VECTOR I . vector ytr +-----------------------------+

+26 I ACTUAL INTERRUPT ENTRY I .int_entry +-----------------------------+

+2A I DEV DEPENDENT INTERRUPT RTN I .int_routine +-----------------------------+

+2E I DISK DINIT I .disk_dinit t-----------------------------+

+32 I DISK I/O ROUTINE .disk_do_io t-----------------------------+

+36 I DISK ERROR RECOVERY .disk_error_que t--------------+--------------+

+3A I NCDL----------I UNIT NUMBER I .dflags, .d_unit_irq +--------------t--------------+

+3E I PYSICAL DVTE INDEXES I .pdvte_index +44 t-----------------------------t

DISK FLAGS:

N - = no headers on device C - ... do checkswmning for this controller D - 1 III driver supports multi-read requests (temp) L - 1 ... liberty (SInd) type winchester

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 1-7 AEGIS

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PISK VOLPME T1\'BI,E ENTRY

(type dvte_t in disk.pvt.pas)

15 +-----------------------------+

+00 I STATE I . state +-----------------------------+

+02 I BLOCKS PRE VOLUME I .blocks-per_vol +-----------------------------+

+06 I OWNER PROCESS I .owner-proc +-----------------------------+

+08 I BASE DADDR I .lv_base +-----------------------------+

+OC I UID OF PV OR LV I .uid +-----------------------------+

+14 I PTR TO DEVICE CTR TABLE I . dcte +-----------------------------+

+18 I DVTE INDEX .pdvtex +-----------------------------+

+lA I DISK UNIT NUMBER I . unit +-----------------------------+

+lC I DISK TYPE I . dtype +-----------------------------+

+lE I BLOCKS PER TRACK I .blocks-per_track +-----------------------------+

+20 I TRACKS PER CYLINDER I .tracks.....Per_cyl +--------------+--------------+

+22 I DISK FACTOR I UNWI • bat_step, .flags +26 +--------------+--------------+

state: - free - being_mounted - aSSigned

3 - mounted

flags: U - use_ca11er_blkhdr N - no_crc_retry W - write ""'protect

EyENT CotWT

(type eventcount_t of base.ins.pas)

31 +-------------------+

+0 I CURRENT EC VALUE I • value +-------------------+

+4 I NEXT PROCESS I. nnext +-------------------+

+8 I PREVIOUS PROCESS I • nprev +-------------------+

AEGIS 1-8 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

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FAULT DIAGNOSTIC RECORP

(type "fault_Sdia9'_t" in fault.ins.pas)

15 +----------------+

+00 111011111110111111 . pattern (iDFDF) +----------------+

+02 I STATUS .status

+06

+ I WORD

+ I

+----------------+

REGISTERS

+----------------+

. registers

+46 1- - - - - -RNFFFI • bus_info +----------------+

+48 1 ACCESS ADDRESS I . access_address +----------------+

+4C I INTRUCTION REG I . inst _register +----------------+

+4E I FLAGS I

+----------------+

R - Read operation (.write_op) N - Not instruction reference (.not_inst) FFF - Instruction function code ( . function_code) :

001 User data 010 User program 101 Supervisor data 110 Supervisor program 111 Interrupt acknowledge

APOu.o CONADENTIAL INTERNAL USE ONlY. 1-9 AEGIS

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MAPPED SEGMENT TABLE (MST)

AEGIS

The MST is a wired array indexed by asid and va. Each mste describes one segment of virtual memory.

MST: array[O .. (asid_tn*mst.Jlages_tn)-lJ of pinteger mst_entry_free ",. 0

mst.Jlages_tn is the number of mst entries needed to describe one asid.

mstes.j)er-page == page_size div sizeof mste_t mstJages_tn = mst_seg_tn div mstes.j)er.j)age

1-10 APOUD CONFIDENTIAL-INTERNAL USE ONLY.

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MAPPED SEGMENT TABLE ENTRY (MSTE)

(type "mste_t" in vm..ins.pas)

31 16 15 +----------------+----------------+

+00 I UID OF FILE . uid +----------------+----------------+

+08 I FILE SEGMENT fj: I EGxxxxxPPPPPPPPP I . fsegno +----------------+----------------+

+OC INDEX OF VTOC ENTRY (VTOCX) .locx I OR I I RCCCCCSQQQQQ_I

+10 +---------------------------------+

E - 1 =) File extension allowed (. ext_ok) G = 1 ==) Interrrupt on ref (. guard)

for DNx60 =) --PPP for DN5xx-T .... ) PPPPP for DN3000 ==) ----P for others -) AAAAA

AAAAA - Access (. access) : 00000 Nil (access_$nil) 00010 Read (access_$r) 00011 Read-execute (access_$rx) 00110 Write-read (access_$wr) 00111 write-read-execute (access_$wrx) 10010 Supervisor read (access_$sr) 10011 Supervisor read-execute (access_$srx) 10110 Supervisor write-read (access_$swr) 10111 Supervisor write-read-execute (access_$swrx)

P - Probable ASTEX (. pastex) R - Object is remote (.mate_remote) C - Touch ahead count (.mste_touch_cnt) S - Sequential access Q - Next sequential page M - Mste-node

MAPPED SEGMENT TABLE ENTRY PAGES: (defined in /os/kins/mst.pvt.pas) (type "mste Jages" in kins/mat. pvt. pas)

MSTE_PAGES : ARRAY[l.. (ppn_tn DIV mstj)ageJercentage] of mstJage_t mstyage_t : array[O .. mstes-perj)age - 1] of lllSte_t

For systems with a virtual address space greater than 1Gb: ARRAY[l. . (mst_sm_config * mstJ>agej)ercentage

DIV 100 + «ppn_tn - mst_sm_config) * mst_l_configj)ercent DIV 100» 1 of mst_page_t

APOLLO CONFIDENTIAL INTERNAL USE ONLY. 1-11 AEGIS

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MSTE_PAGES is an array of pages that are wired as needed to support mappings in the mst. When a segment is mapped and the corresponding mst entry = mst_entry_free, a free page is found in the msteyages array and wired. It's number is put into mst [entry] . The number of pages that can be used is limited at boot time to be some percentage of physical memory. See mst_$init.

MEMORY MAP (MMAP)

For all machine types an MMAPE (rnmap entry) is 12 (decimal) bytes in size.

MEMORY MAP ENTRY (MMAPE) !REVERSE MAPPED MACHINES)

AEGIS

(type "mmape" in mmap.pvt .pas) 15 0 +----+------------+

+001 IARO 1 PTT INDEX 1 . pttx +----+------------+

+02IPREV LSTICUR LISTI .prev_lst, +--------+--------+ .list

+041 PPN NEXT PAGE . flink +-----------------+

+061 PPN PREV PAGE .blink +-----------------+

+081 LOW DISK ADDR .daddr_1 +--+--------------+

+OA 1 D-I ASTE INDEX I. astex +--+--------------+

1 => Entry in use (. inuse) A - 0 => Page is wired or in transit (. avail) R - 1 => Page mod' ed but dtro shouldn't

be updated (. rmod) o 1 => page is on some memory page list (.onlist)

1 => This page is holding data (as opposed to code) (. d_pg)

MMAPEs are organized onto a number of lists, each list is described by a list header (type ws~hdr_t in rnrnap. pvt .pas) the 'Leaders are collected into the mmap _$wsl array (type wsl_t in rnrnap.pvt.pas)

1-12 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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List name List index Use mmap_$xfree

mmap _ $xhi yure

mmap _ $xpure

mmap_$ximpure_l 3

nunap _ $xos _shared 5

mmap_$xnet_pager

mmap _ $xinit yroc 7

Pages not poi.nted at by a PMAPE ... contain no useful data Pages not in use ... have already been purified Pages not in use ... are pure, don't need to be written Pages not in use ... are impure, need to be written to local disk Pages not in use .,. are impure, need to be written to remote disk Pages in use by any of the Ll Aegis processes Pages being , cached' by one of the network paging servers ...

replaces the remote paging pool Pages in use by process 1 (DM)

Lists after this hold pages in use by some process, assigned at process creation.

32 16 15 +----------------+----------------+

+00 I IP--------------I . cur_5ize

+----------------+----------------+ +041 UNUSED I. flink I

+----------------+----------------+ +081 .max_size I UNUSED

+----------------+----------------+ +OCI .wsyri

+---------------------------------+ +101 .la5t_w5_scan 1

+----------------+----------------+ +141 .interr_cnt I .prot_size I

+----------------+----------------+

=> list is in use (. inuse) => scan list periodically in real

time (.p_scan) . cur_size of pages (MMAPEs) on this list . flink PPN of first page on this list

(if .cur_size > 0) ... anchors a doubly threaded list of MMAPEs

.max_5ize maximum of pages that this list can hold

.ws_pri time (+:ime_$clockh) the process 'owning' this last last ran

.last_ws_scan: time (time_$clockh) this last was last scanned

.interr_cnt used in scheduling scans on this list

.prot_size list is always allowed to have this many pgs on it (i. e., list size won't be forced below this )

APOllO CONFIDENTIAl. INTERNAL USE ONLY. 1-13 .. AEGIS

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OS MAPPING

,24.-----,

SINGLE NODE PROCESS

GLOBAL

VIRTUAL ADDRESS SPACE

AEGIS

ADDRESS SPACE

MAPPING

1-14

:z3'r-'------,

NElWORK GLOBAL OBJECT SPACE

APOLW CONFIDENTIAL. INTERNAL USE ONlY.

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PAGING SYSTEM

PHYSICAL MEMORY

APOLLD CONFIDENTIAL INTERNAL USE ONLY. 1-15

MAPPED SEGMENT TAULE

AEGIS

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PROCESS CONTROl, Bl,OCK (PCB)

AEGIS

(type nprocl_ t n in procl. pvt. asm)

31 +-----------------------------+

+00 --> NEXT READY PCB .nextp +-----------------------------+

+04 I --> PREVIOUS READY PCB .prevp +-----------------------------+

+08 I d2 I .save_d2 +-----------------------------+

+-----------------------------+ +lC I d7 I .save_d7

+-----------------------------+ +20 I a2 I .save_a2

+-----------------------------+

+-----------------------------t +28 a4 .save_a4

+-----------------------------+ +20 I as I .save_db

+-----------------------------+ +30 I a6 I . save_sb

+-----------------------------t +34 a7 I . save_sp

+-----------------------------+ +38 I USP I .save_usp

+-----------------------------t +3C ICLOCKH_T AT START OF BC_$WAITI .wait_start

+-----------------------------+ +40 RESOURCE LOCK WORD • rlock

+--------------t--------------t +44 I PID I ASID I .mypid, .asid

+--------------+--------------+ +48 IT.S. REM.*8MICIFLPT.PROC.TYPBI .vtimer .fpptype

+--------------+--------------+ +4C I CPU TIME I . cpu_total

+--------------t--------------+ +50 I CPU TIME I priority 1 .priority

+--------------t--------------+ +54 I STATE: TBPSW I PRI Minimum I . state, .pri_min

t--------------t--------------+ +58 I PRl Maximum I Inhibit cr.+: I .pri_max . inh,;..oount

t--------------+--------------+ +58 I bus status I pad I . sw_bsr .pcbyad

t--------------t--------------+

State: T - Time slice end with rl.ock <> [} (tse_onb) B - Bound (bound)

- Suspension pending (suspyending) - Suspended (suspended)

W - Waiting (waiting)

1-16 APOllO CONADENTIAL INTERNAL USE ONLY.

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procl_$state_t "'" SET OF (waiting, suspended, suspyending, bound, t se _ onb) ;

(State is type Dproc1_$state_tn in proc1.ins.pas)

£I.Q ~ Descript iQn

10 11

12 13 14

15 16 64 56

Initial user process and DM

Null process Wired DXM process Page purifier local Page purifier remote Unwired DXM process Network-receive server Network-paging server Network-request server Terminal helper First user process Second user process

Last user process

Note: Processes with an ASID of 0 run entirely in global space.

Note: If the debugger's Lights command has been given, there will be a Lights process with PID 11 or greater with a zero ASID.

Note: If the netsvc -servers option has been used there may be more net-paging and net-request servers.

Note: There can also be IIC guardian Process Ethernet router for Bridge nodes.

APOLLO CONADENTIAL. INTERNAL USE ONLY. 1-17 AEGIS

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RING PACKET FORMAT

Message Headgr

15 +----------;-------+

+00 TO ADDRESS

+-----------------+ +04 I TYPE FIELD I

+--------+--------+ +06 I Os IEARLYACKI

+--------+--------+ +08 FROM ADDRESS

+-----------------+ +OC HEADER

DATA

1(0 - 1024 BYTES)

I +40C +-----------------+

Typg Field

AEGIS

15 14 13 12 11 10 +-----+-----+-----+-----+-----+-----+-:....---+-----+ I BST ITT T T T T T

+-----+-----+-----+-----+-----+-----+-----+-----+

+-----+-----+-----+-----+-----+-----+-----+-----+ T T T T T T T T

+-----+-----+-----+-----+-----+-----+-----+-----+

Bit 15 - BST (Broadcast) - This bit is set in a packet intended to be broadcast to all receivers. If it is set, the To Address field is ignored.

Bit 14 thru 0 - T (Type) - This field determines whether a packet is to be received. Each 1 bit in the received Type f~"'ld is compared to the corresponding bit in the controller Type register. If any bit selected in the Type register is a 1, the message is received. If all bits selected in the Type register 0, the message is ignored. The APOLLO I only implements Bits 14 through 8 only; bits 7 through 0 never match.

1-18 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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Early Acknowledge Field

The Early Acknowledge field is inserted by the transmitter and modified by the receivers. For the purposes of the CRe calculation the EARLY ACK field is treated like a byte of zeros. This allows receivers to modify the ACK field without having to recompute the eRe

checksum.

+-----+-----+-----+-----+-----+-----+-----+-----+ lOX I x 0 I Iep I x I PAR I a

+-----+-----+-----+-----+-----+-----+-----+-----+

Bit 7-0 - This bit is inserted to prevent the remaining

bits in the late-acknowledge byte from being modified by the bit-stuffing protocol.

- This bit is not used.

Bit 5-X - Don't - This bit is not used.

Bit 4-0 - This bit is inserted to prevent the remaining bits in the late-acknowledge byte from being modified by the bit-stuffing protocol.

Bit 3-ICP - Intend to Copy - This bit is set by an addressed receiver if it was set up to copy a message and the type field matched. A NAK

(negative acknowledge) condition is indicated when no receiver sets this bit.

Bit 2-x - Don't care - This bit is not used.

Bit I-FAR - Parity - This parity bit is set so that there are an odd number of bits in the late acknowledge byte.

Bit 0-0 - This bit is inserted to prevent bits in the late-acknowledge

being modified by the protocol.

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 1-19

the remaining byte from bit-stuffing

AEGIS

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Message pata

<----------- 8 bits---------------> +-----------------------------------+ I I I Message Data 0 - 1024 bytes I I I +-----------------------------------+

The Message Data field varies in length from 0 to 1024 bytes but must always be an even number of bytes (on the Apollo I the controller always uses word DMA) . The contents of Message Data field is determined by the software; it is transmitted verbatim.

RI!jSOURCE LOCK

AEGIS

Defined in base. ins. pas network_$serv_lock, (00 } rnt_$lock, (Ol}

xpd $lock, (02} te~_$lock, {03} proc2_$lock, { 04 10 } file $lock lock, {05 20 } ec2_$lOCk, - { 06 40 } srnd_$respond_lock, { 07 80 } srnd $request lock, ( 08 100 ) pbv:=$lock, - { 09 200 } aCl_$lock, { 10 400 } procl $create lock, { onb_$lock, - {

11 800 I 12 1000 faulted to CPUB

bok..:..$lock, { 13 2000 runnable on B } disk $rnnt lock, { vtoc:=$loc'k, { bat _ $lock, {

14 4000 ) 15 8000 ) 16 10000 )

ast $lock, { 17 pag - $lock, { 18 sm_Slock, ( 19 fIp $lock, ( 20 win:=$lock, { 21 rin9_$xmit_lock, {22 ml_$free7, { 23

20000 ) 40000 ) 80000 ) 100000 ) 200000 ) 400000 ) 800000 )

{ the next two locks are highest} time _ $proc _lock, t ime_$ lock

( 24 1000000 clock process only) { 25 2000000 clock process data base

1-20 APOUD CONFIDENTIAL INTERNAL USE ONLY.

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SYSTEM BOOT FILES

FILES REQUIRED DURING BOOT

REQUESTING AGENT

prom /sysboot (records 2-b on track 0)

(if DNx60 /saun/wcs.uc (microcode file) or DN5xx-T) dcode. uc (instr. decode ram contents)

spad. uc (DNx60 only) (scratchpad constants, temps)

sysboot

aegis

uload (program to load the above)

/ saun/ aegis /saun/salvol

(aegis load file) (only if salvage required)

(uncataloguedl [os paging file] / / (uids found and saved by nam.e_Sinit)

shell

/ /com /sys/node data /sys/peb Iticrocode or peb2 microcode (1)

'node_data/boot_shell (2) (mapped by proc2_Sinit)

/sys/apollo_logo (3) 'node data/startup shell (3) (cmd fi.le to override dflts) /sys/;nv (shell tells him what to run)

env /lib/?* /sys/dm/dm /sys/boot

"go" command or normal boot "sh" or boot from sio line

/ sys/ spm/ spm "spm" or normal boot on server node

dIn 'node data/dev/sio /sysidm/fonts 'node data/startup [.191, . color, • 1280color, .1280bw] (3)

/sys/boot

boot /registry/registry (4) (+ppo, account files pointed to) local registry local=site/?*

/com/sh

NOTES: (1) PEB is disabled if microcode file not found. (2) If booted from cartridge tape, the tape is first searched for

BSCOM/RBAK _SHELL. (3) Optional -- system will manage without it. (4) If no registries are available, you can login only as

USER. NONE. NONE.

APOllO CONFIDENTIAL. INTERNAL USE ONLY. 1-21 AEGIS

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SYSTEM PJRECTQRUjS

AEGIS

/bscom Icc Icom /core /dev /install /lib /saul /sau2 /sau3 /sau4 /sauS /sau6 /sau8 /sys

Boot shell command directory C compiler (optional) Shell commands directory Core graphics (optional) Peripheral I/O device definitions Installation scripts directory System libraries directory Stand-alone utilities for DN4xx/600 Stand-alone utilities for DN300/320/330 Stand-alone utilities for DSP80/80A/90 Stand-alone utilities for DNx60,DSPl60 Stand-alone utilities for DN550/560/570/580 Stand-alone utilities for DN5xx-T Stand-alone utilities for DN3000,DSP3000

/sys/alarm /sys/boot /sys/dm /sys/dIn/fonts /sys/env /sys/hasp /sys/help /sys/ins /sys/mbx /sys/net

Alarm :server Boot shell file Display manager programs Display manager font definitions Process 1 initializer Hasp support Help text files User insert files Mailbox helper Netman (diskless node support) Per node read/write data files Store and foward files

/sys/node data[.nn] /sys/sf -/ sys/ siologin Sioline login support /sys/source Selected source files /sys/spm Server process manager /sys/stream $sfcbs Stream mgr control blocks /sys/subsys- Protected system support / eye/ sysdev Stream device files

/ sysboot System boot file /systest On-line system tests directory

1-22 APOUD CONFIDENTIAL INTERNAL USE ONLY.

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TRAP CODES

SVC -- 0 arguments SVC -- 1 arguments SVC -- 2 arguments SVC -- 3 arguments SVC -- 4 arguments SVC -- any number of arguments SVC -- from GPIO interrupt routines Undefined (reflected to user space) Undefined (reflected to user apace) Undefined (reflected to user space)

A Undefined (reflected to user space) B Undefined (reflected to user space) C Undefined (reflected to user space) D Undefined (reflected to user space) E Software-generated fault (pfm _ Serror _trap) F Undefined (traps to PROM debugger)

APOLLO CONFIDENTIAL INTERNAL USE ONLY. 1-23 AEGIS

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CHAPTER 2

FILE SYSTEM

ACLS STRUCTURE

ACI, Header; Record

(type aCl_$hdr in acls.pvt.pas)

15 0 +-----------------+

+0 I VERSION OF ACL I . version +-----------------+

+02 I TYPE OF OBJECT . atype \ FOR WHICH THIS \

I CAN BE ACL I +-----------------+

+OA I I .def_nil I DEFAULT NODE LIST I I FOR NEW ENTRIES I +-----------------+

+OE I NUMBER OF ENTRIES I . nent s +-----------------+

+10 INO. OF NODE LISTSI .nlists +-----------------+

+12 NOT USED . spare +-----------------+

+14 I .extra NOT USED \

+34 +-----------------+

ACL Record

(type acl $rep in acls,pvt.pas) 15 - 0

+----------------+

+0 HEADER

+----------------+

+34 ENTRIES I .entries

array I [1.acl_$entmaxl I of acl_ Sentry I

+----------------+

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 2-1 File System

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(type aCl_$entry in acl.ins.pas)

6' +-------------------------------+

+00 I PERSON UID I .pers in aCl_$sid +-------------------------------+

+08 I PROJECT UID .proj in aCl_$sid +-------------------------------+

+10 I ORGANIZATION UID .org in aCl_$sid +-------------------------------+

+18 I SUBSYSTEM UID I .subs in aC1_$sid +---------------+---------------+

+20 I NODE ID EXP DATE .node_t, .exp_date +---------------+---------------+

+28 I ACL RIGHTS I . rights +---------------+

BLOCK AVAILABILITY TABLE (BAT)

(type nbat_blkn in vol.ins.pas)

31 +----------------------------+

+00 I BAT WORD [0) I +----------------------------+

+04 I BAT WORD [11 I +----------------------------+

+----------------------------+ +3FC I BAT WORD [2551 I +400 +----------------------------+

First BAT block pointed to by BAT header in logical volume label (pv_label). BAT resides in contiguous records.

Bit 0, BAT WORD [OJ corresponds to first block (bat_hdr.base_add) in the logical volume. BAT bit ... 1 if block is available.

File System 2-2 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

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BLOCK AVAILABILITY TABLE HEAPER

(type "bat_hdr_t" in vol.ina.pas)

31 +----------------------------+

+2C I NUMBER OF BLOCKS REPRESENTED I . n _ blk +----------------------------+

+30 NUMBER OF FREE BLOCKS . n _free +----------------------------+

+34 I DADDR OF FIRST BAT BLOCK 1 • addr +----------------------------+

+38 IBLK '* REP BY lat BIT IN BAT I .baae_add +-------------+--------------+

+3C I VCB----------I BAT_ +-------------+----------..,.---+

+40 1 STEP 1 I . bat _ atep +-------------+ 1

I UNUSED /

+4C +----------------------------+

V - Volume trouble, Bet by OS if volume needa salvaging, cleared by SALVOL. (.vol trouble)

C - Volume CHUVOLed (. vol_ chuvoled) -B - Volume being CHUVOLed (.vol_being_chuvoled)

BAT header lives in logical volume label. Offset a given are from start of label.

APOLLO CONFIDENTIAL INTERNAL USE ONLY. 2-3 File System

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..

QIRECTORY STRUCTURE

Directory Oyeryiew

(type dir_t in name.pvt.pas)

+------------------------+ HEADER I

+------------------------+ I LINEAR LIST I +------------------------+ I INFO BLOCK I +------------------------+

HASH THREADS I +------------------------+ I ENTRY I I BLOCKS I +------------------------+

Directory Info B10gk

(type infoblk_hdr_t in name.pvt.pas)

+------------------------+

Directory configuration information

Sequentially used directory entries

ACL manager's intial Acr~ description block

Pointers to linked lists of hashed entries

Holding blocks for hashed entries and/or link text

+00 I VERSION 1MB Z I Info block version number +------------------------+

+02 INFO BLOCK LENGTH I Total length of info block +------------------------+

+04 INFO BLOCK HDR LENGTH I Length of info blk hdr (8)

+------------------------+ +06 1MB Z I Reserved for future uae

+------------------------+ +08 DEFAULT ACL OlD laID of ACL to be applied to

FOR DIRECTORIES I directories catalogued in +------------------------+ this directory

+OC I DEFAULT ACL UID I UID of ACL to be applied to I FOR FILES I files catalogued in this +------------------------+ directory

+10 I 24 UNUSED BYTES I Reserved for future use \ \

+30 +------------------------+

File System 2-4 APOLLO CONFIDENTIAL INTERNAL USE ONLY .

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Directory EDt ry

(type dir_entry_t in name.pvt.pas)

+------------------------+ +00 I ENTRY NAME I 32 bytes of entry name

+------------------------+ +20 UNUSED I Reserved

+------------------------+ +22 I UNUSED I Reserved

+------------------------+ +24 I UNUSED I Reserved

+-----~----+------------+

I I +26 I NAME LENGTH I ENTRY TYPE I

I I I

Name length - #= of useful characters in entry name

Entry type - 0 = not in use

I I I +-----------+------------+

1 = name/UrD pair 3 == name/ link-data

I I +28 I 4 WORDS OF I

I ENTRY DATA I

pair If entry type == 1, UrD Entry type = 3, =>

I (EITHER UID OR LINK I Link text: link text len, I TEXT DESCRIPTION) I I I

Blk holds Ink text chrs, 1-144 Blk holds Ink text chrs, 145-256

+------------------------+ Reserved for future use

Directory Entry Block

(type entry block t in name.pvt.pa6) total length - 150 bytes

+------------------------+ +00 I NEXT BLOCK NUMBER I Forward thread - doubly linked

+------------------------+ list +02 I PREV BLOCK NUMBER I Backward thread - doubly lin.ked

+-----------+------------+ list I I Use count - #= of used entries

+04 I USE COUNT BLOCK TYPE I in this block I I Blk type - 0 = not in use I I -1 = hash blk with 3 dir entrs +-----------+------------+ -3 = link text holding block

+06 I ENTRY BLOCK I Either 3 dir entries or I DATA I Up to 144 chars of link text +------------------------+

APOLW CONADENTIAL INTERNAL USE ONLY, 2-5 File System

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Directory Header

(first part of type "dir_t" in name.pvt .pas)

+------------------------t tOO I VERSION I version number of this directory (1)

+------------------------+ +02 I HASH VALUE I * of hash threads used for entry

+------------------------+ name hashing +04 LIST SIZE I t of entries configured into

+------------------------+ l.inear list (18) +06 I POOL SIZE I .. of entry blocks in this

+------------------------+ directory (429) t08 I ENTRIES PER BLOCK I t of entries that fit in an

+------------------------t entry block (3) +OA I HIGH BLOCK NUMBER I t of the highest entry block

+------------------------+ used so far tOe I FREE BLOCK THREAD I ... of the first block on the free

+------------------------t block list tOE I UNUSED I Reserved for future

+------------------------+ t10 I UNUSED I Reserved for future

+------------------------+ t12 I UNUSED I Reserved for future

+------------------------t t14 I UNUSED I Reserved for future use

t------------------------t +16 I ENTRY COUNT I '* of entries currently catalogued

+------------------------+ in this directory t18 I MAXIMUM COUNT I .. of entries this directory can

+------------------------+ hold (l300)

Notes on directories

1. To add an entry to a directory:

File System

A. Look for an unused entry in the linear list. If you find one, use it and you're done.

B. Hash the name you want to add:

- name is: array [1 .. 32J of CHAR

- lnth is useful lnth of name sum: =0; For i : = 1 to 1nth DO

sum : = ord (name [i]) +2*sum; HASH_VAL ,.. sum mod HASH_VALUE;

C. Get the hash thread for the specified hash value and call that value the found block.

D. If the found block number is 0 then we need a new entry block, so:

2-6 APOLLO CONFIDENTIAl. INTERNAL USE ONLY.

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a) See if there are any blocks threaded through the free block list and if so, take one of those. Otherwise, bump the high block number and use that.

b) Initialize the newly obtained block, add it to the end of the apprpriate hash chain, add the new entry as the first entry in the new entry block and you're done.

E. If there is an unused entry in the found block, use it and you're done.

F. Change the found block value to the number in the current found block's NEXT BLOCK field and go to step D.

2. The searching rule for a directory is:

A. Look in the linear list.

B. Hash the name you're searching for.

C. Follow the hash thread for the specified hash value to the first entry block with that hash synonym.

D. Search all (3) of the entries in the found entry block

E. Follow the "next block number" in the found entry block to get a NEW found entry block. If the next block number is zero, then return NOT FOUND.

F. Go to step D with the newly found block.

APOLLO CONFIDENTIAL INTERNAL USE ONLY. 2-7 File System

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DISK BLOCK HEApER

31 16 15 +-----------------+----------------+

+00 I urD OF OBJECT TO WHICH I. uid

+ I BLOCK BELONGS

+

+------------:----------------------+ +08 I PAGE NUMBER IN FILE I

+----------------------------------+ +OC I TIME WRITTEN (clock.high32) I

+--------+--------+----------------+ +10 I BLKTYP I SYSTYP I I

+--------+--------+ +14 I UNUSED

+ I

+ +----------------+

.page

.dtm

.blk_type, .sys_type

+18 CHECKSUM I. chksum +-----------------+----------------+

+lC I DISK ADDRESS I .daddr +20 +---------------------------.:..------+

BLKTYP: 0 - Data block 1 - Level 1 index block in file map 2 -3 -

SYSTYP : - File - Directory - System directory

PISK SERRCS INFO

31 +--------------------------------+

+00 TIME OF R!W I +--------------------------------+

+04 DADDR I +---------------+----------------+

+08 I B_PR_TRK I TRK_PR_CYL I +---------------+----------------+

+OC I REQUESTED I UID, page, I HEADER I daddr +--------------------------------+

+2C I READ I I HEADER I +---------------+----------------+

+4C I VOLX PPN I +---------------+----------------+

+50 STATUS I +--------------------------------+

File System 2-8 APOUD CONFIDENTIAL. INTERNAL USE ONLY.

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DISK/VQPIME FORMAT

+---=----=+ I BLOCK 00 OF PHYSICAL VOLUME

+----1 PHYSICAL (1 BLOCK)

1 +---1 VOLUME LABEL

11+--1 III +-=---=-+

I +-> I I BLOCK 00 OF LOGICAL VOLUME (1 BLOCK) I I LOGICAL 1-----+ I I VOLUME LABEL 1---+ I I I I I I I +----------------+ I I I I I I I BLOCK 01 OF LV (10 BLOCKS) I I BOOT I I I I I FILE I I I I I I I I I +----------------+ I I I I I BLOCK OB OF LV I FREE I I I I I

BLOCKS I I I I

+----------------+ I I I 1<--+ I I VTOC I I I I I +----------------+ I I 1<----+ I BAT I

I I +----------------+ I I

I I FREE I NOTE: all disk addresses I / / (DADORS) in a logical volume I I BLOCKS are relative to the start

I I I of a logical volume. I I +----------------+ I +--> I I LAST BLOCK OF LOGICAL VOLUME I I LOGICAL VOLUME I I ILABEL (2nd COPY) I I I I I +==---===-+ +---> I NEXT LOGICAL

I VOLUME

I

Badspots may caU5e the VTOC to be non-contiguou5 and not adjacent to BAT. There may be dead space between logical volumes. Bad spots may not be added to the VTOC once it has been INVOLed.

APOLLO CONADENTIAL. INTERNAL USE ONLY. 2-9 File System

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+--------+ +00 1 1----> DATA BLOCK 1

+--------+ +04 1----> DATA BLOCK 2

+--------+ +08 1 1

/ / 1 1 +--------+

+7C 1----> DATA BLOCK 32 +--------+ +--------+ LEVEL 1

+80 1----> +--------+ +--------+ 1 1----> DATA BLOCK 33

+84 1 1--+ +--------+ +88 +--------+ 1 1 1----> DATA BLOCK 34 +---1 1 +--------+ 1 +--------+ 1 1 1 1 1 1 1 1 1 +--------+ 1 1 1 1----> DATA BLOCK 288 1 1 +--------+ 1 1 1 LEVEL 3 I LEVEL 2 +-->+--------+

1 1 1 256 1 I POINTERS I 1 TO 1 ILEVEL 21 I BLOCKS 1

1 1 +--------+

+-->+--------+

1 1 1 256 1 I POINTERS 1

1 TO 1 I LEVEL 11 1 BLOCKS 1 1 1 +--------+

Maximum file size - (32+256+256**2+256**3) *1024 bytes - 17,247,300,000 bytes.

File map resides in VTOCE and AST entries.

File System 2-10 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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REGISTRY FORMAT

Header Record

(type ppo_$header_t in ppo.ins.pas)

+-------------------------------+

+0 I TRANSACTION UID FOR SALVAGING I .ppo_$xact_uid +---+---+-------+-------+-------+

+8 I elF I HDR LEN I NUMBER I READ +---+---+-------+-------+-------+

+10 I WRITE I I PW LENIREC LENI .ppo_$rec_len +-------+-------+---------------+

+18 UNUSED UNUSED .ppo_$space, +---------------+---------------+ . ppo _ $space2

C = 1 => committed (.ppo_$cornmitted) F = 1 => local (.ppo $10cal flag) NUMBER - number of entri;s (.ppO"_$nwn_entries) READ - oldest software that can read this (.ppo_$r_vers) WRITE - oldest software that can write new (.ppo $w vers) PW LEN - minimwn password length (. ppo _ $min ylen) - -

PPO Record

(type ppo_$record_t in ppo.ins.pas)

+-------------------------------+

+00

+08 PPO NAME .ppo_$name

+10 +

+18 +--------+----------------------+

+20 I NAMLEN I UID ... I .ppo_$namlen +-------------------------------+ • ppo _ $uid

+28 1 ... 1----------------------1 +--------+----------------------+

APOLLO CONFIDENTIAl. INTERNAL USE ONLY. 2-11 File System

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Account Header

(type acct_$header in acct.ins.pas)

+-------------------------------+ +00 I TRANSACTION UID FOR SALVAGING I .acct_$xact_uid

+---+---+-------+-------+-------+ +08 1 C 1 F IHDR LENINUM ENTI READ

+---+---+-------+-------+-------+ +10 1 WRITE 1-------1 PW LEN 1 REC LEN 1

+-------+-------+-------+-------+ +18 lCLOCKH TIME PERI UNUSED I .acct_$expyeriod

+-------------------------------+

C = 1 -> committed «.acct_$committed) F = 1 -> local (. acct $local flag) HDR LEN - header length «. ac~t $hdr len) NUM ENT - number of entries (.;cct_$num_entries) READ - oldest software that can read this (.acct_$r_vers) WRITE - oldest software that can write new (.acct $w vers) PW LEN - minimum password length (. acct _ $min ylen) - -REC LEN - record length (.acct_$rec_len)

AccQunt Record

(type acct_$record_t in acct .ins .pas)

+-------------------------------+ +00 I PERSON UID .acct_$pers_uid

+-------------------------------+ +08 I PROJECT UID I .acct_$proj_uid

+-------------------------------+ +10 I ORGANIZATION UID I .acct_$org_uid

+-------------------------------+ +18 1 ACCT PW 1 .acct_$pwd

+ +20 1

+---------------+ I EXP DATE I .acct_$exp_date*

+---------------+---------------+ +28 1-------1 LAST LOGIN 1-------1 .acct_$last_login*

+-------+---------------+-------+ +30 1 FLAGS 1 NODE I HM LN I

+-------+---------------+-------+ +38 1 1

\ HOME \ .acct_$home 1 1

+l38+-----------------~------------+

* local registries only FLAGS - set of acct_$invalid (local registries only)

(.acct $flags) NODE - node type- (local registries only) (.acct_$node) 8M LN - home length (.acct_$home_len)

File System 2-12 APOUD CONFIDENTIAL INTERNAL USE ONLY.

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Regi at Ty Record

(type rgy_$registry_t in rgy.ins.pas)

+--------------+----------------+ +00 I FLAGS 1 NUM PNAMES I .rgy_$count

+--------------+----------------+ +04 I LENGTH OF REGISTRY NAME I .rgy_$nlen

+-------------------------------+ +08 FIRST PNAME I .rgy_$ent_name

\ +-------------------------------+

MORE LENGTHS AND NAMES AS I INDICATED BY COUNT FIELD I

+-------------------------------+

First pname is path of original registry; it is used as lock.

APOLLD CONFIDENTIAL INTERNAL USE ONLY. 2-13 File System

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STREAM E'ILE HEADER

31 16 15 +-----------------+-----------------+

+00 j HEADER LENGTH I VERSION .hdr_lgth, +-----------------+-----------------+ . version

+04 I eRe +-----------------------------------+

+08 I RECORD LENGTH (SEE BELOW) + . rec_1gth +-----------------------------------+

+OC FILE LENGTH (INC. HEADER) . file_length +-----------------------------------+

+10 I--RRAESC I--CO----I--------I--------I +--------+--------+--------+--------+

+14 RESERVED

+20 +-----------------------------------+

eRC = - (integer sum of (1 + 3 thru n longwords» RR - Record type (. rec type, stream $rtype t):

00 - var len w/co~nts (stream_$v1) -01 - fixed length (stream $f2) 10 - no record structure (stream_$undef)

A 0 => Binary, 1 => ASCII (.elb_flag) 1 => No automat~c type change (.expl~c~t_type)

1 => File may have holes (. sparse) C 1 => Carriage control (ASCII only) (. cc)

CO - Concurrency (.conc, stream_$fconc_t): 00 - N readers or 1 writer (stream $n or 1) 01 - N readers and 1 writer (stre~_$~_and_1) 10 - N readers and N writers (steam_$n_and_n)

RECORD LENGTH: Record length for fixed Maximum length for variable o for undefined record length

Stream file header is the first 32 bytes of a file to be accessed by the stream interface.

File System 2-14 APOLLO CONFIDENTIAl. INTERNAL USE ONLY.

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tWIotJE IpENTIFIER mIp>

(type "uid_tll in base.ins.pas)

31 16 15 +-----------------+--------------.. -+ I CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC I • clock +--------+--------+----------------+ I iiii----I----NNNNINNNNNNNNNNNNNNNNI .node

+--------+--------+----------------+

C •• C - TOp 32-bits of clock (4 mSec units)

iiii - A counter if more than one UID is generated in one four-millisecond interval

N •• N - Node ID

PIP Hash Algorithm

x = the four words of the UlD XORed together

INDEX = X mod TABLE_SIZE

where TABLE SIZE is the size of the table into which the urD is being hashed (e.g., vtoc_hdr.vtoc_size).

APOLLO CONFIDENTIAL INTERNAL USE ONlY. 2-15 File System

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tlIpS -- Syst em

(from /os/nuc/uid_list .asm)

uid $nil ac()nil

00000000,0 00000100,0

disk structure canned PIDs (000002xx series)

pv label $uid lv -1abe1-$uid vtoc_$uid bat_$uid

00000200,0 00000201,0 00000202,0 00000203,0

canned object type UIDs (000003xx series)

records $uid hdr_undef_$uid object_file_$uid UNDEr $uid pad_$~id inputyad_$uid sio $uid dd()uid mbx_$uid nu1ldev $uid D3M area $uid D3M=sCh_$uid pipe $uid uasc:$uid directory _ $uid unix directory $uid mt~$~id -sysboot_$uid

00000300,0 00000301,0 00000302,0 00000304,0 00000305,0 00000309,0 0000030A,0 00000308,0 0000030C,0 0000030D,0 0000030E,0 0000030r,0 00000310,0 00000311,0 00000312,0 00000313,0 00000314,0 00000315,0

canned objects UIDs (000004xx series)

display1 $uid display2 -Suid name_$ca~ned_root_uid

00000400,0 00000401,0 00000308,0

special seg $uid 00000402,0 diskles;_$u'id 00000403,0 name_$canned_rep_root_uid 00000404,0 display3 $uid 00000405,0 os_wired:=$uid 00000406,0

File System 2-16 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

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canned person. project, organization and subsystem UIDs (005xx series)

canned persons (0000050x series)

00000500,0

canned projects (0000054x series)

acl_$sysyroj_uid acl_$login_uid acl_$locksmith_uid

00000540,0 00000541,0 00000542,0

canned organizations (0000058x series)

00000580,0

canned subsystems (000005Cx s.eries)

000005CO,0

canned ACL type UIDs (000006xx series)

acl $file acl. aCl=$dir_-;cl

00000600,0 00000601,0

canned ACL UIDs (file ACLs) (0001xxxx series)

ac1_$fnil ac1 $fndwrx aCl=$file_nwrx

00010000.0 0001BOOF,0 0001B007,0

canned ACL UIDs (directory ACLs) (0002xxxx series)

acl_$dnil acl $dndcal acl=$dir_ncal

APOLlD CONADENTIAL INTERNAL USE ONLY.

00020000,0 0002801F,0 0002BOOF,0

2-17 File System

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YOI.PME LABEr. -- LOGrCAL

31 16 15 +---------------+---------------+

+00 1 VERSION UNUSED I. version

+---------------+---------------+ +04 I I .name

/ LOGICAL VOLUME NAME /

I I +-------------------------------+

+24 UNIQUE ID OF 1 • id

+ I LOGICAL VOLUME

+ I

+-------------------------------+

+2C I I .bat_hdr / BAT HEADER /

I +-------------------------------+

+4C 1 1 .vtoc_hdr / VTOC HEADER /

I I +-------------------------------+

+sO 1 TIME LABEL WRITTEN 1 .label_write_time +-------------------------------+

+B4 1----------1 LAST MOUNTED NODE 1 .last_mounted_oode

+-------------------------------+ +B8 1 TIME SYSTEM WAS BOOTED 1 .node_boot_time

+-------------------------------+

+BC I TIME THIS VOLUME WAS MOUNTED 1 +-------------------------------+

+cO 1 TIME THIS VOLUME WAS DISMOUNTED 1 +-------------------------------+

+C4 1----------1 NODE OF LAST SALVAGE 1 +-------------------------------+

+C8 1 TIME SALVAGE COMPLETED 1 +---------------+---------------+

+CC IMODE OF SALVAGE 1 SHUTDOWN STATE 1 +---------------+---------------+

+DO I TIME DUMP STARTED I +-------------------------------+

+04 I TIME DUMP FINISHED I +-------------------------------+

+08 1 UID OF CURRENT 1

+ I ITEM BEING ~UMPED

+

+---------------+---------------+ CONTINUED ON NEXT PAGE 1

• dismounted_time

• salvage_node

• salvage_t~

• salvage_mode, • sy:s_shut_state

• dwnp _start_time

File System 2-18 APOLLO CONROENTIAL INTERNAL USE ONlY.

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+EO 1:It MINS FROM UTe! NAME OF • _ • +---------------+---------------+ . time zone name

+E4 ... TIMEZONE I LAST •. _ .last_valid=time +-------------------------------+

+E8 I .•• VALID TIME I UNUSED +---------------+----------,-----+

+EC BAD SPOT BARRIER* . bad_spot _barrier +-------------------------------+

+FO I BAD SPOT LIST [60] I .bad_spot_list [60] +-------------------------------+

+-------------------------------+ +3FC I BAD SPOT LIST [255] +400 +-------------------------------+

salvage_mode: currently unused; always = 1

sys_shut_state: lv_dismounted = 0 lv_mounted = 1 lv_salvaged = 2

bad_spot_list allocated from end of list.

1< FFFFFFFF -> no badspot list overflow FFFFFFFE -> +FO is DADDR of overflow block

The LV label is the first block of a logical volume. The alternate LV label is a copy of the LV label and lives at or near the end of the logical vol tune.

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 2-19 File System

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VOLUME LABEL -- PHYSICAL

31 16 15 +---------------+---------------+

+00 I VERSION I "A" "P" I • version, +---------------+---------------+ • apollo

I "0" "L" "L" "0" I +-------------------------------+

+08 • name VOLUME NAME

+-------------------------------+

+28 UNIQUE ID • id OF VOLUME

+---------------+---------------+

+30 I UNUSED I DISK TYPE + .dtype +---------------+---------------+

+34 I TOTAL BLOCKS IN VOLUME I. blocks ""per ""pvol +---------------+---------------+

+38 IBLKS PER TRACK ITRACKS PER CYL I .blocksyer_track +---------------+---------------+ . tracks yer _ cyl

+3C I DADDR OF LOGICAL VOLUME [1) I • lv_list [1] +-------------------------------+

I I / /

+-------------------------------+

+60 DADDR OF LOGICAL VOLUME (10) I • lv_list [10] +-------------------------------+

+64 I ALTERNATE LABEL DADDR [1] I .alt_lv_list [1] +-------------------------------+

+~ I I / / I I +-------------------------------+

+88 I ALTERNATE LABEL DADDR [10] I .alt_lv_list [10] +-------------------------------+

+8C I START OF BADSPOT CYLINDER I .phys_badspot_daddr +-------------------------------+

+90 I START OF DIAGNOSTIC CYL .phys_diag_daddr +--------------+----------------+

+94 I SECTOR START I SECTOR SIZE I .phys_sector_start, +--------------+----------------+ . size

+98 I PRE-COMP CYL I • pre_camp +9A +--------------+

The DISK TYPE field describes variants of the physical disk, e.g., double density. Today there are none and the field contains O.

The PV label is the first block (cylinder 0, track 0, block 0) of a physical volume.

File System 2-20 APOLW CONFIDENTIAL INTERNAL USE ONLY.

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VTOC BLQCK

(type "vtoc_blk_t" in vol.ins.pas)

31 +--------------------------------+

+00 --> NEXT BLOCK IN HASH BUCKET I • next_add +--------------------------------+

+04 I VTOC ENTRY[O] I .vtoc[O] +--------------------------------+

+DO VTOC ENTRY[l] +--------------------------------+

+19C VTOC ENTRY [2] +--------------------------------+

+268 VTOC ENTRY[3J +--------------------------------+

+334 VTOC ENTRY[4] .vtoc[4] +400 +--------------------------------+

+--------------------------------+

+00 FILE MAP[O] .fm[O] +--------------------------------+

+80 FILE MAP [1] +--------------------------------+

+100 I FILE MAP [2] I +--------------------------------+

+180 FILE MAP [3J +--------------------------------+

+200 FILE MAP [4] +--------------------------------+

+280 I FILE MAP [5] I

+--------------------------------+

+300 FILE MAP [6] +--------------------------------+

+380 FILE MAP [255] .fm[255] +400 +--------------------------------+

When the VTOC block contains a file map, the block is

pointed to by vtoce.fm2[1-3] (see VTOC ENTRY).

APOllD CONFIDENTIAl. INTERNAL USE ONLY. 2-21 File System

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¥TOG ENTRY

(types "vtoce_hdr_t" and "vtoce" in vol.ins.pas)

31 24 23 16 15 +--------+--------+-----------------+

+00 j VERSION j SYS _TYPE j UCCPIFLB---------j ,version, +--------+--------+-----------------+ . sys_ type

+04 I OBJECT . uid I UID +-----------------------------------+

+12 I UID OF TYPE DEFINITION OBJECT ,type_uid I FOR THIS OBJECT +-----------------------------------+

+20 I UID OF ACL OBJECT • acl_ uid I FOR THIS OBJECT +-----------------------------------+

+28 I CURRENT LENGTH (BYTES) I • cur_len +-----------------------------------+

+32 I BLOCKS USED FOR FILE I .blocks_used

+-----------------------------------+ +36 I DATE-TIME LAST USED .dtu

+-----------------------------------+ +40 DATE-TIME LAST MODIFIED ,dtm

+-----------------------------------+ +44 I urD OF DIRECTORY I .dir_uid

1 WHERE OBJECT IS CATALOGUED I +-----------------+-----------------+

+52 I EXTRA DTM BITS I i OF REFS TO OBJ I .extdtm, +-----------------+-----------------+ . ref _cnt

+56 I FILE LOCK KEY • lock_key +-----------------------------------+

+60 I PAD3 I .pad3 +64 +-----------------------------------+

File System

U - VTOC entry in use (. inuse) CC - Concurrency control (.con_ctrl):

00 - None 01 - Shared 10 - Exclusive

- Permanent (.permanent) - Immutable (. immutable)

F - File needs salvaging (.trouble) L - Local access only (.local_ace_only) B - (.pad1) (0 •• 511)

2-22 APOUD CONRDENTIAL INTERNAL USE ONLY.

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¥TOG HEApER

(type "vtoc_hdr_tn in vol.ins.pas)

31 16 15 +----------------+----------------+

+4C I VERSION NUMBER 1# BLKS FOR HASH I • version, +----------------+----------------+ . vtoc _size

+50 I NUMBER VTOC BLOCKS USED .vtcc_blocks +---------------------------------+

+54 I VTOCX OF NETWORK ROOT I. net _ x +---------------------------------+

+58 I VTOCX OF ROOT DIR OF THIS VOLUME I . root_x +---------------------------------+

+5C I VTOCX OF PAGING FILE FOR AEGIS I .Os_x +-----------------":"'---------------+

+60 I VTOCX OF BOOT FILE I . boot_x +---------------------------------+

+64 . map VTOC MAP

(8 VTOC MAP ENTRIES)

+---------------------------------+ +94 .pad

UNUSED

+BO +---------------------------------+

The VTOC header lives in the logical volume label. Offsets given are from the start of the label.

YTae MAP ENTRY

(type "vtoc_mape" in vol.ins.pas)

15 +---------... ------+

+00 1# CONSEC. BLOCKS I .It_b1k +----------------+

+02 I DISK ADDRESS I .blk_add

+ + I OF FIRST EXTENT I

+06 +----------------+

Each VTOC map entry describes one set of contiguous VTOC blocks ("extent"). VTOC extents are preallocated by INVOL to be near the middle of the logical volume and to avoid badspots.

APOLlD CONRDEN1lAL. INTERNAl USE ONLY. 2-23 File System

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VIae INDEX

(type "vtocx_t" in base.ins.pas)

31 4 3 0 +----------------------------+----+ IODADDR OF VTOC BLK OF OBJECT I INDX I (local object)

+----------------------------+----+

19 +------------+--------------------+ IlTTTTTNNNNNN I NODE IO (remote object)

+------------+--------------------+

+----------------------------+----+ I 0 I VOLX I (local, but DADDR

+----------------------------+----+ is unknown)

INDX - Index of VTOC entry in VTOC block (0-4)

or File Map index (0-7)

TTTTT - Touch ahead count NNNNNN - Network ID (netx_t)

VOLX - Logical volume number

File System 2-24 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

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CHAPTER 3

PROGRAMMING INFORMATION

ADDRESSING MODES

ADDRESSING MODE~·

Effective Address

Addressing Categories Assembler

Modes Mod. Register Ox" Memory Control Alterable Syntax

0, 000 registernl,lmber X X On An 001 registernl,lmber X An

An" 010 registernl,lmber X X (An)

An@+ 011 registernl,lmber X X X IAn)+ A",,- 100 registernl,lmber X X -(An)

An@(dJ 101 register number X X diAn}

An@(d,ixJ 110 registernl,lmber X X X diAn, Ril xxx.W 111 000 X X X xxx.l 111 001 X X X

PC@(d} 111 010 X X X PC relative PC@I(d,ix) 111 011 X X PC rei. +Ri

111 100 X X #"". -Reprinted from MCsaOOO, pag8 B-1.

APOLLO CONFIDENTIAL INTERNAL USE ONLY. 3-1 Programming Information

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ADDRESS SPACE

Physical Address Space

n~n-DNx60

(except DN3000,DN5xx-T) DNx60 o +----------------+ 0

I TRAP PAGE I 400 +----------------+ 400

I PROM I

4000 +----------------+ 8000 Ilo

OBJECTS

20000 +----------------+ 20000 I DISPLAY BITMAP I

40000 +----------------+ 400000 j DISPLAY2 BITMAP I

80000 +----------------+ I OPT. 112MB MEM I

100000 +----------------+ 200000 I PROM DATA AREA I

100400 +----------------+ 200800

I MAIN I

I I

MEMORY I I

400000 + .. ---------------+ 1000000

Refer to Chapter 12, DN3000 for information about address space for the DN3000.

Programming Information 3-2 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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Virtual memory

Reverse Mapped Mach. DNx60

+----------------+ TRAP PAGE

400 +----------------+ 400

I PROM I 8000 +----------------+ 8000

/ USER PROCESS / I PRIVATE DATA I

940000 +----------------+ E780000 I GUARD SEGMENT

I 948000 +----------------+ E788000

I USER STACK I I I

988000 +----------------+ E7C8000 I GUARD SEGMENT

990000 +----------------+ E7DOOOO

I PM STATIC DATA I I I

PRIVATE (USER MODE)

9COOOO +----------------+ E800000<---- GLOBAL A BOUNDARY

I GLOBAL LIBRARIES I I I

BCOOOO +----------------+ FOOOOOO <---- PRIVATE (SUPER-

PER PROCESS VISOR MODE) I SUPERVISOR SPACE I

COOOOO +----------------+ UNUSED

DOOOOO +----------------+ I unwired stacks J

etc EOOOOO +----------------+ F800000

AEGIS

FAOOOO +----------------+ FFAOOOO

I DISPLAY BITMAPS I FEOOOO +----------------+ FFEOOOO

I/O CONTROL

I PAGES & I/O MAP I

<---- GLOBAL B BOUNDARY

1000000 +----------------+ 10000000

Refer to the appropriate node chapter for information about virtual address space for forward mapping

machines.

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 3-3 Programming Information

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CALLING SEQUENCE - PIC

~:

PEA ARGn

PEA ARGI MOVE. L ECBADR, AO

JSR (AO)

ADD.W #"4*n,SP

PUSH ADDRESS OF LAST ARG

PUSH ADDRESS OF FIRST ARG GET ADDRESS OF ENTRY POINT

JUMP AND PUSH PC POP ARG PTRS OFF STACK

Impure $ubrout ine Entrypoint (PIC only) :

LEA

JMP.L

static_data,aO

subroutine _entry

Subroutine entry:

LINK SB, #:autosize LOAD MY STACK SASE & DEFINE AUTOMATIC STORAGE

MOVEM.L reg_save_rnask,- (SP) SAVE CA,LLER'S REGs

MOVE.L AO,DB LOAD MY DATA BASE MOVE. L 8 (SS) ,WORK GET ADDR FIRST ARG

Subroutine return:

MOVEM.L -autosize (SS) ,reg_save_mask RESTORE CALLER'S REGs UNLK SB RELOAD CALLER'S SB

RTS RETURN TO CALLER

See also STACK FRAME, ECB.

Note: Registers other than DO, 01, AO, Al are preserved.

Programming Information 3-4 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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CONDITION CQDES*

Operations

ABCD

ADD. ADDI. ADDQ

ADDX

AND, ANDI, EOR, EORI, MOVEO. MOVE, OR,ORI. CLR, EXT, NOT, TAS, TST

CHK

SUB, SUB I SUBO

SUBX

CMP,CMPI. CMPM

DlVS. DrVU

MULS, MULU

SBCD, NBCD

NEG

NEGX

BTST, BCHG, BSET. BCLR

ASl

ASl (r - 0)

LSL, ROXl

lSR (r"'O)

ROXl (r= 0)

ROl

ROL (r= 0)

ASR, LSR, ROXR

ASR, LSR (r = m RDXR (r= 0)

ROR

RDR (r '" 0)

Special Definition

C = Decimal Carry Z"'Z·Rm· ... ·Rij

V-Sm' Om' Rm+Sm' Om' Rm C=Sm' Dm+Rm' Dm+Sm' Am V=Sm' Om' Rm+Sm' Om' Rm C=Sm' Dm+Rm' Dm+Sm' Am Z=Z·Rm· ... ·RQ

V=Sm' Om' Rm+Sm' Om' Rm C"'Sm' om+ Rm' om+Sm' Rm

V-Sm' Om' Rm+Sm' Om' Rm C=Sm·Dm+Rm·Diii+Sm· Rm Z=Z·RiTi· ... ·RQ

V=Sm' Om' Rm+Sm' Om' Rm C '" Sm' om + Rm' om + Sm' Rm

v = Division Overflow

C = Decimal Borrow Z=Z·Rm· ... ·R{f

V=Dm'Rm,C"'Dm+Rm

V = Om' Rm. C = Om + Rm Z=Z·Rm· ... ·RQ

Z -On

V = Om' (Dm~1 + ... + Dm_r~ + om· (D m _1 + .. + Dm- r )

C = Dm-r+1

C = Dm- r+1

C-x C Dm- r+1

C - 0r_1

C=X

C = Dr-1

Sm - So"rceope,andmo't'ignifi~.ntbit

Om - De,tmation operand mo,t ? Other - see Speci.1 Definition N '" Rm signific.nt bit

Z = Ron· . RO Rm _ Re,ult bit most signif,cant bit

·Reprintedfrom~,p.geA·4.

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 3-5 Programming Information

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CONpITIONAL TESTS*'

Mnemonic Condition Encoding Test

T true 0000 1

F false 0001 0

HI high 0010 C'Z

LS low or same 0011 C+Z

CC carry clear 0100 C

CS carry set 0101 C

NE not equal 0110 Z

EO equal 0111 Z

VC overflow clear 1000 V

VS overflow set 1001 V

PL plus 1010 N

MI minus 1011 N

GE greater or equal 1100 N'V+N'V

LT less than 1101 N'V+N'V

GT greater than 1110 N'V'Z+N'V'Z

LE less or equal 1111 Z+N'V+N'V

"Raprin\'lld from~, pagl! A·4.

Programming Information 3-6 APOLlD CONFIDENTIAL INTERNAL USE ONLY.

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FTT,ENAME SUFFIXES

SUFFIX MEANING RECOGNIZED BY

.ASM Assembler source Asaembler (input)

.BAK Backup file Display manager (output)

.BIN Binary file Compilers (output)

.BND Binder

.BS Boot Shell. command Boot Shell

.c C aource CC (input) • DATA Data file .FTN FORTRAN source FTN (input) .HLP Help text HELP command (input) . INS Insert file .LST Listing file Compilers (output) • MAP Map file Binder (output) . PAS Pascal source PAS (input) .RFe Run file converter RFC command (output) ,

/sysboot (input) D3M SUFFIX MEANING

.DDL Schema, subschema, aggregate schema DDL

.FMT Output from the RDL

.LST ASCII listing of the schema, subschema, aggregate schema compiler

.RPT Output from the D3M/FORMATTER • CMD Executable D3M/DATAVIEW commands .RDL Source for report writer • UWA.xxx UWA definition generated by SSCH

DOMAIN/IX SUFFIX MEANING

C compiler .0 Binary fil.e from compiler · h C insert file

SCRIBE SUFFIX MEANING

.MSS Manuscript · OTC Outline · LPT Linep;-inter · AUX AuxilIary .ERR Error liating

WPS SUFFIX MEANING

.doc Document (file) · fdr Folder (directory) .drw Drawer (directory) · cab Cabinet (directory) · imp Impress document (file) · clp Clipboard (directory)

Theae conventions are not requirement a; you can give a

APOLl.O CONFIDENTIAL INTERNAL USE O~LY. 3-7 Programming Information

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file any name you like, within the syntax rules. The operating system. does not check a file's contents against its name. However, some programs assume that the names of input files end with a particular suffix.

PATHNAME SYNTAX

Symbol Starting Point

/ / /

or none 'node_data

Network root directory Node entry directory Naming directory Parent directory Working directory /sys/node_data [.nn]

Legal characters in names:

A-Z

0-9 $ (dollar sign)

(underscore) (period)

Valid pathnames:

/PASCAL \MISC/SAU SOURCE / /OS/INS/STREAMS. INS .FTN -com -link_name

Programming Information 3-8 APOLlO CONFIDENTIAL INTERNAL USE ONLY.

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STACK FRAME

no floating point registers +------------------+

SP---> Save registers 1

+------------------+ I I I AUTOMATIC I 1 STOBAGE 1

I I +------------------+

SB --> +00 1 CALLER'S SB 1 --------+ +------------------+ 1

+04 I opt FeW1 PTR I -----------------+ +--- . .. ------+ I I

+04*m I opt FCWm PTR Mil I +------------------+ v

+04+04*m I PC FOR RETURN 1

+------------------+ Frame control

word ptr + 1 +08+04*m I --> ARG1

+------------------+ +Oc+04*m I --> ARG2 1

+------------------+

I / I

+------------------+ +4+4 *n+4 *m 1 --> ARGn 1

+------------------+

I I I I

v PREVIOUS

STACK FRAME

FCW PTR - nil NOP FCW PTR - addr+l of FCW

Non-nil FeWs are distinguished from ret urn PCs by the fact that they are odd-addresses.

+------------------+ FCW I type mask 1

+------------------+ +04 1 offset from SB 1------> pointer to register

+------------------+

type = 0 = unknown 1 ,.. 68881 floating point regiaters 2 .. DNx60 (tern) floating point registera

mask = bit mask uaed in: movem.l f2-f7,-(sp)

inatruction

+-------------------------------+ I fpO I fpII fp21 fp31 fp41 fpSI fp61 fp71 +-------------------------------+

~LLD CONFIDENTIAL. INTERNAL use ONLY. 3-9 Programming Information

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STATUS WORP

(type "status_t" i.n base.ins.pas)

31 24 23 16 15 +--------+--------+----------------+ I FSSSSSSS I AMMMMMMMI CCCCCCCCCCCCCCCC I +--------+--------+----------------+

F = 1 -> module couldn't handle error (fail bit) s .. S - Subsystem identification A = 1 => asynchronous fault; only set during delivery

of fault (.async) M .. M - Module identification C .. C - Module-specific error code

See Chapter 4, Error Codes and Messages.

Programming Information 3-10 APOLW CONFIDENTIAL INTERNAL USE ONLY.

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CHAPTER 4

ERROR CODES AND MESSAGES

AEGIS ERROR CODES

31 24 23 16 15 +--------+--------+----------------+ I FSSSSSSS I AMMMMMMM I CCCCCCCCCCCCCCCC I +--------+--------+----------------+

"" 1 => module couldn't handle error S .. S - Subsystem identification A = 1 => asynchronous fault; only set during delivery

of fault M .. M - Module identification C .. C - Module-specific error code:

= OK status negative = warning positive = error

(type "status_$t" in base.ins.pas)

00000000 status_$ok

OS / BAT maJ?ager: (00010001) attempt to free already-freed block (00010002) disk is full (00010003) attempt to free illegal disk address (00010004) BAT not mounted (00010005) disk needs salvaging

OS / VTOC manage r : VTOC not mounted VTOC is bad no file map no UID not found UID not found duplicate UID uid mismatch

(00020001) (00020002)

(00020003) (00020004) (00020005) (00020006) (00020007) (00020008) (00020009) only local- access allowed

OS / AST manager: (00030001) attempted reference to out-of-bounds addre5s

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 4-1 Error Codes and Messages

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(00030003) (00030004) (00030005) (00030006) (00030007) (00030008) (00030009) (0003000A)

(00040001) (00040002) (00040003) (00040004) (00040005) (00040006) (00040007) (00040008) (00040009) (0004000A) (0004000B) (0004000C) (0004000D) (0004000E) (0004000F) (00040010) (00040011)

(00050001) (00050002) (00050003) (00050004) (00050005) (00050006) (00050007) (00050008) (00050009) (0005000A) (0005000B) (0005000C) (0005000D) (0005000E) (00050010) (00050011)

(00060004) (00060005) (00060006) (00060008) (00060009) (0006000A) (0006000B) (0006000C) (0006000D)

no replaceable aste's segment is not deactivatable write concurrency violation incompatible request reference count says unused segment not found in bat segment thread error in bat only local access allowed

os / MST manager: object not found invalid length no space available reference to illegal address reference to out.-af-bounds address no asid is available object is not mapped no rights insufficient rights guard fault wrong type - can't map system. objects ppn list overflow uid mismatch virtual memory resources exhausted invalid va for install of io page invalid segment count asid 0 is illegal for this mapping

os I PMAP manager: not allocated already allocated mismatch bad wire bad unwire bad aaaoc pages wired page null bad disk address read concurrency violation changed pmods invalid pmape attempt to map i/o page over real page bst threads yielded invalid va illegal pid argwnent from dxm. callback illegal wsl index

os / MMAP manager: bad avail bad free bad unavail inconsistent mmape illegal wsl index illegal pid ws lists exhsusted bad install bad' reclaim

Error Codes and Messages 4-2 APOUO CONFIDENTIAL INTERNAL USE ONLY.

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(0006000E) contiguous pages unavailable

(00070001) (00070002) (00070003) (00070004) (00070005) (00070006) (00070007) (00070008) (00070009) (0007000A)

(00080001) (00080002) (00080003) (00080004) (00080005) (00080006) (00080007) (00080008) (00080009) (0008000A) (0008000B) (0008000C) (0008000D) (0008000E) (0008000F) (00080010) (00080011) (00080012) (00080013) (00080014) (00080015) (00080016) (00080017) (00080018) (00080019) (0008001A) (0008001B)

(0008001C) (0008001D) (000800lE) (0008001F) (00080020) (00080021) (00080022) (00080023) (00080024) (00080025) (00080026) (00080027) (00080028)

os I MHO manager: mmu miss va not in valid mmu manager range va does not have osymap ptt parity error pft parity error mmu timeout unknown mmu status mmu parity error data cache parity error unexpected virtual timeout

os I diak manager: disk not ready disk controller busy disk controller time-out disk controller error disk equipment check floppy is not 2-aided disk write protected bad diak format diak data check DMA overrun volume in uae volume table full volume not properly mounted or asaigned operation requires a physical volume invalid volume index logical volume not found disk b~ock header error invalid disk address disk buffer is not page aligned invalid logical volume index or list disk seek error drive timed out before operation completed bua error occurred during diak DMA transfer invalid unit number unknown status returned by hardware invalid physical volume label floppy door haa been opened or storage module has been stopped read after write failed dIna not at end of range diak already mounted software detected checksum error checksum error in read after write too many wired pages -- storage module manager disk driver logic error unknown error status from drive unrecognized drive id memory parity error during disk write unrecognized interrupt from disktape controller ecc error in sector id field disk subsystem detected a DC powerfail

APOLLD CONFIDENTIAL INTERNAL USE ONLY. 4-3 Error Codes and Messages

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(00090001)

(000A0001) (000A0002) (000A0003) (000A0004) (000A0005) (000A0006) (000A0007) (000A0008) (000A0009) (OOOAOOOA) (OOOAOOOB)

(000B0001) (000B0002) (000B0003) (000B0004) (000B0005) (000B0006)

(000B0007) (000B0008) (000B0009) (OaOBODOA)

(OOOBOOOB) (OOOBOOOC) (OOOBOOOO) (OOOBOOOE) (OOOBOOOF)

(000C0001) (000C0002)

(00000001) (00000002) (00000003) (00000004) (00000005) (OOOD0006)

(000D0007) (00000008) (00000009) (OOOOOOOA)

os I event count manager: bad wait list on event count

os / level 1 process manager: illegal process id illegal lock process not suspended process already suspended process not bound process already bound bad atomic operation no pcb is available no stack apace is available process not suspendable ready list is out of order

os / terminal manager: buffer too small end of file entereq. from keyboard invalid output length invalid option passed to term_Scontrol input buffer overrun - characters lost asynchronous fault occurred while waiting for input invalid line number supplied manual. stop: type G<ret>G *+2<ret> to continue character framing error character parity error data carrier detect (dcd) changed clear to send (cts) changed requested line or operation not implemented hangup fault speed incompatible with partner SIO line

os I OBUF manager: bad ptr bad free

os I time manager: no timer queue entry entry to be cancelled not found quit while waiting for event bad timer interrupt bad timer key alarm fault real interval timer fault virtual interval timer fault queue element not in use queue element not found

os I naming server: (OOOE0002) directory is full (OOOE0003) name already exists (OOOE0004) invalid pathname (OOOEOOOS) invalid link

Error Codes and Messages 4-4 APOUO CONFIDENTIAL INTERNAL USE ONLY.

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(OOOEOD06) not a link (DDOE0007) name not found (OOOEOOOA) invalid link operation (OOOEOOOB) invalid leaf (OOOEOOOC) node is unavailable (OOOEOOOD) bad directory (OOOEOOOE) branch is not a directory (OOOEOOOF) directory is not empty (OOOEOOlO) name is not a file (OOOEOO!!) illegal directory operation (OOOEOOl2) bad type (OOOEOOl3) no rights (OOOEOOl4) insufficient rights (OOOEOOl5) unable to delete system bootstrap (sysboot) (OOOEOOl6) directory is in use (locked) (OOOEOOl7) name server helpers clocks are skewed (OOOEOOl8) illegal request made of name server helper (OOOEOOl9) cannot find entry in replicated root (OOOEOOlA) last entry in replicated root returned (OOOEOOlB) name server helper is shutdown (OOOEOOIC) name server helper sent packet with errors (OOOEOOID) clocks skewed (OOOEOOIE) cant find name server helper (OOOEOOlF) directory must be root (OOOE0020) directory not found in pathname (OOOE0021) too many components in pathname (000E0022) cache entry is stale (OOOE0023) cache entry was stale and was updated (000E0024) name server helper is uninitialized

os / file server: (OOOFOOOI) object not found (OOOF0002) object is remote (OOOF0003) bad reply received from remote node (OOOF0004) communications problem with remote node (OOOF0005) object is not locked by this process (OOOF0006) object is in use (OOOF0007) illegal lock request (OOOF0008) lock violation detected (OOOF0009) local lock table is full (OOOFOOOA) remote lock table is full (OOOFOOOB) operation cannot be done from here (OOOFOOOC) no more lock table entries (OOOFOOOD) volume uid is unavailable (OOOFOOOE) locking files is blocked for this volume (OOOFOOOF) locking is already blocked for this volume (OOOFOOlO) no rights (OOOFOOl1) insufficient rights (OOOFOOI2) wrong type - can't operate on system objects (OOOFOOI3) objects are on different volumes

os I I/O manager: (00100001) dcte not found (00100002) controller not in system

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 4-5 Error Codes and Messages

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(00110001) (00110002) (00110003) (00110004) (00110005) (00110006) (00110007) (00110008) (00110009) (0011000A) (0011000B) (0011000C) (00110000) (0011000E) (0011000F) (00110010) (00110011) (00110012) (00110013) (00110014) (00110015) (00110016) (00110017) (00110018) (00110019) (0011001A) (0011001B) (0011001C) (00110010) (0011001E)

(0011001F)

(00120001) (00120002) (00120003) (00120004) (00120005) (00120006) (00120007) (00120008) (00120009) (0012000A) (0012000B) (0012000C) (00120000) (0012000E) (0012000F) (00120010) (00120011) (00120012) (00120013) (00120014) (00120015)

os / network: buffer error out of pages out of blocks transmit failed no available socket buffer queue is empty remote node failed to respond to request unable to route network hardware error mag header too big unexpected reply type no more free sockets unknown request type request denied by local node request denied by remote node bad checksum too many transmit retries socket not open receive bus error transmit bus error bad asknode version number memory parity error during transmit unknown network too many networks in internet conflict with another node listing quit fault during node listing waited too long for more nodes to respond data length too large operation not defined on network hardware header length + data length exceeds max msg size no nodeid prom on this system

os / fault handler: odd address error illegal instruction integer divide by zero CHK instruction trapped - value out of range? arithmetic overflow privileged instruction violation invalid SVC code invalid SVC procedure name undefined TRAP instruction unimplemented instruction protection boundary violation bus time-out invalid user stack pointer correctable memory error detected uncorrectable memory error detected process quit access violation CPU B enabled with MMU valid bit reset null process running on CPU B OS-internal quit (with display return) single step completed

Error Codes and Messages 4-6 APOLLO CONADENTIAL INTERNAL USE ONlY.

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(00120016) invalid. user-generated fault (subsystem code" 0)

(00120017) fault in user-space interrupt handler for pbu device

(00120018) (00120019) (0012001A) (0012001B) (0012001C) (00120010) (0012001E) (0012001F) (00120020) (00120021) (00120022)

(00120023) (00120024) (00120025) (00120026) (00120027) (00120028) (00120029) (0012002A) (0012002B) (0012002C)

(00120020) (0012002E)

(0012002F) (00120030) (00120031)

(00120032) (00120033) (00120034)

(00120035) (00120036) (00120037) (00120038) (00120039) (0012003A)

(00130001) (00130002) (00130003) (00130004) (00130005) (00130006) (00130007) (00130008) (00130009) (0013000A)

process stop process BLAST PEB cache parity error PEB WCS parity error unimplemented SVC invalid stack format memory parity error process interrupt supervisor fault while resource lock (s) set spurious parity error floating point inexact result (loss of significance) floating point divide by zero floating point underflow floating point operand error floating point overflow process suspend fault process suspend from keyboard process suspend due to background read process suspend due to background write process continue fault fault (s) lost; process suspended or pfm $enable/pfm $inhibit mismatch? cop;oceBsor protocol violation floating point branch/set on unordered condition floating point signalling not-a-nwnber invalid thread during parity error check illegal page fault in user gpio interrupt routine bus error while running on cpu B spurious interrupt unexpected bus error during system initialization cleanup handler set cleanup handler released out of order ac power failure fpx parity error unknown fpa vector exception VME bus error on bus error

os / diBplay driver: invalid display unit number specified font not loaded internal font table full invalid use of display driver procedure font too large error unloading internal (hdmt) table invalid direction from SM unexpected BLT in use internal protocol violation too many pages to be wired

APOUD CONRDENTIAL INTERNAL USE ONLY, 4-7 Error Codes and Messages

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(0013000B) (0013000C) (0013000D) (0013000E) (0013000F) (00130010) (00130011) (00130012) (00130013) (00130014) (00130015) (00130016) (00130017) (00130018) (00130019) (0013001A) (0013001B) (0013001C) (00130010) (0013001E)

(0013001F) (00130020) (00130021) (00130022) (00130023) (00130024) (00130025) (00130026) (00130027) (00130028)

(00130029) (0013002A) (0013002B) (0013002C) (00130020)

(0013002E) (0013002F) (00130030) (00130031)

unsupported font version invalid buffer size error mapping display memory error borrowing display from screen manager unable to borrow - display in use display borrow request denied by 5creen manager error returning display to screen manager can't return - display not borrowed can't borrow both displays simultaneously display already borrowed by this process invalid position argument invalid window limits argument invalid length argument invalid direction argument invalid scroll displacement argument invalid bIt mode register invalid bIt control register invalid bIt-done interrupt invalid interrupt routine state invalid screen coordinates in bIt request font associated with specified id not mapped display memory is already mapped display memory is not mapped quit while waiting invalid cursor number hidden display memory is full quit while waiting invalid event count key operation not implemented on color display non-conforming and main memory blts not implemented invalid DM window id acquire denied because window is obscured no more direct mode window lD's available process not found pad/stream operations not allowed while display acquired display already acquired display acquire timed out bad tracking rectangle tracking list full

os / volume manager: (0014FFFF) Warning: disk is write protected (00140001) entry directory problems on logical volume (00140002) unable to dismount the boot volume (00140003) logical volume is not mounted (00140004) entry directory is not on specified logical

volume (00140005) physical volume replaced since mount

os / calendar manager: (00150001) invalid syntax for date or time specification (00150002) date or time specification invalid (00150003) an empty string was passed to a decode routine (00150004) timezone specified is unknown

Error Codes and Messages 4-8 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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(00150005) invalid time-zone difference

os / cross-process debug manager: (00160001) locate target spans multiple objects (00160002) locate target spans discontiguous segments (00160003) invalid state argument (00160005) not a debugger (00160006) debugger not found (00160007) debugger table full (00160008) requested state inapplicable to machine type (00160009) already a debugger (0016000A) target process not found (0016000E) no event posted for target - not suspended (0016000C) invalid ec key (00160000) locate target has variable mrnu access (0016000E) state unavailable for this event (0016000F) invalid control/inquire option

os / deferred execution module manager: (00170001) no more deferred execution queue slots (00170002) datum too large for deferred execution (00170003) wired dxm helper not currently supported

os / level 2 event count manager: (00180001) internal table exhausted (00180002) internal error (00180003) asynChronous fault occurred while waiting (00180004) bad event count (00180005) unable to allocate level 1 event count (00180006) level 1 event count not allocated

os / level 2 process manager: (00190001) process not found (00190002) not a level two process (00190003) pad stack base (00190004) request is for current process (00190005) suspend request timed out (00190006) process not suspended (00190007) process already suspended (00190008) child process terminated (00190009) another fault is pending for this process (0019000A) invalid process name (0019000E) bad event count key (D019000C) attempt to complete vfork on non-vforked

process

os / import/export manager: (D01AD001) entry directory is not cataloged in the

namespace (001AD002) files are locked on this volume (OOlA0003) specified entry directory not on this volume (OOlA0004) volume is not mounted

os / startup/shutdown: (OOlB0001) node ID mismatch (OOlB0002) checksumming already enabled

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 4-9 Error Codes and Messages

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(00180003) no as paging file -- please run invol option a (001B0004) no calendar on system -- please boot over

network

os / vfmt: (OOlCOOOl) unterminated control string (OOlCa002) invalid control string (aOlCa003) too few arguments supplied for read/decode (001Ca004) field width missing on n (" designator (001C0005) encountered end of string where more text

expected (OOlC0006) encountered null token where numeric token

expected (OOlCa007) non-numeric character found where numeric

expected (OOlCOOOa) sign encountered in unsigned field (001C0009) value out of range in text string (OOlCOOOA) character in text string does not match control

string (OOlCOOOB) terminator in text string does not match

specified terminator

os / circular buffer manager: (00100001) invalid block size requested (00100002) quit while waiting (00100003) buffer wrap-around error

(OOlEOOOl) (001E0002) (001E0003) (001E0004) (001E0005) (001E0006) (001E0007) (001E0008) (001E0009) (OOlEOOOA) (OOlEOOOE) (OOlEOOOC) (OOlEOOOD) (OOlEOOOE) (OOlEOOOF) (OOlEOOlO) (OOlEOOll) (OOlE0012) (001E0013) (001E0014) (00U0015) (001E0016) (OOlE0017) (001E0018) (001E0019) (OOlEOOlA) (001E001E) (001E001C)

os / pbu manager: ddf is larger than one page ddf has wrong version invalid unit number in ddf invalid csr page address in ddf csr page is in use initialization routine not in library cleanup routine not in library interrupt library too large interrupt routine not in library pbu not present too many pbu manager pages wired invalid unit number unit in use unit not acquired unit already acquired bad parameter no room in iomap requested iomap in use iomap already allocated iomap not allocated invalid iova buffer too large buffer page not wired buffer not mapped page already wired page wired too many times page not wired reference to csr page caused bus timeout

Error Codes and Messages 4-10 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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(001E001D) (00lE001E) (OOlE001F) (001E0020) (00lE0021) (001E0022) (001E0023) (001E0024) (001E0025) (001E0026) (001E0027) (001E0028) (00lE0029) (OOlE002A) (001E002B) (001E002C) (001E002D) (001E002E) (001E002F) (001E0030) (001E0031) (001E0032) (001E0033) (001E0034) (001E0035) (001E0036) (001E0037) (001E0038) (001E0039) (001E003A) (001E003B) (001E003C) (001E003D)

(001<0001) (001F0002) (001F0003) (001F0004) (001F0005) (001F0006) (001F0007) (001<0008) (001F0009)

trap 6 executed outside of interrupt routine invalid trap 6 code invalid uap at trap 6 protection violation unexpected interrupt from pbu device ddf has wrong file type too many wired pages car not in device's car page controller already mapped bad controller memory length bad buffer address interrupt library not found device library not found device is not a shared controller device not mapped pbu device got bus timeout on multibus all pbu units in use wrong version of /lib/pbulib in use interrupt level in use operation valid only for VME device physical address list too 5mall function not supported for this device type illegal dma channel number bad dma direction specified requested dma channel in use requested dma channel not in use dma channel not at end of range no more eventcounts available eventcount not allocated to this unit unit already in use as a global device u~it is publicly owned buffer pages not physically contiguous contiguous buffer not page aligned

os / line printer module: pna board not installed in system invalid string length invalid string termination line printer not acquired line printer already acquired internal error ppn list overflow - internal error line printer not assigned no line printer on system

os / os info supplier: (00200001) array too small for complete table

(00210001) (00210002) (00210003) (00210004) (00210005) (00210006) (00210007)

os / badspot manager: bad checksum in physical badspot block bad count in physical badspot block missing minus-one in physical badspot block badspot list too small no physical badspot blocks read or written physical badspot list partially read or written duplicate entry in badspot list

APOLLO CONFIDENTIAL INTERNAL USE ONLY. 4-11 Error Codes and Messages

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(00210008) (00210009) (0021000A) (0021000B)

(0022FFFE) (0022FFFF) (00220001) (00220002) (00220003) (00220004) (00220005) (00220006) (00220007) (00220008) (00220009) (0022000A) (0022000B) (0022000C) (0022000D) (0022000E) (0022000F) (00220010) (00220011) (00220012) (00220013) (00220014) (00220015) (00220016) (00220017) (00220018) (00220019) (0022001A) (0022001B) (0022001C) (0022001D) (0022001E) (0022001F) (00220020) (00220021) (00220022)

(00230001) (00230002) (00230003) (00230004)

(00230005) (00230006) (00230007) (00230008) (00230009) (0023000A) (0023000B)

no physical badspot information on disk bad daddr for Iv label badspot extension block too many extensions to Iv badspot list badspot extension uid <> logical volume uid

os I magtape manager: warning: tape not at load-point warning: tape unit is offline invalid mt unit number invalid mode field invalid buffer length invalid parameter no PNA board installed in system magtape unit. is not connected magtape not acquired magtape unit is not ready unit will not fit thru 25" hatch magtape unit in use magtape not initialized magtape already acquired invalid option too many outstanding operations invalid buffer address invalid count for erase or space operation tape drive is hung ppn list overflow - internal error config page in use - internal error release problems - internal error unexpected interrupt operation attempted before waiting wait attempted before go issued go command issued while not in batch mode header or buffer misalignment on chained r/w user quit while in mt_$wait timeout during wait or release header buffer not on header page no room from mt_$write - internal info array (passed to mt_$wait) too small too many pages wired too many pbu devices in use buffer already wired buffer not wired

os / ACL manager: no right to perform operation insufficient rights to perfonn operation exit_super called more often than enter_super wrong type - operation illegal on system objects entry already exists ACL is remote ACL is on different volume than object ACL protects wrong type of object insufficient address space to open ACL Unused ACL status code no entry - entry number too large

Error Code::! and Messages 4-12 APOUO C;ONFIDENTIAL INTERNAL USE ONLY,

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(0023000C) (0023000D) (0023000E) (0023000F) (00230010)

(00230011)

(00230012)

(00230013)

(00240001) (00240002) (00240003) (00240004) (00240005) (00240006) (00240007) (00240008) (00240009)

(00250001)

(00260001) (00260002) (00260003) (00260004)

(00260005) (00260006) (00260007)

image buffer too small ·or incorrect size ACL object not found ACL would be unchangeable object may not be readable by backup procedure no right to set subsystem data or subsystem manager project 1i.at i5 full - no more entries may be added pro ject list is too big - it cannot be added to object ACL is full - no more entries may be added

as / PEB manager: fpu is hung PEB interrupt floating point overflow floating point underflow divide by zero floating point 109S of aignificance floating point hardware error attempted use of unimplemented opcode wcs verify fai1ed

os / network logging manager: ppn list overflow

os / color display manager: illegal caller too many wired pages virtual address not page aligned in color $map pages unmapped out of order -parameter value out of range color display not available instruction queue done wait timed ·out

os / VIne bus manager: (00270001) undefined vme interrupt (00270002) vme bus error

(0028FFFA) (0028FFFB) (0028FFFC) (0028FFFD) (0028FFFE) (0028FFFF) (00280001) (00280002) (00280003) (00280004) (00280005) (00280006) (00280007) (00280008) (00280009) (0028000A)

os / cartridge tape manager: warning: tape in write mode warning: tape in read mode warning: tape not at load-point tape at l.oad point warning: tape unit is offline tape power on/reset inval.id ct unit number unit not acquired unit already acquired unit i.n use no tape controller on system invalid buffer length bad buffer alignment invalid buffer address unrecognized action type invaJ.id ope~ation count

APOLLO CONFIDENTIAL INTERNAL USE ONLY. 4-13 Error Codes and Messages

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(0028000B) (0028000C) (0028000D) (0028000E) (0028000F) (00280010) (00280011) (00280012) (00280013) (00280014) (00280015) (00280016) (00280017) (00280018) (00280019) (0028001A) (0028001B) (0028001C) (0028001D) (0028001E) (0028001F) (00280020) (00280021) (00280022) (00280023) (00280024) (00280025) (00280026)

(00290001) (00290002) (00290003) (00290004) (00290005) (00290006) (00290007) (00290008) (00290009) (0029000A)

(002A0001) (002A0002)

(002B0001) (002B0002) (002B0003) (002B0004) (002B0005) (002B0006) (002B0007) (002B0008) (002B0009) (002BOOOA)

unit not ready unexpected ct interrupt quit waiting for i/o timeout waiting for i/o too many wired pages no cartridge in dri.ve drive does not exist tape is write protected end of tape read/write abort read block error read filler error read no data read no data and end of tape read no data and load point filemark detected illegal drive command marginal block detected unrecognized drive status dma not at end of range dma underrun/overrun memory parity error during dIna illegal controller cormnand controller timeout controller diagnostic failed unrecognized controller status operation already in progress operation not in progress

os / mag manager: socket out of range to deep socket error no more sockets no owner too much data socket e;Pty Bocket in use time out quit fault

os I symbolic link manager: fil.e not symbolic link type bad symbolic link file

os I internet routing: network port not open buffer queue for user port is full unknown network port can not create/delete that port type max number of ports already open routing service type not recognized port belongs to another process routing through-traffic queue overflow operation not legal on this port type unknown network device type

Error Codes and Messages 4-14 APOUD CONFIDENTIAL INTERNAL USE ONLY.

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(002BOOOB) (002BOOOC) (002BOOOO) (002BOOOE) (002BOOOF) (002B0010) (002B0011)

(002C0001) (002C0002) (002C0003) (002COOO') (002C0005) (002C0006) (002C0007)

(002C0008) (002C0009) (002COOOA) (002COOOB) (002COOOC) (002COOOO) (002COOOE) (002COOOF)

(00200001) (00200002) (00200003) (0020000') (00200005) (002D0006) (00200007) (00200008) (00200009) (0020000A) (002DOOOB)

(002DOOOC) (00200000) (002DOOOE) (002DOOOF) (002D0010)

(002E0001) (002E0002) (002E0003)

(002EOOO') (002E0005)

(002F0001) (002F0002) (002FD003) (002'0004) (002'0005)

no more buffer queue3 for user networks user network checksum failed bad packet length from user network unable to create through-traffic queue max number of USER porta already open bad request type asking for service change routing not allowed at port with 0 network ID

os / internet interface controller: rIC; dma got multibua read timeout error IIC: not initialized prior to operation IIC: trasnsmitter under run error IIC: undocumented interrupt raised IIC: hardware reset operation timed out rrc: self test failure reported by board init device already acquired device not acquired operation aborted device not in system remote device not acquired could get expected packet from receive socket could not allocate receive socket for device never got expected command completion interrupt wrong board revision level

os / graphics proce550r manager: device not present in system device not available package not initialized package already initialized device not ready for PIO device timeout wait terminated by process fault error condition reported by GPU page fault interrupt illegal values for physical page use limits Programmed I/O command error DMA command execution error buffer already wired buffer too large no GPU microcode loaded error reported by draw processor

os / DMA manager: illegal channel illegal byte count channel in use channel not allocated for operation operation did not finish

os / Ethernet: internal driver error feature is not implemented driver version mismatch device is off-line device is already on-line

APOLlD CONADENTIAL INTERNAL USE ONlY. 4-15 Error Codes and Messages

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(002F0006) (002F0007) (002FOQ08) (002F0009) (002FOOOA) (002FOOO") (002FOOOC) (002FOOOD) (002FOOOE) (002FOOOF)

adapter hardware error transmit operation failed invalid unit number illegal packet length invalid statistics block packet type is already in use no channels are available no packet available for receive invalid packet type channel is not open

os / audit trail manager: (00300001) could not create Event Server Process

Error Codes and Messages 4-16 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

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BOOT ERRORS /PROM)

error: boot not found - The SYSBOOT read from records 2 thru B did not have a good boot header.

disk init error <SC> <ReD> <UNIT> <W/F /S/C> disk read error <SC> <RCD> <UNIT> <W/F /S/C>

SC "" Status Code RCD = Record Address Unit "" Disk Unit No. W/F/S/C = Winchester/Floppy/SMD/Cartridge Tape

Winchester Status Codes:

1 - not responding - not ready

11 - seek not complete 12 - CRC, timeout, buserr,

overrun 13 - drive faults

Disk/Tape Status Codes:

Floppy Status Codes:

1 - wrong no. of status bytes - seek not complete - equipment check

11 - insufficient rights 12 - seek not complete 13 - equipment check 14 - bad seek 15 - insufficient status 16 - abnormal termination 17 -18 - device not ready 19 - CRC error

11 - controller diagnostic failed 12 - contrlloer timed out

21 - seek did not complete

13 - illegal controller command 15 - memory parity during dma 16 - dma overrun/underrun 17 - dma not at end of range IE - disk still busy IF - controller still busy

30 - illegal tape command 31 - filemark encountered 32 - read error -. no data and BOM 33 - read error - no data and BOM 34 - read error - no data

22 23 24 25 26 27 28 29

35 - read error - filler block transfer 36 - read error - bad block transferred 37 - read or write abort 38 - end of media 39 - drive not present 3A - no cartridge in drive

FF - timeout wating for controller done

--------

write fault unit not present sector not found no index pulse drive not ready no track 0 on restore address mark not found ECC error in sector ID field

APOLLD CONFIDENTIAL. INTERNAL USE ONLY. 4-17 Error Codes and Messages

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BOOT PROM DIAGNOSTIC ERROR COPES (EXCEPT 020 MACHINES)

error: <test no.><detected at><object addr><data is><data sb>

Steady State

A B

C

o E F

first instruction at "init R

memory passed tests at init state saved parity cleared in first 2 pages sio's have been initialized clr disp called, returned disp_init called, returned display init got bus error we're in service mode character received from keyboard character received from line 1 character received from line 2 just printed MO's banner mag ptt enabled (map routine) mmu initialized (map routine) mmu enabled (map routine)

Digit 1 Digit a ------ PROM Wait Conditions

2 booting: waiting for disk 1/0 to complete 3 booting: waiting for network transmit to complete

booting: waiting for partner to respond booting: waiting for network receive to complete

C waiting for command input (service mode only) 1 ------ DIAGNOSTIC 1: validate PROM Checksum

1 PROM checksum did not match calculated checksum 2 ------ DIAGNOSTIC 2: Test PFT

1 verify failed with data = 0000 ... (first time) verify failed with data = FFFF .•. verify failed with data = AAAA ... verify failed with data"" 0000... (second time) verify failed for address uniqueness

------ DIAGNOSTIC 3: Test PTT 1 verify failed with data"'" ooao... (first time)

verify failed with data"" FFFF .. . verify failed with data"'" AAAA .. . verify failed with data - 0000 ... (second time) verify failed for address uniqueness

4 ------ DIAGNOSTIC 4: Test IOMAP 1 verify fai1ed with data = 0000... (first time)

verify fai1ed with data = FFFF ... verify failed with data - AAAA ..• verify failed with data - 5555 .. . verify fai1ed with data'" 0000 ... (second time) verify fai1ed for address uniqueness

5 ------ DIAGNOSTIC 5: Test PFT, PTT IOMAP Interaction 1 writing PFT affected PTT (should be 0' 5 and wasn't) 2 writing IOMAP affected PTT (should be D'a and wasn't) 3 writing PFT affected PTT (should be l's and wasn't)

Error Codes and Messages 4-18 APOUD CONFIDENTIAL INTERNAL USE ONLY.

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writing IOMAP affected PTT (should be l's and wasn't)

6 ------ DIAGNOSTIC 6: Test Physical/Virtual Memory verify failed during byte test with 0' s verify failed during word test with 1'.3 verify failed during long word test with 5' s verify failed during long word test with A's

5 verify failed during long word test with addresses 7 ------ DIAGNOSTIC 7: Test Virtual Memory

verify failed during long word test with addresses ------ DIAGNOSTIC 8: Retest Memory in Physical Mode

1 verify failed during long word test with addresses 9 ------ DIAGNOSTIC 9: Timers, MULTIBUS, Calendar

1 timer 1 failed 2 timer 2 failed

timer 3 failed MULTIBUS map test failed pattern test calendar hardware clock not incrementing seconds DMA continuity test for channel 0 failed DMA continuity test for channel 1 failed DMA continuity test for channel 2 failed DMA continuity test for channel 3 failed

A DMA test with all channels activated failed

4 ------MULTI BUS loopback test failed MULTIBUS timeout test failed

9 ------ DIAGNOSTIC 10: Test Ring Board B ring board loopback test failed

4 ------ DIAGNOSTIC 11: Test VME Interface \!ME register test failed

A open VMEbus test failed bus arbiter logic test failed

C \!ME-BPORT logic test failed A ------ DISK ERROR

1 not responding 2 not ready B seek not complete C CRC, timeout, bus error, overrun D drive fault

B NETWORK ERROR C SYSBOOT ERRORS

bad corrunand line (cmd not found, missing filename) unable to read physical volume label volume "n" not found unable to read logical volume label salvaging boot volume auto salvage failed unable to read root directory SAUn not found in root directory SAUn uid not found

A unable to restore SAUn directory B <program> not found C <program> uid not found D <program> unreadable E <program> nat a file F <program> has wrong machine type

D ------ NETBOOT ERRORS

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 4-19 Error Cades and Messages

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bad command line (cmd not found, missing filename) ring initialization failed unable to send load request no response to load request unexpected packet (get_reply) <program> not found bad pathname insufficient rights <program> has wrong machine type

A (other) non-zero status from netman B unable to send uid request C no response to uid request

E ------ RESERVED F ------ AEGIS CRASH

aegis crash normal shutdown complete

BOOT PROM DIAGNOSTIC ERROR CODES (PN330)

Upper Lower LEDs LEDs Test Type - Board - Test

Core - CPU - TUrn off LEDs Core - CPU - Checksum PROM Core - CPU - Critical Memory Core - CPU - Bus Error Core - CPU - Enable Instruction Cache Console Integrity - CPU - SBUS Loopback Console Integrity - CPU - Keyboard Load Path - CPU - parity Memory Load Path - CPU - DMA Non-critical HW - CPU - Timers

A Non-critical HW - CPU - MMU B Non-critical HW - CPU - Coprocessor C Non-critical HW - CPU - Speaker

Console Integrity - Display - Existence Console Integrity - Display - Fill mode Console Integrity - Display - Display memory Load Path - Mem Ext - Parity Memory Load Path - Win Disk - Existence Load Path - Win Disk - Initialize Load Path - Win Disk - Read block 0 Non-critical HW - Win Disk - Calendar Load Path - Ring - Single node transmit Software detected error

Arrow Unexpected exception

Error Codes and Messages 4-20 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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BOOT PROM DIAGNOSTIC ERROR CODES lDSr90)

Upper Lower LEDs LEDs Test Type - Board - Test

Core - CPU - TUrn off LEDs Core - CPU - Checksum PROM Core - CPU - Critical Memory Core - CPU - Bus Error Core - CPU - Enable Instruction Cache Console Integrity - CPU - SBUS Loopback Load Path - CPU - Parity Memory Load Path - CPU - DMA Non-critical HW - CPU - Timers Non-critical HW - CPU - MMt1

A Non-critical Hii' - CPU - Coprocessor B Non-critical HW - CPU - Speaker o Load Path - Mem Ext - Parity Memory o Load Path - CPU Ext - MULTI BUS

Non-critical HN - CPU Ext - Ca1endar Load Path - SM!) - Existence Load Path - SM!) - Initialize Load Path - SM!) - Read block 0 Load Path - FSD - Existence Load Path - FSD - Controller diagnostics Load Path - Ring - Single node transmit Software detected error

Arrow Unexpected exception

BOOT PROM DIAGNOSTIC ERROR CODES (DNSxx-T)

Lower Middle LEDs LEOs Test Type - Board - Test

Core - CPU - Turn off LEDs Core - CPU - Checkstnn PROM Core - CPU - Data Cache Data Core - CPU - Data Cache Address Core - CPU - Data Cache Byte Steering Core - CE'U - Stack Ini:tia1ization ~ore - CPU - Greeting on SIO Cons01e Integrity - CPU - Registers Console Integrity - CPU - VME bus Console Integrity - CPU - Bus Arbiter Logic

A Console Integrity - CPU - Bus Interrupt B Console Integrity - CPU - Bus Error o Non-critical HW - CPU - Timers

Non-critical HW - CPU - Calendar Non-critical HW - CPU - SIOus arbiter logic Non-critical HW - CPU - MMU/Data cache

APOLLO CONFIDENTIAL INTERNAL USE ONLY. 4-21 Error Codes and Messages

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Non-critical HW - CPU - Coprocessor (68881) Non-critical HW - CPU - Beep Console Integrity - Display - Existence Console Integrity - Display - Display Self Test Console Integrity - Display - Clear Display Console Integrity - Display - Display memory Console Integrity - Display - Load Font Console Integrity - Memory - Memory Existence Console Integrity - Memory - Memory Data Console Integrity - memory - Memory Address Load Path - Mass Stor - Existence Load Path - Mass Star - Self Test Load Path - Mass Stor - Extended Self Tests Load Path - MULTIBUS - Existence Load Path - MULTIBUS - Registers Load Path - MULTIBUS - I/O map Load Path - MULTI BUS - Loopback Load Path - 8M[) - Existence Load Path - SMD - Initialize

2. Load Path - 8MD - Read block 0 o Load Path - F8D - Existence

Load path - FSD - Controller diagnostics Console Integrity - Ring - Ring Test Load Path - Ring - Single node transmit Non-critical HW - FPX - Existence Non-critical HW - FPX - Interface

A Non-critical HW - GPU - Existence Non-critical HW - GPU - Reset Non-critical HW - GPU - Self Test Console Integrity - Keyboard - Model II Existence

BOOT PROM DIAGNOSTIC ERROR COPES lDNS60/S7Q/580)

Upper Lower LEDs LEDs Test Type - Board - Test

A

Core - CPU - Turn off LEDs Core - CPU - Checksum PROM Core - CPU - Critical Memory Core - CPU - Bus Error Core - CPU - Enable Instruction Cache Console Integrity - CPU - SBUS Loopback Console Integrity - CPU - Keyboard Load Path - CPU - Parity Memory Non-critical HW -Non-critical HW -Non-critical HW -Non-critical HW -Console Integrity Console Integrity Console Integrity Console Integrity Console Integrity Console Integrity Console Integrity

CPU - Timers CPU - MMU CPU - Coprocessor CPU - Speaker - VME - Registers - VME - Open VME bus - VME - Bus arbiter logic - VME - VME to B-port logic - Display - Existence - Display - Load microcode - Display - Run microcode

Error Codes and Messages 4-22 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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Console Integrity - Display - Display memory Console Integrity - Display - Clear the screen Console Integrity - Display - Load the fonts Load Path - Mem Exp - parity Memory Load path - Win Disk - Disk Controller diagnostic Non-critical HW - Win Disk - Calendar Load Path - MULTI BUS - Existence Load Path - MULTIBUS· - Registers Load Path - MULTI BUS - I/O map Load Path - MULTIBUS - Loopback Load Path - SMD - Existence Load Path - SMD - Initialize Load Path - SMD - Read block Load Path - FSD - Existence Load path - FSD - Controller diagnostics Load Path - Ring - Single node transmit Software detected error

Arrow Unexpected exception

BOOT PROM DIAGNOSTIC ERROR COPES lDN300Q)

Ext. Int. LEDs LEDs Test

Turn off LEDs Checksum PROM Refresh circuitry Bus Error Enable Instruction Cache Keyboard SIO parity circuitry MMU

Interrupt Timers

A DMA pare register DMA controller 1

DMA controller 2 D Calendar and configuration o Critical memory (Megabyte 1)

Display controller existence 8255A test Pixel test Horizontal sync counter Vertical :sync counter Frame buffer Video output Red, blue high level output Green output

A LUT red, blue high level output B BLT~

CROP logic F A/D converter error a Keyboard self-test

Keyboard speaker

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Megabyte 2 Megabyte 3 Megabyte 4 Disk existence Disk controller self-test Read disk block 0 Digital loopback ring controller Analog loopback ring controller

MNEMONIC DEBUGGER ERROR CODES (PROM)

Printed on system crash or other entry to MD. See also System Crash Analysis under Operational Procedures. For DNx60 CPIO, mnemomic debugger codes are printed just like non-DNx60, except the qualifier n (CPIO)" is also printed. For DNx60 CPU, the qualifier " (CPU)" is also printed to identify the environments.

A <PC> <SR> <IR> <FA> <FC> - Address Error <PC> <Contents>

B <PC> <SR> <IR> <FA> <FC> - Bus Error <PC> <Contents>

C <PC> <SR> <PC> <Contents> - Floating-Point Coprocessor Error

F <PC> <SR> <PC> <Contents>

I <PC> <SR> <PC> <Contents>

J o <PC> <Sa> <FW> <FA>

<PC> <Contents>

<PC> <SR> <PC> <Contents>

T <PC> <SR> <PC> <contents>

U <PC> <SR> <PC> <Contents>

V <PC> <SR> <FW> <FA> <PC> <Contents>

W <PC> <SR> <FW> <FA> <PC> <Contents>

X <PC> <SR> <FW> <FA> <PC> <Contents>

Y <PC> <SR> <FW> <FA> <PC> <Contents>

Z <PC> <SR> <PC> <Content s>

- Operational Error - Invalid stack format

- Unexpected Interrupt

- Spurious Interrupt - floating point trap

(DNx60 CPU) - Parity error (DN300 only) - Trap instruction or

breakpoint - Trace trap

- Unimp inst trap

- access violation (DNx60 CPU)

- region fault (DNx60 CPU)

- segment fault (DNx60 CPU)

- page fault (DNx60 CPU)

- Divide by zero trap

PC = Program Counter SR = Status Register IR = Instruction Register FA = Fault Address FC = Fault Code FW = Format Word identifies the trap vector

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System User +--------+--------+

SR: I T-S--III I---XNZVC I +--------+--------+

T - Trace Mode X - Extend S - Supervisor Mode N - Negative III - Interrupt Mask - Zero

000 - enabled - Overflow III - disabled C - Carry

15 +----------------+

Fe: I-----------RNFFF I

SYSBOQT ERROR CODES

+----------------+ R = 1 => Read operation

N = 1 ""'> Not instruction reference FFF - Function code:

001 User data 010 User program 101 Supervisor data 110 Supervisor program 111 Interrupt acknowledge

boot error: unable to read pv _label volume nN n not found unable to read lv_label

root_dir SAU not found in root _ dir

APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

SAD uid not found unable to restore SAU_dir nFILENAME n not found

uid not found unreadable

not a file missing file name

4-25 Error Codes and Messages

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CHAPTER 5

SYSTEM DEBUGGING

BOOT SHELL COMMANDS

CF [<pathname> I -E]

CHN <pathname> <compname> eRD <pathname> CRF <pathname> CRL <pathname> <linkname> CTNODE <leaf> <node _ id> CTOB <pathname> <uidhi> <uidlo> DEBUG <value> DLF <pathname> DLL <linkname>

run/end corrunand file change name create directory create file add link add node to local copy of root catalog name with specified uid enable/disable debug mode delete file drop linkname

DM invoke the dispaly manager DMTVOL {N I S I F} <lvno> [<pathname>] dismount a logical volume GLOB list installed globals GO load as if in normal mode H prints this text IN <pathname> [-D] [-S I -NS] invoke loader to install named

file LD [<pathnarne>] [-A [-D] J [-U] list directory LI <address> set display lites address LO <pathname> [-Dj [-S I -NS] invoke loader with given file MA <pathname> [<1> <sz>] [-E] map file MTVOL {W I S I F} <lvno> [<pathname>] mount a logical volume ND

REL

SH

SHUT SPM

<pathname> [-A]

STCODE <stat us-code>

TB

TI TR

{-ON I -OFF}

<pathname> <sz>

UCTNODE <leaf> UCTOB <pathname>

UMA {<pathname> I <1> <sz>} WD <pathname>

Key: low address size

set naming directory release proc-mgr assigned storage load single process shell shutdown system load DSP80 server process manager print textual definition of status code stack trace back enable/disable timer truncate raw data file to given size (hex) drop node from local copy of root un-catalog pathname from namespace unmap file by name or addr/ size set working directory

<1> <sz> <type> nil, rec, hdru, obj, dev, pad, undef, uasc,

mt, boot }

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NOTE: Basic J:>.ID commands such as access location and dump memory are also available in the Boot Shell environment.

DEBUG COMMAND EXTENSIONS

The fOllowing commands and other items are available in the standard DEBUG, but are not advertised to the public.

Apollo DEBUG Commands

a FPREGS -- Display the floating-point registers.

a REGS -- Display the registers of the target program.

o DB -- Invoke the machine-level debugger DB (see below) .

Opt ions t a DEBUG Commands

a -CDB -- This option is useful to debug C code in the C library. It prevents DEBUG from running to the "main" program when DEBUG is invoked.

a -ODD -- This option is useful only when debugging DEBUG from another DEBUG. It must be given to the target DEBUG only. When it is given, the target DEBUG will return from the fault handler with the "continue fault handling" state, so that the master DEBUG can catch breakpoints and -signal

steps.

Miscellaneolls

More help is available on DEBUG commands in this file:

Ilus/latest/sysx/help/debug. hlp

Here is some useful information which IS PUBLIC, which

people often forget how to do.

There are three debugger names that DEBUG looks for. If it finds them, it does some special things:

'cr (macro name; made with MACRO command) 'max_array_dim (debugger variable; made with SET command) 'max_var_len (debugger variable; made with SET command)

Note that "help examine" explains the 'max_,.. names, and "help macro" explains the 'cr name.

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DB (MACHINE LEVEL DEBUGGER)

You enter the DB debugger by entering the DB command from within a shell. The formats of the internal DB commands follow.

dl ef fpl .51 .d} 1< >l

fpc [<value>]

fps [<value>]

help

invoke emt enter fim show any or all floating point registers (O-f)

set/show the floating point control register set/ show the floating point status register

in <path> install library 10 <path> load program

<path> [<start>] [-ex] [-r] [-nl] map a file (starting

pc fa

fc

sh

location) display current pc display last fault address display last fault code invoke new shell single step

tb traceback current stack

crash analysis commands:

a7 <value> set a7 in dump (dflt is from 100000) a{blwI1} [e] <sym> access via symbol name am <path> load Aegis Map as [<asid>] set/display current asid aote <addr> I <aotex> print contents of aote aste <addr> I <astex> print contents of aste eaot check aot/ast for consistency of links elf [<addr>] cherchez la (fault) frame (starts w/ (A7)

da [<clockh>] dcte [<index>] df «addr>]

dml dp [<pid>] dpt

dr

ds dSfiX

dsys dv <addr> dvt

dwin ept ff <addr> fnf [<addr>]

APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

if no addr) display date (build_$time) display dcte (all if no index) display diagnostic fault frame at addr (search) dump memory log display pcb (first ten if no pid entered) disable ptt (remove from address space) display registers at crash display disk statistics dump Xylogics queued i/o data structures info unique to current node type convert db address to virtual address print disk voltune table dump WIN_l queued i/o data structures enable ptt (map into address space) print fault frame at addr try to find stack frame in

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addr - addr+1024 gd <unit> get (pbu) dcte ha <hi> <10> <addr> hash uid to ast le list system error log Ivl <addr> print Iv label at addr m [10 I 20J enter mapped mode (select 010/020) rom <addr> I <ppn> print mmap entry

print mem_rec rns <args> mapped search (just like rnd's 'a') rost [<asid>I <msteaddr>] print mst for an asid (0 for gbl, omit

mate <addr>

rostp [<asid>] p pd <addr> pf <ppn> I <addr> ph <addr> pt <pttx> pv <addr> pvl <addr>

rars [<asid>] regs rl [anything] skd [<socket >] sks [<socket >1 .t tp

for curr) print mste for a virtual address in current asid print used mst entries for asid enter physical (normal) mode convert physical address to db addresa display pft entry display network packet header display ptt entry convert ppn to virtual address print pv label at addr enter real mode display rars <current asid> print locations for all A registers display ready list (just check order] dump socket (all) display socket status (al1.) display status at crash display trap page

ts <pid or addr> traceback stack uid <hi> <1.0> I <addr> interpret uid vb <addr> print vtoc b1.ock at <addr> vd <addr> ve <addr>

vm.e [<addr>] vp <addr>

convert virtual address to db address print vtoce at <addr> verify mmu disp1.ay saved vme bus error info convert virtual address to ppn

vr <rfc yathname> verify rfc file against dump vv <addr> <data> verify vmtest page wh[i] [pldle1 <sym or addr> look up [init] [procI datalecb]

".1 wt

address in aegis map display state of working set lists display last wait start times

Exit the DB debugger by entering the q command in response to the ! prompt as follows:

! q

For a description of crash analysis, refer to los/doc/db _crash_analysis.

DB also supports all commands from the MD.

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I.j ght $ Program

Execute the lights program to show network status from within the DB debugger as follows:

!LI OFF9C12 (in DN400/420) {virtual address of receive register} !LI OFF9C02 (in DN300/320)

!LI OFFF9C12 (in DN460)

Do not execute the lights program from a color node (unless it is a DN3000)! It will crash the node!

The transmit and receive status registers are displayed at the bottom of the screen. These register are described in chapters 7, 8, and 9. To use the lights program do the following:

o Exit from DB with the q command.

o Execute NETSTAT shell commands to send tokens the network.

o Study the status bits in the receive status register.

To exit from the lights program execute the following commands:

DB {to re-enter DB environment} ! LI 0 {Provide address of zero to Lights program} ! q {exit from DB environment} <ctrl> F {remove Lights from bottom of screen}

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MNEMONIC DEBUGGER (PROM)

Commands:

+ = not in DNx60 - - DNx60 only '* = DN3000 only fI: = DNx60 and DN3000 only

+ A <location>

• AR - AS

B <location> + C <start> <end> <target> + CA <start> # CB <location> + D <start> <end> <items/line> + DI <type><unit> <log vol> + DL - DR

• DU EX <filename> EY <filename>

+ F <start> <end> <word>

• FO + G <location>

H # Ie

+ LD + LO <filename> + M + P # PV + RE - RR

+ S <start> <end> <value> <mask> + SH <0-3>

SK

SS + TE + V <start> <end> <target> # VP # XD

# XE

Commands valid in DNx60 CPU only:

Access location Access Control Register Display current ASID Breakpoint Copy Memory CALL Subroutine Clear breakpoints Dump Memory Define Disk Down-line Loader Dump registers Dump system Load and Execute File Load and Execute File with trap after load

Fill Memory Force load Jump to LOCd tion Help Enable/disable/show Instruction cache Lists SAUn Directories Load File Map Address Space Unmap Address Space PA-to-VA Reset System Access region registers Search Memory Spindown Winchester Select keyboard Single step Run boot PROM diagnostics Verify Memory VA-to-PA XOl{/XOFF disable XON/XOFF enable

DC Enable/disable/show data cache GB

FP

System Debugging

Go Back to CPIQ environment, halt CPU Access Floating Point Registers

5-6 APOLLO CONFIDENTIAL INTERNAL use ONLY.

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Corrgnand3 valid in PNx6Q ePIC only:

Those marked with an asterisk require the micro exec to be loaded and/or running.

UC

*US *UT

UH

UR UX

*UU

*UI UP

UA

UL

UF

*MG

*MR

*MS *MT

MJ(

GF

FR

*LP MM

SM OM MO

OS

Clock step CPU Micro step <cnt <uaddr» Micro trace <cnt <uaddr» Halt the CPU and CPIO becomes master Run micro code <from uaddr> Reset micro machine Micro trap to the micro executive IPL micro machine at uaddr 0 Display or set micro pc Load microcode file set Load one microcode file by name Set or clear microcode loaded flag Start the CPU <at macro addr> and CPIO

becomes slave Start the CPU <at macro addr> and CPIO

dies Macro step the CPU <cnt <addr» Macro trace the CPU <cnt <addr» Load and execute program using CPIO Go Forward to CPU with reset

exception, halt CPIO Fill wes with freeze micro instructions Set loop mode for uexee commands Set CPIO in master mode Set CPIO in slave mode Set CPIO in dead mode Display CPIO master/slave mode Dump CPU state

A [<Size_spec>] <location> [<base_spec>]

Accesses <location> and prints address and contents according to <size_spec> and <base_spec>.

Access certain system control registers.

ctl_reg: TC = MMU translation control RP = MMU root pointer PFC = CPU f'estination function code SFC = CPU Source function code CACR = CPU Cache control CAAR = CPU Cache address

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B [<location>]

Sets/clears the breakpoint at the location specified. Breakpoint is not inserted until G command. Previous instruction is reinstalled on breakpoint entry or vector entry. For older (reverse-mapped) systems, only one breakpoint may be set at a time, and it must be cleared or moved before continuing after breaking.

C <start> <end> <target>

Copies memory defined by the bounds <start> to <end> onto memory starting at <target> through <target>+<end>-<start> .

CA <start>

Calls the subroutine which starts at <start>. All registers saved from the last entry except AD are restored immediately prior to the call.

CB [<location>]

Clears the breakpoint at <location>, or all the breakpoints set, it you omit the argument. An error message appears if you attempt to clear breakpoints that are not set.

o [<size_spec>] <start> <end>

<itemsyer _line> [ <base_spec>]

Dumps memory defined by the bounds <start> to <end> onto the terminal printing address followed by specified <itemsyer_line>. The default is one per line. The <size spec> controls the item-size to be dumped: byte, word, -long, in~truction.

DI <w>1<F>I<N> [<nn>} I<S> <0-3> <1-10>

Disk defines the boot device: Winchester, Floppy, Node (nn), Storage Module unit 0-3, and logical volume 1-10. Defaults are: W, 0, 1.

DL

Transfers control to the down-line loader.

DS

Dump the CPU state. Valid only from the CPIO environment. It is useful if micromachine freezes (UPCxxx) .

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DU

This conunand initiates the system dump procedure. Requires operating system to have been booted (to provide dump address and routine). Precede with the device specification (01 N <nodeid>, .01 F 01 C), default is 01 F. Will dump to multiple floppies.

EX <filename>

Execute restores the named file from the "SAU" directory of the boot device and transfers control to it. After the restore is complete, the LOW, HIGH, and START addresses are displayed.

EY <filename>

Just like EX except:

o Just before passing control to the program, the MD will trap, and you can patch the program. Type "G", "G *+2" to continue.

a If you are executing AEGIS, AEGIS will trap again after establishing the OS mapping and before calling OS_$INIT. AEGIS can then be patched or examined using the virtual addresses AEGIS . MAP in the appropriate SAU directory. Type nG R , nG *+2n to continue bringing up AEGIS.

NOTE: Older boot PROMs may not support the EY conunand.

F <start> <end> [<word>]

Fills memory defined by bounds <start> to <end> with a word value <word>.

FO

This conunand initiates a force load sequence.

G [<location>]

Jumps to <location> after inserting breakpoint (if any), restoring all registers and SR.

GB

Go back (return control) to the boot processor. This is valid only in the main processor envirorunent.

GF

GF start the main processor with a reset exception. You must have loaded microcode before you execute GF.

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H

Calls HELP files.

Ie <on> <off>

Enables or disables the instruction cache. LD

List directory displays the contents of the "SAU" directory of the boot device.

LO <filename>

Load restores the named file from the "SAU" directory of the boot device. The LOW, HIGH, and START addresses are displayed.

LP

LP sets the loop bit on any microexecutive command issued until the machine is reset. With the loop bit set, the commands operate in loop mode.

M

Maps address space and enables mmu. Memory i5 rearranged as shown under Address Space in Chapters 7 thorough 12.

MG [<adr>]

MG starts the main processor at the address you specify, or at the current main processor program counter (PC), if you do not give an argtunent. The boot processor goes into slave mode.

MR [<adr>]

Starts the main processor at the address you specify, at the current main processor program counter (PC), if you do not give an argument. The boot processor halts ..

MS [<Count> [<adr>]]

Macro steps once or for the number of counts, showing the program counter at the end of the steps. A macro step executes one instruction from memory, the main processor.

MT [<Count> [<adr>]]

Macro traces for the number of counts you specify, or until you hit a key. Prints the program counter at each step.

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MX <filename>

Loads and executes the program <filename> on the boot processor. <filename> is a program in the SAU4 directory on the volume defined as the disk device by the DI command.

Turns off the mapping. MHO is assumed at FFB400.

PV <PA> <addr>

Convert physical address to all virtual addresses by searching the page tables starting at current region registers or use region registers at ADDR. FA must be long-word aligned.

RE

Reset executes the RESET instruction. If entered while running on CPU B, a second RESET instruction is executed for CPU A. The debugger will initialize and wait for terminal input. This command also enables the POWER-OFF key.

RR <region register number (0-31, decimal, O-IF Hex>

Accesses the region register you specify in the argument, and displays its contents.

[<size_spec>] [<mask>] [ <base _spec> 1

<start> <end> <value>

Searches memory defined by bounds <start> to <end> for <value> through optional <mask>. If <mask> is not specified it defaults to $FFFFFFFF. The <size_spec> controls the item-size to be searched: byte, word or long.

SH <0-3>

Shuts down the Winchester unit and acknowledges outstanding interrupts. This command also enables the POWER-OFF key.

SK

Forces the MD to enter its keyboard polling loop without requiring a REset.

TE

Forces execution of boot PROM diagnostics.

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UA

Loads the microcode loading program (ULOAD) and the entire set of microcode files needed to boot the operating system.

UC [<count>]

Executes a clock cycle, or the number of cycles you specify in the <count> field, on the main processor. The boot processor enters slave mode.

UF [-OFF)

UF sets or clears the "microcode loaded" flag in the PROM. When the flag is set, the PROM does not load microcode when enabling the main procesBor. UH

Halts (disables) the main processor and puts the boot processor into master mode. The boot processor now has bus mastership and control of the system.

UI

Resets the main processor and runs it from microlocation zero. This command starts the micro executive (if it is loaded) .

UL <filename> -N

Reads one microcode data file from the SAU4 directory and the micro-loading program (ULOAD) from the boot device, and loads the micrcode. By default, if the microcode file is a NeS file, UL fills the NCS with freezes. Use the -N option when you are loading two NCS files separately.

UP <uadr>

Displays or sets the microcode program counter. If the main processor is running, you cannot read or set the microcode program counter.

UR [<uadr>]

Runs the microcode on the main processor, starting at the micro address you specify. The boot processor enters slave mode. If you do not specify an address, UR uses the current microcode program counter.

us [<Count> [<uadr>] 1

Micro steps once or for the number of counts you give, showing the micro program counter at the end of the steps. If you specify <uadr>, the program starts at the micro address you specify.

System Debugging 5-12 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

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UT [<Count> «uadr>]]

Micro traces for the number of counts you specify or until you hit a key. The micro program counter is displayed at each step. If you specify a micro address, the trace starts at the micro address you specify.

uu

Causes a micro trap in the main processor, and displays the microcode program counter. You can use this command to stop the main processor.

ux

Resets the main processor and aets the micro program counter to O.

v [ <size_spec>] <start> <end> <target> [ <base_spec> ]

Verifiea equality of two memory areas defined by <start> to <end> and <target> to <target>+<end>-<start>. If a discrepancy ia found, the address in the first area and the contents of each are printed in the appropriate format.

VP <VA> <addr>

Convert virtual address to phyaical address using current region registers at ADDR. VA must be long-word aligned.

lID

Disables the x-On protocol used for communication with dumb terminals.

XE

Enables the X-On protocol used for communication with dumb terminals.

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Command Formats:

<command> [<size_spec>j [<parameter_list>] [<base_spec>]

<command> ::- AIBICIDIDLIFIGISlvl<empty>

<size_spec> ::= :11 :BI :WI:L

<parameter_list> ::= <parameter> ... (up to four)

<parameter> :: = <num _ exp> I On I An I Rn I CCR I SR I (An) I <num exp> (An) I <num exp> «index spec>) I <num _ exp> (An, <index _ spe;» -

<ntnn _ exp> :: = <num> 1 1< 1 <num _ exp>+<num> I <num _ exp>-<num> I <num> _ exp>x<nwn>

<num> :: = <simple number 1 $<simple number> I <base>$<;imple _number> I-<num> 1 <quoted_string>

<base> :: "'" <simple_number>

<quoted_string> ::= '<letter> ... <letter>' (up to four]

<index_spec> ::= An.WIDn.WIAn.LIDn.L

<base_spec> ::= :01 :DI :HI:A

TO reference an address stored in a relocation register, prefix the register name with a zero.

~:

:I ::= instr-sized items, output in mnemonic format.

:B ::- byt.e-sized items, output in numeric format.

:W ::= word-sized items, output in numeric format.

:L ::= longword-sized items, output in numeric format.

Parameters are evaluated to a memory location or to an MD saved register, [e.g. On, An] or to a location computed from a saved register [num(An) 1. Up to four parameters may be required. Unspecified parameters are set to zero.

:0 ::= numbers and immediate constants printed in octal.

:D ::= numbers and immediate constants printed in dec.

:H ::= numbers and immediate constants printed in hex.

:A ::= numbers and immediate constants printed in ASCII.

All numeric input defaults to hexadecimal. $num implies hexadecimal. <base>$ntnn implies base is <base> [ 8$777 is

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octal, 2$1001 is binary J. <base_spec> and <size_spec> may be specified anywhere in the command line as well as anywhere in A command input (except in quoted strings). All addresses and offsets are printed in hexadecimal regardless of <base_spec>.

CRASH ANALYSIS

Most fatal errors recognized by AEGIS are reported by the crash system routine, which prints a status code (see Chapter 4, Error Codes and Messages), the address of the ECB for the failing routine, and the ID (PID) of the current process. AEGIS then executes a TRAP instruction, causing entry to the PROM mnemonic debugger with an "S" code (see MNEMONIC DEBUGGER ERROR CODES in Chapter 4). A dump can then be taken as described below.

If the system appears hung, or to stop the machine at any time for debugging, make sure the NORMAL/SERVICE switch is in the SERVICE position and type CTRL/<RETURN>, to pass control to the mnemonic debugger (MD). To continue, type:

> G > G *+2 Then CTRL/<F>.

If this fails, press the RESET switch. (You should first verify that the hang is not a temporary one caused by a network failure.)

Notes on DNx6Q Crash Status

DNx60's are microcoded machines. They may crash as described above with a CRASH SYSTEM message, ending up in MD but still running the micromachine (the CPU - MD prompt is '>') or they may occasionally freeze, (i.e. the micromachine halts), ending up in MD but running the CPIO processor (MD prompt is' %'). When a freeze occurs, the micro PC is printed by CPIO:

uPC: xxx

You may still take a dump from CPIO exactly as described above. A freeze is a. more radical failure than a normal crash and usually indicates a hardware f.ilure in the micromachine.

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 5-15 System Debugging

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SYSTEM DUMPS

AEGIS contains a memory dump routine that can be used to dump the state of physical memory and the MMU to a floppy diskette, a cartridge tape, or a file on another node. DB, which under stands the format of the dump, can then be used to analyze the cause of the crash. On completion, the dump routine executes a trap instruction and returns to the Mnemonic Debugger (MD).

To use this routine, follow these steps:

1. To dump to a diskette, insert a diskette into the floppy diskette drive of the Disk Storage Option. The diskette must already be formatted (with INVOL) for 1231 blocks, and must be write-enabled. (To write-enable the diskette, cover the write-enable hole with a gummed label.) (Note:

if dumping to a floppy, only the first 1Mb of memory is dumped. )

2. To dump to a cat ridge tape, insert a cartridge tape into the tape drive and ensure that the tape is not write-protected (arrow in the upper left should point away from nsafe n ) .

3. To dump to another node, make sure that the other node is running NETMAN and that its disk has enough space for the dump (30 blocks plus 1024 blocks for each megabyte of memory on the dumping node) .

4. Execute the following MD commands.

>RESET<RETURN> ><RETURN>

>DI F >DI C >DI N nn

FOR ALL NODES:

Reset the machine

To dump to a floppy To dump to a cartridge tape To dump to node nn

>G xOOCOO Start dump to floppy or tape >G xOOC04 Start the dump tn another node

where 1 for all nodes EXCEPT DNx60s or Dn5xx-Ts, 2 for DNx60s, 10 for DN5xx-Ts.

ALSO, FOR DN3000s and DN5xx-Ts:

>DU Start dump to floppy or tape

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5. When the dump routine is complete, it executes a TRAP $F instruction and returns to Me. You should then run SALVOL and reboot AEGIS.

6. To load the dump back onto a node in order to use DB, use the CPTAPE or CPFLP utility of the /SYSTEST/SSR_UTIL directory.

!SYSTEST!SSR .IlI.lL

The following commands are available for system debugging in /SYSTEST/SSR_UTIL.

o ALL_STCODE -- Displays a list of all the system status codes for this operating system revision.

a BCR -- BINARY_CROSS_REFERENCE produces a cross reference from a list of object modules, whose names are read from standard input. Only the global symbols referencable from outside the module are cross referenced.

Usage: BCR

o CMB -- Compare binary compares two binary files files output by-any Apollo compiler or assembler.

Usage: CMB source destination [-ERRLIM <n> J [-NODate1 [-List]

"Source" may be a wildcard. "Destination" is a derived name. Mul.tiple source/destination pairs may be specified. -ERRLIM may be specified to control how many differences per section displ.ayed; the default, is 1. -NODATE may be specified to ignore differences in the creation times. -List will list the names of the files being compared. Compare_binary uses the common command line handler; type HELP CL for info.

o CPFLP -- A program used to copy a to, the node's floppy disk drive. program, type: Usage: CPFLP [-READ file I -FMT [file]]

file from, or To use the

file I -WRIT~

o CPTAPE -- A program used to copy a file from, to, the node's cartridge tape drive. To use the program, type: usage: CPTAPE [-READ file I -WRITE file I -FMT [file]]

o DISK_ERR recorded disk

APOLLO CONFIDENTIAL INTERNAL USE ONLY.

Displays information about last

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o DMPF -- DUMP_FILE dumps a file of any type to STDOUT interpreted in hexadecimal and ASCII. If hex_start_offset is given, it specifies the byte of the file at which to start dumping. If hex_end_offset is given, it· specifies the byte of the file at which to stop dumping. The first byte of the file is at offset O. By default Dump_file dumps the entire input file.

Usage: DMPF inputyathname [-From hex_start_offset] [-TO hex_end_offset]

o DMPMBX -- DMPBX formats the contents of an MBX (mailbox) file. This program gathers information to document MBX bugs or problems. You must use DMP.MBX from the same node as the server of the MBX file to be dumped. Normally, you use DMPMBX to display the contents of the MBX file just before the bug is found and just after the bug takes effect. In remote cases, both the server.MBX file, and the client node's 'node_data/sysmbx file should be dumped out.

Usage: DMPMBX mbx_file [-FD] [-CHAN channel_list])

o DTCB -- Dumps the contents of the TCE' control blocks associated with a particular TCE' connection. The address of the TCB to be dumped may be obtained using the TCPSTAT program. Two control blocks are dumped: the UCB (user control block) which contains the send and receive queues and user-related flags, and the TCB (TCP control block) which contains the connection sequence numbers, state, flags, and out-of-sequence queues.

usage: dtcb control_block _address

ARGUMENTS

control_block_address The hex address of the control block to be dumped, as displayed in the "TCB" field of a TCPSTAT report.

o FBS -- Used to find disk blocks whose data integrity is marginal. FBS DESTROYS ALL PREVIOUS USER DATA ON THE DISK. Following the "Show failing data?·" prompt, fbs will destroy all previous information on the disk except for the physical bad spot list. If second thoughts occur abort at this prompt or before.

For the number of passes entered, fbs writes then reads patterns of bits to all blocks on the disk. For those sectors which fail, their disk address is added to ~he physical list of bad

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spots. FBS requires between one and five hours of running time for various sizes of Apollo disks.

Please refer to the appropriate appendix in the DOMAIN System Command Reference for complete information on the use of this software tool.

NOTE: The fbs utility is only valid on DNIOO, DN3xx, DN4xx, DNSxx, DN6xx, DSP80, DSP90, and DSPl60 series machines (machines with saul, sau2, sau3, sau4 or sauS). It is not valid on any other machine, and will become obsolete in the future.

o FIXCOM -- FIXCOM fixes comments in source files so that you can use the -COMCHK option when the file is compiled. For more information, see the file FIXCOM. HLP in this directory.

o FIXVOL -- FIXVOL is a general tool for examining and repair:ing disk volumes. with FIXVOL you can read, write, and examine arbitrary disk blocks (like RWVOL). You can maintain a stack of such disk blocks, examining th-em with the db program. FIXVOL will also repair LV and PV labels, the VTOC, or disk block headers. FIXVOL is fully interactive with the default mode being to prompt before making any destructive changes.

o FMPD -- FORMAT_PROCESS_DUMP formats a process dump and writes the formatted dump to standard output. Process dumps are made by the process manager when a process terminates abnorl;Tlally and appended to the file "'node data/proc dump". Information included is similar to that p~ovided by the FAULT_STATUS (FST) and TRACE_BACK (TB) commands.

Usage: FMPD [pathname ... J [-LAST]

ARGUMENTS

The pathname (s) are the name (s) of files containing unformatted process dumps. If none is given, n 'node_data/proc_dump" is assumed. The explicit dump file name facility allows dumps to easily be saved by copying the "'node _ data/proc _dump" file.

OPTION

-L[AST] Show only the last dump in the dump file.

o GLOBMAP GLOBMAP (show global section map) displays a section map for -all a sel~cted portion of the global libraries. The format of

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thia map ia:

aection_ addreaa aize section_name

All sections for all installed libraries are listed if no arguments are supplied.

Usage: GLOBMAP (-L library_wildcard ... ] [-5 section_wildcard ... ] {CL}

If the -L (library) option is specified, the sections for a11 libraries whose names match the wildcard are listed.

If the -S (section) option is specified, each section name that matches the wildcard is listed.

If both options are specified, both the library and section names must match the wildcard in order to be listed.

o INXLIB -- The binary file (s) with the given pathnames are installed as private libraries. Any entrypoints in the libraries that match entrypoints that already exiat in the known global table are treated specially, for example: If x. bin contains an entrypoint named error _ $print, following an

inxlib x.bin

any subsequent call to error_Sprint will first end up in the copy of error Sprint in x.bin. When that copy "returns·, the r;al error_Sprint will be called, and when the real error_Sprint returns, the copy in x. bin will be called again.

Uaage: INXLIB pathname... [-db)

Specifying -db will cause the old and new entrypoints of any replaced routines to be displayed.

For an example of how inxlib can be used, see lus/lib/mt/mtx.pas.

npathname n may be a wildcard. INXLIB uaes the common command line handler; type HELP CL for info.

a LLKR -- LLKR will take a pathname and, if it is locked, tell you by whom it is being locked, what node it is presently being locked, and the locking mode.

Usage: LLKR [pathname]

System Debugging 5-20 APOLlD CONFIDENTIAL INTERNAL USE ONLY.

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a JUMPER -- JUMPER is an interactive program that graphically displays the locations and functions of jumpers on all system printed circuit boards. JUMPER, which is completely menu-driven, makes use of the function keys (Fl to F8). Help is available in the file /SYSTEST!SSR_UTIL!JUMFER. HLP.

o LSYSERR -- LSYSERR writes the contents of a system error log to standard output. Help is available in the file LSYSERR.HLP in this directory.

o LTBL -- Prints the debug line number table

Usage: LTBL (enter object module)

a MBD -- MEMORY_BUFFER_DUMP dumps usage information about the TCP memory buffer pools. Usage statistics on TCP memory buffers may be obtained using the "-m" option of the TCPSTAT conunand; MBD

is intended for analyzing cases where buffers are being lost. MBD scans the entire buffer pool, finding all the chains of in-use buffers; it then prints each chain of buffers. This information may help you in discovering reasons why buffers are being lost.

Usage: mbd [-f) [-k]

OPTIONS -f - Dump the free pools as well as the chains of

in-use buffers. This produces a lot of output.

-k - Don't try to lock the mutex on the buffer

pools before doing the dump. This is useful mostly when the tcp_server has crashed with the buffer pool mutex locked.

o NETLOG -- NETWORK_LOG is a tool that can be used to monitor paging and segment activity on system. You will need two nodes: the node that is to be monitored and a node to collect the statistics.

The Netlog program is run only on the node gathering statistics; the n listening" node. Netlog has two subsystems: START and REPORT. For more information, invoke Netlog and type "help".

o OBJDMP -- Dumps an object (.bin) file

Usage: OBJDMP infile [-L[IST] [outfile 1-]]

APOLLO CONFIDENTIAL INTERNAL USE ONLY. 5-21 System Debugging

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o RINGLOG -- Monitors network traffic in and out of a node

Usage: RINGLOG [-start I -stop I -read]

-Start activate ring network message logging -Stop deactivate ring network message logging

-Read

(if active) and display current contents of the log. (This is the default!) display current contents of the log. (Different from STOP because STOP deactivates logging if it is active.

o RWVOL -- RWVOL reads one physical disk address at a time, and puts it into a buffer in memory. The program first asks you to specify the controller type, and then to specify whether you want to read (R) or write (W) the disk address. If you plan to write to the disk, first choose the "R" option to read the address first.

When you choose the "R" option, the program asks you to enter the physical disk address (Daddr:) to be read; enter it in hex. The program next asks you for the memory address to be used for the buffer containing the data it reads from the disk. If you are reading only one record at a time, you can issue a <CR> to use a default location for the buffer, which RWVOL then displays. If you specified a start address, you must specify an end address when prompted for it; otherwise just type <CR>.

After RWVOL displays the "Done" message, you can use DB (if you are running online), the Mnemonic Debugger (if you are running offline) to look at the contents of the record that you have read, in the location the program displayed for the buffer.

Usage: RWVOL

o TRPT -- TRANSLATE_PROTOCOL_TRACE prints the contents of the tcp debugging log in readable format. The log consists of entries for each transition of the tcp state machine for all enabled connections. The information recorded includes the old and new states of the transition, the type of the input that caused it, identifier for the connection, and for network input and output, the tcp sequence and acknowledge- ment numbers and packet flags, and a timestamp.

System Debugging

To zero out the contents of the tcp trace buffer, leaving a clean slate for future TCP protocol

5-22 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

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tracing, use the -C option.

Usage: trpt [-ejlnsw] [-p <TeB address>] [<file>]

OPTIONS

-e -- exit if an invalid log entry is found -1 -- print lapsed times between log entries

-w -- warn on invalid log entry diagnostic

-s -- print only tcp state info. -n -- print only net input and output

-t -- do not print timestamps

-j -- just print TCE addresses -C -- zero out the contents of the trace

buffer and exit

-p <TeE address> .:..- print info only for this connection.

<file> -- file name to open instead of

'node_ data/tcp _data

a TS -- SHOW_TIME_STAMP displays the module name

and time stamp stored in an Apollo object module. Shown is the time and date that the module was

created by the binder or one of the compilers. The time stamp is not affected by copying an object module, so it is a reliable indicator of

whether particular object modules are copies of

one another.

Usage: TS object _module_name

a UPATH The UPATH command will return the

pathname of a uid given a specific uid. To get a uid directory type: ' Id (directory name) -u'

Usage: UPATH [uid] {CL}

o XMT -- Examines magtape. This program is

interactive and will print out a list of possible commands that can be executed if help if typed

once the program has been entered.

Usage: XMT

a ZEROTR --ZEROTR zeroes out the contents of the tcp trace buffer, leaving a clean slate for future TCP

protocol tracing. See TRPT for information on

interpreting the TCP protocol trace information.

Usage: zerotr [<filename>]

OPTIONS

<file> -- file name to use instead of

'node_ data/tcp _data

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 5-23 System Debugging

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CHAPTER 6

PERIPHERAL I/O

AT BUS DEVICES (SERIES 3000 MACHINES)

Ethernet Contr. IRQ10 (IRQ9)

SPE Controller IRQ4 (IRQ9)

PC Coprocessor IRQ1l (IRQ15)

DEVICE ADDRESSES (PIO)

DRQ6 (DRQ3)

DRQ5

058000-058800 300-310

05FCOO-05FF80 3F8-3FF

COOOOO-CFFFFF

(DOOOOO-DFFFFF)

Refer to the ADpRESS SpACE section of the appropriate

chapter for each model node.

DISK PARAMETERS

winchester Dtype Class 000

001 PRIAM 3350 006 PRIAM 6650

007 PRIAM 15450

Winchester Dtype

561 1121

1121

Class 100

103 Micropo1is 1203 580 (1) 104 PRIAM 3450

105 PRIAM 7050

Winchester Dtype

201 NEC D2257 202 NEe D2246

525

1049

Class 200

1024 687

APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

5

14" Ring/disk PRIAM interface

8"

8"

18 18 18

30294 (7656) 60534 (EC76)

141246 (227BE)

ANSI Interface

13 (2) 37700 (9344) 12 31500 (7BOC)

12 62940 (F5DC)

Ring/disk SMD Interface

6-1

18 18

147456 (24000) 74196 (121D4)

Peripheral I/O

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Winchester Dtype Class 300 -- 5 1/4" ST412 Interface

301 Micropolis 50MB 830 39840 (9BAO) 302 Micro. 86MB 1024 65536 (10000) 303 Fujitsu 86MB 754 11 66352 (10330) 304 Maxtor 140MB 918 15 110160 (lAESO) 305 Maxtor 190MB 1224 15 146880 (23DCO) 306 Vertex 86MB 1166 65296 (FF10)

winchester Dtype Class 400 -- 5 1/4" ST412 Interface

401 Vertex 50MB 987 4441S (AD7F) 402 Vertex 86MB 1166 73458 (11EF2)

405 Micro. 50MB 1024 44820 (AF14)

406 Micro. 86MB 1024 73728 (12000) 410 Micro. 50MB 830 44820 (AF14)

411 Maxtor 190MB 1224 15 165240 (28578)

Winchester Dtype Class 500 -- 5 1/4" ESDI Interface

503 Priam/ 170MB 1224 18 73458 (llEF2) Maxtor

504 Priam! 380MB 1224 15 18 73458 (11EF2)

Maxtor 507 Micro. 170MB 1024 18 73458 (11EF2)

Winchester Dtype Class 600 -- 5 1/4" ESDI Interface

603 Maxtor 170 1224 18 154224 (25A70)

604 Maxtor 380 1224 15 18 330480 (SOAFO) 607 Microp. 170 1024 8 18 147456 (24000)

Floppy Contoller (CTYPE=1)

001 Floppy 77 1232 (4DO)

Intel Storage Module Controller (SMD I/F) (CTYPE=4)

000 300MB SMD 823 19 18 281466 (44B7A)

Xylogics File Server Controller (SMD I!F) (CTYPE=4)

001 CDC (pn 3863) 002 NEC (pn 5100)

711 24 760 19

26 31

(1) Software uses only 525 cylinders. (2) Software uses only 12 sectors.

peripheral I/O 6-2

443664 (6C510) 447640 (6D498)

APOLLO CONFIDENTIAl. INTERNAL USE ONLY.

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SEEK TIMES (mSecs) AVG TRANSFER AVG

!llXI'.!> MODEL === = = ~ RATE(MM.) READ (*)

001 PRIAM 3350 45 85 3100 9.7 1. 04 55.7 006 PRIAM 6650 45 85 3100 9.7 1.04 55.7 007 PRIAM 15450 45 75 3100 9.7 1.04 55.7

103 Micropolis 1203 12 42 85 3600 8.3 0.92 51. 6 104 PRIAM 3450 8 42 75 3600 8.3 0.8 51.4 105 PRIAM 7050 42 75 3600 8.3 0.8 51.4

201 NEe 02257 20 40 3510 8.55 1.2 29.5 202 NEC 02246 25 50 3510 8.55 1.2 34.5

301 Micropolis 50MB 3600 8.3 .625 302 Micro. 86MB 28 62 3600 8.3 .625 38.0 303 Fujitsu 86MB 30 65 3600 8.3 .625 40. a 304 Maxtor 140MB 30 52 3600 8.3 .625 40. a 305 Maxtor 190MB 30 52 3600 8.3 .625 40.0 306 Vertex 86MB 3600 8.3 .625

603 Max 170 (info not available) 604 Max 380 27 52 3600 8.33 1. 25 35.3 607 Mic 170 28 62 3600 8.33 1. 25 36.3** 607 Mic 170 23 50 3600 8.33 1.25 31.3***

001 Floppy 77 231 360 83.3 .0625 176.0

000 300MB SMD 29 55 3600 8.3 1.2 38.18

001 CDC (pn 3863) 20 45 3600 8.3 1.8 28.9 002 NEe (pn 5100) 15 3070 9.8 1.8 25.4

1*) Average read = Avg. Seek time + Avg. Latency + Sector Time (**) Soft Sectored (***) Hard Sectored (?) Exact specifications not available at time of printing.

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 6-3 Peripheral 1/0

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001 PRIAM 3350 006 PRIAM 6650 007 PRIAM 15450

DADDR (hex) /CYL (dec) CYLS ~ DIAGNOSTIC llS.E..D.

7620/560 75AE/559 556 EC40/1120 ECOA/1119 1116

22740/1120 226C2/1119 1116

BLKS l!lWl.(*)

30024 (7548) 60264 (E868)

140616 (22548)

103 Micropolis 1203 9303/579 92C2/578 520 31200 (79EO) 31200 (19EO) 62640 (F480)

104 PRIAM 3450 7ADO/524 7A94/523 520 105 PRIAM 7050 F5AO/1048 F564/1047 1044

201 NEC D2257 202 NEC 02246

23F70/1023 23EEO/1022 1019 146736 (23030) 12168/686 120FC/685 682 73656 (l1F88)

301 Micropo1is 50MB 9B70/829 9810/827 FF40/1021

10228/751 1ACE8/915 23C58/1221

827 39696 (9810) 65344 (FF40) 66088 (FFlO)

302 Micro. 86MB FFCO/1023 303 Fujitsu 86MB 304 Maxtor 140MB 305 Maxtor 190MB

102D8/753 1ADD8/917 23048/1223

1021

306 Vertex 86MB FED8/1165 FE68/1163

751 915

1221 1163

109800 (lACE8) 146520 (23C58)

65128 (FE68)

603 Max 170 604 Max 380 607 Mic 170

25974/1222 25878/1220 1220 153720 (25878) 508D4/1222 506b8/1220 1220 329400 (50688) 23EEO/1022 230CO/1020 1020 146880 (230CO)

001 Floppy

000 300MB SMD 448CE/821 44A24/822

001 CDC (pn 3863) 6C030/709 6C2AQ/710 002 NEC (pn 5100) 6CFFE/758 6D248/759

77 1232 (400)

821 280782 (44BCE)

709 442416 (6C020) 751 442339 (68FE3)

(*) Cyls, blocks used reflect loss of badspot and diagnostic cylinders and cylinders excluded for matching of secondary

For the 6XX dtypes four cylinders are reserved - the last for manufacturer encoded badspots, two diagnostic cylinders, and Apollo's badspot cylinder.

I/O MAP ALLOCATION

Floppy 0-1 FFF800-FFF802 ( 2 pagea) Unused 2-3F FFF804-FFF87E (62 pages) Winchester 40-41 FFF880-FFF882 ( pages) Ring Transmi.t 42-45 FFF884-FFF88A ( pages) Ring Receive 46-49 FFF88C-FFF892 ( 4 pages) Ring 2nd Rcv Chan 4A-4D FFF894-FFF89A ( 4 pages) Unused 4E':'5E FFF89C-FFF8BC (17 pages) Color DMA 5F-7F FFF8BE-FFF8FE (33 pages) Bit blit BO-9F FFF900-FFF93E (32 pages) Unused AQ-BF FFF940-FFF97E (32 pages) Multibus CO-FF FFF98Q-FFF9FE (64 pages)

peripheral I/O 6-4 APOUO CONFIDENTIAL INTERNAL USE ONLY.

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DN4xx/6xx/DSP160

l6-bit address from controller:

0-2 bits nstrappedn per controller:

l8-bit virtual DMA address:

8-bit VPN

CONTROLLER

1 1

15 V

+----------------+

+----------------+

+-+-+ 1 1 1 +-+-+

1 1

17 V 10 9 V

+--------+------------+ 1 1 +--------+------------+

+-----------------------+ 1

1 IOMAP

J +00 +---------+ 1 1 1 1 1 1 J +--+------+

10-bit page displacement

+---> 1//1 1---+ +--+------+ J

1

J l2-bit PPN

1

1 +FF +---------+ I

1 1 1

21 V 10 9 V

22-bit physical +---------------+------------+ address: I I

+---------------+------------+ 1 1 I ,+--> Byte

V Select

MEMORY

roMAP haa 256 one-word entries from FFF800 - FFF9FE.

APOLW CONFIDENTIAL INTERNAL USE ONLY. 6-5 Peripheral r/o

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'" , '"

L1

L'

L7

LA

LD

L2

L5

La

LB

LE

i I

F1

TAB

L3

L6

L'

LC

LF

A2 R31 R4 A5

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880 Keyboard Chart - Physj cal

High Order Nibble 0 1 2 3

.- 'p BWK 0 Rl NO Rill Noo Fl FIS FlU Fle 0

1 'A 'Q Ll Nl LID NlU F2 '2S F2U F2C 1

2 'B 'R N2 L2U N2U 'lS no 2

3 'e '5 • L3 N3 LlJ NlJ F4 Fo; F4U F4C 3

• 'D 'r $ L' N' L4U N4U '5 FSS FeJJ 'e£ • 5 '6 " • L5 N5 L50 NOJ PO F6S F6U F6C 5

E 'F 'V , LE NE LEU NEU F7 F7S F7U FlO E

7 'G "W L7 N7 L7U N7U F8 Fill FOO Fo; 7

8 'H " ( L8 N8 LOO Nill \5 tpad '\ 8

, " 'y I 13 NO L'll N'U ( (5 Ie , A 'J 'z LAI1 TlIB TlIBS TABC A

B 'K '( · N~ CR CBS CRC B

C 'L LC N. LCU Nm / '/ C

D " '] LD N- WJ R2 R5 R2U R5U D

6 " -- .. ",U R3 RlJ

F '0 N/ N,v R'

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 6-7 Peripheral I/O

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880 Keyboard Chart - Translated lUser Mode)

High order Nibble 0 1 2 3

0 "' "p SP 0 Rl RID Fl FlB FID FlC 0

1 "A "0 ! Ll R2 LID R2D F2 F2S F2lJ F2C 1

2 .. "R L2 R3 L2D RD F3 FE FD F3: 2

3 "C "S • L3 R' L3! R4U F4 F4S F4U F«: 3

• '1l 'r , L' R5 L4U ROJ F5 F56 "" FO: 4

5 "E "U • L5 BS ".! F6 FOS F6U FO:: 5

6 "F -V · L6 CR L6U F7 F" F>J F-';; 6

7 "G .. L7 TAB L>J F8 "" FOJ ,,£ 7

8 "H " L8 srJIB LID HO H8 NOJ .OJ 8

, ", "y ) L3 Cl'ABLOO Hl H' HID H" ,

A "J ", · LA LAO H2 H. H2O N.U A

B ". "[ + LB LBO H3 H= HD H-U B

C "L "\ u:; = H. H+ N4U N+U C

0 " ") - LD L!l! H5 H- ,., IHJ 0

E .. "- LE LED '6 .. HW N'U E

F "0 "/ / "' LF "'" H7 H/ '>J ,'" F

Peripheral I/O 6-8 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

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,. (3

5 n 0

~ .: ~ ,. r Z

~ I" "I " c ~ 0

I " I " I " I I

z « I TAO I lomc 1

m , ~ I

I

" I I " I F6 I "

SPACE 1

I " 1 I::~~E)

'H )RETURN __

I <1 1

I "' 1 1<'1"1"1

• , '" "

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I,ow-Prgfile Model Kevb0ard Chart - Physigal

Hign Order Nibble 0 1 2 3

0 "sp "p SP 0 R1 R18 RID LtA F1 F18 FlU FtC 0

1 "A "0 I L1 L18 LID L2A F2 F2S F2U F2C 1

2 "B "R L2 L2S L2U L3A F3 F3S F3J Fr 2

3 "C "S • L3 L3S L3J R6 F4 Fl' 'OJ '4C 3

• "D 'r $ L, LOS LOU LlAS F5 ". '" F5C • 5 ", "u • L5 L55 L5U L>AS F6 '6S '6U FOC 5

,6 "F "V , L6 L6S L6U L:lAS '7 F7S FlC 6

7 "G "W W L7 L7S L7U R6S Fa FlI3 FOl Fl" 7

8 "H "X ( L8 LOl LOl LOO 1- "\ 8

, ", ..., } L' LllS L" L2MJ I R2S

A "J "z · LAS LAU L3NJ TAB TABS RlS TABC A

B "K Ole + LB LBS LBU R6U CR CRS ROS CRC B

C "L LC LCS LCU R55 "/ C

D "II "} " LD LOS rro R2 R5 R1XJ "'J D

E "N "" LE LES LED R3 BS R3J

, "u 0 DEL LF LFS LFU R' ~, R«J

8

Peripheral I/O 6-10 APOLLO CONADENTIAL. INTERNAL USE ONLY.

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Low-Prgfile MQdel Keyboard Chart - Translated lUser Mode)

High Order Nibble 0 1 2 3

0 'sp '. sp 0 Rl RID Fl FIB FID Fl£ 0

1 'A "0 I Ll R2 LID R2IJ F2 F2.S F2IJ F2C 1

2 " " L2 R3 L2!J RD F3 F3S FD n: 2

3 'c " • L3 R' Lll R4U F4 F4S FOJ F4C 3

• "0 'r $ L' R5 L4IJ • 50 F5 F55 "" "" • 5 'E "0 • L5 BS LSU R2.S F6 F6S F6U FO:: 5

, 'F " , L' CR L6U R3B F7 F7S FlU F;C , 7 'G " L7 'J'AB LlO R4S " Fas FI', FO: 7

8 " 'X ( L8 STAB Li3J R55 RIB Las LIA LOO 8

, 'I "y ) L' cr .. LOl LIS L'" L2A L2AU , A 'J 'z LA L1VJ L2.S LAS L3A L3Nl A

8 " ESC + UlU L3S lBS R' R6U B

C 'L "\ J£ UlJ L4S U;S LJA<l

D 11 ') - LD IJXJ L55 LOS L2J\S

E " " L' LID L6S LBS L3AS

F '0 " 0 DEL LF L7S LFS R6S

APOlLD CONFIDENTIAL. INTERNAf:- USE ONLY. 6-11 Peripheral IIO

Page 128: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

H

(;

KEY NUMBERS

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Low-Profile Model II Keyboard Chart ASCII Mode

High Order Nibble 0 1 2 3 4 C 0 E F

Cll F1 Bll + C;l B14 Cll E13 B3

+ , LBO +

E13 E13 Al Al

+ B2 + + C2 LA LA Llo LB1 A2 + A2 A2 02 C2 B2 02 C2 A2

B3 + + C5 +

1 LA1 LB2 A3 + A3 E6 C5 E6 LAl LA A3 A3

+ + + + +

E4 03 B4 B4

E4 OS E4 03 LA2 LA2 LA2 RA4 A4 A4 A4

+ B5 + + 04 C6 LCD

+ , + + 04 C6 B5

04 C6 LCO LCO LBO A5 A5 A5 A5

+ + + + , + + C4 CB B6

B6 C4 C6 C4 C6 LC1 LC1 LCl LBl A6 A6 A6 A6

+ + + + , + + B8 B7 05 E5 E5 LC2 LC2 LC2 LB2 A7 A7

06 012 B6 + 06

+ C3 CS + ' +

LOa LOO LOa RA4 A8 +

A8 A8 A8

07 + B9 + + 07 LD1 + ' E3 BID 07 E3 ES LOl LOI LBO 014 014 8

+ + + + ' + CB C7 Bll 810 C9 C7 CO C7 LD2 LD2 LD2 LB1 RAO

+ + + + . + + 08 E2 BO

08 E2 08 E2 LEO LEO LEO LB2 C1 Cl RAI Cl

Bl + 011 + + C12 LEI + .

013 DO 813 09 C12 DO LEl LEI RA4 RA2 013

+ + + + . Ell

+ + C 010 AD EO EO 010 AD 010 AD LE2 LE2 LE2 Ell RAS Ell

B12 B13 + +

E8 C13 LFO do RAO E8 C13 E8 C13 LFO AO RAO RA'

+ + + + +

E7 B14 El0

El0 E7 B7 E7 B14 LFI LFI LFI RAI B15 RAI

A9 + + + Cl0 C14 LF2 + LF2 RA2 RA2 Cl0 A9 AO Cl0 B12 LF2

1 2

+ == shift A == control '" Up transition

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 6-13 Peripheral 1/0

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Low-Profile Model II Keyboard Chart - Keystate Mode

High order Nibble o 1 2 3 4

RA2 810 C5 LOO 012 E2 RE3 RA2 B10 C5 LOO 012 E2 RE3

LAO RA3 B11 C6 L01 E3 LAO RA3 B11 C6 LD1 E3

LA1 RA' 812 C7 L02 013 E' LFO LAl RM B12 C7 L02 013 E' LFO

LA2 LBO 81S C8 LD3 01' E5 LFl LAZ LBO 81S C8 L03 014 E5 LFl

AD L81 B14 C' E6 LF2 AD LB1 B14 C' E6 LF2

A1 LB2 815 C10 RD1 E7 A1 LB2 B15 C10 R01 E7

A2 C11 02 RD2 E8 F1 A2 C11 02 RD2 E8 F1

A3 B1 LCD C12 OS RD3 E' A3 Bl LCD C12 03 RD3 E'

A' B2 LCl C13 0' RD' E10 A' B2 LC1 C13 0' RD' E10

A5 B3 LC2 05 LEO Ell RF1 A5 B3 LC2 05 LEO Ell RFl

A6 B4 C14 06 LE1 E12 A6 B4 C14 06 E12

A7 B5 07 LE2 RF2 A7 B5 07 LE2 RF2

A8 B6 C1 RC1 DB E13 RFS A8 B6 C1 RC1 08 E13 RF'

A9 B7 C2 RC2 0' EO A9 B7 C2 RC2 09 EO

RAO B8 C' RCS D10 E1 RE1 LED REI L"EJl ON RAO B8 C3 RC3 DI0 E1

RA1 B9 C, RC4 D11 RE2 RAl B9 C' RC4 011 RE2

1 2

: Up transition

Peripheral I/O 6-14 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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MAGTAPE CONTRO! LER

Controller control page: FE8000 Interrupt vector number: B3 ($2CC in page 0)

MULTIBUS interrupt level: 3 (See MIC) l/OMAP entries: FFF980-FFF9FE (64 pages)

(3) FE80AA

(3) FE80AB

I

CHANNEL ATTENTION (do something useful)

CONTROLLER RESET

+-- (020 MACHINES)

System Configuration Pointer (at xxxFF61

+00 +01 +02 +04 +--------+--------+-----------------+-----------------+

1000000011000000001 -> CONFIG BLOCK 1 0 +--------+--------+-----------------+-----------------+

System Configurat ion Block

+00 +01 +02 +04 +--------+--------+-----------------+-----------------+

100000011100000000 I->CHAN CNTRL BLK I 0 +--------+--------+-----------------+-----------------+

Channel Cont rol Block

15 8 7 +--------+--------+

tOO I CCW GATE I CCW: Set to $11 for normal +--------+--------+ operations. Set to $09 to

+02 -> PARM BLOCK clear active interrupt. +-----------------+ GATE: Set to $FF before starting

+04 0 an operation. Set to 00 by +-----------------+ controller on completion.

+06 0 +-----------------+

To initiate an operat ion

(Set up parameter block)

MOVE.W #$llFF,GATE

MOVE.B #0,$FE80AA

CLOSE GATE WAKE UP CONTROLLER

APOLLO CONFIDENTIAL INTERNAL USE ONLY. 6-15 Peripheral I/O

Page 132: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

To acknowledge tape j nterrllpt:

MOVE.W #$09FF,GATE MOVE.B i$20,CMD_BYTE

CLOSE GATE DO-NOTHING COMMAND

MOVE.W NO_I_BIT,CONTROL ENSURE INTERRUPT BIT OFF MOVE.B tOO,$FE80AA WAKE UP CONTROLLER TST.B GATE+l WAIT FOR ACK TO FINISH BNE *-4

Parameter Block

15 8 7 +--------+--------+

+00 I CMD BYTE I 00000000 I +--------+--------+

+02 I 0 I +--------+--------+

+04 I WG-SHR--I DLlMUU--1 (CONTROL -- SEE BELOW) +--------+--------+

+06 I ACTUAL COUNT +-----------------+

+08 I COUNT TO R/W (*) I +-----------------+

+OA I RECORDS/OVERRUN I +-----------------+

+OC I BUFFER POINTER I +-----------------+

+OE I 0 I +-----------------+

+10 I SC-EEEEE I-OLERBP-I (STATUS -- SEE BELOW) +-----------------+

+12 I INT OR LINK PTR 1 +-----------------+

+14 I 0 I +-----------------+

* Manufacturer reconnnends 4K - SR.

COMMAND BYTE

00 Initialize 3C Edit (rewrite prior record) 20 No operation 40 Write filemark 28 Return status 44 Skip to filemark 2C Read 48 Space 'n' records 30 Write 70 Space 'n' or to filemark 34 Rewind 4C Erase fixed (3.5" . 'n') 38 Rewind/unload 50 Erase from here to EOT

Peripheral I/O 6-16 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

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CONTROL WORD (appropr~ate value)

w 8000 Bus width (0 => 8 bits, 1 => 16) (1)

G 4000 Grab bus before tape movement (0) S 1000 Operate in streaming mode (?)

H 0800 Select high speed (100ips) (0) R 0400 Reverse direction for operation (?)

D 0080 Grab bus during DMA transfers (0) L 0040 Link (=> ignore I and M bits) (?)

I 0020 Interrupt when done (1)

M 0010 1 => use mailbox interrupts (0) cru oooe Unit select (00 through 11) (00)

STATUS WORD (normal state at completion)

S 8000 Execution (of parm block) started Execution completed ok

(1)

(1)

(00) e 4000 E •• E 1FOO Error code:

0

L E

R

B

00 No unrecoverable error 01 Timed out waiting for Data 8u:sy fal.se 02 Timed out waiting for Data Busy false,

Formatter Busy false and Ready true 03 Timed out waiting for Ready false 04 Timed out waiting for Ready true 05 Timed out waiting for Data Busy true 06 Memory time-out during system. memory reference 07 Blank tape encountered 08 Error in micro-diagnostic 09 Unexpected end of tape OA Tape read/write error OS Tape overrun OD Read parity error OE Checksum error OF Tape timeout (read on blank tape or

reading larger block than written) 10 Tape not ready 11 Write attempted on protected tape 13 Diagnostic mode jumper not installed 14 Illegal attempt to link 15 Filemark encountered during read operation 16 Parameter error (byte count zero or too large) 18 Hardware error 19 Read or write terminated by OS or disk 0040 Online (1)

0020 Load point (?) 0010 End of tape (?)

0008 Ready (1)

ODD' Formatter busy (0) 0002 Tape is write protected (1)

APOLW CONADEmlAL INTERNAL USE ONLY. 6-17 peripheral I/O

Page 134: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

MULTIBUS DEVICES

~ == == l1AI!.l: !!Q ~ ~= LEVEL CODE DESCRIPTION (PAGE) ADDRESSES

Reserved for 0-3COO 0000-7COO customers

COM-ETH Interlan 003613 80-8F Ethernet Ctlr

FPS array proc. 7400

COM-X25 TITN x25 Ctlr 002858 7000-7FFF

COM-CTL DOMAIN 3270,3770, 0800 4000-7FFF COM-Pce PCI

MSD1600 CIPRICO TAPE- 001012 7800 OCCUPIES NO MASTER Ctlr MEMORY SF ACE.

MSD6250 CIPRICO TAPE- 7800 OCCUPIES NO MATER nAn CTRL 007141 MEMORY SPACE.

MSD-300 Intel SMD Ctlr 001380 6COO OCCUPIES NO MEMORY SPACE

MSD-500 Xylogics FSD 003864 6840 OCCUPIES NO Ctlr MEMORY SPACE

SFW-VER IKON 10071-5, 400 IKON 10085 Mbus versatec (V80) Ctlr

Frintronix. 7COO

Parallel Ptr.

peripheral I/O 6-18 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

Page 135: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

REGISTER SET

31 16 15 8 7 +----------------+--------+--------+ I I DO +----------------+--------+--------+

01 +----------------+--------+--------+

02 +----------------+--------+--------+

03 +----------------+--------+--------+

04

+----------------+--------+--------+ 05

+----------------+--------+--------+ I I I I 06 +----------------+--------+--------+

07

+----------------+--------+--------+

+----------------+-----------------+

+----------------+-----------------+ A1

+----------------+-----------------+ A2

+----------------+-----------------+ I I I A3 +----------------+-----------------+

A4 +----------------+-----------------+

AS (DB)

+----------------+-----------------+ I I I A6 (SB)

+----------------+-----------------+ DB --> Start of Data Section S8 --> Top of current Stack Frame

+- - - - - - - - - - - - - - - - - + USER STACK POINTER

+----------------------------------+ A7 (SP) * SUPERVISOR STACK POINTER

+- - - - - - - - - - - - - - - - - + * Choice made on basis of S bit in SR

+----------------------------------+ PC

+----------------------------------+ System User

+--------+--------+ I T-S--III j---XNZOC I SR

+--------+--------+ T-Trace Mode III-Interrupt Level X-Extend a-Overflow S-Supervisor Mode OOO-enabled N-Negative C-Carry

111 - disabled Z-Zero

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 6-19 Peripheral I/O

Page 136: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

~

Write CRl or CR3 8800 !'FACOD

Rd Status, Wr CR2 8802 FFAC02 Rd/Wr Timer 1, Hi. 8804 FFAC04 Rd/Wr Timer 1, Lo 8806 FFACQ6

Rd/Wr Timer 2, Hi. 8808 FFACOS Rd/Wr Timer 2, Lo 880A FFACOA Rd/Wr Timer 3, Hi 880C FFACOe

Rd/Wr Timer 3, Lo 880. FFACOE

Calendar Control 8880 FFAC80 Calendar Data Wr 8882 FFACe2

Calendar Data Rd 8884 FFAC84

The touchpad sends approximately 30 data points per second through the same SIO port (zero) as the keyboard, at a speed of 1200 baud. Each data point consists of four bytes, as follows:

+-------------------------------------------------------+ I escape code I 10 8 I 10 4 hi 4 hi 8 I I bits I bits : bits I bits

E8 of x I of Y ; of x I of Y

+-------------------------------------------------------+ 4-7 0-3

byte 0 byte .1 byte 2 byte 3

The range of X and Y coordinates is approximately 30 to 1100.

XXLOGICS CONTOI,I,FiR

MOLTIBUS STANDARD I/O ADDRESSES

DESCRIPTION 8-BIT IOPB Relocation Regiater Low Byte 40 IOPB Relocation Regiater High Byte 41 IOPB Address Register Low Byte 42 IOPB Address Regiater High Byte 43 Controller Status Register (CSR) 44 Controller Reset/Update IOPB Register 45

Peripheral I/O 6-20 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

Page 137: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

+------+------+------+------+---------------------------+ I AUD I RELO I CHEN I lEN I COMMAND CODE

+------+------+------+------+------+------+------+------+ o lEI I IERR I HDP I ASR I EEF I Ece CODE

+------+------+------+------+------+------+------+------+ I ERRS I a CONTROLLER TYPE a I DONE I +------+-------------+--------------------+------+------+

ERROR OR COMPLETION CODE

+------+---------------------------+--------------------+ I B!W INTERLEAVE FACTOR THROTTLE

+------+------+--------------------+------+-------------+ I DRIVE TYPE 0 I UNIT SELECT I +-------------+---------------------------+-------------+

HEAD ADDRESS

+-------------------------------------------------------+ SECTOR ADDRESS

+-------------------------------------------------------+ I CYLINDER ADDRESS LOW BYTE

+----------------------------------+--------------------+ o I CYL ADDRESS HIGH

+----------------------------------+--------------------+ SECTOR COUNT LOW BYTE

+-------------------------------------------------------+ SECTOR COUNT HIGH BYTE

+-------------------------------------------------------+ DATA TRANSFER ADDRESS LOW BYTE

+-------------------------------------------------------+ DATA TRANSFER ADDRESS HIGH BYTE

+-------------------------------------------------------+ I DATA TRANSFER RELOCATION ADDRESS LOW BYTE

+-------------------------------------------------------+ DATA TRANSFER RELOCATION ADDRESS HIGH BYTE

+-------------------------------------------------------+ HEAD OFFSET

+-------------------------------------------------------+ I 0 I +-------------------------------------------------------+

NEXT lOPB ADDRESS LOW BYTE

+-------------------------------------------------------+ NEXT IOPB ADDRESS HIGH BYTE

+--------------------+----------------------------------+ I ECC PATTERN HIGH I a +--------------------+----------------------------------+

ECC PATTERN LOW

+-------------------------------------------------------+ ECC OFFSET BYTE LOW

+-------------------------------------------------------+ ECC OFFSET BYTE HIGH

+-------------------------------------------------------+ CSR:

+------+------+------+------+------+------+------+------+ I GBSY I ERR I DERR I IPND I ADRM I AREQ I AACK I DRDY I +------+------+------+------+------+------+------+------+

APOLLO CONFIDENTIAL INTERNAL USE ONLY. 6-21 Peripheral I/O

Page 138: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

A on DRV STAT: +------+------+------+------+------+------+-------------+ I ONCL I DRDY I WRPT I DPB I SKER I DFLT I a +------+------+------+------+------+------+-------------+

Bit Number Commands 0 - COMM

1 - IMODE D - DATAR

E - DATARL

Code Function a Nap

- STATl F - DATARH

- STAT2 10 - HDOFST - THROT 11 - RES

- DRIVE 12 - NIOPL 6 - HEAD 13 - NIOPH

- SECT 14 - ECCMB

- CYLL 15 - ECCML 9 - CYLH 16 - ECCAL A - SCNTL 17 - ECCAH

B - SCNTH C - DATAL

Abbreviations:

AACK - Attention Acknowledge

ADRM - 24 bit Address mode AREQ - Attention Request ASR - Automatic seek retry

AUD - Automatic Update B/W - Byte / Word mode

CHEN - Chain Enable DPB - Dual Port Busy DERR - Double Error

DFLT - Drive Faulted

DONE - Operation Done DRDY - Drive Ready (L)

1 Write 2 Read

3 Write Track Headers Read Track Headers Seek

6 Drive Reset

Write Format Read H-D-E

9 Rd Drive Stat A Write H-D-E

Set Drive Size

Self Test D Reserved E Buffer Fill

F Buffer Dump

EEF - Enable Extended Function

ERR - Error ERRS - Error Summary

GBSY - Go Busy

HDP - Hold Dual Port lEI - Interrupt on each lOPB

lEN - Interrupt Enable

lERR - Interrupt on Error IPND - Interrupt Pending

ONr:L - On Cylinder (L)

RELO - Relocate Enable SKER - Seek Error

WRPT - Write Protect

Peripheral I/O 6-22 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

Page 139: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

CHAPTER 7

DN300,DN320 ,DN330

ADDRESS SPACE fDN300/320)

physical virtual

100400 traps 400 PROM 400->7FFF (one-to-one)

100800 phys mem 100800->FFFFF 700000 ptt 700000->7FFFFF 100000 MD STK,DATA EOOOOO

20000 disp1_mem FCOOOO->FDFFFF

BOOO FPU ctl FF7000 B400 FPU crod

B800 FPU cs

9400 disp 1 9800 ring 2 9000 DMA ctl

FF7400

FF7800

FF9800 FF9cOO FFAOOO

9COO FLP,WIN,CAL FFA800 8800 timers

8400 sios

8000 4000 pft

ADDRESS SPACE fDN330)

physical

FFACOO

FFBOOO

FFB400 FFB800->FFF7FF

virtual

400 prom 400-3FFF (one-to-one)

4000 pft 3FFB800-3FFF7FF

8000 3FFB400 8400 sios 3FFBOOO

8800 timers 3FFACOO

9800 ring 3FF9COO 9COO disk, tape, cal 3FFA800

A400 pbu ctl 3FF7COO (DSP90/DN560)

ABOO lpr 3FF8000 (DSP90) BCOO VME control 3FF9400 (DN560)

EOOO color_sup 3FF6000 (DN560)

E400 color user 3FF6400 (DN560) E800 color=wcs 3FF6800 (DN560)

FOOO displ_sup 3FF9800

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 7-1 DN3xx

Page 140: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

F400 disp1_user F800 disp1_wcs

10000 3FF5000-3FF5FFF (DSP90/DN560)

14000 pr0m2

3FFAOOO 3FFA400

iomap

20000 disp1 mem 40000 -

3FCOOOO-3FDFFFF (DN560) color_mem

3FAOOOO-3FBFFFF (DSP90/DN560) 70000 pbu

3FEOOOO-3FE7FFF (DSP90/DN560) 80000 pbu 1st half

i/o

100000 mem: m.d data 3000000 100400 mem: traps 0 100800 mem 100800 380000 pbu 2nd half

(DSP90/DN560) 400000 ptt 400000-7FFFFF

ref

CACHE CONTROL REGISTER (CaCRI MOYEC to/from 0021 lDN330)

31 876543210 +-------------------------------+--+--+--+--+--+--+--+--+ 10 OIOOIOOIOOIOOICCICEIFCIECI

+-------------------------------+--+--+--+--+--+--+--+--+

CC - Clear entire cache (WID)

CE - Clear entry addresses by CAAR (W/O)

Fe - Freeze cache (enabled, but no replacing data) (R/w)

EC - Enable cache (R/W)

CACHE ADDRESS REGISTER (CMRI [MOVEC to/from 8021 lDN330)

31

+-------------------------------------------+-----------+ CACHE FUNCTION ADDRESS INDEX

+-------------------------------------------+-----------+

DN3xx 7-2 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

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CONFIGURATION

+-----+ +-----+ SBUS

I CPU I == I .MM:U I ==========================""'======""======""'====== I I I I I I I I I +-----+ +-----+ I I I

+------+ +------+ +-----+ +------+ +-----+ MAIN BOOT

I MEM I PROM I I I I +------+ +------+

STO REAL

I TIME I I CLK I

+-----+ +------+ I I

! I +-keyboard I +---SIO 1 +-----SIO 2

MMU

I CTL I I I +-----+

<====================================================

+------+ +------+ +-----+ +------+ +------+ DISP DISP DMA RING I DSK/ I

I MEM I CTL I CTL I I CTL I FLPY I I I I I I I CTL I +------+ +------+ +-----+ +------+ +------+

I I I +- disk

monitor network +--- floppy

.

APOLLO CONFIDENTIAL INTERNAL USE ONLY. 7-3 DN3xx

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DISK (FLOPPY (WINCHESTER) CONTROLLER

DN3xx

Address: [ 9COO I OFFA800 ]

WRITE

+00 ANSI COI:v1MAND

+02 ANSI PARM OUT

+04

+06 SECTOR +07 +08 CYLINDER-HI

+09 CYLINDER-LO +OA HEAD

+oe INTERRUPT CONTROL

+OE CONTROLLER CMND

READ

ATTENTION STATUS

ANSI PARM IN

DRIVE #" OF STATUS

I CONTROLLER I CONTROLLER

I I I I I I I

STAT-HI I STAT-LOI

I I I I I I I

+============================================+ +10 FLOPPY STATUS

+12 FLOPPY WRITE DATA FLOPPY READ DATA

+14 FLOPPY CONTROL

+============================================+ +20 I CALENDAR CONTROL

I +22 I CALENDAR WRITE DATA I

I I +24 I I I CALENDAR READ DATA

CONTROLLER STATUS 9C06 I OFFA806 ]

~ 8000 lS Controller busy Self clearing 4000 14 Drive busy (from bus) Self clearing

2000 13 Drive attention (from bus) Cntr, if status

avail enab 1000 12 Status available interrupt Read attn status

0800 11 End of operation interrupt Write to ctlr cmd

reg reg

0400 10 Floppy interrupting Read floppy status reg

0080 07 Timeout Write to ctlr cmd reg 0040 06 Overrun Write to ctlr cmd reg 0020 05 eRe error Write to ctlr cmd reg 0010 04 Controller bus parity error Write to ctlr cmd reg 0008 03 Illegal configuration Write to ctlr cmd reg 0004 02 Status timeout Read attention status

register

0002 01 Parity error during DMA Write to controller command register

7-4 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

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ANSI COMMANpS {9000 I OFFABOO ]

PARAMETER OUT COMMANDS

40 Attention control

41 Write control

42 Load Cyl. Addr. high 43 Load Cyl. Addr. low 44 Select head

~ Bit 7 = 0 => enable attention

1 => disable attention Bit 7 = 0 => write protect

1 => write enable MSB of cylinder address LSB of cylinder address Head number Mandatory

50 Load attribute number Attribute number Optional 51 Load attribute 53 Read control

54 Offset control

55 Spin control

56 Load sect/trk high 57 Load sect/trk medimn 58 Load sect/trk low 59 Load bytes/sect high 5A Load bytes/sect medium 58 Load bytes/sect low 68 Load read permit high 6C Load read permit low 60 Load write permit high 6E Load write permit low 6F Load test byte

APOLLO CONFIDENTIAL INTERNAL USE ONLY. 7-5

Attribute Bits 7 16 = Ox - nominal strobe

10 - strobe early 11 - strobe late

Bits 7 / 6 "'" Ox - no offset 10 - offset forward 11 - offset reverse

Bit 7 = 0 - spin down 1 - spin up

MSB of sectors/track MedSB of sectors/track LSB of sectors/track MSB of bytes/sector MedSB of bytes/ sector LSB of bytes/sector MSB of read enable on cyl >­LSB of read enable cyl MSB of write enable on cyl >­LSB of write enable cyl Test byte

DN3,xx

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PARAMETER IN COMMANDS

00 Report illegal command General status 01 Clear fault General status 02 Clear attention General status 03 Seek * General status 04 Rezero * General status OD Report sense byte 2 Sense byte -2 DE Report sense byte 1 Sense byte 1 OF Report general status General status Mandatory

10 Report drive attribute Drive attribute Optional 11 Set attention * General status 14 Selective reset * General status 15 Seek to landing zone * General status 16 Reformat track * General status 29 Report cylo addr. high Msa of cylinder address 2A Report cylo addr. low Lsa of cylinder address 2a Report read permit high MSS of cylinder address 2C Report read permit high LSB of cylinder address 2D Report wrt permit high Msa of cylinder address 2E Report wrt permit high LSB of cylinder address 2F Report test byte Test byte

Time dependent command, attention set on completion.

ATTENTION STATUS [9000 I OFFA800 1

C] eared by

80 Normal completion * Clear attention command 40 Busy Self clearing

5 20 Read sense byte 2 See sense byte 2 10 Read sense byte 1 See sense byte 1

08 Illegal parameter * Clear fault command 2 04 Illegal command * Clear fault command

02 Control bus error * Clear fault command 01 Not ready Self clearing

* Zero to one transition sets attention.

SENSE BYTE 1 mand/opt

80 Vendor unique errors * 0 40 Other errors * 0

5 20 Command reject * M

10 Speed error , 0 08 R/W permit violation * 0

2 04 Power fault * 0 02 Read/write fault * M 01 Seek error * M

DN3xx 7-6 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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SENSE BYTE 1 mand/opt

80 Vendor unique attns * 0 40 In write-protected area M

5 20 Attr. table modified * 0

10 Dev rsrved to alt port 0 08 Forced release * 0

2 04 Dev rsrved to this port 0

02 Ready transition * M 01 Initial state * M

* Zero to one transition sets attention.

INTERRUPT CONTROL [9COC I OFFA80C

+---+---+---+---+---+---+---+---+ 17161514131211101 +---+---+---+---+---+---+---+---+

1 1 I Enable End of Op int I Enable Status Avail int Enable Attention int

Overall interrupt enable

CONTROLLER COMMANDS (9COE I OFFA80E }

00 - No-op 01 - Read record 02 - Write record 03 - Format track 04 - Seek 05 - Execute ANSI command sequence 06 - Execute drive select sequence 07 - Execute attention in sequence 08 - Select head

Any command clears the controller status register.

FLOPPY CONTROL (9C14 I OFFA814 1

+-------------------+ 1 1 1 0 1

+-------------------+

o - Read 1 - Write

1 => Enable floppy interrupt

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 7-7 DN3xx

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DISPI AX CONTROL AND STATUS REGISTER /DCSRl

DISPLAY REGISTERS 9400 I OFF9800

WRITE READ

+00 DISPLAY CONTROL DISPLAY STATUS +02 DEB

+0' WSSY

+06 WSSX +08 Dey

+OA Dex +oe WSDY +OE WSDX

DISPLAY CONTRO!, REGISTER [9400 I OFF9800

8000 - GO (Start BLT operation)

0020 - Interrupt at end of frame 0010 - Interrupt at end of BLT

0008 - Increment Y coordinate

0004 - Increment X coordinate 0002 - Fill mode 8LT operation

operation

0001 - Enable display (blank if reset)

DISPLAY STATUS REGISTER [9400\ OFF9800

8000 - BLT operation in progress

0080 - End of frame interrupt

0002 - Reserved 0001 - Reserved

15

5

15

BLT REGISTERS

DN3xx

(Each has an address used for reading and a separate

address used for writing.)

DESTINATION COUNT Y REGISTER [ 9414 I OFF9814 ]

15 +----------------+ I------CCCCCCCCCC I +----------------+

CCCCCC = -1 - ABS (WDSY - WDEY)

= two's complement for number of lines in height

of destination block.

7-8 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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DESTINATION COUNT X REGISTER [ 9416 I OFF9816 ]

15

+----------------+ I----------CCCCCC I

+----------------+ CCCCCC = -1 - ABS (WDSX/16 - WDEX/16)

.... two' 3 complement for number of 16-bit aligned words involved in x coordinate.

DESTINATION END BIT REGISTER [ 941C I OFF981C ]

15 3 0

+----------------+ I--------OOOOEEEE I

+----------------+

EEEE "" WDEX mod 16

:. bit number in word of last bit of X.

APOLW CONFIDENTIAL INTERNAL USE ONLY. 7-9 DN3xx

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DMA CONTROLLER

DN3xx

DMAC page at [ 9000 ! OFFAOOO ]

DMA controller is a Motorola M68450.

9000-903F - ring receive header 9040-907F - ring receive data 9080-90BF - ring transmit 90CO-90FF - winchester/floppy

Register s1..UTlIl\ary (for each channel) :

+00 Channel status register +01 Channel error register +04 Device control register +05 Operation control register +06 Sequence control register +07 Channel control register +OA Memory transfer counter +OC Memory address register

(CSR)

(CER) (DCR) (OCR) (SCR)

(CCR)

(MTC) (MAR)

+14 +1A +1C +25 +27 +29 +2D

Device address register (not used) Base transfer counter (aTC) Base address register (BAR) Normal interrupt vector (not used) Error interrupt vector (not used) Memory function code register (MFCR) Channel priority register (CPR)

R!W

R

R!W

R!W

R!W R!W

R!W

R!W

R!W

R!W

R!W R!W

+31 Device function code register (not used) +39 Base function code register (BFCR) R/W +FF General Control Register (not used)

CHANNEL STATUS REGISTER ICSR) 900D I OFFAOQQ

+---+---+---+---+---+---+---+---+ I cac ! BTC I NDT I ERR I ACT I 0 I PTC I pes I +---+---+---+---+---+---+---+---+

State of input PCL line 1 => PCL transition occurred (*)

1 => Channel active 1 => Error as coded in CER (**)

1 => Normal Device termination (*)

1 => Block transfer complete and continue (*)

1 => Channel operation complete (*)

(*) Bit cleared by writing a 1 bit to CSR. (**) Ditto, and clearing also clears CER.

7-10 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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CHANNEL ERROR REGISTER (CER) 9001 I OFFA001

+---+---+---+-------------------+ 10 I 0 I 0 I ERROR CODEI +---+---+---+-------------------+

00 - No error 01 - Configuration error 02 - Operation timing error 03 - (undefined, reserved) 05 - Address error: memory address or memory counter 06 - Address error: device address 07 - Address error: base address or base counter 09 - Bus memory address or memory counter OA - Bus error: device address OB - Bus error: base address or base counter OD - Count error: memory address or memory counter OE - Count error: device address OF - Count error: base address or base counter 10 - External abort 11 - Software abort

DEVICE CONTROL REGISTER (peR) 9004 I OFFAOQ4

+-------+-------+---+---+-------+ I XRM I DTYP I DPS I 0 I peL I (=28)

+-------+-------+---+---+-------+

o - PCL = Status input

1 - 16-bit port

o - Device with ACK, implicitly addressed

a - Burst mode transfers

OPERATION CONTROL REGISTER (OCR) 9005 I OFFAOQS

+---+---+-------+-------+-------+ IDIRI 0 I SIZE I CHAIN I REQG I (=92) +---+---+-------+-------+-------+

o - REQ line initiates xfer

o - Chain operation disabled

1 - Word transfers

o - Transfer from memory to device 1 - Transfer from device to memory

APOllO CONFIDENTIAl. INTERNAL USE ONLY. 7-11 DN3xx

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DN3xx.

SEQUENCE CONTROL REGISTER (SCRl 9006 OFrA006

+---+---+---+---+-------+-------+ I 0 I 0 I 0 I 0 I MAC I DAC I (-04) +---+---+---+---+-------+ .. ------+

I I I I I I Q - NIA (Device address reg)

I I Q 1 - Memory address reg counts up

CHANNEL CONTROL REGISTER (CCRl [900? I OrFAOD? 1

+---+---+---+---+---+---+---+---+ ISTRICNTIHLTISABIINTI 0 I 0 I 0 I +---+---+---+---+---+---+---+---+

1 => Enable interrupts

1 => Software abort

1 => Halt operation

1 => Continue opration

1 => Start operation

MEMORY TRANSFER CQUNTER (MTC) [90DA-90PB I OFFAODA-OFFADDB]

15 +---------+---------+ IWORDCOUNTI

+---------+---------+

(E.g., 512 to transfer a page.)

MEMORY ADDRESS REGISTER (MARl [gDPe-900F I OFrAOOe-OFFAOOF]

31 24 16 +--------+--------+--------+--------+

HIGH I UP-MID I LO-MID I LO +--------+--------+--------+------..,.-+

9018 901A 901C 901E

Load with MQVEP.L AQ,9018.

DEVICE ADDRESS REGISTER (PARl [9014-9017 I DFFAP14-0FFA01 71

Not used.

BASE TRANSFER COUNTER (BTC) [901A-901B I PFFADIA-DFrAO] B1

SaIJle as Memory Transfer Counter.

7-12 APOLLD CONFIDENllAL INTERNAL USE ONLY.

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BASE ADDRESS REGISTER (BAR) r 901 C-901F I OFFAO] C-OFFAOIF

Same as Memory Address Register.

NORMAL INTERRUPT VECTOR REGISTER 9025 I OFFA025

Not used.

ERROR INTERRUPT VECTOR REGISTER 9027 I DFFAQ27

Not used.

MEMORY FUNCTION CODE REGISTER (MFCR) 9029 I OFFA029

+---+---+---+---+---+---+---+---+ 1010101010lFIFIFI +---+---+---+---+---+---+---+---+

O-ring transmit data 1 - ring transmit header

Function code not used on other channels.

CHANNEL PRIORITY REGISTER (CPR) [9020 I OFFA020

+---+---+---+---+---+---+---+---+ 101010101010lPIPI +---+---+---+---+---+---+---+---+

I Channel 0: a - ring receive header

(highest) Channel 1 : 1 - ring receive data Channel 2 : a - ring transmit Channel 3 : 1 - Winchester/floppy

(lowest)

DEVICE FUNCTION COPE REGISTER (DFCR) [9031 I OFFA031

Not used.

BASE FUNCTION COPE REGISTER (BFCR) 9039 I OFFA039

Not used.

APOLLO CONFIDENTIAl. INTERNAL USE ONLY. 7-13 DN3xx

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[AtILT FRAME

BUS/ADDRESS ERROR STACK FRAME FORMAT fDN30Q/320)

DN3xx

15 +-----------------------+

+00 I STATUS REGISTER I +-----------------------+

+02 PROGRAM I SHORT +------------+ FRAME

I COUNTER I I +-----------------------+ I

+06 I FRAME FORMAT/VOR I V +-----------------------+ ---------

+08 I SPEC. STATUS WORD I +-----------------------+

+OA I FAULT I +- - - - - - - - - - - -+

ADDRESS +-----------------------+

+OE I INTERNAL REGISTER I +-----------------------+

+10 I DATA OUTPUT BUFFER I +-----------------------+

+12 I INTERNAL REGISTER I +-----------------------+

+14 I DATA INPUT BUFFER I +-----------------------+

+16 I INTERNAL REGISTER I +-----------------------+

+18 I INSTRUCTION REGISTER

+1A +-----------------------+

INTERNAL REGISTERS

BUS ERROR

FRAME

+3A +-----------------------+ -------------------

7-14 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

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BUS/ADDRESS ERROR STACK FRAME FORMAT (QN330)

15 (medium) 15 (long) +-----------------------+ +-----------------------+

+00 I STATUS REGISTER +00 STATUS REGISTER

+-----:..-----------------+ +-----------------------+ +02 I PROGRAM I +02 I PROGRAM I

+- - - - - - - - - - - -+ +- - - - - - - - - - - -+ COUNTER COUNTER

+-----------------------+ +------.:..----------------+ +06 1010 0000 0000 1000 +06 1011 0000 0000 1000

+-----------------------+ +-----------------------+ +08 I internal register I +08 I internal register I

+-----------------------+ +-----------------------+

+OA I SPEC. STATUS WORD +OA I SPEC. STATUS WORD +-----------------------+ +-----------------------+

+OC I inst pipe stage c +OC I inst pipe stage c +-----------------------+ +-----------------------+

+OE I inst pipe stage b I +OE I inst pipe stage b I +-----------------------+ +-----------------------+

+10 DATA FAULT +10 DATA FAULT

+- - - - - - - - - - - -+ +- - - - - - - - - - - -+ ADDRESS ADDRESS

+-----------------------+ +-----------------------+ +14 I internal registers I +14 internal registers

+-----------------------+ +-----------------------+ +18 DATA OUTPUT

+------------+ I BUFFER I +-----------------------+

+lC I internal registers I +20 +-----------------------+

Real fault addre5s:

DF => data fault address

FB => if medium then PC + 4 if long then stage b address

Fe => if medium then PC + 2 if long then stage b 2 addr -2

Coprocessor Mid-instruction frame

+18 DATA OUTPUT

+- - - - - - - - - - - -+ SUFFER

+-----------------------+ +lC I internal registers

+-----------------------+ +24 STAGE"S

+------------+ ADDRESS

+-----------------------+ +28 I internal registers I

+-----------------------+ +2C DATA INPUT

+- - - - - - - - - - - -+ BUFFER

+-----------------------+ +30 I I

/ internal / / registers / I I

+5C +-----------------------+

c 14 +------+------------+------+------------+------------------------+

SR PC I 9xxx J Instr Addr I Internal Registers +------+------------+------+------------+------------------------+

APOUO CONFIDENTIAL INTERNAL USE ONLY. 7-15 DN3xx

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DN3xx

FRAME FORMAT/VECTOR OFFSET WORP lDN300/320)

15 12 +-----+-+-+------------+ I FMT 10 I 0 I VEC OFFSET I +-----+-+-+------------+

0000 - four-word format: SR, PC, VOR 1000 - 29-word 68010 format.

FRAME FORMAT/VECTOR OFFSET WORD lDN330)

15 12 +-----+-+-+------------+ I FMT 10 101 VEC OFFSET I +-----+-+-+------------+

0000 - 4-word format: SR, PC, VOR 0001 - Throwaway (4 words) 0010 - Instruction (trapv, chkv) (6 words) 1000 - 29-word 68010 bus error 1001 - Coprocessor mid-instruction (10 words) 1010 - 68020 medium bus errur (16 words) 1011 - 68020 long bus errur (46 words)

SPECIAL STATUS WORP lDN300/320}

15 14 13 12 11 10 9 8 +-----------+-----------+-----------+-----+ IRRI 0lIF1DFIRMIHBIBYIRWI 01 01 01 01 FeN I +--------- -+-----------+-----------+-----+

I

o - Write 1 - Read

1 => Byte transfer

001 - User data 010 - User program 101 - Supervisor data 110 - Supervisor

program III - Interrupt

acknowledge

1 => High byte (valid iff BY on)

1 => Read-modify-write cycle

o - Data store from POB 1 - Data fetch to DIB

1 => Instruction fetch

o - Processor will rerun bus cycle on RTE 1 - Software has completed the bus cycle prior to RTE

7-16 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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SPECIAL STATUS WORD IDN330)

15 14 13 12 8 7 +-----------+-----------+--+--+-----+-----+ IFCIFBIRCIRBI 01 01 OIDFIRMIRWI SIZ 1 FeN 1 +-----------+-----------+--+--+-----+-----+

I I I I

Size

0 - Write

1 - Read

001 - User data

010 - User program 101 - Supervisor data 110 - Supervisor: prog

111 - CPU space ref

00 longword 01 byte

10 word

11 3 byte

Read-modify-wr:ite cycle

ault/rerun flag for data cycle

Rerun flag for Stage B

Rerun flag for Stage C

Fault on Stage B of instruction pipe

Fault on Stage C of instruction pipe

FAULT TYPES

Reset

Bus Error

Address Error

Trace

Interrupt Illegal Ins.

Privilege Ins.

TRAP I TRAPV

CHK

Zero Divide

Processing

Current instruction is aborted.

Exception occurs before

next instruction.

Processed by normal instruction

execution.

Group 0 exceptions have the highest priority.

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 7-17 DN3xx

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FAULT VECTORS

Exception vector at [ 100400 I 0 (+ => new on 68020, &=> new on 68010, - => unused)

V~!,;;;tQ;!; ArjrjrflS:S: A~s:igrunent frame length FF is (020s)

00 000 Reset: Initial SSP 004 Reset: Initial PC

02 008 Bus Error 3A 20,5C 8,A,B 03 OOC Address Error 3A 20,5C a,A,B 04 010 Illegal Instruction 8 8 05 014 Zero Divide 0,2 06 018 CHK Instruction 0,2 07 01C TRAPV Instruction 0,2 08 020 Privilege Violation 0 09 024 Trace 0,2 OA 028 unimp. instruction (A-line) 0 OB 02C Unimp. instruction (F-line) OC 030 (Unassigned, reserved)

+ 00 034 Coprocessor protocol violation - 14 & OE 038 Invalid Stack Format 8

OF 03C Uninitialized vector interrupt -10-17 040 (Unassigned, reserved)

18 060 Spurious Interrupt & 19-1F 064 Level 1-7 Auto-Vector

19 064 SIO (rcv and xmit)

1A 068 Keyboard input 1B 06C Ring 1C 070 Display 10 074 Disk/floppy 1E 078 Timers 1,2,3 1F 07C Parity error

20-2F 080 TRAP Instruction Vectors + 30 OCO FP Branch or Set on Unordered cond (FPBSUN)

31 OC4 FP Inexact Result (FPINEX)

+ 32 OC8 FP Divide by Zero (FPDIVZ) 33 OCC FP Underflow (FPUNFL)

34 ODO FP Operand Error (FPOPER)

35 004 FP Overflow (FLOVFL) 36 008 FP Signalling NAN (FPSNAN)

37-3F ODC (Unassigned, reserved)

DN3xx 7-18 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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FLOATING-POINT FORMAT

Single-Pree] 9] on Floating-Point Format

Implied normalization bit

\/ 31 22

+--------------------------------+ J SEEEEEEEEMMMMMMMMMMMMMMJ +--------------------------------+

- Sign; S ,.. 1 => Negative Eo 0 E - Exponent plus 127 Mo oM - Mantissa

Double-Preej 9] pn Floating-Point Format

31

Implied normalization bit \/

19 +--------------------------------+ 1 SEEEEEEEEEEEMMMMMMMMMMMMMM I +--------------------------------+ I-I +--------------------------------+

- Sign; S - 1 -> Negative Eo 0 E - Exponent plus 1023 Mo oM - Mantissa

APOUD CONFIDENTIAL INTERNAL USE ONLY. 7-19 DN3xx

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FLOATING-POINT REGISTERS (PN33Q)

Floating Point Cont rol Register

31 16 +-----------------------------------------------+-

o +-----------------------------------------------+-

DN3xx

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 -+--+--+--+--+--+--+--+--+--+--+--+--+-----------+ 1111111111111 unused I

-+--+--+--+--+--+--+--+--+--+--+--+--+-----------+

+> rounding mode (rod) 00 to nearest 01 toward zero 10 toward minus infinity 11 toward plus infinity

> rounding precision (prec) 00 extended 01 single 10 double 11 (undefined, reserved) this is

reactive precision on FPX > inexact decimal input (inexl)

> inexact operation (inex2) > divide by zero (dz)

> underflow (unfl) > overflow (ovfl)

> operand error (operr) signalling not a number (snan)

branch/set on unordered condition (baun)

7-20 APOLlO CONFIDENTIAL INTERNAL USE ONLY.

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Floating point Status Register lDN330)

Condition Code Byte Quotient Byte

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 +-----------+--+--+--+--+--+--------------------+-

unused I quotient +-----------+--+--+--+--+--+--------------------+-

\ ------------------/ +> seven least significant

bits of quotient > sign of quotient

> not a number or unordered > infinity

> zero > negative

Exception Status Byte Accrued Exception Byte I

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 - - -+--+--+--+--+--+--+--+--+--+--+--+--+--+--------+

I unused I -+--+--+--+--+--+--+--+--+--+--+--+--+--+--------+

I I I > inexact (inex)

> divide by zero (dz) > underflow (unfl)

> overflow (ovfl) > invalid operation (iop)

> inexact decimal input (inexl) > inexact operation (inex2)

> divide by zero (dz) > underflow (unfl)

> overflow (ovfl) > operand error (operr)

> signalling not a number (snan) > branch/set on unordered condition (bsun)

FPU fDN320)

The FPU is essentially the same as PEB without the cache (and different microcode). Refer to the PEB section of Chapter 8, DN400,DN420,DN600.

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 7-21 DN3xx

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MEMORY CONTROL/STATUS REGISTERS (MCSR)

Memory Control Register (DN300/320)

Address: [ 8005 I OFFB405 ] +---+---+---+---+---+---+-..;;.-+---+ 17161514131211101 +---+---+---+---+---+---+---+---+

\ / 1 LEOS I 1 => Enable parity err traps

TOP BOT

(RIGHT) (LEFT) => Force right byte parity

1 => Force left byte parity

Memory Status Register lDN3001320)

DN3xx

Address: [8006 I OFFB406 1 15 +-------------+---+---+---+---+ I FAILING PPN j 3 I 2 I 1 I 0 I +-------------+---+---+---+---+

1 => parity error traps enabled

1 => Right byte parity error

1 => Left byte parity error

1 = > Parity during DMA cycle

Writing MSR clears parity error condition.

7-22 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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Memory Control/Status [SQ04-SQ0713FFB404-3FFB4071 (Byte wri teable) fDN330)

I------R/O------I------CLR------I--R/W--I--R/O--I 31 12 11

+---------------+---+---+---+---+---+---+---+---+---+---+---+---+ IFAILING A(21:2) I I I I I +---------------+---+---+---+---+---+---+---+---+---+---+---+---+

20 bit 3 2 1 0

Byte parity

Error Flags (0 => error)

Failing addr bit 1

1 => B Port Access

1 => DMA Access

1 => parity Interrupt Enable

1 => Write Bad parity

LEDS (Hardware Rey Register r S008-8009 I 3FFB4 08-3FFB4 0 91

15 8 7 +-----------------+----------------+ ILEDSxxxxlHDWR REVI +-----------------+----------------+

MEMORY MANAGEMENT UNIT (MMU) fDN3001320)

PID /PRIV /POWER

MMU Status

PIP/PRIV Register

8000 FFB400

8002 FFB402

Address: [8000 I OFF8400 1 15 8

+---+--------+-----+---+---+---+ j 0 1 ASID 1-----1 DIP 1 M I +---+--------+-----+---+---+---+

APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

1 - Enable MMU

1 - Enable PTT access

o - DOMAIN 0 1 - DOMAIN 1

7-23 DN3xx

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MMU St atus Register

Address: ( 8002 I OFFB402 1 +---+---+---+---+---+---+---+---+ 17161514131211101 +-- +---+---+---+---+---+---+---+

1 => .MHO enabled

1 => PTT access enabled

=> UNUSED

1 => Interrupt pending

1 => Normal mode

=> Bus timeout

=> Page fault

1 => Access violation

MEMORY MANAGEMENT UNIT (MMUl /DN330)

PID/PRIV IPQNER

MMU Status

PID/PRIV Register

8000 3FFB400 8002 3FFB403

Address: [8000 I 03FFB400 ]

15 8 I----W/O-----I 1 R/O I----R/W----I +---+--------+-----+---+---+---+---+ 1 0 1 ASID 1-----1 F 1 DIP 1 M 1 +---+--------+-----+---+---+---+---+

DN3xx

1 - Enable MMU (R/w - was WiD)

1 - Enable PTT access

- Domain 0 1 - Domain 1

FP Trap = 1 if trap occurred Cleared by write to FPU Owner Reg.

7-24 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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FgIl OWNER REGISTER 8002 3FFB402

6 0 I------W/O-----------I

+---+--------------------+ I X I ASIO of FPU OWNER I +---+--------------------+

1 Unused

WJ Status Register 8003 03FFB403

+---+---+---+---+---+---+---+---+ 17161514131211101 +---+---+---+---+---+---+---+---+

o -> Stingray 020 board (R/O) (was MMU enabled - changed for O/S)

1 => PTT access enabled

orderly shutdown (toggle)

1 => MMU Error (Timeout or parity Error) valid only if bit 5 set (was Int pending)

1 => Normal mode

=> BUs/MMU timeout or MMU Parity Error (was Bus Timeout only)

-> Page fault

=> Access violation

[Any write to regi.ster clears bit$ 5-7]

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 7-25 DN3xx

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MMU Parity Register r8QOA-800B]

I--R/W--I--CLR--I----------------R/O----------------------------1 15 12 11 0

+---+---+---+---+-----------------------------------------------+ I PFTX (PFT parity Error Index) I

+---+---+---+---+-----------------------------------------------+ 1 1 1 1 1 1 1 1 I I I 1 -> PFT Parity Error 1 1 1 I I 1 => PTT Parity Error

1 1 I 1 => MMU Parity Fault Enable (MMU PFE)

1 1 => Write Wrong MMU Parity (80th PFT and PTT)

DN3xx

[Bus error occurs on parity operation if MMU PFE is set,

and bits 12 and 13 WERE clear1

in normal MHO

Diagnostic Loopback Register {800C-800F] - Loopback of SBUS signals - TBD

7-26 APOLlD CONRDENTIAL. INTERNAL USE ONLY.

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p;GE rB;ME TABLE ENTRY (PFTE)

(type npfte R in mmpft.pvt.pas)

31 24 23 16 15 8 7 +--------+--------+--------+--------+ I AAAAAAAS I DWRXPPPP I EMUGLLLL I LLLLLLLL I

+--------+--------+--------+--------+

A .. A - Address space 1D (0-127) (.elsid) S - Supervisor domain (.elccess) D - DOMAIN (0 or l) W - Write access R - Read access X - Execute access P .. P - Excess virtual page nmnber (.xsvpn)

- End of chain (. eoc) M - Page modified (.bbmod) U - Page referenced (. used) G - Page is global (. global) L •• L - PFT hash thread (.link)

PFT at 4000 I FFB800 ] through [ 8000 I FFF800 ].

There is one entry per physical page of memory.

PAGE TRANSLATION TABLE ENTRY (PTTE)

(type "ppn_t" in base.ins.pas)

15 +-----------,..----+ I XXXxpppppppppppp I +----------------+

P •• P - Physical page number (PPN)

xxx - Junk - ignore

Page Translation Table at [ n/a I 700000 through [ nla I 800000 1

One PPTE every 1024 bytes in tabl.e.

Refer to the FPU section.

APOLLO CONFJDENTIAL INTERNAL USE ONLY. 7-27 DN3xx

Page 166: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

PROM ENTRY POINTS

100 : dc.w 2, a 2 ~> swallow, no aux info 104: getc returns char in D1 108 pute print.s char in D1 laC init _dsk initialize disk 110 read_dsk read a record from disk

11' reload_ font reload font 118 polle returns ehar in D1, else -1 in d1.w

11C quiet_ret quiet return to prom

RING REGISTERS

RING page at [ 9800 I OFF9COO ]

WRITE FUNCTION READ FUNCTION

15 15 +-----------------------+ +-----------------------+

+00 XM:IT COMMAND +00 XMIT STATUS +-----------------------+ +-----------------------+

, +02 I RCV COMMAND +02 Rev STATUS +-----------+-----------+ +-----------+-----------+

+04 I TMASK UNUSED +04 TMASK UNUSED +-----------+-----------+ +-----------+-----------+

+06 I DIAG COMMAND +06 I DIAG STATUS +-----------------------+ +-----------------------+

+08 RING +08 RING

+- - - - - - - - - - - -+ +- - - - - - - - - - - -+ I ID I I ID I +-----------------------+ +-----------------------+

+OC UNUSED +-----------------------+

tOE UNUSED I +-----------+-----------+

+10 ID3 UNUSED +-----------+-----------+

+12 ID2 UNUSED +-----------+-----------+

+14 ID1 UNUSED +-----------+-----------+

+16 I IDO UNUSED I +-----------+-----------+

DN3xx 7-28 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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TRANSMIT COMMAND [9800 I OFF9COO

4000 transmit interrupt enable 2000 transmit enable (start the transmit) 1000 force transmit

NOTES: 1. To start a tramsmit normally, use 6000. 2. To force transmit, use 7000. 3. To stop a transmit that has already started, clear the

transmit enable bit. 4. Writing anything to this register clears the transmit

interrupt.

RECEIVE COMMAND [9802 I OFF9C02

4000 enable interrupt 2000 enable receive

NOTES:

(start the receive)

1. To start a normal receive, use 6000. 2. To stop a receive that has already started, clear the

receive enable bit.

TRANSMIT STATUS r 9800 I OFF9COO

8000 interrupt pending 4000 interrupt enabled 2000 busy 1000 disconnected 0800 bi-phase error 0400 elastic store buffer 0200 no return (a complete pkt frame never arrived) 0100 0080 ack parity error (O=no error, l::=error detected) 0040 external (err during DMA, e.g. parity, bus-error) 0020 protocol (the pkt hdr with FROM ID never came back) 0010 icopy (somebody Intended to COpy -- was willing

to rev) 0008 ack byte errbit (somebody (anybody! ) set the "error

detected" bit) 0004 copy (somebody did COpy the pkt) 0002 wack 0001 underrun (DMA didn't keep up with x..-nit data rate)

NOTES:

1. A successful transmit will have a transmit status of 0014

2. A WACK will have a transmit status of 0012

APOlLD CONFIDENTIAl. INTERNAL USE ONLY. 7-29 DN3xx

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RECEIVE STATUS [9802 I OFF9C02

8000 interrupt pending 4000 interrupt enabled 2000 busy 1000 disconnected 0800 bi-phase error 0400 elastic store buffer error 0200 timeout (The hdr of a msg was seen, but it never ended) 0100 crc errOr 0080 ack parity error (O=no error, l=errOr detected) 0040 external error (err during DMA, e.g. parity, bus-error) 0020 DMA end of range 0010 icopy (somebody before me Intended to COPY) 0008 ack byte errbit (somebody before me set the "error

detected" bit) 0004 copy (somebody before me did COPY the pkt) 0002 wack (somebody before me WACKed the ptk) OODl overrun (DMA didn't keep up with rcv data rate)

DIAGNOSTIC STATUS [9806 I OFF9C06 J

DN3xx

8000 interrupt pending (badykt_cnt_overf1ow interrupt) 4000 interrupt enabled (badykt_cnt_overflow interrupt) 2000 connected to the network 1000 sticky bi-phase (error seen since bit was

cleared) 0800 delay on (the delay is enabled) 0400 sticky good_seen (good pkt seen since bit

cleared) 0200 sticky elastic store bfr err (error seen since bit was

cleared) 01FF bad packet count (9-bit counter far 1st detecting

errs) NOTES:

1. Counter is number of times this node found an errOr in a packet going by (regardless of packet target node ID), found the error bit in the ackbyte clear, and so was the first to set the error bit to a one.

2. The bad_pkt_cnt interrupt occurs when the counter counts from 255 to 256 (i.e. first uses its highest order bit) .

3. The counter sticks at 511 if more than 511 errors

4. Writing anything to the diagnostic cormnand register (word) (see below) clears interrupt and all sticky bits.

7-30 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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DIAGNOSTIC COMMAND (9806 I OFF9C06 J

8000 dIna test 4000 enable interrupt 2000 connect 1000 disconnect 0800 delay off 0400 delay on

(loop xmit DMA to rcv DMA) (bad_pkt_cnt overflow intterupt) (to the network) (from the network) (disable the delay) (enable the delay)

0200 snoop (accept all pkts but only set ackbyte for packets actually addressed to me)

NOTE: Writing anything to the register (word) clears interrupt and all sticky bits in diagnostic status register.

TMASK [9804 I OFF9c04 1

80 broadcast 40 hardware diagnostic 20 thank you 10 please 08 paging 04 02 software diagnostic 01 xtype3

NOTE: Except for BROADCAST, these bits are software defined.

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 7-31 DN3xx

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SERIAL I/O INTERrACE

SIO page at [ 8400 I OFFBOOO 1

The 510 lines are implemented with a Signetics SC2681 DUART. The display keyboard interface implemented with a Motorola MC6850.

When both 510 lines are being used, it is possible to have incompatible baud rates due to l.imi.tations of the SC2681 Chip. One 510 l.ine can't have a baud rate from Group A while the other SIO line is set from Group B:

Group A Group B

50 75 7200 150

2000 19.2K

Register surranary: READ WRITE

8400 OFFBOOO Mode Reg. A (MRA) Mode Reg. A (MRA) 8402 OFFBOO2 Status Reg. A (SRA Clock Select Reg. A (CSRA)

840' OFFBOO4 Command Reg A (CRA)

8406 OFFBOO6 Rev HId Reg. A (RHRA) Transmit HId Reg. A (THRA) 8408 OFFBOOa Input Port Change Reg. Aux. Control Reg. (ACR)

(IPCR) 840A OFFBOOA Interrupt Status Reg. Interrupt Mask Reg. (IMR)

(ISR)

8410 OFFB010 Mode Reg. B (MRB) Mode Register B (MRB) 8412 OFFB012 Status Reg. S (SRS) Clock Select Reg. S (CSRS) 8414 OFFB014 Command Reg B (CRS)

8416 OFFB016 Rcv Hld Reg. B (RHRB) Transmit HId Reg. B (THRS)

841A OFFB01A Input Port Register Output Port Config. Reg. (IPR) (OPCR)

841C OFFB01C Set Output Port Reg. (OPR)

841E OFFB01E Reset Output Port Reg. (OPR)

8420 OFFB020 Display Keyboard Status/Command Register 8422 OFFB022 Display Keyboard Data I/O Register

DN3xx 7-32 APOLlO CONFIDENTIAL INTERNAL USE ONLY.

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MODE REGISTER A fj rst aCcess [8400 OFF8000

t-------------"""-t---------------t 1 7 161514131211101 t--------- -----t---------------t

"" 5 bits/char

1 - 6 o -1 -

= even parity 1 = odd

o = check parity 1 "'" force parity o = no parity 1 = special multidrop mode

report error on each char

1 1

1 1

1 1

1

1 1 1 1 1 1 1 1 1 1

1 :II accumulate error info since last reset err commrnand

1 1 1

o = interrupt on receiver ready 1 :s interrupt on input FIFO full

1 = drop RTS (OPO) wh~n input FIFO is full

MOpE REGISTER A second' subsequent accesses

(until mode register pOinter reset)

t---------------t---------------t 17161514131211101 t------- ... -------+---------------t

1 1 1 1 1 1 1 1 I I I I = 1 stop bit I I I I = 1.5 stop bits I I I I 1 = 2 stop bits 1 1 1 1 I I I 0 = transmit regardless of CTS (IPO) I I I 1 = wait for CTS to tran.s:mi.t 1 1 1 I I 0 = leave RTS as is I I 1 "'" drop RTS (OPO) after transmitter disabled 1 1 o 0 = normal mode

1 - auto echo mode o = local loop mode 1 = remote loop mode

APOLLO CONFIDENTIAL INTERNAL USE ONLY. 7-33 DN3xx

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DN3xx

STATUS REGISTER A [8402 I OFFB002 read-gnly

+---------------+---------------+ 17161514131211101 +----- ---------+---------------+

1

I 1 == input data ready I (reset by reading RHR)

1

I input FIFO full (reset when I RHR and no data in shift reg)

1 = transmitter ready (reset when THR loaded)

1 = transmitter underrun (reset when THR loaded)

rcver overrun (reset by reset error status cmd)

rcv parity error (reset by reset error status cmd)

1 = receive framing error (reset by reset err status cmd)

1 = break received (reset by???)

CLOCK SELECT REGISTER A [8402 I OFFS002 write-only

4 3 +---------------+----------------+ I receive clock I transmit clock I +---------------+----------------+

ACR[7]=0 ACR[7]=1 ACR[7]=0 ACR[7]=1

0 - 50 75 8 - 2400 2400

1 - 110 110 9 - 4800 4800 2 - 134.5 134.5 A - 7200 1800 (??)

3 - 200 150 B - 9600 9600 4 - 300 300 C - 38.4K 19.2K

5 - 600 600 D - Timer Timer 6 - 1200 1200 E - IP4-16x IP4-16X

7 - 1050 2000 F - IP4-1X IP4-1X

7-34 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

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COMMAND REGISTER A [8404 j OFFBOQ4 write-ooly

+---------------+---------------+ 17161514131211101 +---------------+---------------+

1 1 I I 1 = enable receiver

1 1 I I disable receiver 1 1 I I 1"., enable transmitter

1

must be

disable transmitter

o = no-op = reset mode register pointe_t: = reset & disable receiver

1 = reset transmitter o = reset error status

reset break-change interrupt start transmitting break stop tranmsmitting" break

RECEIVE/TRANSMIT HOI DING REGISTER A 8406 I OFFB006

+-------------------------------+ D A T A

+-------------------------------+

READ = top byte in input FIFO WRITE = byte of data to transmit

INPUT PORT CHANGE REGISTER [8408! OFFB008 read-only

change in IPx: state of IPx: +---------------+---------------+ 13121110131211101 +---------------+---------------+

1PO - Clear To Send (CTS) - A

1P1 - Clear To Send (CTS) - 8 1P2 - Data Carrier Detect (DCD) - A

1P3 - Data Carrier Detect (DCD) - 8

APOllO CONFIDENTIAL. INTERNAL USE ONLY. 7-35 DN3xx

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DN3xx

AIJXII.IARX CONTBOI. REGISTER r 6406 OFFS006 1 write-only

+---------------+---------------+ 1 7 161514131211101 +---------------+---------------+

1 1 I I enab int on change in IPQ 1 1 I enab int on change in IP! 1 I enab int on change in IP2 1

I enab in on change in IP3 1

counter/timer stuff

aud rate generator set select (see clock select reg)

INTERRUPT STATUS REGISTER f a40A I OFFBOaA 1 read-only

+---------------+---------------+ 17161514131211101 +---------------+---------------+

1 1 1 1 1 1 1 1 I I I I I I I transmitter ready A I I I I I I +-rcver rdy or inpt FIFO full A I I I I I +-----beginning or end of break A

1 1 1 1 1 I I I +---------counter ready (not used) 1 1 1 I I transmitter ready B

I I +---receiver ready or input FIFO full B I +-------beginning or end of break B

1 +-----------input port change status

INTERRUPT MASK REGISTER [R40A I OFFBODA write-gnly

+---------------+---------------+ 1 7 161514131211101 +---------------+---------------+

Each bit enables the corresponding bit in the Interrupt Status Register.

MODE REGISTER B [8410 I OFFB010

See MODE REGISTER A.

STATUS/CLOCK SELECT REGISTER B r 8412 OFFBO!2

See STATUS/CLOCK SELECT REGISTER A.

7-36 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

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COMMAND REGISTER B [ 8414 OFFB014

See COMMAND REGISTER A.

RECEIVE/TRANSMIT HOLDING REGISTER a [8416 OFFB016

See RECEIVE/TRANSMIT HOLDING REGISTER A.

INPUT PORT REGISTER [ 841A I OFFa01A 1 read-only

+-----------------------+-----------------------+ I IP7 I IP6 I IPS I IP4 I IP3 I IP2 I IPI I IPO I +-----------------------+-----------------------+

IPO - Clear To Send (CTS) - A

IP1 - Clear To Send (CTS) - B

IP2 - Data Carrier Detect (DCD) - A IP3 - Data Carrier Detect (DCD) - B IP4-IP7 - Undefined

OUTPUT PORT CONFIGURATION REGISTER

write-only

+---------------+---------------+ 17161514131211101 +---------------+---------------+

Load with o. This selects:

DPD "" Ready To Send (RTS) A

DPl = Ready To Send (RTS) B

841A OFFB01A

DP2 = Data Terminal Ready (DTR) A

DP3 = Data Terminal Ready (DTR) B

OP4 - OP6 - Unused orn = Speaker control

SET OUTPUT PORT REGISTER (OPR) 84iC OFFBOiC

write-only

+-----------------------+-----------------------+ I OP7 I OP6 lOPS I OP4 I op3 I OP2 I OPl I OPO I +-----------------------+-----------------------+

opO - Ready To Send (RTS) A

OPl - Ready To Send (RTS) B

OP2 - Data Terminal Ready (DTR) A

OP3 - Data Terminal Ready (DTR) B

OP4-0P6 ~ Unused

OP7 - Turn off speaker

APOUD CONRDENTIAL INTERNAL USE ONLY. 7-37 DN3xx

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DN3xx

RESET OUTPUT PORT REGISTER (oPR) 841E I OFFB01E

Write-only +-----------------------+-----------------------+ I OP7 I orG lOPS I OP4 I OP3 I OP2 I OPl I OPO I +-----------------------+-----------------------+

OPO - Ready To Send (RTS) A OPl - Ready To Send (RTS) 8

OP2 - Data Terminal Ready (DTR) A OF3 - Data Terminal Ready (DTR) 8 OF4-opG - Unused op7 - Turn on speaker

DISPLAY KEYBOARD STATUS REGISTER 8420 OFF8020

read-only

+---------------+---------------+ 17161514131211101 +- -------------+---------------+

receive data register full

transmit data register empty

no DeD (always 0)

no CTS (always 0)

receive framing error

receive overrun (reset by reading data)

receive parity error

l.nterrupt request (cleared by data read or write)

7-38 APOLLO CONFIDENTIAl. INTERNAL USE ONLY.

Page 177: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

DISPLAY KEYBOARD COMMAND REGISTER 8420 I OFFB020

write-only +---------------+---------------+ 17161514131211101 +--------- -----+---------------+

~7

~7

~7

~7

~8

1 ~8 0 ~8 1 ~8

1

o = clock/l 1 = clock/16 o = clock/64 1 = master reset

bits, even parity, bits, odd parity, bits, even parity, bits, odd parity,

bits, 2 stop bits bits, 1 stop bits bits, even parity, bits, odd parity,

2 stop bits 2 stop bits

stop bit stop bit

1 stop bit 1 stop bit

Set RTS, disable transmitter interrupt Set RTS, enable

= Reset RTS, disable 1 = Set RTS, transmit break, disable transmitter

interrupt 1 = Enable receiver interrupts (receive data register

full, overrun, loss of DCD).

DISPIAY KEYBOARD DATA REGISTER 8422 OFFB022

+-------------------------------+ D A T A

+-------------------------------+

READ = empties receive data register WRITE = loads transmit data register

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 7-39 DN3xx

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CHAPTER 8

DN400, DN420,DN600

physical vi rtual

100400 traps 400 prom 400 (one-to-one)

80000 phys mem 100800 phys mem 100000 debug data

40000 disp2_mem 20000 displ_ mem 10000 multibus

EOOO Color E400 Color EaOO Color BOOO PEB Ctl B400 FPU Cmd COOO FPU CS C400 Cache W 0 eaoo Cache W 1

FeOO Memory Ctl F400 disp 2 FOOO disp 1 BCOO ring 2 B800 ring 1

acoo floppy 8800 timers 8400 sios 8000 mmu 4000 pft

iomap

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 8-1

80000->FFFFF 100800 EOOOOO FAOOOO->FBFFFF FCOOOO->FDFFFF FEOOOO->FEFFFF FF6000 FF6400 FF680D FF7000 FF7400 FF7800 FF7COO FF8000 FF9000 FF9400 FF9800 FF9COO FFAOOO FFA800 FFACOO FFBOOO FFB400 FFS800->FFF7FF FFF800->FFF9FF

DN400,DN420,DN600

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CONFIGURATION

+------------+ +-------------+ +---------+ I MEMORY 1--1 MEMORY 1---1 CPU 1 +------------+ I MANAGEMENT I +----+----+

I UNIT (MMU) I I +----++-------+ I

I I +----+----+ PHOEBUS 11======1 FLOPPY I

+---------------------+ I +---------+ I +---------------------+ (Shugart) II I I +-------------+ I +---1 BLOCK 1---------------------+ 1 +---1 MULTIPLEXOR 1------++------------+ I I I +-------------+ I I I I I I +------+ +------+ I I I RING I I DISK I I I +------+ +------+ II (Priam) I I +--------------+ I +---1 NODE PERI- 1-----+ 1 +---1 PHERAL ADAPTER 1----+ I t I +--------------+ I I MULTI BUS II II I I +--------------+ I I I +--1 TIMER I I +--------------+ I I +--------------+ I +--1 LINE PRINTER I I I I +--1 CONTROLLER I I I +--------------+ I I +------++------+ 1+--1 BOOT PROM I II II I I +--------------+ I I +------++------+ I I I I 1 LINE PRINTER I I I +--------------+ I I +--------------+ I +== I CAL CLOCK 1 I I (Printronix) I I +--------------+ I I I I I I (Tapemaster) I I +--------------+ I I +------------+ I +== I SIO LINES I +--1 MAG TAPE I I +--+--+--+--+--+ I +--1 CONTROLLER I I I I I I +-----++-----+ I I 0 I 1 2 3 I I I I I I +---+ Spinwriter I I +----++----+ II IKBDI Tablet II 1 MAG TAPE I I I +---+ HASP, 3270 I I +----------+ I I I I (Cipher-F880) I I +---------+ +----+ I I +------------+ I +---+ DISPLAY 1:= I TUBE I 1+----------------1 SMD I +---+ MEMORY I +----+ I +----------------1 CONTROLLER ! I I +---++----+ I I +-----++-----+ I I I I I +--- TWO FREE I I I I +---++----+ I +---- SLOTS +-----++-----+ 1+===1 BLT I II I AMPEX I I +---------+ I I VERSATEC I 300 MB SMD I I I I I ETHERNET +------------+

DN400,DN420, DN6QO 8-2 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

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DISPLAY BOARD JUMPERS

15 GREEN CRT:

WOl-DOWN W02-DOWN w03-UP W04-UP W05-up w06-up W07-TOP-LEFT* WOB-UP W09-UP Wl.O-UP WI I-UP WI2-UI? WI3-LEFT WI4-RIGHT W15-LEFT WI6-TOP-LEFT WI7-UP wl8-up wl9-up W20-UP W21-UP w22-up w23-up w24-UP W31-UP

15 BLACK & WHITE CRT:

WOI-DOWN W02-DOWN W03-UP W04-UP WOS-UP W06-DOWN W07-* w08-up w09-up IO-DOWN Wll-DOWN WI2-DOWN wI3-LEFT WI4-LEFT WIS-LEFT wI6-* WI7-DOWN wl8-up WI9-DOWN W20-DOWN W21-UP W22-0UT W23-DOWN W24-DOWN W31-UP

19 BLACK &. WHITE CRT

WOI-DOWN W02-UP W03-UP W04-DOWN WOS-DOWN W06-DOWN W07- * WOB-DOWN W09-DOWN WID-DOWN WII-DOWN WI2-DOWN w13-RIGHT WI4-LEFT WI5-RIGHT wI6-* WI7-DOWN wl8-up WI9-DOWN W20-DOWN w21-DOWN w22-DOWN w23-DOWN w24-DOWN W3I-DOWN

* W07 AND w16 SHOULD BE SET BY SPECIFICATIONS ON CLOTH TAG,

MOUNTED ON PCB.

DISPLAY BOARD 2

W25-DOWN

W27-DOWN

w29-DOWN

W26-DOWN

W2B-DOWN

W30-DOWN

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 8-3

DISPLAY BOARD I

W25-RIGHT w27-RIGHT

w29-up

W26-UP w28-up

w30-up

DN400,DN420,DN600

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ARRAY BOARD JUMP ER PLACEMENT:

ARRAY BOARD JUMPER PLACEMENT:

BOARD ORIENTATION: EJECTORS FACING UPWARDS

JUMP W01 LOCT -A08 APR 1 LEFT APR 2 RIGHT

W07 W09

WOO

W03 W04 -A11 -A12

UP UP

W02 -ADO

LEFT RIGHT DOWN DOWN

W05 -A11

UP DOWN

W01 W02 W03 W04

W05 W06

WOG -A12

UP DOWN

W07 WOB C02·02 C02·08 UP UP DOWN UP

WOO C02-18 OUT IN

1I1111111111r--------t�~1~1~1~1.'.:1~1.'.:1~1~1~1~1.'.:"~'~11 1111111111111111

DN400,DN420,DN600 8-4 APOLlD CONFIDENTIAL INTERNAL USE ONLY.

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CONTROL BOARD JUMPER PLACEMENT:

Control Board Jumper Placement: Board orientation: ejectors facing upwards

Ordar01 Board$: Facing Front of Noda

W" WOB

,-, Orientation

WO, W07 woe <Rev 12

>= Rev 12 U, O~ 0.= Right u, u, O~" None

800Une O~ 0_" 00= 0_" AI"" U, U, Oo~ 0_" 1024Llne o.~ Down 00= O~ AI"" U, U, o.~ U,

APOLW CONFIDENTIAL INTERNAL USE ONlY. 8-5 DN400, DN420,DN600

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BLT REGISTERS

Source and Destination Control Register·

31 16 +----------------+----------------+ I Y addr. control I X addr. control I +----------------+----------------+

Y address control: X address control:

~ 0202 0020

~ 0606 0060

OS Virtual Address

(ReS) Read source control reg. $FF988C (WCS) Write source control reg. $FF9884

(RCD) Read de13tination control reg. $FF9888 (WCD) Write destination control reg. $FF9880

source/pest inat ion Start lEnd Registers·

31 26 25 16 +------+----------+------+----------+ I-----V 1 y 1------1 X 1 +------+----------+------+----------+

Y-coordinate X-coordinate (Low order four bits are write only)

V - Uaed in BLTs to or from main memory

OS: V;i,;I;tua.l Add;l;s:.~a (RSS) Read source start reg. $FF989C (WSS) Write source start reg. $FF98AC (RES) Read source end reg. $FF9894 (WES) Write source end reg. $FF98B4

(RSD) Read destination start reg. $FF9898 (WSD) Write destination start reg. $FF98A8 (RED) Read destination end reg. $FF9S390 (WED) Write destination end reg. $FF98BO

DN400,DN420,DN600 8-6 APOLLD CONFIDENnAL. INTERNAL USE ONLY.

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When start or end registers are used to specify locations in main memory, the correspondence is as follows:

31 26 19 16 +-----+--------+---+------+------+----+ 1------1 IOVPN 18N 1------1 BN 1----1 +-----+=-=======.+---+------+===.::.::.::.+----+

9: 7 6: 1

I I 1 +-----+

v v v

Start or End Register

+--------+---+------+-+ IIO Virtual Address

101 +--------+---+------+-+ <-':'-8--> <---10--->

Ilo virtual Byte in page page nwnber

15 8 7 4 3 +-----------------------+------------+-----------+ 1 X X X X X X X X I HALT STATUS I X IN SY SA 1 +-----------------------+------------+-----------+

IN = I Color display is executing an instruction queue starting at the address held in the instruction queue start location.

SY Color display is in system mode and will execute system functions.

SA Most significant address bit of all ilo addresses to be used by the color display for dma.

HALT STATUS

o 0 0 0 o 0 0 1 o 0 1 0 o 0 1 1 1 1 1 1

Normal complet ion Illegal opcode Unimplemented instruction BLT to main memory out of image memory region Not halted

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 8-7 DN400, DN420, DN600

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DISPLAY CONTROL AND STATUS REGISTER IOCSR)

FOOO FF98QO

15 14 13 12 11 10

+-------------------------------------------------------+ I GO NIL I +-------------------------------------------------------+

+-------------------------------------------------------+ I FROMMMI TO MM I I EOF I IDONE I NONCONF I DECRI FILL I ON

+-------------------------------------------------------+

R!W BIT NAME

R!W 15 GO

w NIL

- When set, this bit initiates a BLT

operation. When cleared, this bit

will abort any BLT in progress. When read, this bit will be set so long at

a BLT operation is in progress.

- When set, enables non-interlaced mode. In this mode, only the odd

lines are displayed at 60 frames per second.

W FROM MM - When set, enables BLTs from main memory as specified by the source

box. This bit must be set in advance of the write operation that initiates a BLT. It should be cleared by a separate write operation after the

BLT completes.

W TO MM - When set, enables BLTs to main

w IEOF

memory as specified by the destination box

- When set, enables a 60 hz interrupt request after the last line in the

current field. This request must be

acknowledged by reading from address DCSR + 2.

W IDONE - When set, enables interrupt request when BLT is done.

W NON CONF- When set, enables non-conforming BLT mode.

DN400, DN420, DN600 8-8 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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w DEeR

w FILL

w ON

- Must be set when doing a BLT that

decrements the x coordinate.

- When set, BLT fill mode is enabled.

- When set, display is on; when reset, display is blanked.

CONTROL REGISTER [ EDaD I FF6000 ] (System) ( E400 I FF6400 1 (User)

BIT NAME FUNCTION

15 Reserved Set to

14 Reserved Set to

13 Unused

12 Unused

11 Unused

10 Unused

9 - 4 WCSADH<5:0>+ During reads and writes to the

VIDENB+

RESET-

CLKRUN+

control store through the control store window these bits are used as the upper part of the control. store address.

This bit is used to enable or disable the video to the monitor.

When this bit is asserted the micro machine is reset,the control store may be accessed through its window and no micro code is executed. The display will continue to be refreshed, no changes will be made to the display memory, and no software visible state will change.

When this bit is set the micro machine clocks will run.

CLKSTEP+ When the CLKRUN+ bit is not set the micro-machine clocks can be made to go through one clock cycle by toggling this bit low to high.

APOLill CONFIDENTIAL INTERNAL USE ONLY. 8-9 DN400, DN420,DN600

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STATUS REGISTER

BIT NAME

15 DONE-

14 VBLANK-

13

FUNCTION

This bit is asserted by micro code to indicate that the micro machine is ready to handle reads or writes to its command pages

When this bit is asserted the display is currently in the vertical blanking period.

INST _ DONE- This bit is asserted by micro code to indicate that is done executing an instruction queue.

12 CLKON+ This bit indicates that the micro machine clocks running.

11 - 0 NXTAD<II: 0>- These bits are the state of the next address bus at the end of the last micro cycle. This is needed in order to know the micro address when micro code is being clock stepped.

DN400,DN420,DN600 8-10 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

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FAULT FRAME

15 +----------------+

SP--> +00 I-----------RNFFF I

+----------------+ +02 ACCESS . access address

+ fault_$b~s_info_t ADDRESS I

+----------------+ +06 I INSTRUCTION REG. I

+----------------+ +08 STATUS REG.

+----------------+ +OA I PROGRAM

COUNTER +OE +----------------+

Bus/addr excep. . inst_reg I

I I I

Group 1 & 2 I

Exceptions I

I I v v

R - Read operation (.write_op) N - Not instruction reference (.not_inst) FFF - Instruction function code (. function_code) :

001 User data

FAULT TYPES

010 User program 101 Supervisor data 110 Supervisor program 111 Interrupt acknowledge

Reset Bus Error Address Error

Trace Interrupt Illegal Ins. Privilege Ins.

TRAP, TRAPV CHK

Zero Divide

PROCESSING

Current instruction is aborted.

Exception occurs before next instruction.

Processed by normal instruction execution.

Group 0 exceptions are highest priority.

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 8-11 DN400,DN420, DN600

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FAULT VECTORS

Exception vector at

Vector Address

00 000 004

02 008 03 OOC 04 010 05 014 06 018 07 01C 08 020 09 024 OA 028 OB 02e

OC-OD 030 OF-I? 03C

18 060 20-2F 080 30-3F OCO 40-8F 100 90-9F 240 AO-AF 280

BO 2CO B1 2C4 B2 2C8 B3 2CC B4 200 B5 2D4 B6 2D8 B7 20C

B8-C3 2EO C4-CD 310 CE-CF 338 DO-EF 340

FO 3CO F1 3C4 F2 3C8 F3 3CC F4 3DO F5 304 F6 308 F7 30C

F8-FA 3EO FB 3EC

FC-FD 3FO FE 3F8 FF 3FC

DN400, DN420, DN600

100400 I 0 )

Assignment

Reset: Initial SSP Reset: Initial PC Bus Error Address Error Illegal Instruction Zero Divide CHK Instruction TRAPV Instruction Privilege Violation Trace Unimplemented instruction Unimplemented instruction (Unassigned, reserved) (Unassigned, reserved) Spurious Interrupt TRAP Instruction Vectors (Unassigned, reserved) User Int Vectors - unused Ring/disk board User Int Vectors - unused INTO/ -INTI/ -INT2/ -INT3/ - Tape Controller INT4/ - Storage Module INTS/ -INT6/ - Line Printer INT?/ - Parallel Input User Int Vectors -- unused Unused Color SIO lines (even vectors only

odd vectors unused) P - ECCe (Automatic vectors) o -N - Display #2

M - Floppy L - Display ·U (BLT)

K -

J -I -

Unused Timers 1,2,3 Unused CPU B-to-A

ECCU

8-12 APOllO CONFIDENTIAl. INTERNAL USE ONLY.

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FLOATING-POINT FORMAT

Refer to the FLOATING-POINT FORMAT section of CHAPTER 7, DN300,DN320, for this information.

FLOPPY CONTEOLl EE

Floppy Status Floppy I/O Floppy DMA

8COO FFA800 8COO FFA800 8C80 FFA880

Floppy Status Registers

Main Status Register

I D7 I D6 I 05 I D4 I 03 I 02 I 01 I DO I

D7 - {RQM} Data register ready to send/receive data from Processor.

D6 - {DIO} I/O Direction, 1 = Data Reg to Processor, 0 "" Processor to Data Reg.

DS - {EXM) Execution mode for non-DMA transfers D4 - {CB) BUSY, a Read or Write Command is in process D3 - {D3B) FDD 3 is in Seek Mode D2 - {D2B) FDD 2 is in Seek Mode Dl - {DIB} FDD is in Seek Mode DO - {DOB) FDD is in Seek Mode

STATUS REGISTER 0

I D7 I D6 I D5 I D4 I D3 I D2 I D1 I DO I

D7 - D6 o 0 Normal Termination of Command

Abnormal Term {command started, not completed} Invalid Command{ command issued never started } Abnormal Termination{ FDD went not ready during command execution }

D5 - Set when Seek Completed D4 - Set if FDD issues Fault Signal or Track a Signal

fails to occur after 77 Step Pulses. D3 - Set if FDD Not Ready D2 - Head Address D1 - Unit Select 1 Status DO - Unit Select 0 Status

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 8-13 DN400,DN420,ON600

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STATUS REGISTER 1

I 07 I 06 I 05 I 04 I 03 I 02 I 01 I 00 I

D7 - End of Cylinder 06 - 0 D5 - Data Error D4 - Overrun

D3 - 0 D2 - No Data Dl - Not Writable DO - Missing Address Mark

STATUS REGISTER 2

I D7 I 06 I 05 I D4 I D3 I D2 I 01 I DO I

D7 - 0 D6 - Control Mark D5 - Data Error in Data Field D4 - Wrong Cylinder D3 - Scan Equal Hit 02 - Scan NOT Satisfied D1 - Bad Cylinder DO - Missing Address Mark in Address Field

STATUS REGISTER 3

I D7 I 06 I 05 I 04 I D3 I 02 I 01 I DO I

07 - Fault from FDO 06 - Write Protected 05 - Ready from FOO

04 - Track 0 03 - Two Sided 02 - Head Address 01 - Unit Select 1 Status 00 - Unit Select 0 Status

DN400, DN420, DN600 8-14 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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15 +----------------+ I----pppppppppppp I

+----------------+

P .. P - Physical page number (PPN)

(type "ppn_tn in base.ins.pas)

I/O MAP at [ -- I FFF800 ].

I/O MAP for DN460/660 at [ 9000 I FFFF800 ].

I/O map supplies physical addresses for non-CPU memory references (ring/disk, PNA, display, floppy).

See also I/O MAP in peripheral I/O section, Chapter 6.

MEMORY CONTROL/STATUS REGISTERS (MCSR)

Board 1: Fc02 FF9002 Board 2: FD02 FF9102

Board 3: FE02 FF9202

Board 4: FF02 FF9302

MCSR Cont rol (Write-Only)

15 +----------------+ I-------------DCU I +----------------+ D - Lock check bits on write (diag mode only) C - Enable ECCe interrupts (through 3eD) U - Enable ECCU interrupts (through 3FC)

Any write to this register acknowledges the interrupt.

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 8-15 DN400, DN420, DN600

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MeSR Status Register (Read-Only)

31 24 23 +--------+------------------------+ I SSSSSSNU I PPPPPPPPPPPPPPPPPPPPPPPW I +--------+------------------------+

S •• S - Syndrome (valid only for ECCe error) :

DO data bit 00 70 data bit 08 2c data bit 15

C8 01 68 09 FB check bit 0 C4 02 58 10 F4 1

BO 03 54 11 EC

A8 04 4C 12 DC A4 05 38 13 BC 94 06 34 14 7C

8C 07 N - No error (0 => error detected, status valid) lJ - Uncorrectable error (ECClJ) P •• J? - High order 23 bits of physi.cal address

(low order bit is always 0)

W - Error during read-modify-write operation

DN400,DN420,DN600 8-16 APOLlO CONFIDENTIAl. INTERNAL USE ONLY.

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MEMORY BOARQ jUlMPERS

-* .lU >ll'.4 Al>.o.~ ~~

in in fo02 ff9002 out in fd02 ff9102 in out fe02 ff9202 out out ff02 ff9302

Each board type has an address range that it can span specified by three jumpers, JP13, JP14, and JP15.

Memory Board Address Ranges

~_# ,Illl .Itli .l1'.l.5. ~~

in out out 100000-13ffff out out out 140000-17ffff in out in 180000-1bffff out out in lcOOOO-lfffff

3' in in in 80000-bffff 4' out in in cOOOO-fffff

* Use these values if there 5121<b boards or 1 1mb board in the system

=-* >lll.l >l:ll.i iIll.O. lI<I<I= _

in out out 100000-17f££f in out in 180000-1ff£££ out in out 200000-27ffff in in in 080000-0fffff

=-* >lll.l >l:ll.i iIll.O. lI<I<I= _

in out out 100000-lfff£f out in out 200000-2fffff out out out 300000-3ff£ff

not allowed

The memory test program checks that the tables above are satisfied.

APOLW CONFIDENTIAL INTERNAL USE ONLY. 8-17 DN400,DN420,ON600

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6 7 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25

LABEL

JP3 JP4 JP13 JP14 JP15

COORDINATE LOCATION (APPROXIMATE)

L-23 L·23 M·25 M·25 N·25

Page 196: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

MEMORY MANAGEMENT UNIT (MMITl

CHECK

~ 3. PHYSICAL _---~ MEMORY _--- ~

;/' PAGE ".'" FRAME

;' TABLE

PID/PRIV/POWER 8000 FFB400 CPU A Cont rol 8002 FFB402 MMU Status, High 800' FFB404 MMU Status, Low 8006 FFB406 Clear MMU Status 8008 FFB408 Bus Status SODA FFB40A Enable CPU B SOOE FFB40E

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 8-19 DN400,DN420,DN600

Page 197: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

PIp/PRIY Register

Address: { 8000 I FFB400] 15 8 7 0

+-+-------+--------+ lEI ASIO I----OOPMI +-+-------+--------+

E - Enable power-off switch DD - DOMAIN:

00 User domain 0 (least protected) 01 User domai.n 1 10 Supervi.sor domain a 11 Supervisor domain 1 (most protected)

P - PTT access enable M - Enable MMU (virtual memory operations)

CPU A Control Register

Address: [ 8002 I FFB402 15 8 7 0

+--------+--------+ I--------I------IAI +--------+--------+

IA - Interrupt and/or abort: 00 CPU A will resume operation 01 CPU A will abort the attempted bus cycle 10 CPU A will receive level 6 interrupt

MMU Status Regist gr

Address: [8004 I FFB404 ] 31 24 23

+--------+--------------------------+ I MAFFFRYB I FAULTING VIRTUAL ADDRESS I +--------+--------------------------+

M - PFT mss (ASIO and/or VPN not found) A - Access fault (protection violation) FFF - CPU funct ion code:

001 User data reference 010 User procedure reference 101 Supervisor data reference 110 Supervisor procedure reference 111 Interrupt acknowledge

R - Read operation Y - MMU status register is vali.d B - Miss occurred while CPU B running

Cl ear MMU Status

Address: [ 8008 I FFB408

When written, clears MMU status conditi.ons.

DN400,DN420,DN600 8-20 APOUD CONFIDENTIAL INTERNAL USE ONlY.

Page 198: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

Bus Status Register

Address: [ SOOA 1 FFB40A 16 6 7 0

+--------+--------+ 1 --------1 IMPGTBWS I +--------+--------+

I '"'" 0 -> unacknowledged interrupt pending M - MMU enabled P - PTT enabled G - Big PFT (2K entries if not set, 4K if set) T - Bus time-out (cleared by a read) B - CPU B active W - State of power-off switch (1 => ON position) S - State of service switch (1 -> Normal position)

Enable CPU B Regi ster

Address: [ SOOE 1 FFB40E ]

Any write will explicitly enable CPU B. Return to CPU A, using Reset only.

APOUD CONFIDENTIAL INTERNAL USE ONLY. 6-21 DN400,DN420,DN600

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MONITOR TIMING lDN6xx)

+----t-------------------------t------------t------------+ IAxis I Item I Duration I Duration I I I I 800 Lines I 1024 Lines I

t----t--------t----------------t------------t------------t I 1H I HORIZONTAL I 31.2 uSee I 31.2 uSee I I I FREQlJl'NCY I @32.051 KHz I @32.052 KHz I

H t--------t-----------------t------------t------------t 0 I H-FP I HORIZONTAL I I I R

o

I I FRONT PORCH I 0.7 uSee I 0.7 uSee I

t--------t----------------t------------t------------t I H-SYNC I HORIZONTAL I I I I I SYNC I 3.0 uSee I 3.0 uSee I

N t--------t----------------t------------t------------t T I H-BP I HORIZONTAL I I I A I I BACK PORCH I 3.5 uSee I 3.5 uSee I

L t--------t----------------t------------t------------t I H-BL I HORIZONTAL I I I I I BLANKING I 7.2 uSee I 7.2 uSee I t--------+----------------t------------t------------t I H-DISP I HORIZONTAL I I I I I DISPLAY AREA I 24.0 uSee I 24.0 uSee I

t----t--------t----------------t------------t------------t I I 1V I VERTICAL I 13.2 mSee I 16.7 mSee I I I I FREQUENCY 1 @ 75.7 Hz I @ 60.0 Hz I I t--------t----------------t------------t------------t I V I V-FP I VERTICAL I I I I E I I FRONT PORCH I 0.0 I 0.5 uSee I

1 R t--------t----------------+------------+------------+ I T I V-SYNC I VERTICAL I I I I I I I SYNC I 93.6 uSee 1 93.6 uSee I

I C +--------+----------------+------------t------------+ I A I V-BP I VERTICAL I I I I L I I BACK PORCH I 600.0 uSee I 616.0 uSee I I t--------+----------------+------------+------------t I I V-BL I VERTICAL I I I I I I BLANKING I 693.6 uSee I 710.0 uSee I I t--------+----------------+------------t------------t I I V-DISP I VERTICAL I I I I I I DISPLAY AREA I 12.516 mSee I 15.956 mSee I

+----+--------+----------------+------------t------------+

DN400,DN420,DN600 8-22 APOUO CONFIDENTIAL INTERNAL USE ONLY.

Page 200: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

1 <-x-BL-I <--------- x-DISF ----------> 1 -----+ 111111 1111/1

+- - -- - - - - - -- - - -- - - - -- -- - - - ----+ 1///1111111/1111111111111111111 1///1/1/1/111111111111111111111

-----+-+ +--+-----------------------------+-+ +--I I I I I 1 +--+ I I I

x-FF-> 1-1--1--1 <-x-BF I A

1 +--x-SYNC

+--+

1 <---------------lx------------------> 1

x "" V or H

PAGE FRAME TABLE ENTRY (PFTE)

Refer to the PAGE FRAME TABLE ENTRY (PFTE) section of

CHAPTER 7, DN300,DN320, for this information.

PAGE TRANSLATION TABLE ENTRY (PTTE)

Refer to the PAGE TRANSLATION TABLE ENTRY (PTTE) section

of CHAPTER 7, DN300,DN320, for this information.

APOlLO CONFIDENTIAL. INTERNAL USE ONLY. 8-23 DN400, DN420, DN600

Page 201: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

[ BOOO I FF7000

CACHE Pages:

Defin] tiona

C400 FF7COO

caoo FFaOOD

FF7000

FF7000 FF77FC FF7800

PEB control register

PEB status register (sys space) FPU status register (user space) FPU control store

peb_ctrl

peb_status fpu_status fpu_cs_sa

fpu_cs_ea wcs_lk_size wcs_4k_size

fpu_defalth

fpu _defaltl wcserr_vec xcp_int_vec

BUS_FA_SA LFT_FA_SA_FT

FA_BUS_SA

fF7COO FPU control store ea

1024*8 FPU control store bytes 4096*8 FPU control store in bytes

00B2000E FPU default microword, high 32

500079E3 FPU default microword, low 32 Fl«2 WCS error interrupt vector

2eO FPU Exception Interrupt Veotor

1 * 4+PEB _BASE SP ADD

BUS_FA_SM LFT_FA_SM_FT

FA_BUS_8M

LFT_FA_8D_FT

BUS_FA_RDS

LFT_FT_SD_FA FA_BUS_RDS

2*4+PEB _BASE

3*4+PEB_BASE

4*4+PEB_BASE

5*4+PEB_BASE

6*4+PEB_BASE

7*4+PEB_BASE

8*4+PEB_BASE 9* 4+PEB _BASE

10*4+PEB_BASE 11*4+PEB_BASE

12*4+PEB_BASE

13*4+PEB_BASE 14*4+PEB_BASE

15*4+PEB_BASE

16*4+PEB_BASE 17 * 4+PEB BASE 18*4+PEB=BASE

19*4+PEB_BASE BUS_FAL_DA 20*4+PEB_BASE

BUS_FTH_DA 21*4+PEB_BASE

LFTL_FA_DA_FT 22*4+PEB_BASE FAH_BUS_DA 23*4+PEB_BASE

FAL_BUS_DA 24*4+PEB_BASE

BUS_FAL_DS 26*4+PEB_BASE

BUS_FTH_DS 27*4+PEB_BASE LFTL_FA_DS_FT 28*4+PEB_BASE

FAH_BUS_DS 29*4+PEB_BASE

DN400, DN420, DN600

SP SUBTRACT

SP REVERSE SUBTRACT

SP MULTIPLY

SP DIVIDE

SP REVERSE DIVIDE

DP ADD

DP SUBTRACT

8-24 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

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BUS_FAL_RD 32*4+PEB_BASE

BUS_FTH_RD 33*4+PEB_BASE

LFTL_FT_DS_FA 34*4+PEB_BASE FAH_BUS_RD 35*4+PEB_BASE

FAL_BUS_RD 36*4+PEB_BASE

BUS_FAH_DM

BUS_FAL_DM

37*4+PEB_BASE

38*4+PEB_BASE

BUS_FTH_DM 39*4+PEB BASE

LFTL_FA_DM_FT 40*4+PEB=BASE

FAH_BUS_DM 41*4+PEB_BASE

FAL_BUS_DM 42*4+PEB_BASE

BUS_FAH DD

BUS_FAL DD

BUS_F'1H_DD

LFTL_FA ...... DD_FT

FAH_BUS_DD FAL_BUS_DD

43*4+PEB_BASE

44*4+PEB BASE 45*4+PEB_BASE

46*4+PEB_BASE

47*4+PEB BASE

48*4+PEB=BASE

BUS_FAL_RDD 50*4+PEB_BASE

BUS_F'IH_RDD 51*4+PEB BASE

LFTL FT DD_FA 52*4+PEB BASE FAH_BUS_RDD 53*4+PEB_BASE

FAL_BUS_RDD 54*4+PEB_BASE

R_W_URO

R_W_URl

R_W_UR2 R_W_UR3

R_W_UR4

R_W_UR5 R_W_UR6

R_W_XCP

R_W_UR7

R_W_URS

R_W_UR9

R_W_URA R_W_IAC

R_W_URB

R_W_URC R_W_URD

R Ii URE

R_W_URF

HIGH_BUS

55*4+PEB_BASE

56*4+PEB_BASE

57*4+PEB_BASE 58*4+PEB_BASE

59*4+PEB_BASE

60*4+PEB_BASE

61*4+PEB_BASE

61*4+PEB_BASE

62*4+PEB_BASE 63*4+PEB_BASE

64*4+PEB_BASE

65*4+PEB_BASE 65*4+PEB _BASE

66*4+PEB_BASE

67*4+PEB BASE

6S*4+PES=:BASE

69*4+PEB_BASE

70*4+PEB_BASE

71 *4+PEB _BASE

* 5 spares here (72 thru 76)

Ift_smin fa_bus_smin

77*4+PEB_BASE 78*4+PEB _BASE

APOLLO CONFIDENTIAl. INTERNAL USE ONLY.

DP REVERSE SUBTRACT

DP MULTIPLY

DP DIVIDE

DP REVERSE DIVIDE

READ/WRITE INTERNAL REGISTER

READ/WRITE EXCEPTION REGISTER

READ/WRITE INTEGER ACCUMULATOR

READ UPPER 24 BITS OF DP MANTISSA

Min (FA, FT) -> FA (e. f.)

Condition codes => lAC high word

8-25 DN400, DN420, DN600

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Ift1_dmin

fah bus dmin fa1:=bus:=dmin

Ift_smax fa_bus_smax

bus_fth_dmax Ift1_dmax

fah_bus_dmax

fal_bus_dmax

Ifa_sax

fa_bus_sax

bus _ fah _ dax

1fal_dax fah_bus_dax

fa1_bus_dax

Ifa_sffiX

fa bus_srnx

bus _ fah _ dmx

Ifa1_ drnx

fah _bus _ dmx fal_bus_dmx

fx_to_fa fa_to_fx

BUS_FXH

BUS_FXL

BUS_FAR_DP BUS_FAL_OP

BUS_FTH_OP LFTL_DP FAR_BUS_OP FAL_BUS_DP

FXR_BUS

FXL_BUS

XCHNG

79*4+PEB_BASE

80*4+PEB_BASE

81*4+PEB_BASE 82*4+PEB_BASE

83*4+PEB_BASE 84*4+PEB_BASE

85*4+PEB_BASE 86*4+PEB _BASE

87*4+PEB _BASE

88*4+PEB_BASE

89*4+peb_base

90*4+peb_base

91*4+peb_base

92 * 4+peb base 93 *4+peb:= base

94*4+peb_base

95*4+peb_base 96*4+peb_base

97*4+peb_base

98*4+peb_base 99*4+peb base

lOO*4+peb:=base

lOl*4+peb_base l02*4+peb_base

104*4+PEB_BASE

105 * 4+PEB _BASE l06*4+PEB _BASE l07*4+PEB_BASE

l08*4+PEB_BASE

l09*4+PEB_BASE

110*4+PEB BASE 111*4+PEB::::BASE 112*4+PEB_BASE

113*4+PEB_BASE 114*4+PEB_BASE 115*4+PEB_BASE

l16*4+PEB_BASE

117*4+PEB_BASE

Min (DFA,DFT) => DFA (e. f.)

Condition codes => lAC high word

Max (FA,FT) -> FA (e.f.) Condition codes => lAC high word

Max (DFA,DFT) => DFA (e. f.) Condition codes => lAC high word

FA + FX => FA (single prec) (e. f.)

FA + FX -> FA (double prec) (e.f.)

FA * FX -> FA (single prec) (e.f.)

FA * FX -> FA (double prec) (e.f.)

FX -> FA FA => FX

(e. f.)

READ MICRO-CODE REVISION LEVEL

WRITE SP X REGISTER FOR SP POLYNOMIAL

SP POLYNOMIAL (FA * FX) + FT => FA

WRITE OP X REGISTER FOR OP POLYNOMIAL

DP POLYNOMIAL (OFA * OFX) + OFT => DFA

READ DP X REGISTER

118*4+PEB_BASE ; This swaps the FA with the FX

119*4+PEB_BASE READ DP TEMP REGISTER HIGH PART ONLY

120*4+PEB_BASE NEGATE SP/DP ACCUMULATOR

DN400, DN420, DN600 8-26 APOLLO CONFIDENTIAl. INTERNAL USE ONLY.

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SP DP

OP_SP

L SP

L DP

sp_l

dp_l

LIT INTMUL

LIT INTDIV

LIT RINTDIV

sp_nint

dp_nint

W_IAC_SP

W_IAC_DP

BUS_FAH_m1A

BUS_FAL_DMA BUS_FTH_DMA

LFTL_DMA

FAH_BUS_DMA FAL_BUS_DMA

bus fa sma

Ift=sma

fa_bus_sma

121 *4+PEB _BASE

122*4+PEB BASE

123*4+PEB_BASE

124*4+PEB BASE

125*4+PEB BASE

126*4+peb_base

127*4+peb_base

128*4+PEB BASE

129*4+PEB BASE

130*4+PEB BASE

131*4+peb_base

132*4+peb_base

133*4+PEB_BASE

134*4+PEB_BASE

135*4+PEB_BASE

136*4+PEB_BASE 137*4+PEB_BASE

138*4+PEB_BASE

139*4+PEB BASE

140*4+PEB =: BASE

141*4+peb base 142*4+peb=:base

143*4+peb_base

ABSOLUTE VALUE SP loP OF ACCUMULATOR

CONVERT SP IN ACCUM TO OP NUMBER

CONVERT DP IN ACCUM TO SP NUMBER

FLOAT INTEGER ACCUMULATOR INTO SP

FLOAT INTEGER ACCUMULATOR INTO DP

FIX SP TO INTEGER ACCUMULATOR (e. f.)

FIX DP TO INTEGER ACCUMULATOR (e. f.)

LOAD INT TEMP REG. (32 BIT) MULTIPLY

LOAD INT TEMP REG. (32 BIT) DIVIDE

LOAD INT TEMP REG. (32 BIT) REV DIVIDE

NEAREST INTEGER OF SP ~> SF (e.f. )

NEAREST INTEGER OF DP => DF (e. f.)

LOAD INT ACCUMULATOR, THEN FLOAT TO SP

LOAD INT ACCUMULATOR, THEN FLOAT TO DP

DP MULTIPLY AND ACCUMULATE

(DFA * OFT) + DFX => DFA,DFX

SP MULTIPLY AND ACCUMULATE (e. f.) (FA * FT) + FX => FA,FX (e.f.)

(e. f.)

THE FOLLOWING COMMANDS ARE ONLY AVAILABLE ON THE 4K

CONTROL STORE 'FPU' USED ON THE ON3xx-DN5XX.

sp_trunc 144*4+peb_base TRUNCATE SP ~> SP (e. f.)

dp_trunc 145*4+peb_base TRUNCATE DP ~> DP (e. f.)

sp_log 146*4+peb_base LOG (SP) ~> SP (e. f.)

dp_log 147*4+peb_base LOG (OP) ~> DP (e. f.)

sp_exp 148*4+peb base EXP (SP) ~> SP (e.£. )

dp_exp 149*4+peb_base EXP (DP) ~> DP (e. f.)

sp sqrt 150*4+peb_base SQRT (SP) ~> SP (e. f.)

dp=:sqrt 151*4+peb_base SQRT (OP) ~> DP (e. f.)

1ft _pwr 152*4+peb_base SP FA**FT "> SP (e.£.)

bus - fth _pwr 153*4+peb_base DP FA**FT ~> OP (e. £.)

Iftl _pwr 154*4+peb_base (e. f.)

iac sp pwr 155*4+peb_base SP FA**I ~> SP (e. £.)

iac=:dp=:pwr 156*4+peb _base DP FA**I ~> DP (e. f.)

sp s~n 157*4+peb base SIN (SP) -> SP (e. f.)

dp=sin 158*4+peb_base SIN (DP) ~> DP (e. f.)

sp_ cos 159*4+peb_base COS (SP) ~> SP (e. f.)

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 8-27 DN400, DN420 ,ON600

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dp_cos 160*4+peb_base COS (DP) => DP (e. f.) sp_tan 161*4+peb_base TAN (SP) => SP (e. f.)

dp_tan 162 * 4+peb _base TAN (OP) => DP (e.f. ) sp_atan 163*4+peb_base ATAN (SP) => SE' (e. f.)

DP-ATAN currently has a bug and is not used by the library

dp_atan Ift_atan2

164*4+peb_base l65*4+peb_base

OATAN' (DP) => DP (e. f.) ATAN2 (FA, FT) => FA (e. f.)

DP-ATAN2 currently has a bug and is not used by the library

bus_fth_datan2 l66*4+peb_base lftl_datan2 167*4+peb_base

DATAN2 (DFA, OFT) => OFA (e. f.)

* 87 spares here (168 thru 254)

FPU_STATUS_BUS 255*4+PEB BASE FPU STATUS REGISTER

cache_sa cache_ea memory_sa memory_ea tag inval tag=:valid_bit

FF7COO FF8400 120000 120800 800 11

cache window start cache window end memory start memory end invalid tag word

PEB Control Register Bits

peb_fpu_en peb fpu step peb=:fpu=:reset peb _ fpu _xie peb fpu csad peb =: cache _ a peb _cache _ b peb test t peb:=tes(~d peb _cache _ t pe peb _cache _ dpe

0001 0002 0004 0008 OOlF 0200 0400 0800 1000 2000 4000

FE'U enable FPU step FPU reset FPU interrupt enable upper control store address bits cache A (0050) cache B (0051) test tag RAM (0052) test data RAM (0053) cache tag parity enable (0054) cache data parity enable (0056)

Useful Combinations

peb_cache_tta peb _cache _ t tb peb cache tda peb:=cache:=tdb enab_tag_a enab_tag_b enab _data _ a enab _data _ b enab _cache _ a enab _cache _ b enab_cache

DN400 ,DN420, DN600

peb_cache_a+peb_test_t (0060) test tag A peb_cacl}e_b+peb_test_t (0061) test tag B peb cache a+peb test d (0062) test data A peb:=cache:=b+peb:=test=d (0063) test data B peb _cache_ tta+peb_cache _tpe+peb_cache_dpe (0065) peb cache ttb+peb cache tpe+peb cache dpe (0066) peb:=cache:=tda+peb=:cache :=dpe+peb:= cache=: tpe (0067) peb _cache _ tdb+peb _cache _ dpe+peb _cache _ tpe (0068) peb cache a+peb cache dpe+peb cache tpe (0069) peb =:cache =btpeb=: cache=dpe+peb=:cache~)pe (0070) enab_cache_a+peb_cache_b (0071)

8-28 APOLLD CONFIDENTIAL. INTERNAL USE ONLY.

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PEB Stat1lS Register Bits

peb_fpu_cspe peb _cache _pe peb _ fpu _ xip peb_fpu_upc peb _ fpu _busy

0001 0002 0004 07FF 8000

control store parity error cache parity error FPU exception interrupt pending FPU program counter bits

FPU busy

FPP Commands

(from fpp.ins.pas)

FPP_$TSTX

FPP_$SSTX FPP_$EXIT

FPP_$SLV FPP_$SL~

FPP_$SLC

FPP_$SSTA

FPP_$SAV FPP_$SAA FPP_$SAC FPP_$SSV

FPP_$SSA FPP_$SSC FPP_$SISV

FPP_$SISA FPP_$SISC FPP_$SMV

FPP $SMA FP()SMC FPP_$SDV FPP $SDA FPP=$SDC FPP_$SIDV

FPP_$SIDA FPP_$SIDC FPP $SCVX FPP -$SCAX

FPP_$SCCX

FPP_$SLWV FPP_$SLWA FPP_$SLLV FPP_$SLLA FPP_$SSTWX

Test S.P. or D.P. FAC for -,0,+; set cc's & DO.L then exit

Same as FPP_$SSTA but exits when done (sets ee's) Return to caller beginning with instruction in next word

FAG := (SP) + FAC := «SP)+)

(Single precision Load Value) (Single precision Load using

Address) FAC := Next four bytes in instruction stream

(Constant) ( (SP) +) := FAC (Single precision STore using Addr)

FAC := FAC + (SP) + (Single precision Add Value) FAC := FAC + «SP) +)

FAC := FAC + Next four bytes (Constant) FAC := FAC - (SP) + (Single precision Subtract Value)

FAC := FAC - <-(SF) +)

FAC := FAC - Next four bytes (Constant) FAC := (SP) + - FAC (Single precision Inverse Subtract Value)

FAC := «SP) +) - FAC FAC := Next four bytes (Constant) - FAC FAC := FAG * (SP) + (Single precision Multiply value)

FAC := FAG * «SP) +)

FAC := FAG * Next four bytes (Constant) FAC := FAG j (SF) + (Single precision Divide Value) FAC ;= FAG j «SP) +)

FAC := FAC j Next four bytes (Constant) FAC := (SP) + / FAG (Single precision Inverse Divide

Value) FAC := «SP) +) / FAC FAG := Next four bytes (Constant) / FAC Compare FAC (SP)+; set ec's & DO.L then exit Compare FAC «SP)+); set ee's & DO.L then exit Compare FAG Next 4 bytes; set ec's & DO. L then

exit FAC := Float [ (SP)+] (Float 16 bit integer)

FAC := Float[«SP)+)] (Float 16 bit integer) FAC := Float [ (SP) +] (Float 32 bit integer) FAC := Float ( «SP)+)] (Float 32 bit integer) DO.W := Fix[FAC]: then Exit with ee's set

APOLLO CONFIDENTIAL INTERNAL USE ONLY. 8-29 DN400,DN420 ,DN600

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FPP_$S8TLX FPP_$NEG FPP_$ABS

FPP_$DLA

FPP_$DLC FPP_$DSTA

FPP_$DSTX

FPP $DAA FPP-$DAC

FPP=$DSA FPP $DSC FPP:=$DISA FPP_$DISC FPP $DMA FPP:$DMC FPP_$DDA FPP $DDC FPP:=$DIDA FPP_$DIDC FPP_$DCAX

FPP_$DLWV FPP_$DLWA FPP $DLLV FPP-$DLLA

FPP=$DSTWX FPP $DSTLX FPP:::$SCNV FPP_$DCNV FPP $SSQR FPP:$DSQR FPP_$SEXP FPP $DEXP FPP -$ SLOG FPP-$DLOG FPP -$SSIN

FPP:$DSIN FPP_$SCOS FPP $DCOS FPP-$STAN FPP-$DTAN FPP-$SATAN

FPP:$DATEN FPP _$SATAN2A FPP $SATAN2V FPP:$SATAN2C FPP _ $DATAN2A FPP $DATAN2C FP()E$2lV FPP_$E$22A

DO.L := Fix[FAC]; then Exit with cc's set FAC := -FAC (Single or Double Precision) FAC := Abs [FAe] (Absolute value Single or Double Precision)

D.P. FAC :- «8P)+) (Double precision Load using Address)

D.P. FAC := Next 8 bytes (Constant) D.P. «SP) +) := FAe (Double precision Store using

Address) D.P. Same as FPP_$DSTA but exits when done

(sets cc' a) D.P. FAC := FAC + «SP) +) D.P. FAC := FAe + Next 8 bytes (Constant)

D.P. PAC :- PAC - «SP) +) D.P. FAC :"" FAC - Next 8 bytes (Con5tant) D.P. FAC :- «SP)+) - FAC (Inverse Subtract) D.P. FAC := Next 8 bytes (Constant) - FAC D.P. FAC :- FAC * «SP)+) D.P. FAC := FAC * Next 8 bytes (Constant) D.P. FAC := FAC / «SP)+) D.P. FAC :- FAC / Next 8 bytes (Con5tant) D. P. FAC := «SP) +) / FAC. (Inverse Divide) D.P. FAC := Next 8 bytes (Constant) / FAC D.P. Compare FAC «SP)+); set ce'a & DO.L then exit

D.P. Compare FAC Next 8 bytes; set ec's & DO.L then exit .

D.P. FAC :- Float[(SP)+] D.P. FAe :- Float [ «SP) +)] D.P. FAC :- Float [ (SP)+] D.P. PAC :- Float{«SP)+)]

(Float (Float (Float (Float

D.P. DO.W := Fix[FAC]; then Exit D.P. DO.L := Fix[FAC]; then Exit

16 bit 16 bit 32 bit 32 bit

Convert D.P. FAC to Single Precision Convert Single Precision FAC to D.P. Take square root of FAC Take square root of DFAC EXP «FAC» DEXP «DFAC» ALOG «FAC» DLOG «DFAC» SIN «FAC» DSIN «DFAC»

COS «FAC» DCOS «DF AC» TAN «FAC» DTAN «DFAC» ATAN «FAC» DATAN «DFAC» }

ATAN2 «FAC>, «sp+» ATAN2 «FAC>, (sp+) ATAN2 «FAC>,<CONST» DATAN2 «DFAC>, ( (sp+) ) DATAN2 «DFAC>, <CONST» E$2l «FAC>, (sp) +)

E$22 «FAe>, «sp) +»

integer) integer) integer) integer)

DN400,D:N420 ,DN600 8-30 APOLLO CONADENTIAL INTERNAL USE ONLY.

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FPP_$E$22V E$22 «FAC>, (sp)+)

FPP_$E$22C E$22 «FAC>,<CONST» FPP $E$61V E$61 «DFAC>, (Sp)+) FP()E$62A E$62 «DFAC>, «Sp) +»

FPP_$E$62V E$62 «DFAC>, (Sp)+)

FPP $E$62C E$62 «DFAC>,<CONST» FPP:=$E$66A E$66 «DFAC>, «Sp) +»

FPP_$E$66C E$66 «DFAC>,<CONST» FPP_$STRUNC FAC:= lnt [FAC] FPP_$SNlNT FAC:= Nint [FAC] (Nearest integer)

FPP_$DTRUNC D.P. FAC := lnt[FAC] FPP_$DNINT D.P. FAC := Nint(FACj (Nearest integer) FPP_$SMINV FAC :=Min[FAC, (SP)+]

FPP_$SMINA

FPP $SMlNC FPP:=$SMAXV FPP_$SMAXA

FPP_$SMAXC FPP_$DMlNA FPP_$DMINC

FPP_$DMAXA FPP_$DMAXC

FPP_$CLA

FPP $CLC FPP:=$CAA FPP_$CAC

FPP $CSA FPP:=$CSC FPP_$CISA

FPP_$ClSC FPP_$CMA

FPP_$CMC

FPP_$CDA FPP_$CDC FPP_$ClDA

FPP_$ClDC FPP_$CSTA

FPP_$CSTX

FPP_$CSWAP FPP_$CCNV

FPP_$CCONJ

FPP_$SLUV FPP_$DLUV

£pp_$dcla

£pp $dclc £pp:=$dcaa

fpp_$dcac

fpp $dcsa fpp:=$dcsc fpp_$dcisa

fpp $dcisc fpp:=$dcma

fpp_$dcmc fpp $dcda fpp:=$dcdc fpp_$dcida

FAC := Min[FAC, «SP)+) 1 FAC := Min [FAC, Next 4 bytes] FAC := Max[FAC, (SF) +]

FAC := Max [FAC, «SP) +) ]

FAC := Max [FAC, Next 4 bytes] D.P. FAC := Min[FAC, «SP)+)] D.P. FAC := Min[FAC, Next 8 bytes]

D.P. FAC := Max[FAC, «SP)+)] D.P. FAC := Max[FAC, Next 8 bytes]

Complex FAC : = «SP) +) Complex FAC : = Next 8 Bytes Complex FAC := FAC + «SP)+)

Complex FAC : = FAC + Next 8 bytes

ComplexFAC :=FAC - «SP)+) Complex FAC : = FAC - Next 8 bytes Complex FAC := «SP)+) - FAC

Complex FAC : = Next 8 bytes - FAC ComplexFAC :=FAC * «SP)+)

Complex FAC := FAC * Next 8 bytes

Complex FAC := FAC I «SP)+) Complex FAC : = FAC I Next 8 bytes

Complex FAC:= «SP)+) I FAC

Complex FAC := Next 8 bytes I FAC Complex Store FAC thru (SP) + Complex Store FAC thru (SP) + and exit

Complex Exchange Real and Imaginary parts of FAC Convert Single Frec to Complex (set imagFAC := 0)

Complex Conjugate (imagFAC := -imagFAC)

FAC := Float [(SP)+] (Float unsigned 32-bit integer) D.P. FAC := Float [ (SP)+] (Obi Flt unsigned 32-bit int)

DP Complex FAC := «SP) +)

DP Complex FAC DP Complex FAC

DP Complex FAC

DP Complex FAC DP Complex FAC

DP Complex FAC

DP Complex FAC DP Complex FAC

OP Complex FAC

OP Complex FAe

DP Complex FAC

DP Complex FAC

: = Next 16 Bytes := FAC + «SP) +)

:= FAC + Next 16 bytes

:= FAC - «SP) +)

:= FAC - Next 16 bytes

:= «SP)+) - FAC

:= Next 16 bytes - FAC FAC * «SP) +)

FAC * Next 16 bytes FAC «SP) +)

FAC Next 16 bytes

«SP) +) I FAC

APOLLO CONFIDENTIAL INTERNAL USE ONLY. 8-31 DN400, DN420,DN600

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£pp_$dcidc fpp_$dcsta fpp $dcstx £PP:::: $dcswap £pp_$dccnv fpp $deconj FPP::::$CCVX FPP_$CCAX FPP_$CCCX FPP_$dav FPP_$dmv FPP_$didv FPP_$dsv

DP Complex FAC := Next 8 bytes / FAC DP Complex Store FAC thru (SP) + DP Complex Store FAC thru (SF) + and exit DP Complex Exchange Real and Imaginary parts of FAC DP Convert Double Pree to Complex (set imagFAC := 0)

DP Complex Conjugate (imagFAC := -imagFAC) Complex Compare FAC:(SP)+; set ce's & DO.L, exit Complex Compare FAC:«SP)+); set ce's & DO.L, exit Complex Compare FAC:Next 8 bytes; set cc's & DO.L, exit FAC := FAC - (SF) + (Double precision Add Value) FAC := FAC - (SP) + (Double precision Multiply Value) FAC := FAC - (SF) + (Double preciaion Divide Value) FAC := FAC - (SP)+ (Double precision Subtract Value)

address: Controller *2 Controller #1

[ BCOO I FF9COO [ 8800 I FFAOOO

today's Controllers are #2' s )

Address Write function

OOBCOO Cylinder MSByte OOBCOI OOsC02 Cylinder LSByte OOsC03 OOSC04 Disk command register OOBCOS OOBc06 (reserved hole) OOSCO? OOSC08 Head number OOBC09 OOBCOA Sector aOBCOS oaScoc Controller command aaSCOD aOSCOE (reserved hole) aOBCOF aOBCIO Network type mask aOBCll OOBCl2 Network recei~e command aOBCl3 OQBCl4 Network transmit command OOSClS OOSCl6 OOBCl7 OOSCla Disk Interrupt ACK aOBC19

Read function

Cylinder MSByte

Cylinder LSByte

Disk status register

Node ID I

Node ID 2

Node 1D 3

Disk status MSB Disk status LSB Network rev stat MSB Network rev stat LSB Network tx status MSB Network tx status LSB

aOSCIA Network Trans Interrupt ACK -OOSCIE OOBCIC Network Rec Interrupt ACK aOBCID aOBClE

DN40a, DN420, DN600 8-32 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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OOBClF

Addreaa Write function Read function

OOBC40 Disk DMA address Disk DMA address OOBC41 OOBC42 Disk DMA count 0 Disk DMA count 0

OOBC43 OOBC44 Disk DMA Addreaa 1 Disk DMA Address 1 OOBC45 OOSC46 Disk DMA count 1 Disk DMA count 1 OOBC47 OOSC48 Transmit DMA Address Transmi.t DMA Address OOBC49 OOBC4A Transmit DMA count 0 Transmit DMA count 0 OOBC4B OOSC4C Transmit DMA address Transmit DMA address 1

OOSC4D OOBC4E Transmit DMA count ! Transmit DMA count 1

OOSC~F

OOsc50 DMA command DMA status OOBC5! OOSC52 DMA request OOSC53 OOSC54 DMA single mask OOSC55

OOsC56 DMA mode OOBCS7 OOBC58 DMA clear byte pointer DMA temporary OOBC59 OOSCSA DMA master clear OOBCSB OOBC5C OOSC5D

OOSC5E DMA all rnaska OOSCSF

APOUO CONFIDENTIAL INTERNAL USE ONLY. 8-33 DN400,DN420,DN600

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Address Write function Read function

OOBC60 Receive a DMA address Receive 0 DMA address 0 OOBC61

OOBC62 Receive o DMA count 0 Receive 0 DMA count 0 OOBC63 OOBc64 Receive a DMA address Receive 0 DMA address I

OOBC65

OOBC66 Receive o DMA count 1 Receive DMA count I OOBC67

OQBC68 Receive I DMA addre s s Receive I DMA address OOBc69 OQBC6A Receive I DMA count 0 Receive I DMA count a OQBC6B

OOBC6C Receive I DMA address Receive 1 DMA address I OOBC6D

OOBC6E Receive I DMA count 1 Receive I DMA count 1 OOBC6F OQBC70 DMA command DMA status

OOBC71 OOBC72 DMA request OOSC73

OOBC74 DMA single mask OOSC75 OOSC76 DMA mode

OOBC77

OOSC78 DMA clear byte pointer DMA temporary OOBC79 OOBC7A DMA master clear OOSC7B OOBC7C

OOBC7D OOSC7E DMA all masks OQBC7F

Cylinder Address Regl ster

MSB address: BCOO I FF9COO

15 14 13 12 11 10 +------+------+------+------+------+------+------+------+

o 0 0 0 C10 I C09 I C08 I +------+------+------+------+------+------+------+------+

LSB address: BC02 FF9C02

15 14 13 12 11 10 +------+------+------+------+------+------+------+------+

C07 I C06 I C05 I C04 I C03 I C02 I COl I COO I +------+------+------+------+------+------+------+------+

DN400 ,DN420, DN600 8-34 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

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PRIAM: Command Register

address: BC04 I FF9C04

15 14 13 12 11 10

+------+------+------+------+------+------+------+------+ o 0 0 0 0 0 0101

+------+------+------+------+------+------+------+------+ Sequence Up = 0 0 1 Sequence Down = 0

Restore = Seek =

Fault Reset =

PRIAM Status Register

address: BCQ4 I FF9C04

15 14 13 12 11 10 +------+------+------+------+------+------+------+------+ I CMDRJT I WRITPT I DRVFLT I BUSY I CYL 0 I SEEKFT I SEEKOK I READY I +------+------+------+------+------+------+------+------+ READY - The drive is up to speed, servo is locked on

track, and the "unit is in a state to read or write.

SEEKOK- SEEK COMPLETE - This bit indicates the seek has

completed successfully. SEEKFT- SEEK FAULT - A fault detected during a seek

operation.

CYL 0 - Head on cylinder o. BUSY - The drive is in the process of executing a

command and will not accept any other commands.

DRVFLT- DRIVE FAULT - A fault was detected during a write operation or a drive unsafe condition was

detected. WRITPT- WRITE PROTECT - The head selected is write

protected. Write protection is set by switches in

the drive or when the drive isn't sequenced up.

CMDRJT- Control or register load command received while drive is not ready, or improper command received.

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 8-35 DN400, DN420, DN600

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Head/Drive SeJ ect

address: [BC08 I FF9C08 ]

15 14 13 12 11 10 +------+------+------t------t------t-------+-------+----t I SEL3\ I SEL2\ I SELl \ I SELO\ I x H2\ Hl \ I HO\ I +------t------t------t------t------t-------+-------+----+ SEL3-SELO select the DRIVE:

Drive #0

- 0

H2-HO select the HEAD:

Head *0

Sector Select address: [BCOA I FF9COA ]

15 14 13 12 11 10 +------+------+------t------+------+------t------+------+

84 S3 S2 Sl SO t------+------+------t------t------+------t------+------+ S4-S0 select the SECTOR(0-17):

Sector #0 = 0 1 = 0

2 - 0 3 - 0

etc.

Disk Controller Couunand address: [BeOC j FF9COC

15 14 13 12 11 10

+------+------+------t------t------t------+------t------t I READ j WRITE I FORMAT I I INTE I +------t------t------t------t------t------+------t------+

DN400, DN420, DN600 8-36 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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Disk Controller Status address: [BClQ I FF9C10

15 14 13 12 11 10 +------+------+------+------+------+------+------+------+ I BUSY I READY\ I CRCERR I TIMOUT I 0 0 I BUSERR I OVRUN I +------+------+------+------+------+------+------+------+ 76543210

+------+------+------+------+------+------+------+------+ o 0

+------+------+------+------+------+------+------+------+ BUSY - Controller has a disk READ, WRITE or FORMAT

request pending or in progress. READY - PRIAM ready bit, indicates that the PRIAM is

sequenced up, on cylinder and ready to accept READS, WRITES or FORMATS.

CRCERR- CRG on the last disk operation was in error. This bit is undefined except for disk READs.

TIMOUT- The last disk operation didn't finish before 3 revolutions of the disk. During a READ or WRITE operation it is an indication that the drive has has been positioned to the wrong cylinder, sector number is too large, surface is unformat­ted, or there was a CRC error on the disk header.

BUSERR- A BUS error occurred during last DMA transfer. DMA address register points past the erroring address.

OVRUN - DMA overrun occurred during last disk operation.

Status 1 1 1 1 00 000000 4321 9876543210

Controller busy 1 x x x 0 0 x x 0 x x x x x x PRIAM not ready x 1 x x 0 0 x x 0 x x x x x x Time out-sector error 0 0 x 0 0 0 0 0 0 x x x x x x DMA bus error DMA over run CRC error Disk operation ok

Packet Type

OOx 001xOOxxxxxx OOxOOOOlOOxxxxxx OOlOOOOOOOxxxxxx

OOOOOOOOOOxxxxxx

address: BClO I FF9ClO

15 14 13 12 11 10 +------+------+------+------+------+------+------+------+ IBRDCSTI T6 T5 T4 T3 T2 Tl TO +------+------+------+------+------+------+------+------+ BRDCST - Accept broadcast messages T6-TO - Type mask, accept message if any bits in type

field of message are set in corresponding bit of type mask.

APOLLO CONFIDENTIAL INTERNAL USE ONLY. 8-37 DN400, DN420, DN600

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Receive CQunnand Register

address: Bel2 I FF9C12

15 14 13 12 11 10 +------+------+------+------+------+------+------+------+

REC l STOP I CON I DIS I I INTE I +------+------+------+------+------+------+------+------+ REC - Enable receive. This informs the controller

that the registers in the controller are set up to receive a message.

STOP - Abort a previously posted REC. This will be successful if the controller has not already seen a message begin.

CON - Connect to the ring. DIS - Disconnect from the ring. This also happens

on reset. INTE - Enable interrupts to happen after a receive.

DN400, DN420,DN600 8-38 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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Receive Status Register

address: BC12 I FF9C12

15 14 13 12 11 10 +------+------+------+------+------+------+------+------+ I BUSY I CON I CRCERR I TIMOUT I ° I EORERR I BUSERR I OVRUN I +------+------+------+------+------+------+------+------+

7 4 2 1 0 +------+------+------+------+------+------+------+------+ IMSGER\IACKPE\IPKTERRI 0 0 ° I ESBERRIBPHERRI +------+------+------+------+------+------+------+------+

BUSY - The controller is currently observing a

message or a request is still pending.

CON - The controller is currently connected to the

ring.

CRCERR - The last message received had a CRC error.

TIMOUT - The last message received started but didn't finish in 2**12 byte times.

EORERR - End of range One or both of the

message fields bigger than the DMA channel was

set up for.

BUSERR - A BUS error occurred during the DMA

transfer. The DMA address register is pointing location past the point of the error.

OVRUN - A DMA overrun occurred during the last receive.

MSGER - No message error occured during the last receive. A message error is any error that can be detected by the microcode of the controller.

Generally it checks for the packet protocol.

ACKPE - Ack parity OK. No parity error was

discovered in the ack bytes in the last receive.

PKTERR - Either the transmitter or another receiver had an error in the packet. If the transmitter had an error in the transmission of the packet,

one of the following errors occurred in the

transmitter:

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 8-39 DN400, DN420,DN600

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ESBERR - Elastic Store Buffer Error BPHERR - Bi-Phase Error OVRUN - DMA Overrun BUSERR - DMA bus error ACKPAR - Ack byte parity error SFTABT - Software abort NCOPY - No receiver enabled to copy this msg MSGERR - Message error

If the receiver had an error in the reception of the packet, one of the following errors occurred in the receiver:

ESBERR - Elastic Store Buffer Error BPHERR - Bi-Phase Error OVRUN - DMA Overrun BUSERR - DMA bus error EORERR - End of Range error in DMA channel CRCERR - CRC error in packet ACKPAR - Ack byte parity error

ESBERR - An error occurred in the modems elastic store buffer.

BPHERR - An error occurred in the modems decode of the Bi-phase encoded data.

Status 1 1 1 1 1 o 0 5 4 3 2 1 9 8 7 6 4 3 2 1 0

Controller Busy 1 x x x 0 xxxxxxO o x x Connected to Ring x 1 x x 0 xxxxxxO o 0 x x DMA Bus Error o x x x 0 xlxxxxO o x x DMA Overrun a x x x 0 x 0 1 x x x 0 o x x Bi-phase Error o 1 x x 0 x 0 a x x x 0 o x 1 Elastic Buffer Error a 1 x x 0 x 0 o x x x a o 1 0 Time-out Error o 1 x 1 0 x 0 a x x x a o 0 0 Sync Protocol Error 1 x x 0 o 0 x x 0 0 Ack Byte Parity Error 1 x x 0 0 o x 0 0 CRe Error 1 1 o x 0 0 1 x 0 o 0 0 End of Range Error 1 0 o 0 1 0 o 1 1 x 0 o 0 Packet Error o 1 0 0 0 1 1 0 0 Received OK o 1 0 o 0 0 o 0 1 0 0 o 0

ON400,DN420,DN600 8-40 APOllD eONFIOENTlAL INTERNAL USE ONLY.

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Transmit Command Register

address: BC14 I FF9C14

15 14 13 12 11 10 +------+------+-------------+------+------+------+------+ I TMT I STOP IFTRANSICHIDISI IDELAY INDELAYI INTE I +------+------+------+------+------+------+------+------+ TMT - Enable transmit. This bit informs the controJ.J.er

that all the registers are set up for a message to be transmitted when the next token is received on the network.

STOP - Stop a previously posted TMT. This will abort a request for a transmit. It will abort a packet if currentJ.y being transmitted.

FTRANS - Force transmit. Allow the TMT to start even though no token has been seen. This bit must be accompanied by the TMT bit.

CHlDIS - Disable the second transmit OMA channel from putting out any data. This will make for a 0 length data field in the message.

DELAY - Enable an additional 7 bit delay into the length of the network. This may be required to support the recirculation of the token, which is 9 bits.

NDELAY - Disable the 7 bit delay. INTE - Enable an interrupt to be generated at the

completion of the transmit.

APOUD CONFIDENTIAL. INTERNAL USE ONLY. 8-41 DN400,DN420,DN600

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Transmit Status Register

address: BC14 I FF9C14

15 14 13 12 11 10 +------+------+------+------+------+------+------+------+ I BUSY I 0 I 0 I TIMOUT I 0 I 0 I BUSERRI OVRUNI +------+------+------+------+------+------+------+------+ 76543210

+------+------+------+------+------+------+------+------+ I MSGER\ lACKPE\ IPKTERRI NCOPYI COpy I WACK I ESBERR I BPHERRI +------+------+------+------+------+------+------+------+ BUSY - The controller is currently transmitting a

message or the request is still pending. TIMOUT - The last message transmitted started but didn't

finish in 2**12 byte times. BUSERR - A BUS error occurred during the DMA transfer.

The DMA address register is pointing 1 location past the point of the error.

OVRUN - A DMA overrun occurred during the last transmit. transmit. A message error is any error that can be detected by the microcode of the controller. It is generally the packet protocol that is checked for.

MSGER\ - No message error occured during the last receive. A message error is any error that can be detected by the microcode of the controller. Generally it checks for the packet protocol.

ACKPE\ - Ack parity OK. No parity error was discovered in the ack bytes in the last transmit.

PKTERR - Either the transmitter or the receiver had an error in the packet.

DN400, DN420, DN600

If the transmitter had an error in the transmission of the packet, one of the following errors occurred in the transmitter:

ESBERR - Elastic Store Buffer Error BPHERR - Bi-Phase Error OVRUN - DMA Overrun BUSERR - DMA bus error ACKPAR - Ack byte parity error SFTABT - Software abort NCOPY - No receiver was enabled to copy this

message MSGERR - Message error

If the receiver r:::l.d an error in the reception of the packet, one of the following errors occurred in the receiver:

8-42 APOu.o CONFIDENTIAL. INTERNAL USE ONLY.

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ESBERR - Elastic Store Buffer Error BPHERR - Bi-phase Error OVRUN - DMA Overrun BUS ERR - OMA bus error EORERR - End of Range error in OMA channel CRCERR - CRC error in packet ACKPAR - Ack byte parity error

NCOPY - No receiver observed his node address in this packet and/or was enabled to copy this message.

MSGCPY - The receiver successfully copied the message. WACK - A receiver observed his node id, but wasn't

enabled to copy this message. ESBERR - An error occurred in the modem's elastic store

buffer. BPHERR - An error occurred in the modem's decode of the

Bi-phase encoded data.

Status

Controller busy

1111110000000000 5432109876543210

OOxOOxxxxxxxxxx DMA Bus Error 0 0 x 0 0 1 x x x x x x x x x DMA Overrun 0 0 x 0 0 0 x x x x x x x x Bi-Phase Error 0 0 x 0 0 x x x x x x x

Elastic Buffer Error 0 0 0 x 0 0 x x x x x x 1 Time-out Error 0 0 0 1 0 0 0 x x x x x x 0 0 Sync Protocol Error 0 0 0 0 0 0 0 0 0 x x x x x 0 0 Ack Byte Parity Error 0 0 0 0 0 0 0 0 lOx x x x 0 0 Negative ACK 0 0 0 0 0 0 0 0 1 1 x 1 0 0 0 0

Wack 0 0 0 0 0 0 0 1 1 x x x 1 0 0 Packet Error 0 0 0 0 0 0 0 1 1 lOx x 0 0 Message Copied 0 0 0 0 0 0 0 0 1 1 0 0 1 x 0 0

Node ID Regi ster address: BCOA FF9COA

BCOC FF9COC BCOE FF9COE

15 14 13 12 11 10

+------+------+------+------+------+------+------+------+ I ID23 I ID22 I ID21 I 1020 I ID19 I 1018 I ID17 I ID16 I +------+------+------+------+------+------+------+------+ I ID15 I ID14 I ID13 I ID12 I IDll I IDlO I ID9 I IDB +------+------+------+------+------+------+------+------+ I ID7 I ID6 I IDS I ID4 I ID3 I ID2 I IDI I IDO I +------+------+------+------+,._----+------+------+------+

APOLLO CONFIDENTIAL INTERNAL USE ONLY. 8-43 DN400, DN420, DN600

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DMA Control/Status Registers

PMA Address address: base + 0 ] I + 1 + 1 + C 1

15 14 13 12 11 10 +------+------+------+------+------+------+------+------+ 1 AOS 1 A07 1 A06 1 AOS 1 A04 1 A03 1 A02 1 A01 1 +------+------+------+------+------+------+------+------+ I IVA16 I IVAl51 IVA14 I IVA13 I IVA12 I IVA11 I IVA10 I A09 I +------+------+------+------+------+------+------+------+ Notice that the address is shifted right by 1.

~address:

15 14 13

base + 2

12

+ A 1 + E 1

11 10 +------+------+------+------+------+------+------+------+ 1 C07 1 C06 1 COS 1 C04 1 C03 1 C02 1 COl 1 COO 1 +------+------+------+------+------+------+------+------+ 1 C1S 1 C14 1 C13 1 C12 1 C11 1 C10 1 C09 1 COS 1 +------+------+------+------+------+------+------+------+ C (15-00) is the desired count in words minus 1.

pm Command Register

address: [ base + 10

15 14 13 12 11 10 +------+------+------+------+------+------+------+------+ 10111110101 00 +------+------+------+ ... _----+------+------+------+------+ BIT 7 - DACK Sense Active High

6 - DREQ Sense Active Low 5 - Extended Write

- Rotating Priority - Compressed Timing

2 - Controller Disable 1 - Channel 0 Address Hold Enable o - Memory to Memory Enable

DN400,DN420,DN600 8-44 APOLLO CONFIDENTIAL INTERNAL USE ONlY.

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PMA Mode Register

address: [ base + 16 ]

15 14 13 12 11 10 +------+------+------+------+------+------+------+------+ I 0 I 0 I 0 I I I I I I +------+------+------+------+------+------+------+------+ BIT 7, 6 - 00 - Demand Mode

01 - Single Mode 10 - Block Mode 11 - Cascade Mode

5 - Address Decrement 4 - Autoinitialize 3,2 - 00 - Verify Transfer

01 - Write Transfer 10 - Read Transfer 11 - undefefined

1,0 - Channel Select

PM Request Register

address: base + 12

15 14 13 12 11 10 +------+------+------+------+------+------+------+------+ I I I I I I x I x x I +------+------+------+------+------+------+------+------+ BIT 2 - Request Bit

1,0 - Channel Select

PM; Mask Regl ster

address: [ base + 14 ]

15 14 13 12 11 10 +------+------+------+------+------+------+------+------+ Ixl Ixlxlxlxl Ixl +------+------+------+------+------+------+------+------+ BIT 2 - Set Mask Bit

1,0 - Channel Select

APOLW CONFIDENTIAL INTERNAL USE ONLY, 8-45 PN400, DN420,DN600

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pMA ALL Mask Register

address: [ base + IE

15 14 13 12 11 10 +------+------+------+------+------+------+------+------+ Ixl I Ixlxlxlxl I +------+------+------+------+------+------+------+------+ BIT 3 - Set Channel 3 Mask Bit

2 - Set Channel 2 Mask Bit 1 - Set Channel 1 Mask Bit o - Set Channel 0 Mask Bit

DNA Status Register

address: [ base + 10 J

15 14 13 12 11 10 +------+------+------+------+------+------+------+------+ I I I I I I I I I +------+------+------+------+------+------+------+------+ BIT 7 - Channel 3 Request

6 - Channel 2 Request 5 - Channel 1 Request

- Channel 0 Request - Channel has Reached TC - Channel has Reached TC

1 - Channel 1 has Reached TC o - Channel 0 has Reached TC

DN400,DN420,DN600 8-46 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

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SERIAL I/O INTERFACE

Data Input/Output, Line 8400 FFBOOO Control/Status, Line 8402 FFBOO2 Data Input/Output, Line 1 8404 FFBOO4 Control/Status, Line 1 8406 FFBOO6 Data Input/Output, Line 2 8408 FFBOO8 Control/Status, Line B40A FFBOOA Data Input/Output, Line 840C FFBOOC Control/Status, Line 840& FFBOOE Bit-Rate Generator,Line 0 6462 FFB082 Bit-Rate Generator,Line 8486 FFBOB6 Bit-Rate Generator, Line 848A FFBOBA Bit-Rate Generator,Line 848& FFB08E

Data 03 02 01 00 Bit-Rate

0 0 0 0 50 75 110 134.5 150 300 600 1200 2400 2000 2400 3600 4800 7200 9600 19200

pi Snl ay Speaker

SIO line 0 is wired to the Display Speaker.

- asserting RTS wil.l emit a constant sound - toggling DTR with RTS set emits different tones

APOLW CONFIDENTIAL. INTERNAL USE ONLY. 8-47 DN400,DN420,DN600

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SID Write Control/Status Registers

WRITE REGISTER 0

I D7 I D6 I D5 I D4 I D3 I D2 I D1 I DO I

Reg Select

NULL code Send Abort

" 1 " 2 " 3 " 4

" 7

Reset External Status Int

NULL Code

Channel Reset Enable lnterrrupton next Rx Char Reset Tx Interrupt pending Error Reset Return from Interrrupt (CH-A only)

Reset Rx CRC Checker Reset Tx CRC Generator Reset Tx Underrun/EOM Latch

WRITE REGISTER 1

I D7 I D6 I D5 I D4 I D3 I D2 I D1 I DO I

07 - Wait/Ready Enable 06 - Wait/Ready Function 05 - Wait/Ready on R/T 04 - D3

o Rx Int. Disable o Rx lnt. on 1st Character

Int. on all Rx. Chars (Par.ity affects vector) n does not ")

D2 - Status affects vector (CH-B only) Dl - Tx Interrupt only DO - EXT Interrupt Enable

WRITE REGISTER 2 (CHANNEL B ONLY)

I D7 I D6 I D5 I D4 I D3 I D2 I D1 I DO I

D7 - DO = Interrupt Vectors V7 - va

DN400,DN420,DN600 8-48 APOLlO CONFIDENTIAL INTERNAL USE ONLY.

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WRITE REGISTER 3

I D7 I D6 I 05 I D4 I 03 I D2 I D1 I DO I

07 - 06

o 0 Rx 5 Bits/Character Rx 7 Bits/Character

Rx 6 Bits/Character

Rx 8 Bits/Character D5 - Auto Enables

D4 - Enter Hunt Phase D3 - Rx CRC Enable D2 - Address Search Mode (SDLC)

D1 - SYNC Character Load Inhibit

DO - Rx Enable

WRITE REGISTER 4

I D7 I D6 I 05 I D4 I D3 I 02 I D1 I DO I

D7 - D6 o 0 Xl Clock Mode

Xl6 Clock Mode

x32 Clock Mode x64 Clock Mode

D5 - 04

o 0 8 Bit Programmed SYNC 16 Bit Programmed SYNC SDLC mode (01111110 flag pattern)

External SYNC Mode D3 - 02

o 0 SYNC Modes Enable

1 Stop Bit/Character 1.5 Stop Bits/Character

2 Stop Bits/Character

01 - 0 = Odd Parity, 1 = Even Parity DO - Enable Parity

WRITE REGISTER 5

I 07 I 06 1 05 I D4 I 03 1 02 I 01 I 00 I

D7 - DTR

D6 - D5 o 0 Tx 5 Bits (or less) Character

Tx 7 Bits/Character

Tx 6 Bits/Character

Tx 8 Bits/Character D4 - Send BREAK

D3 - Tx Enable

D2 - SDLC/CRC-16 01 - RTS

DO - Tx CRC Enable

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 8-49 DN4QO, DN420, DN600

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WRITE REGISTER 6

D7 - DO = SYNC Bits 7 - 0

WRITE REGISTER 7

I 07 I 06 I 05 I 04 I 03 I 02 I 01 I 00 I

D7 - DO .. SYNC Bits 15 - ~

SID Read Control/Status Regi sters

READ REGISTER 0

07 - BREAK/ABORT * 06 - Tx Underrun/EOM * D5 - CTS * D4 - SYNC/Hunt * D3 - OCO * D2 - Tx Buffer Empty 01 - Interrupt pending (CH-A only) DO - Rx Character Available

* Used with External/Status Interrupt Mode

READ REGISTER 1

I 07 I 06 I 05 I 04 I 03 I 02 I 01 I 00 I

07 - End of Frame (SOLC) 06 - CRC/Framing Error D5 - Rx Overrun Error D4 - Parity Error D3 D2 Dl I Field Prev Byte I Field 2nd Prev Byte *

o 0 0 3

DO - All Sent * Residue data for 8 Rx bits/character programmed

READ REGISTER 2

I 07 I 06 I 05 I 04 I 03 I 02 I 01 I 00 I

07 - DO '"" Interrupt Vectors V7 - vO

DN400, ON420, ON600 8-50 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

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ADDRESS SPACE

CHAPTER 9

DN460, DN660, D51'160

physical

200800 traps 400 prom

200800 phys mem 200000 debug data

40000 disp2_mem 20000 disp1_mem 10000 multibus

EOOO color E800 color BOOO sequencer cOOO we. 5400 decoder i/o DOOO i cacheD i/o D400 i=:cachel i/o 0800 i_cache2 i/o DCaO i_cache3 i/o

virtual

0400-> 7FFF 0000400->FF7FFFF F800000->F8007FF FFAOOOO->FFBFFFF FFCOOOO->FFDFFFF FFEOOOO->FFEFFFF FFF6000 FFF6800 (not mapped) (not mapped) (not mapped) (not mapped) (not mapped) (not mapped) (not mapped)

sftw chksum buffer FFF8800 sftw zeroing buffer FFF8COO

FCOO memory ctl FFF9000 F400 disp 2 FFF9400 FOOD disp 1 FFF9800 Bcao ring 2 B800 ring 1 8COO floppy 8800 timers 8400 sios 8000 control 9000 io map

panel

FFF9COO FFFAOOO FFFA800 FFFACOO FFFBOOO FFFB400 FFFF800

APOLlD CONRDENllAL INTERNAL USE ONLY. 9-1 DN460, DN660, OS1'160

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BLT REGISTERS

Refer to the BLT REGISTERS section of CHAPTER 8, DN400,DN420,DN600, for this infornation.

MD commands (DC, Ie) are used to turn data and instruction caches on and off. Machine must be in physical mode to toggle the instruction cache. Data cache is not controllable from CPIO. Sysboot (when running in CPU) turns both caches on.

CPU CONTROL REGISTERS

ONx60 is a micro-coded machine with a forward-mapped address translation mechanism (using in-memory page tables). There is no PTT or PFT. Some of the MMU Control Register functions described above are in the Control Panel Registers, while much of the control of the CPU is achieved via the MOVEC instruction. The following control register definitions are of interest:

* 120-13F - Current Region Registers (0-31) 11F - Current ASIO lIE - Current Floating Point ASIO 11D - Purge Translation Buffer. Values defined:

1 => purge VA in Control Register llC 2 => purge ent ire TB 4 => purge half of TB containing VA in l1C

l1C - VA used in TB purge 119 - Address Translation and Data Cache

Bit 0 Enable/Disable Address Translation Bit 1 : Enable/Disable Data Cache Bit 7 : Domain Bit

113 - Read Hardware and Microcode Revision Levels (Requires Micro Exec)

* These registers/functions are directly supported by the PROM.

DN460 ,DN660~ DSP 160 9-2 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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CONFIGURATION

+------------+ +-------------+ +---------+ CPU 1 MEMORY CPIO

+------------+ +-------------+ +----+----+ CPU 2 1--------1 I

+------------+ ++----------------+ II

PHOEBUS I I +----+----+ +---------------------+ 1 =========== 1 FLOPPY 1 1+---------------------+ +---------+ I 1 (Shugart)

1 I +-------------+ 1 +---1 BLOCK 1---------------------+ I +---1 MULTIPLEXOR 1------++------------+ I I I +-------------+ I I I I I I +------+ +------+ I I I RING I I DISK I I I +------+ +------+ I I +--------------+ I +---1 NODE PERI- 1-----+ 1+---1 PHERAL ADAPTER 1----+ I I I +--------------+ I I MULTIBUS

II II I I +--------------+ I I I +=== I TIMER I I +--------------+ I I +--------------+ I +--1 LINE PRINTER I I I I +--1 CONTROLLER I I I +--------------+ I I +------++------+ 1+===1 BOOT PROM 11 II I I +--------------+ I I +------++------+ 1 I I I I LINE PRINTER I I I +--------------+ I 1 +--------------+ I +=== I CAL CLOCK I I (Printronix) I I +--------------+ I I I I I I (Tapernaster)

I I +--------------+ I I +------------+ I +== I SIO LINES I I +--1 MAG TAPE

I I +--+--+--+--+--+ I +--1 CONTROLLER I I I I I I +-----++-----+ I I 0 I 1 2 3 II II I I +---+ Spinwriter I I +----++----+ I I I KBD I Tablet I I I MAG TAPE I I I +---+ HASP, 3270 I I +----------+ II II (Cipher-F880)

I I +---------+ +----+ I I +------------+ I +---+ DISPLAY I = I TUBE I 1+----------------1 SMD I +---+ MEMORY I +----+ I +----------------1 CONTROLLER I 1 I +---++----+ I I +-----++-----+ I I I I j +--- TWO FREE I I I I +---++----+ ! +---- SLOTS +-----++-----+ 1+==1 BLT II 1 AMPEX II +---------+ I I VERSATEC I 300 ME SMD I I I I I ETHERNET +------------+

APOLLO CONFIDENTIAL INTERNAL USE ONLY. 9-3 DN460, DN660,DSP160

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CONTROL PANEL (GPID) REGISTERS

GPIC Gont rgl Registgr

Address: [6000 FFFB400]

15 8 7 +--------+--------+ I K-------I---K-HSMI +--------+--------+

K - Enable power-down switch (in two places) H - Halt CPIO S - CPIO becomes bus slave M - CPIC becomes NOT bus master

ePIC Status Register

Address: 8002 FFFB402]

15 6 7 +--------+--------+ 1 K------C I BINK-H5MI +--------+--------+

K - Power-down switch enabled (in two places) C - 0 -> This is ePIO running

1 => This is CPU running B - Bus timeout I - Interrupt pending N - Normal mode, 0 => Service Mode H - CPIO is halted S - CPIO is slave M - CPIO is NOT master

LED Registgr

Address: [8004 I FFFB404]

15 8 7 +---------+--------+ 1---------1 LED DATA 1 +---------+--------+

DN460,DN660, DSP160 9-4 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

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Micro Machine Contrgl Registers

None of these registers have mapped addresses.

These are used for loading micro code:

WCS Control Register: C003 WCS Data/Address Decode Rams Cont roJ. B400 Decode Rams Address Decode Rams Data 6404 Decode Rams Shift Microsequencer BOOO CPIO/Microexec Port

Micro Machine Control and Status [B004] :

15 8 7 +--------+--------+ I abcde-fg I TIPMSCRE I +--------+--------+

Left byte is read-only status:

a - Micro machine is frozen b - Micro machine is in trap routine c - Micro machine traps are enabled d - Micro machine is fetching e - 0 => micro machine is running

I -> hit freeze on last instruction f - ePIO data available in port for Micro Exec g - Micro Exec data available in port for CPIO

COOS B402 B406 B003

Right byte may be written for control or read for status: T - Cause Trap to Micro Exec I - Enable Instruction Cache P - Enable Pipeline Register M - Macro step the micro machine S - Micro step the micro machine C - Clock step the micro machine R - Start clocks (runs at address in pipeline) E - Enable micro machine (0 => reset)

APOLLO CONRDENTIAL INTERNAL USE ONLY. 9-5 DN460, DN660, DSP160

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DISPLAY BOARD -' JUMPERS

Refer to the DISPLAY BOARD JUMPERS section of CHAPTER 8, DN400,DN420,DN600, for this information.

DISPLAY CONTROL AND STATUS REGISTER mCSR)

Refer to the DISPLAY CONTROL AND STATUS REGISTER (DCSR) section of CHAPTER 8, DN400,DN420,DN600, for this information.

FAULT FRAME

LONG FAta.T FRAME FORMAT

CPIO fau1.t frames are the same as DN300 (68010). CPU short fault. frames are also the same as DN300. Long fault frame used for bus error, address error, access violation, and region, segment and page faults is:

15 +-----------------------+

+00 I STATUS REGISTER I +-----------------------+

+02 I PROGlW< I +------------+

COUNTER +-----------------------+

+06 101110 I 0 I VECTOR OFFSET I +-----------------------+

+08 I NOT USED I +-----------------------+

+OA FAULTING +------------+ I ADDRESS I

+OE +-----------------------+ I ' OBAD' SIGNAL I

+10 +-----------------------+

DN460, DN660, DSP160 9-6 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

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FAULT TYPES

Reset Bus Error Address Error

Trace Interrupt Illegal Ins. Privilege Ins.

TRAP, TRAPV CHK

Zero Divide

Processing

CUrrent instruction is aborted.

Exception occurs before next instruction.

Processed by normal instruction execution.

Group 0 exceptions have the highest priority.

APOlLO CONFIDENTIAL INTERNAL USE ONLY. 9-7 DN460, DN660, D$P160

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'AIn.T VECTORS

Exception vectors at 200800 I 0 J

vector Address

00 000 004

02 008 03 ooc 04 010 05 014 06 018 07 01C 08 020 09 024 OA 028 OB 02C

OC-OD 030 OE 038

OF-1? 03c 18 060

19-1F 064 20-2F 080

30 OCO 31 OC4 32 OC8 33 OCC 34 ODO 35 OD4

36-3F OD8 40-?F 100

80 200 81 204 82 208 63 20C 64 210

65-6F 214 90-9F 240 AO-AF 260 BO-B2 2CO

B3 2CC B4 2DO 85 2D4 B6 2D6 87 2DC

B6-C3 2EO C4-CD 310 CE-CF 336 DO-EF 340

FO 3CO F1 3C4 F2 3C6 F3 3CC

DN460, DN660,DSP160

Assigpment

Reset: Initial SSP Reset: Initial PC Bus Error Address Error Illegal Instruction Zero Divide CHK Instruction TRAPV Instruction Privilege Violation Trace Unimplemented instruction Unimplemented instruction (Unassigned, reserved) Invalid Stack Format (Unassigned, reserved) Spurious Interrupt (Unassigned, reserved)

TRAP Instruction Vectors (Unassigned, reserved) Floating Point Inexact Result Floating Point Divide by Zero Floating Point Underflow Floating Point Operand Error Floating Point Overflow (Unassigned, reserved) User Int Vectors - unused Region Fault Segment Fault Page Fault Access Violation Floating Point ASlD Trap (Unassigned, reserved) Ring/disk board User lnt Vectors - unused INTO/ INT2 -INT3/ - Tape Controller INT4/ - Storage Module lNT5/ -INT6/ - Line Printer INT? / - Parallel Input User Int Vectors -- unused Unused Color Unused P - ECCC (Automatic vectors) O-N - Display *2 M - Floppy

9-8 APOUO CONFIDENTIAL INTERNAL USE ONLY.

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F4 3DO L - Display #:1 (BLTI FS-F7 3D4 K, J, I -

F8 3EO Unused r9-FA 3E' Sio Lines (2 lines/Vector)

FB 3EC Timers 1,2,3 Fe-FE 3FO Unused

FF 3FC ECCU

FLOATING-POINT FORMAT

Refer to the FLOATING-POINT FORMAT section of Chapter 7, DN330/DN320/DN330 for this information.

FLQATING-POINT REGISTERS

FLoating-point Control Register

31 16

+-----------------------------------------------+-o

+-----------------------------------------------+-

15 14 13 12 11 10 9 8 654321 - - -+-----+--+--+--+--+--+--+-----------------------+

unused

-+-----+--+--+--+--+--+--+-----------------------+

unused

I > inexact decimal input (inexl)

> inexact operation (inex2) > divide by zero (dz)

> underflow (unfl) > overflow (ovfl)

> operand error (operr)

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 9-9 DN460, DN660, DSP160

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Floating Point Status Register

Condition Code Byte

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 +-----------+--+--+--+--+-----------------------+-

unused I unused +-----------+--+--+--+--+-----------------------+- - -

I I I I I I I > not a number or unordered I I > infinity I > zero > negative

I Exception Status Byte 1

15 14 13 12 11 10 9 8 -+-----+--+--+--+--+--+--------------------------+

I IIIIII unused I -+-----+--+--+--+--+--+----------------------:-----+

I r > inexact operation (inex2)

unused > divide by zero (dz) > underflow (unfl)

> overflow (ovfl) > operand error (operr)

FLOPPY CONTROLLER

Refer to the FLOPPY CONTROLLER section of CHAPTER 8, DN400,DN420,DN600, for this information,,'

MEMORY CONTROL/STATUS REGISTERS (MeSR)

There are 64 possible memory control regi:ster addresses, beginning at [FC02 FFF9002]. Within each range of $100 addresses, only one board may respond, but owing to the variety of boards supported ('old', 'new', interleaved, non-interleaved), a board

may respond at anyone of 8 addresses within that range (at intervals of $20). Also boards do not have to respond at contiguous ranges. There can be at most 4 memory boards.

Refer to Chapter 8, DN400,DN420,DN600, for control and status format.

DN460~ DN660, DSPl60 9-10 APOLLO CONADENTIAL INTERNAL USE ONLY.

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MEMORY BOARD JUMPERS

wp 1 wp 2

wp 3 wp 4 wp 5 d wp 6 wp wp wp 9 wp 10 u wp 11 u

wp 12 d wp 13 d wp 14 d

wp 15 d wp 16 u

wp 17 u

wp 18 u

wp 19 u wp 20 u

wp 21 u

wp 22 u wp 23

wp 24 u

wp 25 u wp 26 u

wp 27 d wp 28 u

u=UP

NON-INTERLEAVED

ADDRESS SPACE

1-Mb 2-Mb 2 3 o

d d d d

d d

d d d d d d d

d d

d d d d d

d d d d d d d d

d d d d d

d d d d

d d

d d Rev.Ol

Rev.02 d d

d d

d d d d d

d=DOWN o=OUT

APOLLO CONFIDENTIAL INTERNAL USE ONLY. 9-11

f d

d

d

d

d d

d d d

d

d

INTERLEAVED

ADDRESS SPACE

1-Mb 2

f f

d d

d d

d

d d

d d

d d

f d

d d

d

d d d d

d d

d d d

d

d d d d

d d

d d

2-Mb o 0

f f d d

d d

d d d

d d

d d d d

d d d

d

d d d d d d d d

d d d d d d

d d d d d u

Rev.Ol a a

Rev.02 d d d d d d

d d

d d d

d d

d d

d d

d

d

d d

d d d

d

d

d d

DN460, DN660, DSP160

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MEMORY BOARD

ADM60

28 13 18 20 1.

27 26 1915 24 10 ~ 2

1,2 ',6 17 21 23 8 11 22 25

11111111111 ill.1l i ill i !III III r~HIU ,~,~~I-II"~II~i

DN460, DN660,DSP160 9-12 APOLLO CONFIDENTIAl. INTERNAL USE ONLY.

Page 240: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

MEMORY MANAGEMENT UNIT <MMUl

REGION REGISTER ARRAYS

RARS: ARRAY(O .. 26,0 •. 31] OF RAR_T

REGION REGISTER (RAR_T): (type "rar_t" in vm.ins.pas)

31 16 15 +----------------+----------------+

+00 (vG------ (PHYS ADDR OF SEGMENT MAP I . smap _phadd +----------------+----------------+

v - Region is valid (. valid) G - Region is global (. global)

MRS is a dynamically-allocated per-asid table whose entries contain the region register values for that process. There are 32 hardware region registers, each covers 8mb of VA. The region registers are used by the address translation hardware.

SEGMENT MAPS

SMAPS: ARRAY[O .. 26,0 .. 7680] OF SMAPE_T

SEGMENT MAP ENTRY (SMAPE): (type "smape_t" in vm.ins.pas)

31 16 15 +----------------+----------------+

+00 IVAAAAA--1 PHYS ADDR OF PAGE MAP .pmapyhadd +----------------+----------------+

v - Entry is valid (. valid) A - Access rights as given in 16mb MSTE

The SMAP is a dynamically-allocated per-ASID table whose entries match one-for-one with a process's mstes. It is used by the address translation hardware and is organized in 256 segment units, that one page of smapes represents one REGION (8mb of VA) of one address space.

See also the PAGE MAPS and MST sections of Chapter I, AEGIS.

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 9-13 DN460, DN660,DSP160

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MONITOR TIMING lDN66Q)

Refer to the MONITOR TIMING section of CHAPTER 8, DN400,DN420,DN600, for this information.

Refer to the RING/DISK section of CHAPTER 8, DN400,DN420,DN600, for this information.

SERIAL I/Q INTERFACE

510 page at ( 8400 I FFFBOO ]

DNx60 uses two SC681 chips providing four 510 lines, with control at FFFBOIO. The first line (make B at FFFBOOO) is used for the display keyboard.

Due to limitations of the SC2681 chip, when both 510

lines of a chip are being used, it is possible to have incompatible baud rates. One 510 line can't have a baud rate from Group A while the other 510

line is set from Group B:

=r.=1! 50 75

7200 150 2000 19.2K

Lines 0 (the keyboard, which runs at 1200 baud) and 1 are paired on one chip, and lines 2 and 3 are on the other Chip.

Refer to the SERIAL I/O INTERFACE section of CHAPTER 7, DN300,DN320, for more information.

DN460, DN660, DSP160 9-14 APOLLO CONFIDENTIAL INTERNAL USE ONlY.

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CHAPTER 10

DNSxx

FOR INFORMATION SPECIFIC TO THE DNSxx-T NODES, REFER TO THE DNS70-T/DN58Q-T/DSPSOQ-T HARDWARE MCHITECTURE HANDBOOK (009490)

ADDRESS SPACE lDN55Q)

physical virtual

400 prom 400-3FFF (one-to-one) 4000 pft FFB800-FFF7FF 8000 mmu FFB400 8400 sios FFBOOO 8800 timers FFACOO 9800 ring FF9COO 9COO disk, tape, cal FFA800 A400 pbu ctl FF7COO BOOO fpu ctl FF7000 s400 fpu cmd FF7400 B800 fpu cs FF7800 BeOO VME control FF9400 EOOO color_sup FF6000 E400 color_user FF6400 E800 color wcs FF6800 FOOO displ=sup FF9800 F400 displ_user FFAOOO F800 disp1 wcs FFA400

10000 iomap - FFSOOO-FFSFFF 14000 pr0m2 20000 disp1_mem FCOOOQ-FDFFFF 40000 color_mem FAOOOO-FBFFFF 70000 pbu i/o ref FEOOOO-FE7FFF 80000 pbu 1st half

100000 mem: rod data EOOOOO 100400 mem: traps 0 100800 mem 100800 380000 pbu 2nd half 700000 ptt 700000-7FFFFF

APOLlD CONFIDENTIAL INTERNAL USE ONLY. 10-1 DN5xx

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AnDRESS SPACE /DN560/570/580)

Refer to the ADDRESS SPACE (DN330) in Chapter 7.

CONFIGURATION

DN5xx

+-----+

I FPU I I DN550 I +-----+

+-----+ I I SBUS II

I CPU I ~~~~~~~~~~~~ I I 1---------+ I I +-----+ B-PORT I 1 1

I II I II I II

+-----+ +-----+ EXP 1 VME 1 VME BUS

+- 1 MEM 1 1 INT- 1 :=:=:=:==== 1 I I I FACE I II +-----+ +-----+ 1 1

II II II

+-----+ +-----+ 1 1 +-----+ +-----+ 1 COLOR 1 1 1 'iJME I NET 1

+-----1 SIO 1---1 CONT I === I 1 === 1 TO 1---\ XCVR 1 I I I I II I RINGI I I +-----+ +-----+ 1 1 +-----+ +-----+

I I I I DISPLAY I I I I 1111 BUSII II

SIO --+111 11 II +--- TO RING

SIO ---+ I 1 +-----+ 1 I +-----+ I I I COLOR I I I I VME I

VIDEO ----+ 1 1 ARRAY 1 1 I === I TO I ----- TO DISK

I I (S) I I I I D/T/C 1----- TO TAPE KEYBOARD --+ +-----+ 1 I +-----+

II I I +-----+ II I VME ! II~~~I TO I II I MULTI I I I +-----+

(TERMINATOR) I 1

10-2

II MULTIBUS

<===================>

(SLOTS FOR APOLLO OR USER SUPPLIED DEVICES)

APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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CPU BOARD JUMPERS iDNSSO)

DN550 CPU Board (APNs 4141,4145)

W7 Wl W2 W9

W10

CPU BOARD JUMPERS fDNS60/S70/S80)

DN560/57D/SBO CPU (APN 005373)

APOlLO CONFIDENTIAL. INTERNAL USE ONLY.

·0 WI

10-3

WI2

W4

W3

W2

DN5xx

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PISPLAY BOARp JUMpERS (DN5S0/S60)

ARRAY BOARD

W2

WI

W1 (Timing Delay) W2 (Board Select) Right::: Normal. Left = 3 nSec delay Right::: Board 1. Lett::: Board 2

CONTROl, BoARD

DN550 Color Controller (APN 3954)

J1 J2 J3

J4 J5 J6 J7 J8 Jg JA

JO J1 J2 J3 J4 J5 J6 J7 J8 J9 JA In Left Right Right Out Out In Out Out Out Out

DN5xx 10-4 APOlLO CONFiDENTIAL INTERNAL USE ONLY.

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DISPLAY BOARD illlMPERS (PNS 70)

ON570 DISPLAY CONTROI.l.ER (APN 005710)

o CJ2

o CJ

APOUO CONFIDENTIAL INTERNAL USE ONLY. 10-5 DN5xx

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DISPL;Y BOARD TIJMPERS IDN580)

ARRAY BOARD

DN580 ARRAY BOARD (APN 005209)

CONTROL BOARD

DN580 COLOR CONTROLLER (APN 005213)

·0 W3

o W2

DN5xx 10-6

o W4

o o o

o W1

APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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DN550/560 DISpr AX REGISTERS [ FOOO I OFF9800 J

disp1_sup FOOO OFF9800 (also second color display) displ_user F400 OFFAOOO disp1_wcs F800 OFFA400

color_sup EOOO OFF6000 (also second color_user E400 OFF6400 black & white display) color_wcs E800 OFF6800

Display controller is a 600 with microcode changes.

DN570 DISPLAY CONTROL/STATUS REGISTERS FOGO I 3rr980Q

DN57G USER CONTROL REGISTER F400 I 3FFAGQQ J

15 5 4 3 2 1 a +-----------------------+-----------------------+ I EH I----RESERVED-----I Z21-- J --IMR I TE I DS I DC I ST I DRI +-----------------------+-----------------------+

Zoom by 2 ------+ o => zoom factor = 1 1 => zoom factor "'" 2

+-- Error handshake Memory Reset ----------+ o => Reset 1 => no effect

Trap Enable -------------+ o => Trap disabled 1 => Trap enabled

DP Start --------------------+ o => no effect 1 => Start the draw processor

DP Continue --------------------+ o => no effect 1 => continue from last PC count

DP Stop ---------------------------+ o => Stop the draw processor 1 => no effect

DP Reset -----------------------------+ o => Reset the draw processor 1 => no effect

APOLLO CONFIDENTIAL INTERNAL USE ONLY. 10-7 DNSxx

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DNS 70 SYSTEM CONTROL REGISTER

15 12 11 8 7 6 4 3 2 1 0 +---------------------:..-+-----------------------+ 1 UWP 1 CONTEXT ID 1 IE 1--------1 VE 1 RE 1 RU 1 CI 1 +-----------------------+--------------- -------+

I Zoom by 2 ------+ I 0 ""> zoom factor = 1 I 1 => zoom factor - 2 +-- Error handshake

Memory Reset ----------+ a -> Reset 1 => no effect

Trap Enable -------------+ o => Trap disabled 1 => Trap enabled

DF Start --------------------+ a => no effect 1 => Start the draw processor

DF Continue --------------------+ o -> no effect 1 -> continue from last PC count

DF Stop ---------------------------+ a => Stop the draw processor 1 => no effect

DP Reset -----------------------------+ o => Reset the draw processor 1 -> no effect

DNS8Q DISPLAY CONTROL/STATUS REGISTERS FOOO 3FF9800

DNS60 CONTROL REGISTER

BIT NAME FUNCTION 15-8 RESERVED

INTERRUPT ENABLE When set to a 1, interrupts are enabled.

6-4 RESERVED VIDEO ENABLE

RESET

RESERVED CONTEXT SWITCH

When set to a 0, interrupts are disabled.

When set to a 1, video is enabled. When set to a 0, video is disabled. When set to a 0, the draw processor is reset. Setting this bit to a 1 has no effect.

When set to aI, context interrupts enabled. Setting it to a a enables normal interrupts.

DNS8Q STATUS REGISTER

BIT NAME FUNCTION 15 FIFO READY When set to a 0, OK to write to FIFO.

When set to aI, FIFO not ready for input.

DN5xx 10-8 APOLW CONFIDENTIAL. INTERNAL USE ONLY.

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14 DISPLAY MEMORY When set to a 1, OK to do a display mem access. ACCESS OK When set to a 0, not OK.

13 NEW INSTRUCTION When set to a 1, instruction not in IR. PENDING When set to a 0, instruction is in IR.

12 PARAMETER PASSING When set to a 1, OK to pass parameters. HANDSHAKE When set to a 0, not OK.

11 CONTEXT SWITCH When set to a 0, request has been recognized. HANDSHAKE When set to a 1, request not recognized.

10 RESERVED

9 HORIZONTAL BLANK When set to a 0, horizontal blank occuring. When set to a 1, horizontal blank not occuring.

VERTICAL BLANK When set to a 0, vertical blank occuring. When set to a 1, vertical blank not occuring.

7-0 RESERVED

DISK/TAPE/CALENDAR CONTROLLER gena I OFFA8QQ

15 8 7 +----------+---------+

+00 I--------IE I CMD REG I +----------+---------+

OO-OF - Disk commands:

00 Nop (ignored by controller) 01 Seek 02 Read/write sector (s)

03 Format track 04 Read sector ID (s) (into rOPBs) 05 Restore (to cylinder 0) 06 Force ECC error (s) 07-0F Reserved (illegal disk commands)

10-lF - Tape commands:

10 11

12 13

Select Select Select Select

tape tape tape tape

14 Read status

drive drive drive drive

15 Rewind to BOT 16 Erase ent ire tape

° 1

17 Initialize (retension) tape 18 Write block (s) 19 Write <count> filemarks lA Read block (s) IB Space forward <count> blocks Ie Space reverse <count> blocks (not implemented) ID Space forward <count> filemarks IE Space reverse <count> filemarks (not implemented) IF Reset drive

20-2F - Controller cormnands:

20 Reset controller

APOllO CONFIDENTIAL INTERNAL USE ONLY. 10-9 DNSxx

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DN5xx

21 Execute controller diagnostics 22 Calibrate memory timing loop 23 Calibrate BX timing loop 24 Enable force underrun/overrun (on next command) 25 Disable 26-2F Reserved (illegal commands)

30-FF - Reserved (illegal commands)

1 => controller interrupting (reset to get next interrupt) 1 => enable controller interrupt

15 +-----------------------+

+02 CONTROLLER STATUS +-----------------------+ 15 8000 - controller busy 14 4000 - disk busy 13 2000 - tape busy 12 1000-11 0800 - disk op complete 10 0400 - disk status valid

9 0200 - tape op complete 8 0100 - tape status valid

0080 - DMA not at end of range 0040 - DMA overrun/underrun

5 0020 - memory parity during dma 0010 -0008 - illegal controller command 0004 - controller timeout 0002 - controller diagnostic failed 0001 -

15 8 7 +---------+---------+

+04 I DSK CNT I DSK STAT I +---------+---------+

01 Seek did not complete 02 Write fault 03 Unit not present 04 Sector not found 05 No index pulse 06 Drive not ready 07 No track 0 08 Addr mark not found 09 ECC error in ID field

sectors to transfer, disk status

OA Correctable ECC error in d.--.ta field OB Uncorrectable ECC error in data field OC Recovered ECC error (see dsk_ecc_cnt) aD Recovered overrun/underrun (see dsk_unr_cnt)

10-10 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

Page 252: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

15 8 7 +---------+---------+

+06 1 TAPE CNT 1 TAPE DRV 1 ... blocks to transfer, tape drive ... +---------+---------+

08 1 HEADER WORD CNT (For tape, multiple blocks +-------------------+ must all have the same length.)

OA 1 DATA WORD eNT 1

+-------------------+ oe HEADER END eNT (disk or tape, will contain

+-------------------+ ending counts for last two OE 1 DATA END CNT 1 blocks transferred)

+---------+---------+ 10 1 ID DRV 0 1---------1 Drive 0 parameters

+---------+---------+ (for IDs, see DISK PARAMETERS) 12 I NUM CYLINDERS 0

+---------+---------+

14 1 HEADS 0 1 SECTORS 01 +---------+---------+

16 1 PRE-CaMP CYL 0 1 +---------+---------+

18 1 ID DRV 1 1---------1 Drive 1 parameters +---------+---------+

lA 1 NUM CYLINDERS 1 1 +---------+---------+

1e 1 HEADS 1 1 SECTORS 11 +---------+---------+

lE PRE-COME' CYL 1 +-------------------+

15 8 7 +---------+---------+

+20 1 CTLR ID 1---------1 controller ID +---------+---------+

+22 1 DISK IOPB OFFSET +---------+---------+

+24 1 Eee eNT 1 UNR CNT 1 disk retry counters +---------+---------+

+26 1 DISK ECC OFFSET 1 offset to correction +-------------------+

+28 1 DISK ECe MASK 1 mask

+-------------------+

APOLW CONFIDENTIAL. INTERNAL USE ONLY. 10-11 DN5xx

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15 8 7 +---------+---------+

+2A I TAPE ST 0 I TAPE ST 11 status from drive +---------+---------+

7 80 Status byte bits 6 40 Cartridge not in place 5 20 Unselected drive

10 Write protected cartridge 08 End of media (EOM)

2 04 Unrecoverable data error 1 02 Bad block not located a 01 Filemark detected

80 Status byte 1 bits 40 Illegal command

5 20 No data detected 10 Marginal block detected

3 08 Beginning of media (BOM) 2 04 Reserved for bus parity error

02 Reserved for end of recorded media 01 Power on/reset occurred

TAPE ST 0 TAPE ST 1 STATUS SUMMARY

11110001 00000000 Drive not ready (controller generated) 110XOOOO 00000000 No cartridge 11110000 00000000 No drive 10010000 XOOOXOOO Write protected 10001000 00000000 End of media 100X0100 10001000 Read or write abort 100X0100 00000000 Read error, bad blk transfer 100X0110 00000000 Read error, filler blk transfer 100X0110 10100000 Read error, no data 100X1110 10100000 Read error, <,0 data and EOM 100xOl10 lOlXlxXO Read error, no data and BCM 100XOO01 00000000 Filemark read XXXXOOOO 1100XOOO Illegal command XXXXOOOO lOOOXOOl Power on/reset lQOxOOOl 00010000 Marginal block detected

15 +-------------------+

+2C 1 TAPE ERROR CNTR! tape error counter +-------------------+

+2E I TAPE UNDERRUN CTR I tape underrun counter +-------------------+

+30 1 CTLR TIMEOUT STATUS I timeout status +---------+---------+

+32 I LAST CMD I P I most recent command executed +---------+---------+ P => precomp enabled

DN5xx 10-12 APOLW CONADENTIAL INTERNAL USE ONLY.

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+-------------------+

+34 DIAG ERROR LOC 1 location of diagnostic failure +-------------------+

+36 1 DIAG ERROR SB I what data should have been +-------------------+

+38 DIAG ERROR IS what data was +-------------------+

31 16 15 8 7 +---------------------+---------+-----------+

+80 CYLINDERO READ 0 SECTQRO

+---------------------+---------+-----------+ HEADER ADDRESS 0 1

+---------------------+---------------------+ DATA PPN 0 I----------------CIWOD I

+---------------------+---------------------+

+---------------------+---------+-----------+ 1F4 I CYLINDER31 I READ31 I SECTQR31 I

200

+---------------------+---------+-----------+ HEADER ADDRESS 31 I

+---------------------+---------------------+ DATA PPN 31 I----------------CIWDD I

+---------------------+---------------------+ C - continue on error I - interrupt when done W - write (else read) DO - unit number (00 01)

CALENDAR CONTROLS [ 9EOQ I OFFAAOO 1

15 0

+--------+---------+ 9EOD ICAL_CTL I CAL_RD/WR I Calender control and

+--------+---------+ read/write registers

DISKTAPE ¥ME ADDRESS MODIFIERS [groo OFFA800

15 +-----------------------+-----------------------+

9FOO I LWI--IM5IM4IM31M2IM1IMOI--I--I--I--I--IM2IM1IMO I +-----------------------+-----------------------+

\ /\ / \ / II 111 Supervisor sequential (not II 110 Supervisor program.

II 101 Supervisor data

II 010 User program II 001 User data

II 000 State after reset

II 111 Standard (24 bits) addressing 101 Short (16 bits) 001 Extended (32 bits)

LW = 1 => use 32-bit transfers

imp.)

APOLLD CONRDENTIAL. INTERN~ USE ONLY. 10-13 DN5xx

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FAULT FRAME

Refer to the FAULT FRAME section of CHAPTER 7, DN300,DN320,DN330 for this information. For DN550 information, refer to the DN300/320 section; for DNS60/S70/S80 information, refer to the DN330 sections.

FAULT TYPES

Refer to the FAULT TYPES section of CHAPTER 7, DN300,DN320,DN330 for this information.

DN5xx 10-14 APOLlO CONFIDENTIAL INTERNAL USE ONLY.

Page 256: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

FAULT VECTORS

Exception vector at 100400 I 0 1

vector Address

00 000 00.

02 008 03 OOC 04 010 05 014 06 018 07 01C 08 020 09 024 OA 028 OB 02C OC 030 OD 034 OE 038

OF-1? 03C 18 060

19-1F 064 19 064 1A 068 1B 06C 1C 070 1D 074 1E 078 1F 07C

20-2F 080 30 OCO 31 OC4 32 OC8 33 OCC 34 ODO 35 OD4 36 OD8

37-3F ODC 41 104 42 108 43 10C 44 110 45 114 46 118 47 11C 48 120 49 124 4A 128 4B 12C

4C-5F 130 60 180 61 184

~POLW CONFIDENTIAL INTERNAL USE ONLY.

Assignment

Reset: Initial SSP Reset: Initial PC

Bus Error Address Error Illegal Instruction Zero Divide CHK Instruction TRAPV Instruction Privilege Violation Trace Unimplemented instruction Unimplemented instruction (Unassigned, reserved) Coprocessor protocol violation Invalid Stack Format (Unassigned, reserved) Spurious Interrupt Level 1-7 Auto-Vector j nterrllpt J eye] SIO (rev and xmit) Display keyboard PEB VME VME bus error Timers 1,2,3 Parity error TRAP Instruction Vectors FP Branch or Set on Unordered cond (FPBSUN) FP Inexact Result (FPINEX) FP Divide by Zero (FPDIVZ) FP Underflow (FPUNFL) FP Operand Error (FPOPER) FP Overflow (FLOVFL) FP Signalling NAN (FPSNAN) (Unassigned, reserved) getc putc

read_dsk reload_font pollc quiet_ret write_dsk log_error crash led_update

VME pseudo-vectors ring

10-15

(unused)

DN5xx

Page 257: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

62 188 diaktape 63 18C display 64 190 65 194 pbu 66 198 67 19C

68-6F lAO 7Q-E'F leO

FLOATING-POINT FORMAT

Refer to the FLOATING-POINT FORMAT section of CHAPTER 7, DN300,DN320,DN330 for this information.

FLQATING-POINT REGISTERS lDN560/S70/SS0)

Refer to the FLOATING-POINT REGISTERS section of CHAPTER 7, DN300,DN320,DN330 for this information.

FPU 'PN5S0)

Refer to the FPU section of CHAPTER 7, DN300,DN320,DN330 for this information.

MEMORY CONTROL/STATUS REGISTERS (MeSR)

DN5xx

Refer to the MEMORY CONTROL/STATUS REGISTERS (MeSR) section of CHAPTER 7, DN300,DN320,DN330 for this information. For DN550 information, refer to the DN300/320 section; for DN560/570/580 information, refer to the DN330 sections.

10-16 APOLLO CONFIDENTIAL. INTERNAL USE ONlY.

Page 258: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

MEMORY BOARD .nlMPERS /DN5S0)

W1

Up = CPU/Mern=2MB. Down = CPU/Mern=O.5MB

MEMORY MANAGEMENT UNIT (MMUl

W3 W2 W1

W2 Out Ou1

In In

W3 Out"" No memory expansion

In = Fully populated (APN 3354) 0l~: ~~tP~Io~~~d (APN 4151)

Refer to the MEMORY MANAGEMENT UNIT section of CHAPTER 7,

DN300,DN320,DN330 for this information. For DN550

information, refer to the DN300/320 section; for DN560/570/580 information, refer to the DN330 sections.

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 10-17 DN5xx

Page 259: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

MONITOR TIMING iQN5S0/56Q)

19-ineh Hiteahi and Ikegami

+----+-------------------------+------------+-----------+ [Axis [Item [ Duration [Frequency [ +----+--------+----------------+------------+-----------+ I [1H I HORIZONTAL

I [ I FREQUENCY [ 29.53 uSee I 33.855 KHz I I H +--------+----------------+------------+-----------+ I 0 I H-FP I HORIZONTAL I I I I R I I FRONT PORCH I 0.15 uSee I n/a I I +--------+----------------+------------+-----------+ I I H-SYNC I HORIZONTAL I I I I a I I SYNC I 2.75 uSee I n/a I I N +--------+----------------+------------+-----------+ I T I H-BP I HORIZONTAL I I I I A I I BACK PORCH I 3.5 uSee I n/a I I L +--------+----------------+------------+-----------+ I I H-BL I HORIZONTAL I I I I I I BLANKING I 7.0 uSee I n/a I I +--------+----------------+------------+-----------+ I I H-DIS' I HORIZONTAL I I I I I I DISPLAY AREA I 22.53 uSee I n/a I +----+--------+----------------+------------+-----------+ I I I I V

I E

I R

I T

I I

I C IA I L

I I I I I I

I lV

I I VERTICAL I FREQUENCY 1 2.75 mSee I 78.4 Hz

+--------+----------------+------------+-----------+ I V-rP I VERTICAL I I I I I FRONT PORCH I 8.6 uSee I n/a I +--------+----------------+------------+-----------+ I V-SYNC I VERTICAL I I I I I SYNC I 88.6 uSee I n/a I +--------+----------------+------------+-----------+ I V-BP I VERTICAL t I I I I BACK PORCH I 708.0 uSee I n/a I +--------+----------------+------------+-----------+ I V-BL I VERTICAL I I I I I BLANKING I 885.0 uSee I n/a I +--------+----------------+------------+-----------+ I V-DIS' I VERTICAL I I I I I DISPLAY AREA I 11.865 mSeel n/a I

+----+--------+----------------+------------+-----------+

DNSxx 10-18 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

Page 260: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

MONITOR TIMING (DN570)

15-inch and 19-inch Panasonic

t----t-------------------------t------------t-----------t I Axis I Item I Duration I Frequency I t----t--------t----------------t------------t-----------t I I I H

I 0 I R I I

I Z I 0 IN I T I A

I L

I I I I I

I IH

I I HORr ZONTAL I FREQUENCY

I I I I 19.79 uSee I 50.519 KHz I

t--------t----------------t------------t-----------t I H-FP I HORIZONTAL I I I FRONT PORCH I 0.942 uSec I nla

t--------t----------------t------------t-----------t I H-SYNC I HORIZONTAL I I SYNC 1.88 uSee I n/a

t--------t----------------t------------t-----------t I H-BP I HORIZONTAL I I I I I BACK PORCH I 1. 88 uSee I n/a I t--------t----------------t------------t-----------t I H-BL I HORIZONTAL I I I BLANKING I 4.71 uSee I n/a

t--------t----------------t------------t-----------t I H-DISP I HORIZONTAL I I I DISPLAY AREA I 15.08 uSee I n/a

t----+--------t----------------t------------t-----------t I 1 V I VERTICAL I I FREQUENCY 1 16.67 mSee I 60.0 Hz

t--------t----------------t------------t-----------t V I V-FP I VERTICAL E I I FRONT PORCH I 79.18 uSee I nla R t--------t----------------t------------t-----------t T I V-SYNC I VERTICAL I I I SYNC I 79.18 uSee I n/a C t--------t----------------t------------t-----------t A I V-BP I VERTICAL L I I BACK PORCH I 673.0 uSee I n/a

t--------t----------------t------------t-----------t I V-BL I VERTICAL I I BLANKING I 831.0 uSee I n/a t--------t----------------t------------t-----------t I V-DISP I VERTICAL I I DISPLAY AREA I 15.839 mSec I n/a

t----t--------t----------------t------------t-----------+

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 10-19 DN5xx

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MONITOR TIMING fDN580)

19-ineh Sony

+----+-------------------------+------------+-----------+ I Axis I Item Duration I Frequency I +----+--------+----------------+------------+-----------+

I 1H I HORIZONTAL

I I I FREQUENCY I 15.78 uSee I 63.357 KHzl I H +--------+----------------+------------+-----------+ I 0 I H-FP I HORIZONTAL

I R I I FRONT PORCH 0.37 uSee I n/a I I +--------+----------------+------------+-----------+ I Z I H-SYNC I HORIZONTAL

I 0 I I SYNC 1. 71 uSee I n/a I N +--------+----------------+------------+-----------+ I T I H-BP I HORIZONTAL

I A I I BACK PORCH 1.79 uSee I n/a I L +--------+----------------+------------+-----------+ I I H-BL I HORIZONTAL

I I I BLANKING 3.87 uSee I n/a I +--------+----------------+------------+-----------+ I I H-DISP I HORIZONTAL

I I I DISPLAY AREA I 11.91 uSee I n/a +----+--------+----------------+------------+-----------+

I 1V I VERTICAL

I I FREQUENCY 1 16.67 mSee I 59.99 Hz

+--------+----------------+------------+-----------+ V I V-FP I VERTICAL

E I I FRONT PORCH I 47.35 uSee I n/a R +--------+----------------+------------+-----------+ T I V-SYNC I VERTICAL

I I I SYNC I 47.35 uSee I n/a C +--------+----------------+------------+-----------+ A I V-BP I VERTICAL

L I I BACK PORCH j 410.37uSee I n/a +--------+----------------+------------+-----------+ I V-BL I VERTICAL

I I BLANKING I 505.1 uSee I n/a +--------+----------------+------------+-----------+ I v-DISP I VERTICAL

I I DISPLAY AREA j 16.162 mSee I n/a +----+--------+----------------+------------+-----------+

DN5xx 10-20 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

Page 262: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

I <-x-BL-I <--------- x-DISP ----------> I -----+ /11111 II/III

+--- - -- - - - - -- -- - -- - - -- - - - - - ---+ I IIIII I I III IIIIIII I IIII I I III II I I I I I /I I I I I I I I I I I I I I I I I I I I I I I I I I

-----+-+ +--+-----------------------------+-+ +--

I I I I I I 1 +--+ 1 +--+

I I I I x-FP-> 1-1--1--1 <-x-BP I

I A I 1 +--x-SYNC I <---------------lx------------------> I

x = V or H

MULTIBUS REGISTERS

MtJI,TIBUS CONTROI STATUS REGISTER A400 I FF7COO

15 14 13 12 11 10 +---+---+---+---+---+---+---+---+­

I r 1 r I +---+---+---+---+---+---+---+---+-

\-----1 1 reserved +- Loopback data (see below) I +----- XACK on time-out +----------------- ME_BPRO (diag use only)

+--------------------- Enable early release (should be 0) +--------------- Time-out (when MULTI BUS master talking

to another MULTIBUS device; write 0 to clear)

+------------------- Watchdog Timer

- - -+---+---+---+---+---+---+---+---+

-+---+---+---+---+---+---+---+---+

Lookback enable ------------+ xchange sim (diag only) ---------+ Upper MULTI BUS Enable --------------+ Lower MULTI BUS Enable ------------------+ Force int enable (diag only) ---------------+ MOLTIBUS Multiport Memory Lock Enable-----------+ Lock MULTIBUS Arbiter (asserted when 0) ------------+ MU"LTIBUS INIT (asserted when 0) ------------------------+

(set to one to drop reset)

APOLLO CONFIDENTIAL INTERNAL USE ONLY. 10-21 DN5xx

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DN5xx.

MULTIBTlS INTERRUPT CONTROL STATUS REGISTER A402 FF7C02

15 6 7 +-------------------+--------------------+ 10000000000000000000 I Mask for lines 7-0 I +-------------------+--------------------+

(Interrupt level now in VME interrupt/ID register 5 following interr acknowlege cycle.)

MVLTIBUS ADDRESS MODIFIER REGISTER [A4Q4 FF7C04

15 TRANSMITTED RECEIVED

+-----------------------+-----------------------+ 1-1-1.lmIM3Imlml~I-I-I-I-I-lmlmIMol +-----------------------+-----------------------+

\ /\ / / II 111 Supervisor sequential II 110 Supervisor program

II 101 Supervisor data

II 010 User program II 001 User data

II 000 State after reset

II 111 Standard (24 bits) addressing 101 Short (16 bits) 001 Extended (32 bits)

MQLTIBUS MAP lOOOO! FFSOOO

31 16 15 +---------------------+--+--+---------------+ 1------------------2101151--1 PPN (13: 0) I +---------------------+--+--+---------------+

III I I I I 1 -> Page is mapped III 1\/ I Swap Mode

(not imp.)

I (See DSP80 spec for more info)

I I o => Page is read only (was 1)

LOOP BACK DATA

(No longer exists.)

10-22 APOUO CONFIDENTIAL INTERNAL USE ONLY.

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PAGE FRAME TABLE ENTRY (PFTE)

Refer to the PAGE FRAME TABLE ENTRY (PFTE) section of CHAl?TER 7, DN300,DN320, for this information.

PAGE TBANSI,ATIQN TABLE ENTRY (PFTE)

Refer to the PAGE TRANSLATION TABLE ENTRY (PFTE) section of CHAPTER 7, DN300,DN320, for this information.

PROM ENTRY POINTS

100: dc.w 5,0 5 => stingray 104: getc returns character in D1 108 ac putc prints character in D1 10C init_dsk initialize disk 110 read_dsk read a record from disk 114 reload_font reload font 118 ac pollc returns character in Dl,

else -1 in d1.w 11C ac quiet_ret quiet return to PROM 120 write_disk 124 log_error on/off 128 crash 12C led_update

APOLLO CONADENTIAL INTERNAL USE ONLY, 10-23 DNSxx

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RING REGISTERS

RING page at [9800 OFF9COO] WRITE FUNCTION READ FUNCTION

15 15 +-----------------------+ +-----------------------+

+00 I TRANSMIT COMMAND I +00 I TRANSMIT STATUS I +-----------------------+ +-----------------------+

+02 I RECEIVE COMMAND +02 RECEIVE STATUS I +-----------+-----------+ +-----------+-----------+

+04 I TMASK unused I +04 TMASK UNUSED I +-----------+-----------+ +-----------+-----------+

+06 I DIAG COMMAND I +06 I DIAG STATUS I +-----------------------+ +-----------------------+

+08 RING +08 RING +- - - - - - - - - - - -+ +- - - - - - - - - - - -+

ID ID (*)

+-----------------------+ +-----------------------+ +OC I UNUSED I

+-----------------------+ (*) gate_array only. must be +OE UNUSED

written after a reset. +-----------+-----------+ +10 1D3 UNUSED I

+-----------+-----------+ +12 I ID2 I UNUSED I

+-----------+-----------+ +14 ID1 UNUSED

+ -----------+-----------+ +16 lIDO UNUSED I

+-----------+-----------+

DN5xx 10-24 APOLLD CONFIDENTIAL INTERNAL USE ONLY.

Page 266: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

RING MAP /WORP COUNT REGISTERS [ 9820 I OFF9C20 1

31 15 +---------------------------------------------------+

9820 RECEIVE HEADER ADDRESS XXXXXXXXXX! (*)

+---------------------------------------------------+ 9824 RECEIVE DATA ADDRESS XXXXXXXXXX!

+---------------------------------------------------+ 9828 TRANSMIT HEADER ADDRESS XXXXXXXXXX I

+---------------------------------------------------+ 982C TRANSMIT DATA ADDRESS XXXXXXXXXX I

+-------------------------+-------------------------+ 9830 RECEIVE HDR WORD COUNT I RECEIVE HDR END COUNT I (**)

+-------------------------+-------------------------+ 9834 RECEIVE DAT WORD COUNT I RECEIVE DAT END COUNT

+-------------------------+-------------------------+ 9838 I (***) XMIT HDR WORD COUNT I TRANSMIT HDR END COUNT I

+-------------------------+-------------------------+ 983C I TRANSMIT DAT WORD COUNT I TRANSMIT DAT END COUNT

+-------------------------+-------------------------+

(*) low order 10 bits are ignored

{**) bits 15: 10 of counts are ignored; read as junk

(***) bit 11 of transmit header count = 1 => data length = 0

RING ADDRESS MODIFIER REGISTERS 9840 I OFF9C40

15 +--+--+--+--+--+--+--+--+----------------------+ 1--1--1 M51 M41M31 M21 M11MO 1----------------------1 +--+--+--+--+--+--+--+--+----------------------+

/\ II III Supervisor sequential (not imp.)

II 110 Supervisor program

II 101 Supervisor data

II 010 User program

II 001 User data

II 000 State after reset

II 111 Standard (24 bits) addressing

101 Short (16 bits) 001 Extended (32 bits)

9840 Receive modifier (R/W)

9848 Tranmit modifier (R/w)

9850 Slave (PIa) modifier (W/O)

(bit 3 = 1 => longword transfers) 9860 LSB address counter (RIO) (bits 9: 0 of word)

Refer to the RING REGISTERS section of CHAPTER 7, DN300,DN320

for command and status definitions.

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 10-25 DN5xx

Page 267: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

SERIAL I/O INTERFACE

Refer to the SERIAL I/O INTERFACE section of CHAPTER 7, DN300,DN320, for this information.

VME REGISTERS ECOO I FF9400

VME INTERRUPT STATUS/ID REGISTERS [ Be02 I FF9402 J

15 (read to clear vme int) +--------+--------+

ECOQ 1--------1 LEVa ID 1 unavailable +--------+--------+

BC02 1--------1 LEVI ID 1 ring

+--------+--------+ BC04 1--------1 LEV2 10 1 disktape

+--------+--------+ BC06 1--------1 LEV3 ID 1 display (inst.r;;uction queue done)

+--------+--------+ BCOS 1--------1 LEV4 10 1 display (vertical retrace)

+--------+--------+ BCOA 1--------llQllnnnn 1 pbu nnnn=level, 1111=>device timeout

+--------+--------+ BCOC 1--------1 LEV6 10 1 customer vme (?)

+--------+--------+ BCOE 1--------1 LEV7 ID 1 unused

+--------+--------+

VME INTERRUPT LEVEL REGISTER Eel0 I FF9410

15 8 7 +----------------+----------------+

BelO 1----------------1 L 7L6L5L4L3L2LI--1

+----------------+----------------+

O-bit => that level is interrupting

DN5xx 10-26 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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'VME ADDRESS MODIFIER REGISTER [ BC20 I FF9420

15 TRANSMIT ADM 7 RECEIVE ADM 0

+----------------+----------------+ BC20 1----A5A4A3A2A1AO 1----------A2A1AO I

+----------------+----------------+ \ /\ / \ /

II II 111 Supervisor

II II sequential (not imp)

II II 110 Supervisor program

II ++-----------> 101 Supervisor data

II 010 User program 111 Standard (24 bits) 001 User data

101 Short (16 bits) 000 State after reset

001 Extended (32 bits)

VME MEMORY SIZE REGISTER BC30 I FF9430

15 8 7

+----------------+----------------+ BC30 1----------------I--------PWS2S1S0 I

+----------------+----------------+ / \ /

/ 010 0.5 Mb

/ all 1.0 Mb / 100 1.5Mb

/ 101 2.0 Mb

/ 110 2.5 Mb I 111 3.0 Mb

PW = 1 => enable power off 000 State after reset

VME DIAGNOSTIC CONTROL REGISTERS BC40 I FF9440

15 +---------------------------------------+

Be40 I -- I -- I -- I -- I -- I -- I -- I -- I

+---------------------------------------+

+---------------------------------------+ I LOOP I ELAI -- IFA231FA221FA21lFA20lFA191

- - +---------------------------------------+

15 +---------------------------------------+

BC50 I -- I -- I -- I EFBR I FBR3 I FBR2 I FBRII FBRO I +---------------------------------------+

- - +---------------------------------------+ I FIR7 I FIR61 FIRS I FIR41 FIR3 I FIR21 FIRII EFIR I

- - +---------------------------------------+

APOLLO CONFIDENTIAL INTERNAL USE ONLY. 10-27 DN5xx

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DN5xx

VME ERROR REGISTERS BC60 FF9460

15 +---------------------------------------+

BC60 IBTO*IPAR*I AM51 AM41 AM31 AM21 AMI I AMOI add. mod +---------------------------------------+

+---------------------------------------+ IA23-------------------------------- A161

- - +---------------------------------------+

15 +---------------------------------------+

BC70 IAI5 ----------------------------AOI AS* I +---------------------------------------+

15 +--------------------------------------------+

BCSO 10511050 lWRT* I LWD* IDTACK* I BBSY* I SYSRS* I ACFAL* I +--------------------------------------------+

- - +---------------------------------------+ I -- I -- I -- I -- I -- I -- I -- I -- I

- - +---------------------------------------+

15 +-------------------+-------------------+ - -

Bc90 I BR3* I BR2* I BR1* I BRO* I BG3* I BG2* I BGI* I BGO* I +-------------------+-------------------+ - -

- - +----------------------------------------+ I 1ACK* I 1R7* I 1R6* I 1R5* I 1R4* I 1R3* I 1R2* I 1R1* I

- - +----------------------------------------+

10-28 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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CHAPTER 11

DSPBO, DSP80A, DSP90

ADDRESS SPACE iDSPSO/SQAl

physi cal virtual

~00400 traps 400 PROM

14000 PR0M2

400->3FFF (one-to-one)

100800 phys mem 100800->FFFFF 700000 ptt 700000->7FFFFF 3BOOOO pbu 2nd half 100000 md stk,data EOOODD

80000 pbu 1st half 70000 pbu i/o ref FEOOOO->FE7FFF 10000 iomap FF5000->FF5FFF

A4;OO pbu ctl FF7COO ABOO Ipr FF8000 9800 ring 2 FF9COO 9000 DMA ctl FFAOOO AOOO calendar FFA400 8800 timers 8400 sios 8000 mmu 4000 pft

ADDRESS SPACE (PSP90)

FFACOO FFBOOO FFB400 FFB800->FFC7FF

Refer to the ADDRESS SPACE (DN330) section of Chapter 7 for this information.

APOllO CONFIDENTIAL INTERNAL USE ONLY. 11-1 OSPBO/BOA/90

Page 271: doc.lagout.org Science/0_Computer Hist… · Chapter 11 describes the hardware architecture of the DSE'80/80A/90 nodes, including the basic processor, Memory Management Unit (MMU),

CONP'tGtJRATtON

+-----+ +-----+ 1 1 1 1 SBUS 1 CPU 1--1 HMO 1--=---------------------- 1

1

1

1 1 1 1 1 1 1 1 1 +-----+ +-----+ 1 1 1 1 1

+------+ 1 MAIN 1

1 MEM 1 1 1 +------+

1

1

1

1

1

1

1

1

1

1

+------+ 1 M.B. 1

1 CTL/ 1 1 MAP 1 +------+

1 1

+------+ t-----+ 1 SIO 1

+------+ +-----+ I 1 BOOT 1

I E'ROM I 1 1

1 1 1 1

REAL

I TIME I 1 CLK 1

HMO 1 1 CTL 1 1 1 1 1

+------+ +-----+ +------+ +-----+ I 1 1 1 +---5IO +-----SIO

1

1 1 1

1 --------------------1 1 1 1 1 1 1

t------t t-----t t------t PAR 1 DMA 1 RING

1 LPT 1 CTL 1 1 CTL 1 CTL 1 1 1 +------+ +-----+ t------+

1 1 line network

printer MULTIBUS

<==--================---===-==>

Slots for Apollo and user-supplied devices)

DSPSO/SOA/90 11-2 APOLlD CONRDENTIAL. INTERNAL USE ONLY.

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CPU BOARD JUMPERS lDSPSO ISOA)

DSP80/A CPU Board (APNs 2422, 4834)

W7 W1 W2 W9 W12

W10

W4 W11

we

W3 W5

W6

" II~~' "

W1 W2 W3 W4 W5 W6 W7 we W9 W10 W11 W12 up up up Up up up Down Down Down Down Up Right

CPU BOARD JUMPERS IDsp90)

ON330, DSP90 CPU (APN 005373)

W4

W3

C} W2

W1

APOlLO CONFIDENTIAL. INTERNAL USE ONLY. 11-3 DSP80/80A/90

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DMA CONTROLLER

DMAC page at [ 9000 I OFFFAOO 1

The DMA controller is Motorola M68450.

9000-907F - ring receive header 9080-90FF - ring receive data 9100-917F - ring transmit 9180-91FF - Unused

Refer to the DMA CONTROLLER section of CHAPTER 7, DN300,DN320,DN330 for more information.

FPJJLT FRAMJ:i.

Refer to the FAULT FRAME section of CHAPTER 7,

DN300,DN320,DN330 for this information. Use the DN300/320 sections for the DSP80/80A, and the DN330 sections for the DSP90.

FAULT TYPES

Refer to the FAULT TYPES section of CHAPTER 7,

DN300,DN320,DN330 for this information. Use the DN300/320 sections for the DSP80/80A, and the DN330 sections for the Dsp90.

DSP80/80A/90 11-4 APOLLO CONFIDENTIAl. INTERNAL USE ONLY.

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FAULT VECTORS

Exception vector at 100400 I 0 ]

Vector Address

00 000 004

02 008 03 OOC 04 010 05 01' 06 018 07 01C 08 020 09 024 OA 028 OB 02C OC 030 00 034 OE 038

OF-17 03C 18 060

19-1F 064 19 064 1A 068 1B 06C 1C 070 10 074 1E 078 1F 07C

20-2F 080 30 ocO 31 OC4 32 OC8 33 occ 34 000 35 004 36 008

37-3F ODC

APOUO CONFIDENTIAL INTERNAL USE ONLY,

Assignment

Reset: Initial SSP Reset: Initial PC Bus Error Address Error Illegal Instruction Zero Divide CRR Instruction TRAPV Instruction Privilege Violation Trace Unimplemented instruction Unimplemented instruction (Unassigned, reserved) Coprocessor Invalid Stack Format (Unassigned, reserved) Spurious Interrupt Level 1-7 Auto-Vector interrupt level SIO (rcv and xmit) (keyboard input) Ring PBU Line printer Timers 1,2,3 Parity error TRAP Instruction Vectors FP Branch or Set on Unordered cond (FPBSUN) FP Inexact Result (FPINEX) FP Divide by Zero (FPDIVZ) FP Underflow (FPUNFL) FP Operand Error (FPOPER) FP Overflow (FLOVFL) FP Signalling NAN (FPSNAN) (Unassigned, reserved)

11-5 DSP80/80A/90

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FIOATING-POINT REGISTERS (DSp90)

Refer to the FLOATING-POINT REGISTERS section of CHAPTER 7, DN300,DN320,DN330 for this information.

MEMORY CONTROL/STATUS REGISTERS (MCSR)

Refer to the MEMORY CONTROL/STATUS REGISTERS (MCSR)

section of CHAPTER 7, DN300,DN320,DN330 for this

information. Use the DN300/320 sections for the DSP80/80A, and the DN330 sections for the DSP90.

MEMORY MANAGEMENT UNIT 1w:1tJ)

Refer to the MEMORY MANAGEMENT UNIT section of CHAPTER 7,

DN300,DN320,DN330 for this information. Use the DN300/320 sections for the DSP80/80A, and the DN330 sections for the DSP90.

DSP80/80A/90 11-6 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

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MULTI BUS REGISTERS

MULTIBUS CONTROL STATUS REGISTER A400 I FF7COO

15 14 13 12 11 10

+---+-----------+---+---+---+---+-I I I r I r I +---+-----------+---+---+---+---+-

\----v----/ \-----/ I reserved +- Loopback data (see below)

I +----- XACK on time-out

+--------------------- Current bus master: o - DSP80

1-5 - conto11er in slot 1-5

(bottom slot is 1) +------------------- Watchdog Timer

I ___ read only __

- - -+---+---+---+---+---+---+---+---+

- - -+---+---+---+---+---+---+---+---+

Lookback enable ------------+ Xchange sim (diag only) ---------+ Upper MULTI BUS Enable --------------+ Lower MULTIBUS Enable ------------------+ Lock enable for memory ---------------------+ MULTIBUS Multiport Memory Lock Enable-----------+

Lock MULTI BUS Arbiter (asserted when 0) ------------+ MULTIBUS INIT (asserted when 0) ------------------------+

(set to one to drop reset)

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 11-7 DSPSO/SOA/90

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MULTIBUS INTERRUPT CONTROL STATUS REGISTER A402 FF7C02

15 8 7 +-------------------+--------------------+

Int lines 7-0 1 Mask for lines 7-0 1 +-------------------+--------------------+

MULTIBUS MAP [10000 FFSOOO J

15 11 o 15 +--+--+--+--+--------------+-----------------+ 115114113 1121 MULTI BUS PPN 1 unused +--+--+--+--+--------------+-----------------+

I I \--/ I I I I 1 Swap Mode: 1 1 See DSP80 spec for more info I I I I 1 1 => Page is read-only I 1 -> page mapped

LOOP BACK pATA

47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 +-------------------------------+-------------------------------+ I I I I I I I I I r I r I r I r I I I I I +-------------------------------+-------------------------------+

\---v---/ I I I I I \-----v-----/ \-----v-----/ Master I I I I I I I

I I I I I I I INIT IReset) -+ I I I I I I BHEN -------------+ I I I I I Memory Cycle ---------+ 1 1 1 1 Read Cycle ---------------+ 1 1 I XACK -------------------------+ 1 1 Reserved for MOLTIBUS Address (23: 20) ---+ I MULTIBUS Address (20: 16) -------------------------------+

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 +-------------------------------+-------------------------------+ I I I I I I I I I I I I I I I I I +-------------------------------+-------------------------------+

MULTI BUS Address (15:0)

15 14 13 12 11 10 +-------------------------------+-------------------------------+ I I I I I I I I I I I I I I I I I +--------------------------_._---+-------------------------------+

MULTIBUS Data (15:0)

DSP80/BOA/90 11-8 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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PAGE FRAME TABI E ENTRY (PFTEI

Refer to the PAGE FRAME TABLE ENTRY (PFTE) section of CHAPTER 7, DN300,DN320,DN330 for this information.

PAGE TRANSLATION TABLE ENTRY (PFTEI

Refer to the PAGE TRANSLATION TABLE ENTRY (PFTE) section of CHAPTER 7, DN300,DN320,330 for this information.

PROM ENTRY POINTS

100 : dc.w 3,0 3 ~> DSP80, no aux info 104 : ac getc returns character in 01 108 putc prints character in 01 10C init _dsk initialize disk 110 read_dsk read a record from disk 11. reload_ font reload font 118 pollc returns character in 01,

else -1 in dl.w 11C quiet_ret quiet return to PROM 120 write _disk 12. log_error on/off 128 crash 12C led_update

RING REGISTERS

Refer to the RING REGISTERS section of CHAPTER 7, DN300,DN320,DN330 for this information.

SERIAL I/O INTERFACE

The DSP80,DSP80A uses only the Signetics $C2681 DUART (there is no keyboard interface) .

Refer to the SERIAL I/O INTERFACE section of CHAPTER 7, DN300,DN320,ON330 for SIO information.

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 11-9 OSP80/80A/90

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CHAPTER 12

DN3000

ADDRESS SPACE BY PHYSICAL ADDRESS

physical

100400 traps 400 prom

100000 phys mem. 100800 phys mern 100000 debug data

8000 mrnu/cpu 8400 sios 8800 timers 8900 calendar 9000 DMAl 9100 DMA2 9200 DMA page reg 9300 parity ppn 9400 pIC1 (ints) 9500 pIC2 (ints)

o DMMU RP 4000000 DMMU TB

8000000 DMMO' TB flush COOOOOO DMMU status

20000 pMMU

virtual

400 (l-to-l) 100000->4FFFFF 100800

3COOOOO 3FFB400 3FFBOOO 3FFACOO 3FFADOO 3FFAOOO 3FFA100 3FFA200 3FFA300 3FF9000 3FF9100

[cpu space 3] [cpu space 3]

[cpu space 3] [cpu space 3] [cpu space 31 [cpu space 3] 22000 68881 Fp

40000 i/o bus 4DOOO win

(i/o addrs 000-3ff => 3FFA800

50000 tape 3FF9cOO 51000 ring page 1 3FF6800 51400 ring page 3FF6COO 51800 ring page 3FF7000 51eOO ring page 4 3rr7400 57COO sio3 58000 ethernet brd1 3rr5COO 58400 ethernet brd2 3FF6000 59000 ring page 5 3FF7800 59,400 ring page 6 3FF7COO 59800 ring page 3FF8000 59COO ring page 3FF8400 5aCCO parellel 5D800 Mono 3FF9400 5DCOO Mono page 2 3FF9800 SE800 Color 3FF9400 5ECOO Color page 2 3FF9800 5F800 flp 3FFA400

APOUD CONFIDENTIAL INTERNAL USE ONLY. 12-1

I/O Bus

40000-6FFFF) lAO

200 220 228 230 238

300 308 320 328 330 338

3BO 3B8 3DO 3D8 3FO

DN3000

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SFCOO sio2 AOOOO "dsp mem color 3FAOOOO->3FBFFFF

FAOOOO dsp-mem mono 3FAOOOO->3FDFFFF lOOOOO-8FFFFF main mem 900000->FFFFFF AT-compatible memory space

Every 8 bytes of the bus ilo space (0-3FF) is mapped to one page of DN3000 space. Formula for translating AT-compatible bus ilo address to DN3000 bus is: (AT .... addr/8) 1< $400 + $40000

The beeper is in the DN3000 keyboard and is accessed by writing to SIO line O. Transmit fOllowing sequence to turn tone ON:

$FF $21 $81 $00 It will go off automatically after 300 milliseconds.

Transmit following sequence to turn tone OFF: $FF $21 $82 $00

DN3000 12-2 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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CALENDAR r8g00 I 3FFADOO

+-----------------+ 00 + SECONDS 0-59

+-----------------+ 01 + SECONDS ALARM + 0-59

+-----------------+ 02 + MINUTES + 0-59

+-----------------+ 03 + MINUTES ALARM + 0-59

+-----------------+ 04 + HOURS + 0-23

+-----------------+ 05 + HOURS ALARM + 0-23

+-----------------+ 06 + DAY of WEEK + 1-7

+-----------------+ 07 + DATE of MONTH + 1-31

+-----------------+ 08 + MONTH + 1-12

+-----------------+ 09 + YEAR + 0-99

+-----------------+ OA + COMMAND REGISTER+

+-----------------+ OB + STATUS REGISTER +

+-----------------+ OC + UNUSED REGISTER +

+-----------------+ OD + UNUSED REGISTER +

+-----------------+ QE-l1 + CHECKSUM

+-----------------+ 50 bytes of battery backed up RAM

used by diagnostics for config info 12-15 + VALID PATTERN +

+-----------------+ 16-1D + MEM BOARD ARRAY +

+-----------------+ 1E-21 + NODEID +

+-----------------+ bit 22-25 + DEV BIT ARRAY + <= 0 flp

+-----------------+ 26 + RING TYPE

+-----------------+ 27 + DISP TYPE +

+-----------------+ 28 + DISK TYPE

+-----------------+ 29-3F + UNUSED +

+-----------------+

APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

1 = ctape = win = fpu

4 = ring = user device = ethernet

7 = serial/parallel board

12-3 DN3000

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Command Register [890A I 3FFAPOA 1

76543210 +---+---+---+---+---+---+---+---+ I UI. I 0 I 0 I 0 I 0 I 0 I 0 I 0 I +---+---+---+---+---+---+---+---+

I 1=> update in progress

Status Regj ster [890B / 3FFADOB J

4 3 2 1 a +---+---+---+---+---+---+---+---+ I SETI 0 I 0 I 0 I 0 I 0 I 0 I 0 I +---+---+---+---+---+---+---+---+

I 1=> abort current update, allow initialization.

defined in los/ker/os_cal_asm.asm

CARTRIDGE TAPE [SOOOO I 3FF9cOO 1

Data Register tread) [SOOOO I 3FF9COO

Drive status information is returned as a series of 6 bytes through the data register after a read status command is sent.

Tape Statlls Byte 0

+---+---+---+---+---+---+---+---+ I 0 Inoclusdlwp leomludelbnllfm I +---+---+---+---+---+---+---+---+

I I I I I I I 1-> Filemark detected 1 I I I I I 1=> Bad block not located I I I I I 1=> Unrecoverable data error I I I I 1=> End of media (EOM) I I I 1=> Write protected cartridge I I 1=> Unselected drive I 1=> Cartridge not in place 0=> Status byte 0

DN3000 12-4 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

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Tape Stat us Byte 1

+---+---+---+---+---+---+---+---+ I 1 lillinodlmgnibomlbpelermlporl +---+---+---+---+---+---+---+---+

I I I I I I I 1-> Power on/reset occurred I I I I I I 1=> Reserved for end of recorded media I I I I I 1=> Reserved for bus parity error I I I I 1-> Beginning of media (BOM~

I I I 1-> Marginal block detected I I 1=> No data detected I 1=> Illegal command 1=> Status byte 1

Status 0 Status 1 STATUS SUMMARY 11110001 00000000 Drive not ready (ct1r generated) 1l0XOOOO 00000000 No cartridge 11110000 00000000 No drive 10010000 xOOOxOOO Write protected 10001000 00000000 End of media 100X0100 10010000 Read abort 100X0100 10001000 Write abort 100X0100 00000000 Read error, bad blk xfer 100XOllO 00000000 Read error, filler blk xfer 100XOllO 10100000 Read error, no data 100Xll10 10100000 Read error, no data and BOM 100X0110 101X1XXO Read error, no data and BOM 100XOO01 00000000 Filemark read XXXXOOOO 1l00XOOO Illegal command XXXXOOOO 1000XOO! Power on/reset 100XOO01 00010000 Marginal block detected

Tape Status Byte "'" high byte of data error counter Tape Status Byte - low byte of data error counter Tape Status Byte 4 - high byte of underrun counter Tape Status Byte 5 = low byte of under run counter

Command Register (Write) [SPOOO! 3ff9COO

+-----------+---... ---------------+ I cm.d type cmd data I +-----------+-------------------+

Command types: 000 MMMMM Select 001 OOMMM Position 010 00000 Write Data 011 00000 Write File Mark 100 00000 Read Data 101 00000 Read File Mark 110 00000 Read Status 111 Reserved

APOLLO CONFIDENTIAL INTERNAL USE ONLY. 12-5 DN3000

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Contrql Reg; ster (write qnly> [ sOOOl I 3FF9cOl

+---+---+---+---+---+---+---+---+ I rst I req I ien I dni I not used I +---+---+---+---+---+---+---+---+

I I I 1=> Enables DONE int, dni = 0 masks DONE int I I 1=> Enables interrupts. I 1=> Request to LSI chip. 1-> Reset controller microprocessor.

Status Register (read qnly> 50001 3FF9COl

+---+---+---+---+---+---+---+---+ lirqlrdYlexcldonldirl not used I +---+---+---+---+---+---+---+---+

I I I I 1=> Direction, indicates direction of bus I I is from controller to DN3000. I I 1=> Done, from DMA logic. I 0=> Exception, from LSI chip. I 0=> Ready from LSI chip. 0-> Interrupt request flag, , or' of rdy and exc, and done

if dni is set.

DMA Go Register 50002 I 3rr9C02 1

Start DMA (DMAGO). Any write to this register wil.l cause DMAGO to be active.

DMA Reset Register [ 50003 I 3FF9C03 1

Reset DMA (RSTDMA). Any write to this register will. cause RSTDMA to be active.

{ defined in /os/ker/ct .pas }

DN3000 APOUD CONFIDENTIAL. INTERNAL USE ONLY.

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CONFIGtlaATION

The b10ck diagram below shows the major components of the DN3000 cpu and memory system, AT-compatible bus, and peripherals.

SIO : : PROM: : TIMER :

CPU ;_._=z; MMU ;=--==========----

--------- v CALENDAR :

FP --------------

:DMA: : RAM:

DN3000 bus

: Bus Interface

AT-compatible Bus

: Winch :==>v<==:Floppy :

1 Graphics 1 =-->v<=== 1 Network I

I I I I +--------+

+--------+ I I I Ct Tape I-->v I I +--------+

APOLLO CONFIDENTIAL INTERNAL USE ONLY.

+--------+

12-7 DN3000

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CPU (MMtJ) CONTROL/STAnIS REGISTER SOOO Q3FFB40Q

Status Register (read) [SOOO Q3FFB400

U 14 DUll 10 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ I 0 I 0 l·mtolutoldtolpdmlpiolctolpe3lpe2lpe1lpeOI ipl fpliotl :run I +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+- -+

I I I I \ / I I I i/o bus <-1 I I I I I I mem space timeout I I 1=> parity I I I

I I I error I 1 I Coproc bus <=1 I I (failing byte) I I I

timeout I I I I I I I I I I

i/o bus DMA <=1 I I I I timeout I I I I

I int pending <=1 I I Parity, during DMA <-1 I I

fp owner trap <=1 I 10 parity error <=1 I (on i/o bus ref) ilo bus i/o cycle <=1

timeout on-board CPU timeout <-1 normal mode <-1

(ref to non-existent m.ero.) To clear bus timeouts or parity conditions from status register, write to the status register. This register is readonly. It will respond to byte mode access.

Coot Tol Register (write) SlOO 03FFBSQO

15 14 13 12 11 10 9 5 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ Ild711d611d511.d411d311d211dlildO Ipe31pe21pelipeO I dgl fpl rsal rune I +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ \ / \ / I I I I

I I I I 1-> led off I I I I

force parity err <-1 I I I I (bytes 3-0) I I I I

enable diag mode <-1 I I I enable fp owner trap <=1 I I reset on-board devices <=1 I

non-maskab1.e interrupt enab1.e <=1

Neither RSA nor the reset instruction reset the SIO lines. Non-maskab1e interrupts must be enabled to receive parity errors. This register is write-only (the BSET instruction may not be used to turn bits on and off). It will respond to byte mode access.

DN3000 12-8 APOLLO CONFIDENTIAL. INTERNAL USE ONLY,

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DISK (rIppPY/WINCHESTER) CONTROLLER 4POOO 3FFABOO

Status Register [4POOO I 3FFA800 1

+---+---+---+---+---+---+---+---+ I 0 I 0 lintldmalslcl phldirlavll +---+---+---+---+---+---+---+---+

I I I I I I I I I I I 1=> available for transfer I I J 1=> transfer to host I I I 0-> transfer from host I I 1-> command phase I I 0=> data phase I 1=> controller selected I 1=> dma request 1=> interrupt request

Write anything to this register to RESET controller.

Jumper Setting Register [4D002 I 3FFAB02

+---+---+---+---+---+---+---+---+ I 0 I 0 I 0 I 0 I j11 j21 j31 j41 +---+---+---+---+---+---+---+---+

I I I I I I I 1""'> jumper4 in place I I 1=> jumper3 in place I 1=> jumper2 in place 1=> jumper1 in place

Write anything to this regiater to generate controller select.

Interrupt Mask Register (write only) 4D003 3FFA803

+---+---+---+---+---+---+---+---+ I 0 I 0 I 0 I 0 I 0 I 0 Idmalintl +---+---+---+---+---+---+---+---+

1=> enable interrupt

1=> enable dma

APOlLD CONRDENTIAL. INTERNAL USE ONLY. 12-9 DN3000

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Cgmmand/Pata/Statlls Register [4POOO! 3FFASOQ J

All. commands are given by moving 6 bytes to the command/data register. The copy conunand is the only exception which requires 10 bytes. Every command sequence has three phases:

Command phase Data in/ out phase Status phase (pertains to conunand op only, not hardware status)

Comand Phase

I BYTE 0 I Command Class I Op code I 1-------1-----1-------1-------------------------1 I BYTE 11 MSe I LUN I Head Number I I ICYL I I I 1-------1-----1-------1----1--------------------1 I BYTE 21 Cyl. High I Sector Number I 1-------1----------1----------------------------1 1 BYTE 3 1 Cylinder Low 1 1-------1---------------------------------------1 1 BYTE 41 Interleave or Block Count 1 1-------1---------------------------------------1 I BYTE 51 Control Byte 1

Cont rol Byte Fgrmat

+----+----+------------+-------------+ IrlalO 0 Ols I +----+----+------------+-------------+

I I \ / I I drive type and step option: I I 0 0 a unknown drive. 3 ms per step I I 0 0 1 N/A 1 I 1 0 25 ugec per step I I 1 50 usec per step 1 1 1 0 200 usee per step III 0 1 70 usec per step 1 1 1 0 3 ms per step III 1 3 ms per step 1 1=> disable ECC retries 1=> disable Retries

Status Phase Byte

+---+---+---+---+---+---+---+---+ 10ltidi01010Iei01 +---+---+---+---+---+---+---+---+

I I 1=> error condition, check sense. I :a winchester drive number 1=> winchester status 0=> tape status

DN3000 12-10 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

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Error and Operat ion Codes

Error codes: Op Codes:

Drive errors Test Drive Ready No Index signal from Winc $01 Recalibrate No seek complete Write Fault Drive not ready

No track zero found Seek in progress

Data errors

ID Read error

$02 Request Sense $03 Format Drive $04 Read Verify $06 Format Track $08 Format Bad Track

Read Write

$10 Seek Uncorrectable Data error $11 Initialize ID address Mark not found $12 Read from Sector Buffer

$00 $01 $03 $04 $05 $06 $07 $08 $OA

$OB $OC

$OE

Sector not found $14 Write Data to Sector Buffer $OF Seek error Sequencer/DMA failure

$15 Assign Alternate Track $10 $16 Copy $20

Write protected $17 Read to Sector Buffer $30 Correctable Data error $18 RAM Diagnostic SEO Bad track $19 Read ID Device Control Block $~2

Drive Diagnostic $~3

Command errors Controller Internal Diag $E4 Invalid Cormnand $20 Read Long $E5 Illegal disk address $21 Write Long $E6 Illegal Fune for Drv Type $22 Volume Overflow $23

Diagnostics errors RAM error $30 Program Memory chksm err $31 Processor Test error $32 Winc control test $33

Error codes ' xx'

MD driver as: returned by sense_status and reported by

DISK operation ERROR: xx recordnum unit type

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 12-11 DN3000

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Floppy [ slaoo I 3FFA400 ,

Digitol Outpnt Beg; ater rSFB02 [ 3FFA402 write only

+-------+---+---+---+---+---+---+ I reserve I BEN I AEN I ENB I RST I XXX I SLe I +-------+---+---+---+---+---+---+

I I I I I I I I 1-> Drive se.1ect I I I 1-> Reset I I 1=> Enable interrupts and DMA I 1=> Drive motor B enable 1=> Drive motor B enable

Main Statlls Register (read only) SFS04 I 3FFA404

+---+-;---+---+---+---+---+---+---+ I RQI<IDIO I EXMI CB I D3B I D2B I D1B I DOB I +---+---+---+---+---+---+---+---+

I I 1=> roo a in Seek Mode I I 1=> FDD 1 in Seek Mode I I l->FDO 2 in Seek Mode I I 1-> FDO 3 in Seek Mode I 1-> BUSY, Read or Write Command in process I 1=> Execution mode for non-DMA transfers 1=> I/O Direction, 1 "" Data Reg to Processor, 0 -

Processor to Data Reg. 1-> Data register ready to send/receive data from

Processor.

Status information is returned as a series of bytes from the data register after completion of a command. The result phase of most commands produce status register 0,1,2. Recalibrate, Specify, and Seek return no status information. Sense drive status returns status register 3 and Sense interrupt status returns status register 0 only.

DN3000 12-12 APOLLO CONADENTIAL INTERNAL USE ONLY.

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Status Register Q [ 5F8Q5 ! 3FFA4Q5 1

Returned at the end of a command through the data address.

+-------+---+---+---+---+---+---+ I C ISE lEe INR IHO IU811U801

+-------+---+---+---+---+---+---+ \ ___ 1

1=> Unit Select 0 Status 1=> Unit Select 1 8tatus

fails to occur after 77 Step Pulses 1=> Head 1 Q=> READ a

1=> Not Ready 1=> Equipment check or Track 0 Signal

1=> Seek Completed

a => Normal Termination of Command 1 => Abnormal Term {conunand started, not completed} Q => Invalid Command{ command issued never started } 1 => Abnormal Termination{ FOO went not ready during

conunand execution }

Status Register 1 5F8Q5 I 3FFA4D5

+---+---+---+---+---+---+---+---+ IECYI a IDE lOR I Q IND INW IMA I +---+---+---+---+---+---+---+---+

1=> missing address mark 1=> write protected

1=> no data found 1=> overrun

1=> data error 1=> end of cylinder error

Status Register SFSDS I 3FFA4D5

+---+---+---+---+---+---+---+---+ I Q ICM 100 IWC ISH ISN lac IMD I +---+---+---+---+---+---+---+---+

1=> missing addr mark in data field 1=> bad cylinder

1=> scan not satisfied 1=> scan equal hit

1=> wrong cylinder 1=> data error in data field

1=> deleted data-address mark encountered

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 12-13 DN3QOO

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Stat!l9 Reqi9ter 3 [ SF8DS I 3FFA405

+---+---+---+---+---+---t---+---+ 1FT INP IRDYITROITS IHD IUN11UNOI +---t---+---t---t---t---t---t---+

I I I I I I I 1=> unit 0 select I I I I I I 1-> unit 1 select I I I I I 1-> head address I I I I two sided from drive I I I track 0 from drive I I ready from drive I write protect from drive

fault status from drive

Addit ional Control Reg; 9ter (write only>

+-------t---t---t---t---+---+---t I reserve I PN61 PN41 PN21 WP21 WPIIWPO I t-------t---t---t---t---t---t---t

5FS06 3FFA406

I 1=> Write precomp I 1=> Write precomp 1 I 1=> Write precornp 2 I 1=> Interface pin 2 (density & speed control) I 1=> Interface pin 4 1=> Interface pin 6

Digital Input Regi 9ter (read only 5F807 3FFA407

t---t---t---t---t---t---t---t---t IDCHIWG I HD31 HD21 HDll HDO IUNllUNO I +---t---t---t---t---t---t---t---t

1=> unit 0 select 1=> unit 1 select

1=> Head select 0 1=> Head select 1

1=> Head select 2 1=> Head select 3/ Reduced write current

1=> write gate 1=> Diskette changed

DN300Q 12-14 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

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Diskette Control Register (write only) 5F807 I 3FFA407

+-----------------------+-------+ UNUSED I TRN RTE I transfer rate

+-----------------------+-------+ \ ___ 1

Bit 1 Bit 0

(defined in /os/ker/flp .pas)

APOLLO CONFIDENTIAl. INTERNAL USE ONLY. 12-15

500 RBPS 300 KBPS 250 REPS

N/A

DN3000

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QISPLAY (COLOR) (SEROO! 3FF9400

Display memory r AOODO I 3FFAOOO ,

4 planes, each 1024xl024 (1024x8QO visible)

Status Register (read gn1y) SEaoo I 3FF940D

+---+---+---+---+---+---+---+---+ Iblkl vblsynlrmclaltl adlhckl10kl +---+---+---+---+---+---+---+---+

I I 0"",> okay to load LUT (lOQus) I I 0-> horiz sync clock (diagnostics) I I 0-> a-d conversion done (diagnostics) I I x-> alternating BLT state I I 1=> read-mod-write cycle req'd I 0=> composite sync I 0=> vertical blank 0=> composite horiz and vert blank

Display-Type Register (read gn1y>

+---+---+---+---+---+---+---+---+ 10101010111010101 +---+---+---+---+---+---+---+---+

DN3000 12-16

SEeD1 3FF9401

APOUO CONFIDENTIAL INTERNAL USE ONLY.

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Raster 00 Register <write only) r 5E802 ! 3FF9402 J

Used to specify the raster operation for each of the 4 planes.

15 14 13 12 11 10 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ I rp31 rp31 rp3/ rp3 I rp21 rp2 I rp21 rp21 rp11 rp11 rp11 rp11 rpO I rpO I rpO I rpO I +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+

$0 Zero $1 Source AND Destination $2 Source AND (-Destination) $3 Source $4 (-Source) AND Destination $5 Destination $6 Source XOR Destination $7 Source OR Destination $8 Source NOR Destination $9 Source XNOR Destination $A -Destination $B Source OR (-Destination) $C -Source $D (-Source) OR Destination $E Source NAND Destination $F One

BLT Control Register [5ECOO I 3FF9800

+---+---+---+---+---+---+---+---+ Imd21mdl1mdOI s41 s31 s21 sll sOl +---+---+---+---+---+---+---+---+

' ___ I' I

Signed shift count (positive is right-shift)

=> Selects bIt and memory access mode 000 => CPU destination BLT

(bus write to provide disp mem addr, bus read to get data)

001 => Alternating BLT (alternating bus writes provide src/dest addrs, second write provides Write-enables)

010 -> Vector or fil.1 mode (bus write to provide Write-enables and addr)

011 -> CPU source BLT (bus write to provide src data, bus write to provide Write-enables and addr)

100 -> Double access BLT {fastest BLT mode} (bus write to provide src addr on address lines, dest addr on data lines (16-bit WORD offset)

111 => Normal access to display memory

APOUD CONFIDENTIAL INTERNAL USE ONLY. 12-17 DN3000

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Mise Control Register [5EC02 I 3F£9802

+---+---+---+---+---+---+---+---+ la.l~cld~l_nlrftl_cIQgl_nl

+---+---+---+---+---+---+---+---+ I I I I I I I lOll> video enable I I I I I I 1-> enable sync generator (normal = 1) I I I I I 0=> diagnostic pixel clock (normal = 1)

I I I I I watched by hardware only when syg "'" I I I I I software use: 1 ""> inuse I I I 0=> reset sync generator (normal = 1) I I 1-> raster op enable, raster op spec in ROP reg I 0-> disable horiz clock (normal - 1) I watched by hardware only when syg ... 0 I 0=> disable vert mode clock (normal =1) I watched by hardware onLy when syg = 1=> additive bLt or normal memory access

Plane Selegt Register [ 5EC04 I 3£[9804

+---+---+---+---+---+---+---+---+ I 0 I 0 I spa I spb I dp31 dp21dplidpO I +---+---+---+---+---+---+---+---+

\ __ 1 \ __ 1

DN3000

0=> select plane 0 0=> select plane 1

0=> select plane 2 0=> select plane 3 Any combination of destination pl.anes may selected.

=> Source plane selection: 00 -> Plane 0 01 => plane 1 10 => Plane 2 11 => Plane 3

-> BLT source control: 00 => set source to all ones (used for vectors) 01 => replicate 4 lsb of data bus 10 => replicate lsb of shifter 11 => use source data unchanged (normal use)

12-18 APOLLO CONFIDENTIAL INTERNAL USE ONlY.

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Chip Init Register [5EC06 I 3FF9806 1

Initializes the 8255A chip. Set just per system reset.

+---+---+---+---+---+---+---+---+ 11101010101010101 +---+---+---+---+---+---+---+---+

1 => set all ports to basic output mode

To initialize and set normal access to display memory (no bIts) : Chip_reg $80 set all ports to basic output mode Misc_cntl Plane_sel Blt_cntl

$8B $eE

$EO

enable display, normal memory access select plane 0 for normal memory access set for normal memory access, no shift

Write-enable Register (write only) 5Eaoo 3FF9400

15 14 13 12 11 10 +---+---+---+---+---t---+---+---+---+---+---+---+---+---+---+---+ Ixlxlxlxlxlxlxlxlxlxlxlxlxlxlxlxl +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ 0=> writing enabled. 1=> writing disabled.

Used to select the pixels within a word to be modified for all display memory-write operations. For normal writes, this register should be cleared (all pixels enabled) .

Lookup Table Registers

Red LUT Register Green LUT Register Blue LUT Register

Layout of each register: 7 6 5 4

5ECOl 3FF980l SEC03 3FF9803 5EC05 3FF980S

+---+---+---+---+---+---+---+---+ I a31 a21 all aD I d31 d21 dll dO I +---+---+---+---+---+---+---+---+

\ / \ /

Address in LUT Data to be loaded

Both registers and LUTs are write-only. LUTS can be loaded only during the vertical blanking period. When LOK=O in status register, there is sufficient time to load all 16 locations of the three LUTs.

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 12-19 DN3000

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Diagnostic Register (write only) SEeD7 3FF98D?

WRITE: 7

+---+---+---+---+---+---+---+---+ IOIOIOIOIOlllxlxl +---+---+---+---+---+---+---+---+

\ __ 1

Input Channel Select: 00 => Red Video Output 01 => Green Video Output 10 => Blue Video Output

READ: 7

+---+---+---+---+---+---+---+---+ lxlxlxlxlxlxlxlxl +---+---+---+---+---+---+---+---+

\ I

DN3000

Results encoding: 00 => 0.00 Volts 01 => 0.01 Volts 80 => 1.28 Volts FF => 2.55 Volts

12-20 APOlLD CONFIDENTIAl. INTERNAL USE ONLY.

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DISPLAY (MONOCHROME) [ SP800 I 3FF940Q

Pi sol ay memory [ FAOOOO I 3FFAOOO

2048xl024 (1280xl024 visible)

Status Register (read only) SOSOO 3FF940Q

+---+---+---+---+---+---+---+---+ I blk I vb I hs I rmc I al t! vs I hck I vd) +---+---+---+---+---+---+---+---+

0=> video data (diagnostics) 0=> horiz sync clock (diagnostics)

0=> vertical sync (diagnostics) x=> alternating BLT state

1=> read-mad-write cycle req'd 0=> horizontal syn (diagnostics)

0=> vertical blank 0=> composite horiz and vert blank

Display-Type Register (read only) 50801 I 3FF9401

t---+---+---+---+---+---+---+---+ 10101010111010111 t---+---+---+---+---+---+---+---+

Raster Op Register (write only) [SE802 3FF9402

Used to specify the raster operations.

15 14 13 12 11 10 9 +-----------------------------------------------+---+---+---+---+

not used I rpv I rpv I rpv I rpv I +-----------------------------------------------+---+---+---+---t

Definitions for rp values same as color controller.

BLT Control Regi ster SECOQ I 3FF9800

Same as color.

APOLLO CONFIDENTIAL INTERNAL USE ONLY. 12-21 DN3000

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Misc Control Register (SEC02! 3FF9802

+---+---+---+---+---+---+---+---+ I inv I bi 7! dhc I ren I rst I dpc I syg I ven I +---+---+---+---+---+---+---+---+

1=> video enable 1=> enable sync generator (normal = 1)

0=> diagnostic pixel clock (normal = 1) watched by hardware only when syg = 0 software use: I => inuse

0=> reset sync generator (normal = 1) 1=> raster op enable, raster op spec in RQP reg

0=> disable horiz clock (normal = 1) watched by hardware only when syg = 0

0=> BLT Mode 4 destination address bit 17 (syg =1) when syg=O, disable vert mode clock (diagnostics)

Inverse Video Control (0=> I is black, 0 is white) (1=> 0 is black, 1 is white)

Plane Select Register SEC04 I 3FF9804

+---+---+-----------------------+ I 0 I 0 I unused +---+---+-----------------------+

\ __ 1

=> BLT source control: 00 => set source to all ones (used for vectors) 01 => replicate 4 Isb of data bus 10 => replicate lsb of shifter 11 => use source data unchanged (normal use)

Chip Init Register 5EC06 I 3FF98Q6

Same as color.

Write-enable Register (write only) (SE8GO I 3FF94QO

Same as color. color4_ $disp_ regs in /us/ ins/ color4. ins. pas }

DN3000 12-22 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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DMA CONTROL r 9000 I 3FFAOOO 1 r 9100 I 3FFAlOO 1

DMA control uses two Intel 8237 DMA Controller Chips. The first supports only 8 bit transfers (channels 0-3) and the second supports 16 bit transfers (channels 5-7) . Channel 4 is used to cascade channels 0-3 to the cpu and so is not available for dma. (defined in /os/ker/dma.pas) Channel Usage

Chip 1 [ 9000 I 3FFAOOO Chip 2 [ 9100

CHO avail CH4 cascade CH1 SDLC option CHS avail CH2 floppy CH6 avail

CH3 avail CH7 avail

Command Register (write) [900819108

+---+---+---+---+---+---+---+---+ I ack I drql sIt Ipri I timl ctll hldlrnmc I +---+---+---+---+---+---+---+---+

I 3FFA100 I for chip 1

1=> memory to memory enable 1=> hold enable

1=> controller disable

1=> compressed timing 1=> rotating priority

1=> extended write selection 1=> DREQ sense active low

1=> DACK sense active high

Status Register (read) 9008/9108

+---+---+---+---+---+---+---+---+ I rq3 I rq21 rq11 rqO I tc31 tc2 ) tell teO I +---+---+---+---+---+---+---+---+

1=> chan 0 has reached TC

1=> chan 1 reached TC 1=> chan 2 has reached TC

1=> chan 3 has reached TC 1=> chan 0 requesting service

1=> chan 1 requesting service 1=> ehan 2 requesting service

1=> chan 3 requesting service

APOLLO CONFIDENTIAL INTERNAL USE ONLY. 12-23 DN3000

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Single Channel Mask Register 9DDA/910A

+---+---+---+---+---+---+-------+ I 0 I 0 I 0 I 0 I 0 Imsk I channel I +---+---+---+---+---+---+-------+

I ' ___ I I I => select channel 0-3 o => enable channel 1 -> di sable channel

All Channels Mask Register [ 900r/91Dr

+---+---+---+---+---+---+---+---+ I 0 I 0 I 0 I a Ic3mlc2mlc1mlcOmi +---+---+---+---+---+---+---+---+

I I I 1-> disable chan a I I 1=> disable chan 1 I 1""> disable chan 2 1=> disable chan 3

Mode register (write) [90DB/910B

+-------+---+---+-------+-------+ I mode I ads I aut I trnsfr I channell +-------+---+---+-------+-------+ ' ___ I ' ___ 1' __ 1

I I => channel select I 00 verify transfer I I ===> I 01 write transfer I I 10 read transfer I I 11 illegal I 1=> auto-initialize enable I 1-> address decrement sel.ect I I a 0 demand mode 1-> I 01 single mode

I 10 block mode I 11 cascade mode

Clear Byte Pointer gOOn/g10n 1

This register must be written to (any value) before loading address and count registers.

DN3000 12-24 APOLLD CONADENTIAL. INTERNAL USE ONLY.

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PM Page Regi sters [9200 I 3FFA200 1

The DMA chips support only l6-bit addressing, but the system supports 24 bits of physical address. To supply the extra bits of addressing required, 8 one-byte page registers are provided. Each byte is loaded with the high 8 physical address bits for its corresponding DMA channel. Note that DMA can operate on a maximum of 1024 bytes (each channel has only ONE page register).

Addresses of the DMA page registers (note the non-order) :

9207 page register for CHO 9203 page register for CHI 9201 page register for CH2 9202 page register for CH3 920B page register for CH5 9209 page register fOr CH6 920A page register fOr CH7

FAULT FRAME AND FAULT TYPES

Refer to the FAULT FRAME section of CHAPTER 7, DN300,320 for this information.

APOLLO CONFIDENTIAL INTERNAL USE ONLY. 12-25 DN3000

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FAULT VECTORS

Except ion page at

Vector Address

00 000 004

02 008 03 OOC 04 010 05 014 06 018 07 01C 08 020 09 024 OA 028 OB 02C OC 030 OD 034 OE 038

OF-17 03C 18 060

19-1E 064 1F 07C

20-2F 080 30 OCO 31 OC4 32 OC8 33 OCC 34 ODO 35 OD4 36 ODS

37-3F OD8 40-9F 100

AO 280 A1 284 A2 288 A3 28C A4 290 AS 294 A6 298 A7 29c A8 2AO A9 2A4 AA 2A8 AB 2AC AC 2BO AD 2B4 AE 2B8 AF 2BC

B8-FF 2CO

100400 I 0 1

Assignment

Reset: Initial SSP Reset: Initial PC Bus Error Address Error Illegal Instruction Zero Divide CHK Instruction TRAPV Instruction Privilege Violation Trace Unimplemented instruction F-line trap (co-processor) (Unassigned, reserved) Co-processor protocol violation Invalid Stack Format (Unassigned, reserved) Spurious Interrupt Auto vectors 1-6 (unused) Parity Error non-rnaskable level 7 TRAP Instruction Vectors Floating Point Branch Set on Unord Condo Floating Point Inexact Result Floating Point Divide by Zero Floating Point Underflow Floating Point Operand Error Floating Point Overflow Floating Point Not a Number (Unassigned, reserved) User Int Vectors - used for prom entry pt s IRQO - Timers 1,2,3 IRQl - Sio lines (2 ports) IRQ2 - Ring IRQ3 - PIC 2 to PIC 1 (unseen by software) IRQ4 IRQS - Tape IRQ6 - Floppy IRQ7 IRQ8 - Calendar IRQ9 - Ethernet board IRQ10 - Ethernet board IRQl1 - PC-board primary IRQ12 IRQ13 - Diagnostic Interrupt IRQ14 - Winchester IRQlS - PC-board alternate User Int Vectors -- unused

FLOATING-POINT REGISTERS Refer to the FLOATING-POINT REGISTERS section of CHAPTER 7, DN300,DN320,DN330 for this information.

DN3000 12-26 APOlLO CONRDENTIAL INTERNAL USE ONLY.

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PARITY ERROR REGISTER (read on ly) 9300 I 03FFA300

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---------------------------------------------+ I X I X I FAILING PPN I +---+---+---------------------------------------------+ The upper two bits must be masked off.

{ type mmu_$parityypn in /os/kins/term..pvt.pas

FROGBAMMABI.E INTERRUPT CONTROX.LER [ 9400/9500 I 3FF9000/3FF91 DO

Master: [ 9400 I 3FF9000 1 Slave: [ 9500 I 3FF9100 1

There are two Intel 8259A interrupt control chips, the master takes interrupt request lines 0-7; the slave responds to lines 8-15 and is cascaded through request line 3 of the master. This is a complicated chip. Only features used are described.

{ defined in /os/ker/pbu.pas Port 0 /+000)

Write' OA' then read Interrupt Request Register at same lac: 76543210

+---+---+---+---+---+---+---+---+ I I71 I61 I51 I41 I31 I21 I11 IO I +---+---+---+---+---+---+---+---+

1=> channel is requesting interrupt.

Write' OB' then read In-service Register at same location: 76543210

+---+---+---+---+---+---+---+---+ I S71 S61 S51 S41 S31 S21 SII SO I +---+---+---+---+---+---+---+---+

1-> channel interrupt has been accepted.

Write '20' (non-specific EOI) to this register to acknowledge and clear highest level In-service Request.

Fort 1 (+001)

Interrupt mask register: 7 6 I) 4 3

+---+---+---+---+---+---+---+---+ I M71 M61 M51 M41 M31 ml ill I MOl +---+---+---+---+---+---+---+---+

1=> channel is masked (inta inhibited)

APOLlO CONFIDENTIAL. INTERNAL USE ONLY. 12-27 DN3000

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Prggrammable Interrupt Controller Initialization Sequence

Interrupt vectors are programmed to start at $280.

Master 9400 I 03FF9000 Port 0 ICW1 "" 19 Port 1 ICw2 "" AO Port 1 Icw3 = 08 Port 1 ICW4 01 Port I OCW1 - FF

Slave 9500 I 03FF9100 Port 0 ICW1 - 19 Port 1 ICW2 - A8 Port 1 ICW3 03 Port ICW4 01 Port OCWl FF

{level triggered, need ICW4} {vector byte va1ue for ints at $280+} {have slave at IRQ3} {normal EOI, 8086 mode} {mask all ints till further notice}

{level triggered, need ICW4} {vector byte value for ints at $2AO+} {am. slave with ID 3} {normal EOI, 8086 mode} {mask all ints till further notice}

Interrupt Request Line Assignments

Master Slave Device

IRQ 0 timers IRQ 1 sio IRQ 2 ring IRQ 3-----> slave pic to master

IRQ8 calendar IRQ9 ethernet board 1 IRQ10 ethernet board 2 IRQ11 pc option primary IRQ12 IRQl3 IRQl4 winchester IRQIS pc option alternate

IRQ 4 IRQ 5 tape IRQ 6 floppy IRQ 7

On slave interrupt, EOI slave first, then master. The priority of IRQ8-1S is higher than IRQ4-7 since they use the second PIC which is slaved to the master at IRQ3.

DN3000 12-28 APOUO CONFIDENTiAL INTERNAL USE ONLY.

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RING [ 5] DOO-SlCOD S9CDQ-59cOQ ! 3FF6800-3FF8400 J

The DN3000 ring board has an 8K WORD buffer for xmitting/rcving msgs. There is room for 7 rev msg buffers (each lk bytes of

header and lk bytes of data) and 1 xmit msg buffer of the same

size. In the OS, msgs to the network protocol gate array for initialization use the xmit buffer. There is only one read/write

port to the buffer (RAM_DATA) and one address register

(RAM_ADDR). The buffer is read or written by setting the ram_addr and doing sequential word reads/writes to the ram_data port. After setting ram_addr, the first word read should be

discarded.

RING REGISTERS

Bus Addr Phy AEGIS When Read

220 222 224 226 228 22A 22C 22E 230 232 234 236 238 23A 23C 23E

320 322 324 326 328 32A 32C 32E 330 332 334 336 338 33A 33c 33E

51000 3FF6BOO 51002 3FF6802 51004 3FF6B04

51006 3FF6B06 51400 3FF6cOD

51402 3FF6c02

51404 3FF6C04 51406 3FF6C06

51800 3FF7000

51802 3FF7002 51804 3FF7004

51806 3FF7006

5lCDO 3FF740Q 51C02 3FF7402

51C04 3FF7404

51C06 3FF7406

Node_ID3 (msb) Node_ID2

Node_IDl Node_IDO (lsb) (unused - PROM) (unused - PROM)

(unused - PROM) (unused - PROM)

(unused - PROM)

(unused - PROM) (unused - PROM)

(unused - PROM)

(unused - PROM) (unused - PROM)

(unused - PROM)

Node _ ID _CHECKSUM

59000 3FF7BOO BOARD_TYPE 59002 3FF7802 *1 XMIT ADDR 59004 3FF7804 *2 XMIT=:ABORT/RCV_ADD

5-9006 3FF7806 *1 RAM_ADDR

59400 3FF7COO MISC_STAT 59402 3FF7CQ2 XMIT_STAT

59404 3FF7CQ4 RCV STAT

59406 3FF7C06 RAM DATA 59800 3FF8000 RCV _ HDR _ CNT

59802 3FF8002 RCV _PKT _ CNT 59804 3E'F8004 RCV _ MAX_ CNT 59806 3FFB006 CNT_CO_CNTR

59COO 3F:r8400 XMIT_HDR_CNT

59C02 3FF8402 XMIT_PKT_CNT 59C04 3FF8404 BAD _ PKT_ CNT

59C06 3FF8406 CNT_C1_CNTR

When Written

SOFT _ RCV _ REQ XMIT_ACK

RCV_ACK

TIMO_ACK

SOFT _ XMIT _ REQ

BOARD_RESET XMIT ADDR RCV_ADDR

RAM_ADDR

MISC_CMD XMIT CMD

RCV_CMD

RAM_DATA RCV_HDR_CNT

RCV_PKT_CNT RCV _MAX _ CNT CNT _CO _ CNTR

XMIT HDR CNT

XMIT PKT CNT BAD_PKT_CNT CNT _ C1_ CNTR

*1 Registers are write only for the two-board version.

*2 Two-board version: XMIT_ABORT. Single-board version: RCV _ ADDR. (Single-board at;ort is clear xrnit enable in xmit_cmd.)

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 12-29 DN3000

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RING COMMAND AND STATUS REGISTERS

.MI.S.S:; STS (read) [ 59400 I 3FF7COO

15 14 13 12 11 10 +---+---+---+---t---+---+---+---+---+---+---+---+---+---+---+---+ I nct I tmo I xby I rby I iov I rlk I esb I bpe I x I x I x I x I gps I xi I ri I tmi I +---+---t---t---t---t---t---t---+---t---t---+---t---t---t---t---t

sticky good pkt <=1 XMIT intr pending <=0

RCV int r pending <=0 GA timeout intr pending <=0

1=> sticky bi-phase error l=>sticky elastic store buffer error

1=> rcv lock error 1=> initialize

0=> rcv busy 0=> xmt busy

1=> timeout O=>network connect

BQl STS (read) 59404 I 3FF7C04

15 14 13 12 11 10 t---t---t---t---t---t---t---t---t---t---t---t---t---t---t---t---t I pe I cpd I wak I icp I de 1 pke I akp I ife I nct I ren I rby I bpe I esb I rc21 rcll rcO I t---t---t---t---t---t---t---t---t---t---t---t---t---t---t---t---t

I 1=> bi-phase error I (phs_rs) I I I 0=> rev busy I I 1=> enable I I I 0=> network connect I I 1=> ife I I (overrun or controller error) I 1=> ack parity error I (aekparerr _rs) I 1=> packet error 1 (pkt_err/aekbyte_errbit_rs) I 1=> data (cre_rs) 1=> icopy

1=> wak 1=> copied

1=> protocol error (timeout rs)

DN3000

elastic store buffer error (esb_rs) <=1 rcv counter output bit 2 <=1 (pkt exceeded max_rev_cnt)

rev counter output bit 1 <=1 (data rev in progress)

rcv counter output bit 0 <=1 (hdr rev in progress)

12-30 APOLLO CONFIDENTIAl. INTERNAL USE ONLY.

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XMil. STS (read) [ 59402 I 3FF7C02

15 14 13 12 11 10 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ I pe I x I x I x ) x I x I abt I x I nct I xen I iby I xby I x I x I xtll xtO I +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+

\ I

XMIT status bits 6-0 (see below) I

1=> protocol error I network connect <= 0

xmt enable <=1 initialize busy <=0

xmt busy <=0 xmt tag bit 1 <=0

I I I

xmt tag bit 0 <=0 xmt tags indicate transmitter state:

00=> msg complete 01=> data being transmitted 11=> hdr being transmitted

If protocol error bit is 0, bits 14-8 have this definition: 15 14 13 12 11 10 9 8

+---+---+---+---+---+---+---+---+ I 0 Icpdlwaklicplpkel delabtlifej +---+---+---+---+---+---+---+---+

x=> interface error IFF abt = 1 (1=>xmit _ underrun, O=>controller _err)

1=> packet aborted. check ife 1=> data error (ere error)

1=> packet (pkter;/ackbyte_errbit) 1=> icopy

1=> wak 1=> copied

If protocol error bit is 1, bits 14-8 have this definition: 15 14 13 12 11 10 9 8

+---+---+---+---+---+---+---+---+ I 1 I tme I syn I ern I frm I akp I abt I ife I +---+---+---+---+---+---+---+---+

x=> interface error IFF abt = 1 (1=>rcv _overrun, O=>controller _err)

J=> packet aborted. check ife 1=> ackbyte parity error (ackpe)

1=> from error (ferr) 1=> error rtn (no_return)

1=> sync error 1=> timeout in Gate Array

APOLLO CONFIDENTIAL INTERNAL USE ONLY. 12-31 DN3000

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M.!..S..C. CMD (wrjte onlyl [ 59400 ! 3FF7COO J

15 14 13 12 11 10 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ I 0 I 0 I 0 Ibpmlnetltdlltd211pbl 0 I 0 I 0 I 0 I 0 I 0 I 0 I 0 I +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+

I I I I 1=> digital loopback enable I j 1=> txdiag2

I 1=> txdiagl 1=> network connect

1=> bad packet marking enable

Except for diagnostics, txdiagl, txdiag2, and digital loopback enable should be zero. Bad packet marking enable is only operational on the single board version.

BQl CMD (write only) [59404 I 3FF7c04

15 14 13 12 11 10 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ I 0 I 0 I 0 I 0 I rev I 0 I 0 I 0 I 0 I 0 I 0 I 0 I 0 I 0 I 0 I 0 I +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+

1=> receive enable

Set ' rev' to 0 to abort an enabled receive.

XMIT CMD (write only) [ 59402 I 3FF7C02

15 14 13 12 11 10 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ I fen I ten I ine I 0 I 0 I 0 I 0 I 0 I 0 I 0 I 0 I 0 I 0 I 0 I 0 I 0 I +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+

1=> initialize enable 1=> transmit enable

1=> force transmit

Force Transmit flag is a modifier to Transmit Enable, not a separate command. Set 'ten' to a to abort an enabled transmit in the single board.

XMIT ADDR I Rev APDR I RAM ~

15 14 13 12 11 10 +---+---+---+---+---+---+---+---+---+---+--:-+---+---+---+---+---+ I a71 a61 as! a41 a31 a21 all aOla151a141a131a121al11a101 a91 aSI +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+

These registers are write-only in the 2-board version.

DN3000 12-32 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

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COUNTER REGISTERS

The packet counters: RCV_HDR_CNT [+800J XMIT_HDR_CNT [+COOJ

RCV_PKT_CNT [+802J XMIT_PKT_CNT [+C02J

RCV_MAX_CNT [+804] BAD_PKT_CNT [+C04]

are implemented with Intel 8254 Chips.

To load values into counters, first load CNT_Cx_CNTR with: $3000 before loading rcv hdr cnt $7000 before loading rcv:::':pkt:::':cnt $8000 before loading rcv_max_cnt

The counters are then written with successive word accesses: Isb in high byte of word msb in high byte of word

To read values from counters, first load CNT_Cx_CNTR with: $C200 before reading rcv_hdr_cnt $C400 before reading rcv pkt cnt $C800 before reading rcv:::':max':cnt $CEOO to prepare to read all three

The counters are then read with successive word accesses: status in high byte of word Isb in high byte of word msb in high byte of word

Hardware Packet Types:

80 broadcast 40 hw_diag 20 thank you 10 please

8 paging user sw_diag

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. 12-33 DN3000

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RING SOFTWARE STATUS INFO

RING_$SEND_STAT_T and its relationship to software counters RING_$SEND_STAT_T~ Counted in: Reported by NETSTAT in:

8000 copied 4000 wacked 2000 nacked

1000 forced 800 delay_added 400 didn't return 200 ring down 100 overrun . 80 bus error

40

rd.xmitcnt rd.xmit_wack rd.xmit_nack rd.xmitcnt

rd. delay_in rd. xmit_nortn rd. broken = true

Xmit count WACKs NACKs

Delay swtchd IN/OUT Xmit Timout

rd. xmit_overrun Xmit rd.xmit_bus xmit Bus error rd.xmit_error or Xmit pkt error rd.xmit_ackpar Xmit Ack par ring_ $unexpected _xmi t_stat (sometimes)

'* 20 biphase error rd. xmit_modem and Xmit modem err

10 not connected 8 looped back

esb error

rd. = rin9_$data

rin9_ $xmi t_biphase

rd . xmi t _modem and rin9_$xmit_esb

xmi t modem err

RING_$SEND_STAT_T and its relationship to DN3000 HW status RING_$SEND_STAT_T: Generated by Status in XMIT_STS:

8000 copied

4000 wacked

2000 nacked

1000 forced 800 delay_added

NO errors AND cpd AND icp ( [tmo_copy_xs, rerr_icopy_xsl)

Some error but cpd AND NOT pe (copied by someone) ([tmo_copy_xs] AND NOT [protocol_err_xs])

NOT pe AND wak (NOT [protocol_err_xs]) AND (serr_wak_xsl)

NOT pe AND NOT icp (NOT (protocol_err_xsl) AND NOT

[rerr_icopy_xs] )

400 didn't return pe and (tmo or syn or ern or frm) ([protocol_err_xs] AND THEN [tmo_copy_xs1 or (serr_wak_xs1 or [rerr_icopy_xs1 [ferrJkterr_xs] )

200 ring down 100 overrun

'* 80 bus error 40 error

'* 20 biphase error

abt AND ife ([abort_xs, iferr_xs] )

pe AND akp ([protocol_err_xs,ackpe_derr_xsJ) NOT pe AND pke AND icp

([ferr_pkterr_xs,rerr_icopy_xs] )

10 not connected nct ([discon_xs}) looped back esb error

Status not defined for DN3000 transmits

DN3000 12-34 APOlLD CONFIDENTIAl. INTERNAL USE ONLY.

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SIO [8400 I 3FFBOOO

Same as first chip of DN460 (CHAPTER 9), except for the definition of the output port register in which the dtr_b bit has moved. Channel A is the keyboard, Channel B is the single sio line. The chip is also used to provide timing for memory refresh.

TIMERS [8800 I 3FFACOO ]

Same as all previous systems (defined in /os/kins/time/pvt. pas) .

APOLLO CONFIDENTIAL INTERNAL USE ONLY. 12-35 DN3000

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APPENDIX A - ASCII CHARACTER SET

00 00 NUL 00 01 01 SOH 01 02 02 STX 02 03 03 ETX 03 04 04 EOT 04 05 05 ENQ 05 06 06 ACK 06 07 07 BEL 07 10 08 BS 08 11 09 HT 09

12 OA NL(LF) 10 13 DB VT 11 14 DC FF 12 15 OD CR 13 16 DE RRS 14 17 OF BRS 15 20 10 RCP 16 21 11 XON 17

22 12 HLF 18 23 13 XOFF 19 24 14 HLR 20 25 15 NAK 21 26 16 SYN 22 27 17 ETB 23 30 18 CAN 24 31 19 EM 25 32 lA SUB 26 33 IB ESC 27 34 lC FS 28 35 10 GS 29 36 IE RS 30 37 IF US 31 40 20 SP 32 41 21 33 42 22 34 43 23 45 44 24 36 45 25 37 46 26 38 47 27 50 28 51 29 52 2A 1<

53 28 + 54 2C 55 2D-56 2E 57 2F I

39 40 41 42 43 44

45 46 47

60 30 61 31 1 62 32 63 33 64 34 65 35 66 36 6 67 37 7 70 3B B 71 39 72 3A 73 38 74 3C 75 3D "" 76 3E 77 3F? 100 40 101 41 A 102 42 l3 103 43 C 104 44 D 105 45 E 106 46 F 107 47 G 110 48 H

III 49 I 112 4A J 113 48 K

114 4C L 115 40 M 116 4E N 117 4F 0 120 50 P 121 51 Q

122 52 R 123 53 124 54 T 125 55 U 126 56 V 127 57 W 130 58 X 131 S9 y

132 5A Z 133 5B [ 134 5C \ 135 5D 1 136 5E 137 SF

APOLLD CONFIDENTIAL INTERNAL USE ONLY. A-I

4B 49 50 51 52 53 54 55 56 57 5B 59 60 61 62 63 64 65 66 67 6B 69 70 71 72 73 74 75 76 77 7B 79 BO

Bl

B2 B3 B4 B5 B6 B7 BB B9 90 91 92 93 94 95

140 60 141 61 a 142 62 b l43 63 144 64 d

96 97 9B 99 100 101 102 103 104 105 106 107 lOB

109 110 111 112 113 114 115 116 117

l45 65 e l46 66 147 67 g l50 68 h 151 69 152 6A j 153 68 k lS4 6C 1 l55 6D m lS6 6E n lS7 6F 0

160 70 P 161 71 q 162 72 r 163 73 164 74 t 165 75 u 166 76 v 118 167 77 w 119 170 78 x 120 171 79 Y 121 172 7A z 122 173 7B 123 174 7C 124 175 70 125 176 7l!; 126 177 7F DEL 127

Appendix A

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APPENDIX B - POWERS OF TWO

2**n hex --------------------+----+-----------------

16 10 32 20 64 40

128 80 256 100 512 200

1 024 10 400 2 048 11 800 4 096 12 1000 B 192 13 2000

16 3B4 14 4000 32 76B 15 8000 65 536 16 1 0000

131 072 17 2 0000 262 144 IB 4 0000 524 2B8 19 8 0000

1 04B 576 20 10 0000 2 097 152 21 20 0000 4 194 304 22 40 0000 B 3 B B 60B 23 80 0000

16 777 216 24 100 0000 33 554 432 25 200 0000 67 lOB 864 26 400 0000

134 217 728 27 BOO 0000 26B 435 456 28 1000 0000 536 870 912 29 2000 0000

1 073 741 824 30 4000 0000 2 147 1B3 648 31 8000 0000 4 294 967 296 32 1 0000 0000 8 5B9 934 592 33 2 0000 0000

17 179 B69 IB4 34 4 0000 0000 34 359 73 B 36B 35 B 0000 0000 6B 719 476 736 36 10 0000 0000

137 43 B 953 472 37 20 0000 0000 274 B77 906 944 38 40 0000 0000 549 755 B13 888 39 80 0000 0000

1 099 511 627 776 40 100 0000 0000 2 199 023 255 552 41 200 0000 0000 4 398 046 511 104 42 400 0000 0000 B 796 093 022 208 43 800 0000 0000

17 592 186 044 416 44 1000 0000 0000 35 IB4 372 08B 832 45 2000 0000 0000 70 368 744 177 664 46 4000 0000 0000

140 737 48B 355 328 47 8000 0000 0000 281 474 976 710 656 48 1 0000 0000 0000

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. B-1 Appendix B

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/SYSTEST/SSR_UTIL, 5-17

-A-

access, 1-9 Account header, 2-12 Account record, 2-12 acct _ $header in acct.ins.pas, 2-12

acct_$record_t in acct. ins .pas, 2-12

ACL entry, 2-2 ACL header record, 2-1 ACL record, 2-1 aCl_$entry in acl.ins.pas, 2-2 aCl_$hdr in ac1s.pvt.pas, 2-1 acl $rep in acls.pvt.pas, 2-1 ACLS STRUCTURE, 2-1

ACL Header Record, 2-1 ACL Record, 2-1 ACL Entry, 2-2

ACTIVE OBJECT TABLE, 1-2 ACTIVE OBJECT TABLE HEADER, 1-4 ACTIVE SEGM£NT TABLE, 1-3 ADDRESS SPACE,

DN300/320, 7-1 DN330, 7-1

DN400/420!600, 8-1 DN460/660!DSPI60, 9-1 DN550, 10-1

DN560/570/580, 10-2 DSP80/80A, 11-1 DSP90, 11-1 DN3000, 12-1 physical address space, 3-2 virtual memory, 3-3

ADDRESSING MODES, 3-1 AEGIS, 1-1 AEGIS ERROR CODES, 4-1 AEGIS SYSTEM RELATIOliSHIPS, 1-1 AOT, 1-2 aote_t in vm.ins.pas, 1-2 Apollo DEBUG Commands, 5-2 AST, 1-3 AST page maps, 1-5 aste_t in vm.ins.pas, 1-3 AT BUS DEVICES, 6-1

-8-

BAT, 2-2 bat_blk in vol.ins.pas, 2-2 bat hdr t in vol.ins.pas, 2-3 BEEPER (DN3000), 12-2

blk_hdr_t in base.ins.pas, 2-8

APOUO CONFIDENTIAL INTERNAL USE ONLY. Index-1

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BLKTYP, 2-8

BLOCK AVAILABILITY TABLE (BAT), 2-2

BLOCK AVAILABILITY TABLE

HEADER, 2-3

BLT REGISTERS, DN300/320/330, 7-8

DN400/420/600, 8-2

DN460/660/DSP160, 9-2 BOOT ERRORS (PROM), 4-17

BOOT FILES, see SYSTEM BOOT FILES

BOOT PROM DIAGNOSTIC ERROR

CODES (EXCEPT 020), 4-18

DN330, 4-20 DSP90, 4-21 DN5xx-T, 4-21

DN560/570/580, 4-22 DN3000, 4-23

BOOT SHELL COMMANDS, 5-1

-c-

CACHE (DNx60), 9-2 CACHE CONTROL REGISTER (DN330), 7-2

CACHE ADDRESS REGISTER (DN330), 7-2

CALENDAR (DN3000), 12-3 CALLING SEQUENCE, 3-4 CARTRIDGE TAPE (DN3000), 12-4

Channel Control Block, 6-15 CLOCK, 1-6

clock_t in base.ins.pas, 1-6

clockh t in base.ins.pas, 1-6 CONDITION CODES, 3-5

CONDITIONAL TESTS, 3-6

CONFIGURATION, DN300/320/330, 7-3 DN400/420/600, 8-2

DN460/660/DSP160, 9-3 DN5xx, 10-2

DSP80/80A/90, 11-2

DN3000, 12-7 CPU CONTROL/STATUS REGISTER

(DN3000), 12-8

CRASH ANALYSIS, 5-15

-D-

DB (MACHINE LEVEL DEBUGGER), 5-3

Lights Program, 5-5

db $ecb rec in !-;:;:s!debug/db. debug$. ins .pas, 3-7

dcte_t in io. ins .pas, 1-7

DEBUG COMMAND EXTENSIONS, 5-2 Apollo DEBUG Corrunands, 5-2

Options to

Index-2 APOLLO CONFIDENTIAL. INTERNAL USE ONLY.

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DEBUG Commands, 5-2 Definitions, PEB, 7-25 DEVICE ADDRESSES (PIO), 6-1 dir_entry_t in name.pvt.pas, 2-5 dir_t in name.pvt.pas, 2-4, 2-6 Directory entry, 2-5 Directory entry block, 2-5 Directory header, 2-6 Directory information block, 2-4 Directory overview, 2-4 DIRECTORY STRUCTURE, 2-4

Directory overview, 2-4 Directory information block, 2-4 Directory entry, 2-5 Directory entry block, 2-5 Directory header, 2-6 Notes on directories, 2-7

DISK BLOCK HEADER, 2-8 DISK CONTROLLER (DN3xx), 7-4 DISK CONTROLLER (DN3000), 12-9 DISK CONTROLLER TABLE ENTRY, 1-7 DISK PARAMETERS, 6-1 DISK/TAPE/CALENDAR CONTROLLER, 10-9 DISK VOLUME TABLE ENTRY, 1-8 DISK/VOLUME FORMAT, 2-9 DISK_SERROR_INFO, 2-8 DISPLAY BOARD JUMPERS,

DN4xx, 8-5 DN6xx, 8-6 DN5xx, 10-4

DISPLAY (COLOR, DN3000), 12-16 DISPLAY (MONO, DN3000), 12-21 DISPLAY CONTROL AND STATUS

REGISTER (DCSR), DN300/320/330, 7-8 DN400/420/600, 8-8 DN460/660, 9-6

DMA control/Status aegisters, 8-44

DMA CONTROLLER (DN3xx and DSP80), 7-10

DN300/DN320/330, address space, 7-1 BLT registers, 7-8 cache control register, 7-2 cache address register, 7-2 configuration, 7-3 disk (floppy/Winchester) controller, 7-4

display control and status register, 7-8

DMA controller, 7-10 fault frame, 7-14 fault types, 7-17 fault vectors, 7-18 floating-point format, 7-19 floating-point registers, 7-20

APOLLD CONFIDENTIAL. INTERNAL USE ONLY. Index-3

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FPU, 7-21 MCSR, 7-22 MMU (DN300/320), 7-23 MMU (DN330), 7-24 PFTE, 7-27 PTTE, 7-27 Prom entry points, 7-28 ring registers, 7-28 SERIAL I/O INTERFACE, 7-32

DN3000, address space, 12-1 beeper, 12-2 calendar, 12-3 cartridge tape, 12-4 configuration, 12-7 cpu csr, 12-8 disk controller, 12-9 display (color), 12-16 display (mono), 12-21 fault frame and type, 12-25 fault vectors, 12-26 floating-point registers, 12-26 parity error register, 12-27 programmable interrupt

controller, 12-27 ring registers, 12-29 sia, 12-35 timers, 12-35

DN400/DN420/DN600, address space, 8-1 configuration, 8-2 display board jumpers, 8-3 display BLT registers, 8-6 display control and status register, 8-8

fault frame, 8-11 fault types, 8-11 fault vectors, 8-12 floating-point format, 8-13 floppy controller, 8-13 I/O map, 8-15 MCSR, 8-15 memory board jumpersl 8-17 MMU, 8-19 monitor timing, 8-22 PEB, 8-24 PFTE, 8-23 PID/PRIV Register, 8-20 PTTE, 8-23 Ring/Disk, 8-32 SERIAL I/O INTERFACE':, 8-47

DN460/DN660/DSP160, address space, 9-1 AST page maps, 1-5 BLT REGISTERS, 9-2 cache, 9-2

configuration, 9-3

Index-4 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

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control panel register, 9-4 CPIO status register, 9-4 CPU Control Register, 9-2 display board jumpers, 9-6 dispaly control ans status

reg, 9-6 fault frame, 9-6 fault types, 9-7 fault vectors, 9-8 floating-point format, 9-9 floating-point registers, 9-9 floppy controller, 9-10 mapped segment table (MST) I 1-10

MCSR, 9-10 memory board jumpers, 9-11 micro machine control

register, 9-5 MMU, 9-13 monitor timing, 9-14 region register arrays, 9-13 ring/disk, 9-14 segment map, 9-13 SERIAL I/O INTERFACE, 9-14

DN5xx, address space, DN550, 10-1 DN560/570/580, 10-2

configuration, 10-2 CPU board jumpers, 10-3 display board jumpers,

DN550/560, 10-4 DN570, 10-5 DN580, 10-6

display registers, 10-7 disk/tape/calendar controller,

10-9 fault frame, 10-14 fault types, 10-14 fault vectors, 10-15 floating-point format, 10-16 floating-point registers, 10-16 FPU, 10-16 MCSR, 10-16 memory board jumpers (DN550), 10-17 MMU, 10-17 monitor timing,

DN550/560, 10-18 DN570, 10-19 DN580, 10-20

multibus registers, 10-21 PFTE, 10-22 PTTE, 10-23 PROM entry points, 10-23 ring registers, 10-24 SERIAL I/O INTERFACE, 10-26 VME registers, 10-26

DSP80/80A/90, address space, 11-1

APOLlO CONFIDENTIAL INTERNAL USE ONLY, Index-5

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configuration, 11-2 CPU board jumpers, 11-3 DMA controller, 11-4 fault frame, 11-4 fault types, 11-4 fault vectors, 11-5 floating-point registers, 11-6 MCSR, 11-6 MMU, 11-6 multibus registers, 11-6 PFTE, 11-9 PTTE, 11-9 PROM entry points, 11-9 ring registers, 11-9 SERIAL I/O INTERFACE, 11-9

dvte_t in disk.pvt .pas, 1-8

-E-

Early acknowledge field, 1-19 ENTRY CONTROL BLOCK (EeB), 3-7 ent ry block t in

name-:-pvt.p;-s, 2-5 ERROR CODES AND MESSAGES, 4-1

AEGIS ERROR CODES, 4-1 BOOT ERRORS (PROM), 4-17 DIAGNOSTIC ERROR CODES,

4-18 to 4-24 MNEMONIC DEBUGGER ERROR

CODES (PROM), 4-24 SYSBOOT ERROR CODES, 4-25

EVENT COUNT, 1-8 event count t of base.i,ns.pas, 1-8 EXCEPTION ERROR STACK FRAME,

see FAULT FRAME EXCEPTION TYPES,

see FAULT TYPES EXCEPTION VECTORS,

see FAULT VECTORS

-F-

FAULT DIAGNOSTIC RECORD, 1-9 FAULT FRAME,

DN300/320, 7-14 DN330. 7-15 DN400/420/600. B-11 DN460/660/DSP160, 9-6 DN5xx, 10-14 DSPBO/BOA/90. 11-4 DN3000, 12-25

FAULT TYPES, DN3xx, 7-17 DN400/420/600, 8-11 DN460/660/DSE'160, 9-7 DN5xx, 10-14

Index-6 APOLLO CONFIDENTIAL INTERNAL USE ONLY.

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OSPSO/SOA/90, 11-5 DN300a, 12-25

FAULT VECTORS, DN3xx, 7-18 011400/420/600, S-12 DN460/660/DSP160, 9-8 DN5xx, 10-15 OSPSO/SOA/90, 11-5 DN3000, 12-26

fault....:.$bus_info_t in fault .ins.pas, 8-11

fault $diag t in faul.t.i.ns.pas, 1-9

FILE MAP, 2-10

FILE SYSTEM, 2-1 FILENAME SUFFIXES, 3-7 FLOATING-POINT FORMAT,

DN320/330, 7-19 011400/420/600, S-l3 01l46.0/660/08P160, 9-9 DN5xx, 10-16

FLOATING-POINT REGISTERS, 7-20, 9-9 FLOPPY CONTROLLER,

DN3xx, 7-4 011400/420/600, S-l3 DN460/660/DSP160, 9-11

FPU, 7-21, 10-16

-H-

Header Registry Record, 2-11

-I-

I/O MAP, 6-5, 8-15 I/O MAP ALLOCATION, 6-4 infoblk _ hdr _tin name.pvt.pas, 2-4

INSERT FILES, acct.ins.pas, 2-12 acl. ins .pas, 2-2 acls.pvt.pas, 2-1 base.ins.pas, 1-6, 1-8, 2-8 disk.pvt.pas, 1-8 event count t of

base.ins.pa5, 1-8 fault.ins.pas, 1-9 io.ins.pas t 1-7 mmap .pvt .pas, 1-12 name.pvt.pas, 2-4 to 2-6 ppo.ins.pas, 2-12 proc1.pvt.asm, 1-14 rgy.ins.pas, 2-14 sbase.ins.pas, 2-14 vm.ins.pas, 1-2 thru 5, 1-11 voLins.pas, 2-2, 2-3, 2-18,

APOUO CONFIDENTIAL INTERNAL USE ONLY. Index-7

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to 2-25 INTERRUPT VECTORS,

see FAULT VECTORS

-K-

KEYBOARD, 6- 6 880 keyboard - map, 6-6 880 keyboard chart -physical, 6-7

880 keyboard chart -translated (user mode), 6-8

low-profil.e Model I keyboard - map, 6-9

low-profile Model I keyboard chart - physical, 6-10

low-profile Model I keyboard chart -translated (user mode), 6-11

low-profile Model II keyboard - map, 6-12

low-profil.e Model II keyboard chart - ASCII, 6-13

low-profil.e Model II keyboard chart -keystate mode, 6-14

-L-

Lights program, 5-5 lv_label_t in vol.ins.pas, 2-18

-M-

MACHINE LEVEL DEBUGGER, 5-3 MAGTAPE CONTROLLER, 6-15

system configuration pointer (at xxxFF6), 6-15

system configuration block, 6-15

channel control block, 6-15 parameter block, 6-16

MAPPED SEGMENT TABLE (MST), 1-10 MAPPED SEGMENT TABLE ENTRY (MSTE),

1-11 MEMORY BOARD JUMPERS,

DN400/420/600, 8-17 DN460/660/DSP160, 9-11 DN550, 10-13'

MEMORY CONTROL/STATUS REGISTERS DN300/320, 7-22 DN330, 7-23 DN400/420/600, 8-15 DN460/660/DSP160, 9-10 DN550, 10-12 DSPBO/80A, 11-6

Index-8 APOLW CONFIDENTIAL INTERNAL USE ONLY.

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MEMORY MANAGEMENT UNIT (MMlT),

DN300/320, 7-23 DN330, 7-24 DN400/420/600, 8-19

DN460/660/DSP160, 9-13 DN5xx, 10-17 DSP80/80A/90, 11-6

MEMORY MAP (MMAP), 1-12

MEMORY MAP ENTRY (MMAPE), 1-12 Message data, 1-18

Message header, 1-15 MMAPE, 1-12 mmape in mmap.pvt.pas, 1-12

MONITOR TIMING,

DN5S0/560, 10-18 DNS70, 10-19

DN580, 10-20

DN6xx, 8-22 MNEMONIC DEBUGGER,

commands, 5 - 6

command format, 5-14 semantics, 5-14

MNEMONIC DEBUGGER ERROR CODES (PROM) , 4-24

MST, 1-10

mst_pages_tn, 1-10 MSTE, 1-11 mste_pages, 1-11 mste_t in VIn. ins .pas, 1-11

MULTIBUS DEVICES, 6-18 MULTIBUS REGISTERS,

DN5xx, 10-21

DSP80/80A/90, 11-6

-N-

Notes on directories, 2-6 Notes on DNx60 crashes, 5-15

-0-

Opt ions to DEBUG Commands, 5-2

OS MAPPING, 1-14

-p-

PAGE FRAME TABLE ENTRY (PFTE)

DN3xx, 7-27

DN400/420/600, 8-23 DN5xx, 10-22

DSP80/80A/90, 11-9

PAGE MAPS, 1-54 PAGE TRANSLATION TABLE ENTRY

(PTTE)

APOLLO CONFIDENTIAL. INTERNAL USE ONLY. Index-9

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DN3xx, 7-21 DN400/420/600, 8-23 DN5xx, 10-22 OS.SO/SOA/90, 11-9

PAGING SYSTEM, 1-15 Parameter Block, 6-16 PARITY ERROR REGISTER (DN3000), 12-21 PATHNAME SYNTAX, 3-8 PCB, 1-16 PEB, 8-24

definitions, 8-24 !'PP commands, 8-29 PEB control register bits,

S-2S useful combinations, 8-28 PEB status register bits,

S-29 PERIPHERAL I/O, 6-1 Physical address space, 3-2 PIO, 6-1 pmape x in vm.ins.pas, 1-5 ppn_t -in base.ins.pas, 8-15 PPO record, 2-11 ppo $header t in ppo.ins.pas, 2-11 PPo-$record-t in ppo.ins.pas, 2-11 pro~l t in procl.pvt .asm, 1-16 PROCESS CONTROL BLOCK (PCB), 1-16 PROCESSES, 1-11 PROGRAMMABLE INTERRUPT

CONTROLLER, 12-21 PROGRAMMING INFORMATION, 3-1 PROM ENTRY POINTS

DN300/320, 7-19 DN550, 10-11 DSP80/80A, 11-8

pv_label_t in vol.ins.pas, 2-20

-R-

RECORD TYPES, acct_$header in acct.ins.pas,

2-12

acct.ins.pas, 2-13 aCI_$entry in acl.ins.pas,

2-2 aCl_$hdr in acls.pvt.pas, 2-1 acl $rep in acls.pvt.pas, 2-1 aote_t in vm.ins.pas, 1-2 aste t in vm.ins.pas, 1-3 bat blk in vol.ins.pas, 2-2 bat:hdr_t in vol.ina.pas, 2-3 blk_hdr_t in base.ins.pas,

2-S clock_t in base.ins.pas, 1-6 dcte_t in io.ins.pas, 1-1

Index-l0 APOUO CONFIDENTIAL INTERNAL USE ONlY.

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dir_entry_t in name.pvt.pas, 2-5

dir t in narne.pvt.pas, 2-4 dir-t in name.pvt.pas, 2-6 dvt;_t in disk.pvt.pas, 1-8 entry bloak t in name.pvt.pas,

2-5 - -

eventcount_t of base.ins.pas, 1-8

fault_$bus_info_t in fault.ins.pas, 8-11

fault $diag t in fault.ins.pas, 1-9

infoblk_hdr_t in name.pvt.pas, 2-4

lv_label_t in vol.ins.pas, 2-18

mmape in mmap.pvt.pas, 1-12 mate in vm.ins.pas, 1-11 pmape in vm.ins.pas, 1-5 ppo Sheader t in ppo.ins.pas,

2-11 -ppo_Srecord_t in ppo.ins.pas,

2-11 procl_t in proal.pvt.asm, 1-16 pv_label_t in vol.ins.pas,

2-20 rgy Sregistry t in

rgy. ins .pas, -2-13 stream Shdr rec t in

sbase -:-ins.pas, -2-14 uid_t in base.ins.pas, 2-15 vtoc blk t in vol.ins.pas,

2-21 -vtoc_hdr_t in vol.ins.pas, 2-23 vtoc mape in vol.ins.pas, 2-23 vtoc; in vol.ins.pas, 2-22 vtoce _ hdr _tin vol. ins. pas,

2-22 vtocx_t in base.ins.pas, 2-24

Region registers arrays, 9-13 REGISTRY FORMAT, 2-11

header record, 2-11 PPO record, 2-11 account header, 2-12 account record, 2-12 registry record, 2-13

Registry record, 2-13 REGISTER SET, 6-19 RESOURCE LOCK, 1-20 rgy $registry t in rgy.ins.pas,

2-13 -RING PACKET FORMAT, 1-18

message header, 1-18 type field, 1-18 early ACK field, 1-19

APOLLO CONFIDENTIAL INTERNAL USE ONLY. Index-II

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message data, 1-20 RING/DISK, 6-29

DN400/420/600, 8-32 DN460/660/DSP160, 9-14

RING REGISTERS, DN3xx, 7-28 DN5xx, 10-24 DSP80/80A/90, 11-9 DN3000, 12-29

-8-

Segment maps, 9-13 SERIAL I/O INTERFACE

DN3xx, 7-32 DN400/420/600, 8-47 DN460/660/nSP160, 9-14 DN5xx, 10-20 DSP80/80A/90, 11-9 DN3000, 12-35

STACK FRAME, 3-9 STATUS WORD, 3-10 status_t in base.ins.pas, 3-10 status $t in base.ins.pas, 4-1 STREAM-FILE HEADER, 2-14 stream_$hdr_rec_t in sbase.ins.pas, 2-14

SYS TYPE, 1-2, 2-8 SYSBOOT ERROR CODES, 4-25 SYSTEM BOOT FILES, 1-21 System Configuration Block, 6-12 System Configuration Pointer

(at xxxFF6), 6-12 SYSTEM DEBUGGING, 5-1 SYSTEM DIRECTORIES, 1-22 SYSTEM DUMPS, 5-16

-T-

TIMERS, 6-20, 12-35 TOUCHPAD, 6-20 TRAP CODES, 1-23 TRAP PAGES, see FAULT VECTORS

Type Field, 1-16

Index-12 APOLLO CONFIDENTIAL. INTERNAL USE ONlY.

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-u-

UID Hash Algoritlun, 2-15 uid_t in base.ins.pas, 2-15 urns -.,.. System, 2-16

UID Hash Algorithm, 2-15 UIDS -- System, 2-16

UNIQUE IDENTIFIER (UID), 2-15

Useful PEB Combinations, 8-28

-v-

Virtual memory, 3-3 VOLUME LABEL -- LOGICAL, 2-18

VOLUME LABEL -- PHYSICAL, 2-20 VME REGISTERS (DN5xx) I 10-26 VTOC BLOCK, 2-21

VTOC ENTRY, 2-22

VTOC HEADER, 2-23

VTOC INDEX, 2-24 VTOC MAE' ENTRY, 2-23 vtoc_blk_t in vol.ins.pas, 2-21 vtoc_hdr_t in vol.ins.pas, 2-23 vtee mape in vol.ins.pas, 2-23 vtoe; in vol.ins.pas, 2-22 vtoce_hdr_t in vol.ins.pae, 2-23 vtocx_t in base.ins.pas, 2-24

-x-

XYLOGICS CONTROLLER, 6-20

APOLLO CONFIDENTIAL INTERNAL USE ONLY. Index.-l3

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