document carrier symphony-board - variscite...revision history 1.5 1.2a disconnected r129 added...

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PAGE NO. SCHEMATIC PAGE

CONTENT

Symphony-Board

Schematics are for reference only.Variscite LTD provides no warranty for the use of t hese schematics.Schematics are subject to change without notice.

Disclaimer:

7

6

3 SOM

4

1

8

5

2

Cover

9

10

11

12

Headers

Camera, HDMI, DP

Debug UART, LEDs, SWs

LVDS, DSI, Touch

USB2 Host

Power, Reset, Boot, RTC, EEPROM

USB3, uSATA

PCIe

Ethernet

uSD, Audio,CAN

Block Diagram

VAR-SOM-MXxx Connector

13

14

Initial1.0

1.8 1.2C

1.01.1 1.1

Updated SOM pin 22 net name

Fixed R1-R2,R35-R38 net name

Changed R123,R127 to N.C.

Released

1.2

Added resistors R130-132

1.4

1.3

Removed ADC_INxx alternate function from VAR-SOM-MX8 Symbol

Updated Parallel Camera/HDMI/DP NoteUpdated PCIe resistor assembly note

Fixed ETH pin names VAR-SOM-MX8X Symbol

1.2

Added SH1 wire short symbol1.1

* Added x2 studs for heat plate support* Base_per_3v3 added slew rate limit* U7 (Base POR circuit) added CB_WDOG resistor assmbly options* U29 U30 U31 - Added assembly note* VAR-SOM-MX8M-NANO pages added with symbol pinout* VAR-SOM-MX6 Connector update - added NC on /*/ assembly options* Power switch in OFF position discharge of Custom rails added * Ethernet magnetics - support two Manf: Pulse & UDE; * Base RJ45 LEDs matched to SOM behaviour;

1.2

Removed SH1 wire short, J1.68 routed to capacitive touch

Updated Block Diagrams

Changed R29 to C185

Updated Compatability value for SOM pins 68,69,176

Fixed U22.B1, C113.1 net name

Document Carrier

Revision History

1.5 1.2A Disconnected R129Added VAR-SOM-MX8M-MINI Block Diagram and Symbol

1.10

1.6

1.2E

Raise VCC_3V3 to Nominal 3.39V for VAR-SOM-MX8M-MINI/NANO power up threshold voltage requirement of >3.35V

1.2A

Reference for new designs: (changes not implemented in V1.2 BRD)

PRE-RELEASE VERSION !!!!! Subject to change without notice

Update VAR-SOM-MX8M-MINI Symbol to V1.1 with side notes for v1.0B(Early access customers)

1.7

1.9

Changed U29,U30,U31 to P/N: FPF2193

Update VAR-SOM-MX8M-MINI Block Diagram

1.2B

1.2D

Changed R60 to 47K

Fixed VAR-SOM-MX8M-MINI Symbol

POR circuitry fed by VCC_SOM: see U7 R60 R61 R40 R60D5 Removed

1.31.11 * Added VAR-SOM-MX8M-PLUS Preliminary Symbol and Block Diagram

* All C1210 capacitor footprint updated to C1210_v0 Symbol is Pre-Release Version! Subject to change without notice!

1.41.13* MS5 and MS6 location adopted to heatplate design - Layout * Update J1 Manufacturer PN, NAME and footprint to epresent the assembled part* Replace PCIe AC caps on RX lines with 0 ohm resistors* Updated VAR-SOM-MX8M-PLUS Symbol pins 1 58 80, swap pins 41 43 and 84 147* J19 Modify Camera connector orientation * Remove U8 U10 analog switches on ETH1* U9 revert to EMI filter on RGMII_RX clock line* Added RN1 RN2 RN3 R151 R136 isolating stubs on ETH1 RGMII signals * U26 footprint updated to DS* Y1 C68 C67 updated* Support for VAR-SOM-6UL boot: - BOOT_MODE1 - R117 assembled - BOOT_MODE0 - Added PD R149 - USB#A PWR to HOST J23 always enabled* Remove R39 on pin J1.156 to support SOM-MX8MP 2nd MIPI-CSI Lane2 routing* J3 J30 pinout change

* MS1 to MS6 not assembled

* Added design note for ETH1 switches U8 and U10.* ETH1 PHY clock filter U9 replaced with 49.9 Ohm /0603 resistor1.12 1.3A

1.4A1.14

- Changed R43,R130,R106 to N.C.- Changed R44,R132 to Assembled

* Support for VAR-SOM-MX8MP USB OTG - Changed U5.P4 Pull for board identification, U21.9 connected to GPIO:

* Changed Q4 P/N from: TPS27082L (EOL) to -> TPS27081A* Updated VAR-SOM-MX8M-PLUS Block Diagram, Symbol pins 36,38 names* Added notes for SOM pins 29,79,84

1.15 1.4A Changes in v1.14/1.4A for R43,R44 were not implemented (part of board identification) and only appear in revision history; board identification implemented via EEPROM U3.Board identification required for OS to identifiy method of OTG ID used: PTN5150 or GPIO

1.16 1.5 * Modified VCC_3V3 to 3.35V nominal for all SOMs. For VAR-SOM-MX8M-MINI/NANO, power up threshold voltage requirement of >3.35V is implemented using Q10,R152

* Added note for VAR-SOM-MX8M-MINI/NANO pin 91

1.17 1.5 * Updated note for I2C#B pull up resistors

Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

ProjectSymphony-Board 1.5_R1.17

01. Cover

Custom

1 24Monday, April 12, 2021Aviad H.

Symphony-Board

Title




01. Cover

Custom


Symphony-Board

Title




01. Cover

Custom


Symphony-Board

VPC1

PCB

VPC0387-2U

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

03.SOM

TP8: SOM-MX6/MX8/MX8X: TAMPER IOs Interface

R55:SOM-MX6/MX8: Remove for connecting 1588

VAR-SOM-6UL BOOT

R57: SOM-MX8X: Remove for conneting LICELL

SOM-MX8M-PLUS : With no "EC" remove & supply power for ENET0 IOs

OFF PAGE CONNECTOR INDEX:1. Function# :Interface common to ALL SOMs2. J1.xxx-Function :Interface common to certains SOMs or Used for carrier board common function3. J1.xxx :No common interface

For cross probing between SOM symbol and the specific SOM Connector used,set the "Implementation" property value in SOM port symbolto one of the following:

1. VAR-SOM-MX62. VAR-SOM-MX83. VAR-SOM-MX8X4. VAR-SOM-MX8M-MINI5. VAR-SOM-MX8M-NANO6. VAR-SOM-MX8M-PLUS

Compatability listDescribes the ALT per SOM for compatibility. Order of names: (MX6/MX8/MX8X/MX8MM/MX8MN/MX8MP)Note: single name means identical name for all.

SOM MOUNTING STANDOFF

MECHANICSHEATPLATE SUPPORT STANDOFF

Fiducial

R18:SOM-MX6/MX8l: Remove for connecting 1588

SymphonyBoard STANDOFFR8 R10 R12 R13: MX8X SOM: without Touch screen controller on SOM, remove to prevent stubs on High speed lines

SOM_3V3Output from SOM Used to enable base peripherals power

For complete alternate function per pin and specific SOM:please refer to "VAR-SOMs_Compatibility_and_Pinout.XLS " located at: ftp://ftp.variscite.com/SOM_Compatibility

In VAR-SOM-MX8 SOM pin 29 EXP_INT is referenced to 1.8V. When using pin 29 as an input pin driven by higher input voltage,use an external voltage divider or limit the current using a series resistor to a maximum of 1mA.

SOM-MX8M-PLUS:Pin 79 is routed via on SOMbuffer with 10K pull up

SOM-MX8M-PLUS:Pin 79 is routed via on SOMbuffer with 10K pull up

VCC_SOM

J.31_33_35_PWR

GND

GNDVCC_SOM

GND

GND

GNDGND

VCC_SOM

GND

GND

GNDGND

SOM_3V3

ETH#A_MDI_A_PETH#A_MDI_A_M

ETH#A_MDI_D_P ETH#A_MDI_B_PETH#A_MDI_D_M ETH#A_MDI_B_M

ETH#A_LED_LINK_10_100_1000 ETH#A_LED_ACTAC#_DMIC_CLK PWM#A

AC#_DMIC_DATASAI#A_RXC_USDHC#A_RESET_B SAI#A_RXD

SAI#A_TXFS SAI#A_RXFS_PCIE#A_RESET_BSAI#A_TXD SAI#A_TXC

J1.30-ENET_MDIO EXP_INT

J1.38_POWERJ1.40-MIPI_CAM_RST SPI#A_CS0

BOOT#_SEL SPI#A_SDIFLEXCAN#A_TX SPI#A_SCKFLEXCAN#A_RX SPI#A_SDO

J1.48UART#BT_RTS_B

UART#BT_TX UART#BT_CTS_BJ1.54-ENET1_RGMII_RXD3 UART#BT_RXJ1.56-ENET1_RGMII_TXD2 J1.55-ENET1_RGMII_TXD3

J1.57-ENET1_RGMII_RXCUSDHC#A_CLK

USDHC#A_DAT0 USDHC#A_DAT2USDHC#A_CMD USDHC#A_DAT1

USDHC#A_DAT3PWM#B_CPT_INT

J1.70-MIPI_CAM_SYNC PWM#CJ1.72-USB3_INTB J1.71-ENET1_RGMII_RXD2J1.74-ENET_MDC J1.73-ENET1_RGMII_TXD0

J1.75-MIPI_CAM_TRIGGERJ1.77-MIPI_CSI_PWDN

USDHC#A_CD_B J1.79J1.82-USB#A_HOST_PWR J1.81-ENET1_RGMII_RXD1

J1.84 UART#_DEBUG_RXJ1.86-MIPI_CAM_BUF_CTL UART#_DEBUG_TX

I2C#A_SCL I2C#A_SDAI2C#C_SDAI2C#C_SCL J1.91-SATA_RXN-USB3_SS3_RX_N

USB#B_OTG_ID J1.93-SATA_RXP-USB3_SS3_RX_PJ1.96-ENET1_RGMII_TXC

POR_B#_3V3 J1.97-SATA_TXP-USB3_SS3_TX_PPCIE#A_REFCLK100M_N J1.99-SATA_TXN-USB3_SS3_TX_NPCIE#A_REFCLK100M_P

USB#A_HOST_VBUSUSB#B_OTG_VBUS

USB#A_HOST_DNUSB#A_HOST_DP

USB#B_OTG_DN J1.113-ENET1_RGMII_TX_CTLUSB#B_OTG_DP UART#B_RX

J1.117-MIPI_CAM_OPTJ1.120-ENET1_RGMII_RX_CTL MIPI_CSI#A_DATA0_P

J1.122-ENET1_RGMII_RXD0 MIPI_CSI#A_DATA0_NUART#A_TX MIPI_CSI#A_DATA1_N

MIPI_CSI#A_DATA1_PPCIE#A_TX0_N MIPI_CSI#A_DATA2_P

PCIE#A_TX0_P MIPI_CSI#A_DATA2_NMIPI_CSI#A_DATA3_N

PCIE#A_RX0_P MIPI_CSI#A_DATA3_PPCIE#A_RX0_N MIPI_CSI#A_CLK_P

MIPI_CSI#A_CLK_NJ1.140-DSI_CLK0PJ1.142-DSI_CLK0M J1.141-DSI_D0M

J1.143-DSI_D0PJ1.146-HDMI_D1P J1.145-DSI_D1MJ1.148-HDMI_D1M J1.147-DSI_D1PJ1.150-HDMI_CLKMJ1.152-HDMI_CLKP J1.151-HDMI_D2PJ1.154-HDMI_HPD J1.153-HDMI_D2M

J1.155-HDMI_D0PJ1.157-HDMI_D0M

LVDS#A_TX1_N

J1.156-HDMI_DDCCEC

LVDS#A_TX1_P LVDS#A_TX0_NLVDS#A_TX2_N LVDS#A_TX0_PLVDS#A_TX2_P LVDS#A_TX3_N

LVDS#A_CLK_N LVDS#A_TX3_PLVDS#A_CLK_P

UART#B_TXI2C#B_SCL J1.173I2C#B_SDA UART#A_RX

J1.177-ENET1_RGMII_TXD1LVDS#B_CLK_NLVDS#B_CLK_P LVDS#B_TX3_PLVDS#B_TX0_N LVDS#B_TX3_NLVDS#B_TX0_PLVDS#B_TX1_N TP#_TS_X-LVDS#B_TX1_P TP#_TS_X+LVDS#B_TX2_N TP#_TS_Y+LVDS#B_TX2_P TP#_TS_Y-AC#_HPOUTFB AC#_AGND

AC#_HPLOUT AC#_LINEIN_LPAC#_HPROUT AC#_LINEIN_RP

ETH#A_MDI_C_PETH#A_MDI_C_M

TP#_TS_X-_CONNTP#_TS_X+_CONNTP#_TS_Y+_CONNTP#_TS_Y-_CONN

Title




03. SOM

A2


Symphony-Board

Title




03. SOM

A2


Symphony-Board

Title




03. SOM

A2


Symphony-Board

R550R

C2147uF

12

FD2NC

HOLE4NC

EA

RT

H1

�� MS6

TH-1.6-2.5-M2

Variscite_PN = VCN0262

�� MS2

TH-1.6-2.5-M2

��

MS3TH-1.6-2.5-M2

FD1NC

TP8

HOLE3NC

EA

RT

H1

R570R

�� MS1

TH-1.6-2.5-M2

R8 0RR10 0RR12 0R

FD4NC

HOLE2NC

EA

RT

H1

R13 0R�� MS5

TH-1.6-2.5-M2

FD3NC

HOLE1NC

EA

RT

H1

R180R

�� MS4

TH-1.6-2.5-M2

R5410K

C2647uF

12

SOM Implementation = VAR-SOM-MX8M-MINIGNDETH#A_MDI_C_PETH#A_MDI_C_MGNDETH#A_MDI_D_PETH#A_MDI_D_MGNDETH#A_LED_LINK_10_100_1000AC#_DMIC_CLKAC#_DMIC_DATASAI#A_RXC_USDHC#A_RESET_BSAI#A_TXFSSAI#A_TXDGNDJ1.30-ENET_MDIOVCC_SOMVCC_SOMJ1.36J1.38_POWERJ1.40-MIPI_CAM_RST

BOOT#_SELFLEXCAN#A_TXFLEXCAN#A_RXJ1.48UART#BT_RTS_BUART#BT_TXJ1.54-ENET1_RGMII_RXD3J1.56-ENET1_RGMII_TXD2J1.58USDHC#A_CLKUSDHC#A_DAT0USDHC#A_CMDGNDPWM#B_CPT_INTJ1.70-MIPI_CAM_SYNCJ1.72-USB3_INTBJ1.74-ENET_MDCGNDGNDUSDHC#A_CD_BJ1.82-USB#A_HOST_PWRJ1.84J1.86-MIPI_CAM_BUF_CTLI2C#A_SCLI2C#C_SDAI2C#C_SCLUSB#B_OTG_IDJ1.96-ENET1_RGMII_TXCPOR_B#_3V3PCIE#A_REFCLK100M_NPCIE#A_REFCLK100M_PUSB#A_HOST_VBUSUSB#B_OTG_VBUSUSB#A_HOST_DNUSB#A_HOST_DPGNDUSB#B_OTG_DNUSB#B_OTG_DPGNDJ1.120-ENET1_RGMII_RX_CTLJ1.122-ENET1_RGMII_RXD0UART#A_TXGNDPCIE#A_TX0_NPCIE#A_TX0_PGNDPCIE#A_RX0_PPCIE#A_RX0_NGNDJ1.140-DSI_CLK0PJ1.142-DSI_CLK0MGNDJ1.146-HDMI_D1PJ1.148-HDMI_D1MJ1.150-HDMI_CLKMJ1.152-HDMI_CLKPJ1.154-HDMI_HPDJ1.156GNDLVDS#A_TX1_NLVDS#A_TX1_PLVDS#A_TX2_NLVDS#A_TX2_PLVDS#A_CLK_NLVDS#A_CLK_PGNDI2C#B_SCLI2C#B_SDAGNDLVDS#B_CLK_NLVDS#B_CLK_PLVDS#B_TX0_NLVDS#B_TX0_PLVDS#B_TX1_NLVDS#B_TX1_PLVDS#B_TX2_NLVDS#B_TX2_PAC#_HPOUTFBAC#_HPLOUTAC#_HPROUT

J1.1ETH#A_MDI_A_P

GNDETH#A_MDI_A_M

ETH#A_LED_ACT

ETH#A_MDI_B_METH#A_MDI_B_P

GND

EXP_INT

SAI#A_RXFS_PCIE#A_RESET_BSAI#A_TXC

GND

GND

PWM#A

J.31_33_35_PWR

SAI#A_RXD

SPI#A_SDO

UART#BT_CTS_B

SPI#A_CS0

UART#BT_RX

SPI#A_SDI

J1.57-ENET1_RGMII_RXC

J.31_33_35_PWR

USDHC#A_DAT1

SPI#A_SCK

J1.55-ENET1_RGMII_TXD3

J.31_33_35_PWR

SOM_3V3GND

USDHC#A_DAT2GND

GND

MIPI_CSI#A_DATA0_P

VCC_SOM

J1.77-MIPI_CSI_PWDN

MIPI_CSI#A_DATA1_P

VCC_SOM

UART#_DEBUG_RX

J1.71-ENET1_RGMII_RXD2

VCC_SOM

UART#_DEBUG_TX


VCC_SOM

J1.117-MIPI_CAM_OPT

GND

GND

MIPI_CSI#A_DATA2_P

GND

J1.75-MIPI_CAM_TRIGGER

J1.113-ENET1_RGMII_TX_CTL

VCC_SOM

I2C#A_SDA

USDHC#A_DAT3

GNDJ1.99-SATA_TXN-USB3_SS3_TX_N

J1.81-ENET1_RGMII_RXD1J1.79

J1.97-SATA_TXP-USB3_SS3_TX_P

UART#B_RX

J1.93-SATA_RXP-USB3_SS3_RX_P

MIPI_CSI#A_DATA1_NMIPI_CSI#A_DATA0_N

J1.91-SATA_RXN-USB3_SS3_RX_N

PWM#C

LVDS#B_TX3_N

J1.173

J1.141-DSI_D0M

AC#_LINEIN_RP

TP#_TS_X+

GND

J1.147-DSI_D1P

MIPI_CSI#A_CLK_P

UART#B_TX

GND

MIPI_CSI#A_CLK_N

UART#A_RX

LVDS#B_TX3_P

J1.153-HDMI_D2M

MIPI_CSI#A_DATA3_N

TP#_TS_Y+

AC#_LINEIN_LP

GND

GND

AC#_AGND


LVDS#A_TX3_P

J1.151-HDMI_D2P

MIPI_CSI#A_DATA2_N

LVDS#A_TX3_NLVDS#A_TX0_P

J1.145-DSI_D1MJ1.143-DSI_D0P

LVDS#A_TX0_N

GND

J1.157-HDMI_D0M

TP#_TS_X-GND

J1.155-HDMI_D0P

TP#_TS_Y-

MIPI_CSI#A_DATA3_P

1ETH_MDI_C+/ETH0_MDI_C_P/ETH0_MDI_C_P/ETH_TRX2_P/ETH_TRX2_P/ETH0_MDI_C_P 4 ETH_MDI_A+/ETH0_MDI_A_P/ETH0_MDI_A_P/ETH_TRX0_P/ETH_TRX0_P/ETH0_MDI_A_P3ETH_MDI_C-/ETH0_MDI_C_M/ETH0_MDI_C_M/ETH_TRX2_N/ETH_TRX2_N/ETH0_MDI_C_M 6 ETH_MDI_A-/ETH0_MDI_A_M/ETH0_MDI_A_M/ETH_TRX0_N/ETH_TRX0_N/ETH0_MDI_A_M5

ETH_MDI_D+/ETH0_MDI_D_P/ETH0_MDI_D_P/ETH_TRX3_P/ETH_TRX3_P/ETH0_MDI_D_P 10 ETH_MDI_B+/ETH0_MDI_B_P/ETH0_MDI_B_P/ETH_TRX1_P/ETH_TRX1_P/ETH0_MDI_B_P9ETH_MDI_D-/ETH0_MDI_D_M/ETH0_MDI_D_M/ETH_TRX3_N/ETH_TRX3_N/ETH0_MDI_D_M 12 ETH_MDI_B-/ETH0_MDI_B_M/ETH0_MDI_B_M/ETH_TRX1_N/ETH_TRX1_N/ETH0_MDI_B_M11

ETH0_LED_LINK_10_100_1000 16 ETH0_LED_ACT15DMIC_CLK 18 PWM2_OUT/LVDS0_PWM0_OUT/MIPI_DSI0_PWM0_OUT/PWM1_OUT/PWM1_OUT/PWM1_OUT17DMIC_DATA 20AUD4_RXC/AUD_SAI1_RXC/ADMA_SAI0_RXC/SAI2_RXC/SAI2_RXC/SAI2_RX_BCLK 22 AUD4_RXD/AUD_SAI1_RXD/ADMA_SAI0_RXD/SAI2_RXD0/SAI2_RXD0/SAI2_RX_DATA021AUD4_TXFS/AUD_SAI1_TXFS/ADMA_SAI0_TXFS/SAI2_TXFS/SAI2_TXFS/SAI2_TX_SYNC 24 AUD4_RXFS/AUD_SAI1_RXFS/ADMA_SAI0_RXFS/SAI2_RXFS/SAI2_RXFS/SAI2_RX_SYNC23AUD4_TXD/AUD_SAI1_TXD/ADMA_SAI0_TXD/SAI2_TXD0/SAI2_TXD0/SAI2_TX_DATA0 26 AUD4_TXC/AUD_SAI0_TXC/ADMA_SAI0_TXC/SAI2_TXC/SAI2_TXC/SAI2_TX_BCLK25

NC/CONN_ENET0_MDIO/CONN_ENET0_MDIO/ENET_MDIO/ENET_MDIO/ENET_QOS_MDIO 30 29

VCC_SOM/VCC_SOM/LICELL/VCC_SOM/VCC_SOM/VDD_ENET0_1P8_2P5_3P3_IN 363840 ECSPI1_SS0/DMA_SPI1_CS0/ADMA_SPI2_CS0/ECSPI1_SS0/ECSPI1_SS0/ECSPI2_SS039

42 ECSPI1_MISO/DMA_SPI1_SDI/ADMA_SPI2_SDI/ECSPI1_MISO/ECSPI1_MISO/ECSPI2_MISO41FLEXCAN1_TX/FLEXCAN0_TX/ADMA_FLEXCAN2_TX/CAN_TX/CAN_TX/FLEXCAN2_TX 44 ECSPI1_SCLK/DMA_SPI1_SCK/ADMA_SPI2_SCK/ECSPI1_SCLK/ECSPI1_SCLK/ECSPI2_SCLK43FLEXCAN1_RX/DMA_FLEXCAN0_RX/ADMA_FLEXCAN2_RX/CAN_RX/CAN_RX/FLEXCAN2_RX 46 ECSPI1_MOSI/DMA_SPI1_SDO/ADMA_SPI2_SDO/ECSPI1_MOSI/ECSPI1_MOSI/ECSPI2_MOSI45

48UART2_CTS_B/DMA_UART1_RTS_B/ADMA_UART0_RTS_B/UART2_CTS_B/UART2_CTS_B/UART3_CTS_B 50UART2_TX_DATA/DMA_UART1_TX/ADMA_UART0_TX/UART2_TXD/UART2_TXD/UART3_TX 52 UART2_RTS_B/DMA_UART1_CTS_B/ADMA_UART0_CTS_B/UART2_RTS_B/UART2_RTS_B/UART3_RTS_B51

54 UART2_RX_DATA/DMA_UART1_RX/ADMA_UART0_RX/UART2_RXD/UART2_RXD/UART3_RX5356 5558 57

SD2_CLK/CONN_USDHC1_CLK/CONN_USDHC1_CLK/SD2_CLK/SD2_CLK/USDHC2_CLK 60SD2_DATA0/CONN_USDHC1_DATA0/CONN_USDHC1_DATA0/SD2_DATA0/SD2_DATA0/USDHC2_DATA0 62 SD2_DATA2/CONN_USDHC1_DATA2/CONN_USDHC1_DATA2/SD2_DATA2/SD2_DATA2/USDHC2_DATA261SD2_CMD/CONN_USDHC1_CMD/CONN_USDHC1_CMD/SD2_CMD/SD2_CMD/USDHC2_CMD 64 SD2_DATA1/CONN_USDHC1_DATA1/CONN_USDHC1_DATA1/SD2_DATA1/SD2_DATA1/USDHC2_DATA163

SD2_DATA3/CONN_USDHC1_DATA3/CONN_USDHC1_DATA3/SD2_DATA3/SD2_DATA3/USDHC2_DATA365PWM1_OUT/LSIO_PWM2_OUT/LSIO_PWM3_OUT/PWM2_OUT/PWM2_OUT/PWM3_OUT 68

70 PWM3_OUT/LSIO_PWM3_OUT/LSIO_PWM2_OUT/PWM3_OUT/PWM3_OUT/PWM2_OUT6972 71

NC/CONN_ENET0_MDC/CONN_ENET0_MDC/ENET_MDC/ENET_MDC/ENET_QOS_MDC 74 737577

GPIO4_IO14/LSIO_GPIO0_IO14/LSIO_GPIO4_IO22/GPIO1_IO10/GPIO1_IO10/GPIO1_IO14 80 79GPIO4_IO15/LSIO_GPIO0_IO18/LSIO_GPIO4_IO21/GPIO5_IO01/GPIO5_IO01/GPIO1_IO07 82 81

84 UART1_RX_DATA/DMA_UART0_RX/ADMA_UART3_RX/UART4_RXD/UART4_RXD/UART2_RX8386 UART1_TX_DATA/DMA_UART0_TX/ADMA_UART3_TX/UART4_TXD/UART4_TXD/UART2_TX85

I2C1_SCL/DMA_I2C1_SCL/ADMA_I2C1_SCL/I2C2_SCL/I2C2_SCL/I2C3_SCL 88 I2C1_SDA/DMA_I2C1_SDA/ADMA_I2C1_SDA/I2C2_SDA/I2C2_SDA/I2C3_SDA87I2C3_SDA/DMA_I2C4_SDA/ADMA_I2C2_SDA/I2C3_SDA/I2C3_SDA/I2C4_SDA 90I2C3_SCL/DMA_I2C4_SCL/ADMA_I2C2_SCL/I2C3_SCL/I2C3_SCL/I2C4_SCL 92 91GPIO1_IO04/CONN_USB_OTG2_ID/CONN_USB_OTG2_ID/USB1_ID/USB1_ID/USB1_ID 94 93

96POR_B/POR_B_3V3/POR_B_3V3/PMIC_PWRON_B/PMIC_PWRON_B/PMIC_RST_B_3V3 98 97CLK1_N/PCIE_EXT_REFCLK100M_N/PCIE_EXT_REFCLK100M_N/PCIE1_REF_CLK_N/NC/PCIE_REF_CLK_N 100 99CLK1_P/PCIE_EXT_REFCLK100M_P/PCIE_EXT_REFCLK100M_P/PCIE1_REF_CLK_P/NC/PCIE_REF_CLK_P 102USB_H1_VBUS/CONN_USB_OTG1_VBUS/CONN_USB_OTG1_VBUS/USB2_VBUS/NC/USB2_VBUS 104USB_OTG_VBUS/CONN_USB_OTG2_VBUS/CONN_USB_OTG2_VBUS/USB1_VBUS/USB1_VBUS/USB1_VBUS 106USB_HOST_DN/CONN_USB_OTG1_DN/CONN_USB_OTG1_DN/USB2_D_N/NC/USB2_D_N 108USB_HOST_DP/CONN_USB_OTG1_DP/CONN_USB_OTG1_DP/USB2_D_P/NC/USB2_D_P 110

USB_OTG_DN/CONN_USB_OTG2_DM/CONN_USB_OTG2_DM/USB1_D_N/USB1_D_N/USB1_D_N 114 113USB_OTG_DP/CONN_USB_OTG2_DP/CONN_USB_OTG2_DP/USB1_D_P/USB1_D_P/USB1_D_P 116 UART5_RX_DATA/DMA_UART4_RX/ADMA_UART2_RX/UART2_RXD/UART2_RXD/UART4_RXD115

117120 CSI_D0P/MIPI_CSI0_DP0/MIPI_CSI0_DP0/CSI_P1_D0_P/CSI_P1_D0_P/MIPI_CSI1_D0_P119122 CSI_D0M/MIPI_CSI0_DN0/MIPI_CSI0_DN0/CSI_P1_D0_N/CSI_P1_D0_N/MIPI_CSI1_D0_N121

UART4_TX_DATA/DMA_UART2_TX/ADMA_UART1_TX/UART3_TXD/UART3_TXD/UART1_TXD 124 CSI_D1M/MIPI_CSI0_DN1/MIPI_CSI0_DN1/CSI_P1_D1_N/CSI_P1_D1_N/MIPI_CSI1_D1_N123CSI_D1P/MIPI_CSI0_DP1/MIPI_CSI0_DP1/CSI_P1_D1_P/CSI_P1_D1_P/MIPI_CSI1_D1_P125

PCIE_TXM/HSIO_PCIE0_TX0_N/HSIO_PCIE0_TX0_N/PCIE1_TX_N/NC/PCIE_TXN_N 128 CSI_D2P/MIPI_CSI0_DP2/MIPI_CSI0_DP2/CSI_P1_D2_P/CSI_P1_D2_P/MIPI_CSI1_D2_P127PCIE_TXP/HSIO_PCIE0_TX0_P/HSIO_PCIE0_TX0_P/PCIE1_TX_P/NC/PCIE_TXN_P 130 CSI_D2M/MIPI_CSI0_DN2/MIPI_CSI0_DN2/CSI_P1_D2_N/CSI_P1_D2_N/MIPI_CSI1_D2_N129

CSI_D3M/MIPI_CSI0_DN3/MIPI_CSI0_DN3/CSI_P1_D3_N/CSI_P1_D3_N/MIPI_CSI1_D3_N131PCIE_RXP/HSIO_PCIE0_RX0_P/HSIO_PCIE0_RX0_P/PCIE1_RX_P/NC/PCIE_RXN_P 134 CSI_D3P/MIPI_CSI0_DP3/MIPI_CSI0_DP3/CSI_P1_D3_P/CSI_P1_D3_P/MIPI_CSI1_D3_P133PCIE_RXM/HSIO_PCIE0_RX0_N/HSIO_PCIE0_RX0_N/PCIE1_RX_N/NC/PCIE_RXN_N 136 CSI_CLK0P/MIPI_CSI0_CKP/MIPI_CSI0_CKP/CSI_P1_CK_P/CSI_P1_CK_P/MIPI_CSI1_CLK_P135

CSI_CLK0M/MIPI_CSI0_CKN/MIPI_CSI0_CKN/CSI_P1_CK_N/CSI_P1_CK_N/MIPI_CSI1_CLK_N137140142 141

143146 145148 147150152 151154 153

155157

LVDS0_TX1_N/LVDS0_T0BN/MIPI_DSI0_DN1/DSI_TX1_N/*/LVDS0_CH0_TX1_N/DSI_TX1_N/*/LVDS0_CH0_TX1_N/LVDS0_D1_N 160LVDS0_TX1_P/LVDS0_T0BP/MIPI_DSI0_DP1/DSI_TX1_P/*/LVDS0_CH0_TX1_P/DSI_TX1_P/*/LVDS0_CH0_TX1_P/LVDS0_D1_P 162 LVDS0_TX0_N/LVDS0_T0AN/MIPI_DSI0_DN0/DSI_TX0_N/*/LVDS0_CH0_TX0_N/DSI_TX0_N/*/LVDS0_CH0_TX0_N/LVDS0_D0_N161LVDS0_TX2_N/LVDS0_T0CN/MIPI_DSI0_DN2/DSI_TX2_N/*/LVDS0_CH0_TX2_N/DSI_TX2_N/*/LVDS0_CH0_TX2_N/LVDS0_D2_N 164 LVDS0_TX0_P/LVDS0_T0AP/MIPI_DSI0_DP0/DSI_TX0_P/*/LVDS0_CH0_TX0_P/DSI_TX0_P/*/LVDS0_CH0_TX0_P/LVDS0_D0_P163LVDS0_TX2_P/LVDS0_T0CP/MIPI_DSI0_DP2/DSI_TX2_P/*/LVDS0_CH0_TX2_P/DSI_TX2_P/*/LVDS0_CH0_TX2_P/LVDS0_D2_P 166 LVDS0_TX3_N/LVDS0_T0DN/MIPI_DSI0_DN3/DSI_TX3_N/*/LVDS0_CH0_TX3_N/DSI_TX3_N/*/LVDS0_CH0_TX3_N/LVDS0_D3_N165LVDS0_CLK_N/LVDS0_T0CLKN/MIPI_DSI0_CKN/DSI_CLK_N/*/LVDS0_CH0_CLK_N/DSI_CLK_N/*/LVDS0_CH0_CLK_N/LVDS0_CLK_N 168 LVDS0_TX3_P/LVDS0_T0DP/MIPI_DSI0_DP3/DSI_TX3_P/*/LVDS0_CH0_TX3_P/DSI_TX3_P/*/LVDS0_CH0_TX3_P/LVDS0_D3_P167LVDS0_CLK_P/LVDS0_T0CLKP/MIPI_DSI0_CKP/DSI_CLK_P/*/LVDS0_CH0_CLK_P/DSI_CLK_P/*/LVDS0_CH0_CLK_P/LVDS0_CLK_P 170

UART5_TX_DATA/DMA_UART4_TX/ADMA_UART2_TX/UART2_TXD/UART2_TXD/UART4_TXD171I2C2_SCL/DMA_I2C0_SCL or HDMI_TX0_DDC_SCL/ADMA_I2C3_SCL/I2C4_SCL/I2C4_SCL/I2C5_SCL 174 173I2C2_SDA/DMA_I2C0_SDA or HDMI_TX0_DDC_SDA/ADMA_I2C3_SDA/I2C4_SDA/I2C4_SDA/I2C5_SDA 176 UART4_RX_DATA/DMA_UART2_RX/ADMA_UART1_RX/UART3_RXD/UART3_RXD/UART1_RXD175

177LVDS1_CLK_N/LVDS0_T1CLKN/MIPI_DSI1_CKN/LVDS0_CH1_CLK_N/LVDS0_CH1_CLK_N/LVDS1_CLK_N 180LVDS1_CLK_P/LVDS0_T1CLKP/MIPI_DSI1_CKP/LVDS0_CH1_CLK_P/LVDS0_CH1_CLK_P/LVDS1_CLK_P 182 LVDS1_TX3_P/LVDS0_T1DP/*/MIPI_DSI0_DP3/**/HDMI_TX0_AUX_P/MIPI_DSI1_DP3/LVDS0_CH1_TX3_P/LVDS0_CH1_TX3_P/LVDS1_D3_P181LVDS1_TX0_N/LVDS0_T1AN/MIPI_DSI1_DN0/LVDS0_CH1_TX0_N/LVDS0_CH1_TX0_N/LVDS1_D0_N 184 LVDS1_TX3_N/LVDS0_T1DN/*/MIPI_DSI0_DN3/**/HDMI_TX0_AUX_M/MIPI_DSI1_DN3/LVDS0_CH1_TX3_N/LVDS0_CH1_TX3_N/LVDS1_D3_N183LVDS1_TX0_P/LVDS0_T1AP/MIPI_DSI1_DP0/LVDS0_CH1_TX0_P/LVDS0_CH1_TX0_P/LVDS1_D0_P 186LVDS1_TX1_N/LVDS0_T1BN/MIPI_DSI1_DN1/LVDS0_CH1_TX1_N/LVDS0_CH1_TX1_N/LVDS1_D1_N 188 TS_X-187LVDS1_TX1_P/LVDS0_T1BP/MIPI_DSI1_DP1/LVDS0_CH1_TX1_P/LVDS0_CH1_TX1_P/LVDS1_D1_P 190 TS_X+189LVDS1_TX2_N/LVDS0_T1CN/*/MIPI_DSI0_DN2/MIPI_DSI1_DN2/LVDS0_CH1_TX2_N/LVDS0_CH1_TX2_N/LVDS1_D2_N 192 TS_Y+191LVDS1_TX2_P/LVDS0_T1CP/*/MIPI_DSI0_DP2/MIPI_DSI1_DP2/LVDS0_CH1_TX2_P/LVDS0_CH1_TX2_P/LVDS1_D2_P 194 TS_Y-193AC_AGND/AC_HPOUTFB/AC_HPOUTFB/AC_HPOUTFB/AC_HPOUTFB/AC_HPOUTFB 196 AC_AGND195

AC_HPLOUT 198 AC_LINEIN1_LP197AC_HPROUT 200 AC_LINEIN1_RP199

156

TP#_TS_X-TP#_TS_X+TP#_TS_Y+TP#_TS_Y-

49

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

05. Power,Reset,Boot,RTC,EEPROM

RESET CIRCUITRY

1.5V BASE

Supply to mPCIe

1.8V BASE

RTC BATTERY

BOARD ID

I2C ADD:0x68+R/Wn

SOM BOOTSTRPBoot Options: OFF : INT ON : SD

[//SCU_BOOT_MODE1]

12VDC INPUT

BASE_3V3

5V/8A FROM PWR JACK 3.35V/8A FROM PWR JACK

For supporting MX6 eMMC boot option:Remove R9Assemble R56,R11Note: Normal configuration is with NAND

Switch deafults to OFF,Must be set to ON when connectingMX6 based SOMs

SOM PWR

[/*/EMMC_BOOT//]

Address 0x54,0x55

[/*/EMMC_BOOT//]

Will prevent back flow

Note for U29: Recommneded PN for new design FPF2193Assembled board can have FPF2194.

SLEW RATE ControlledUsing R72 C186 R133Slew ~800us

FAN PWR

SOM CURRENT MEASURING:----------------------REMOVE R58 AND CONNECT SERIES AMPERMETER

Located under J24Not Connected

Main Switch

Vgs th>2.4V

Vgs th>2.4V

+5V LED

+3.3V LED

Will Indicate VCC_3V3(VCC_SOM) & BASE_3V3 OK

D24: PIN 31 33 35FAULT LED

+12V LED

RESETSWITCH

PINS 31 33 35 POWER

POWER DISCHARGE

Note:VAR-SOM-MX8M-MINI/NANO:VCC_SOM when rising must be > 3.35V for the SOM to power up.Set to nominal 3.44V

Internal boot is from eMMC MX6 for eMMC boot see additional changes note

GND GND

BASE_PER_1V8BASE_PER_3V3BASE_PER_1V5BASE_PER_3V3

GND GND

BASE_PER_3V3

BASE_PER_3V3

BASE_PER_3V3GND

GND

GND

GND

VCC_3V3SOM_3V3

VCC_12V

GND GND

VCC_12V

GND

VCC_3V3

BASE_PER_3V3

GND

GNDGND

GND

GND

VCC_12V

GND

GND

GND

GNDGND

GND

AGND

VCC_SOM

VCC_3V3

VCC_SOMVCC_3V3

J.31_33_35_PWR

GNDGND

VCC_3V3

GND

GND

GND

VCC_5V

VCC_12V

GND

VCC_3V3

GND

GND

VCC_5V

VCC_12V

BASE_PER_3V3

BASE_PER_3V3VCC_5V

VCC_12V

SOM_3V3

I2C#C_SCL

I2C#C_SDA

AC#_AGNDBOOT#_SEL

J1.146-HDMI_D1P

POR_B#_3V3

J1.40-MIPI_CAM_RST

CB_WDOG_B

Title



Project1.5_R1.17


A3


Title



Project1.5_R1.17


A3


Title



Project1.5_R1.17


A3


U20ISL12057IUZ

Vcc8

GND4

XI1

XO2

IRQ2#3

SDA5

SCL6

Fout7

C85

180pF

R58 0.0R

C751uF

R70475R 1%

J25

2 Pin Terminal Block

NC12

U18RT7299BHGQW

SS/TR9 GND

2

GND3

PVIN4

PVIN5

RT/SYNC1

FB7

COMP8

GN

D15

VIN6

EN10

LX11

LX12

BOOT13

PGOOD14

R61100K

C84

47uF

12

C159

100nF

R11 0RNC

C4933nFNC

C102

4.7uF

R142

4.7K

R120365R 1%

R14310K

C86

8.2nF

R711.2K

PIN2 ON SIDE

SW3TDA01H0SB1R

1 2

C103

47uF

12

R13310K

J24

DC 2.0mm1234

C87

47uF

12

D12

C158

10uF

D11

TPD1E10B09DPYR

C187100nF

R66221R 1%

U4TLV70215DBVR

VIN1

EN3

GND2

VOUT5

NC4

R92100K

C104

47uF

12

R1384.99R 1%R0805

C81 10nF

C110

47uF

12

R134100K

R1444.99R 1%R0805

R672.2K 1%

PIN

2 O

N S

IDE

SW6

TDA01H0SB1R

12

C88

100nF

R83174K 1%

C145

47uF

12

C80

100nF

R1404.99R 1%R0805

C109

47uF

12

R121221R 1%

R6047K

C28100nF

D23

D7

C79 10nF

FB1 120R 1.2A

Q9

2N7002P

3

1

2

R7268K 1%

D24

C37

4.7uF

R1450R

C78

100nF

FB6

120R 1.2A

L3

4.7uH1 2

Q8

2N7002P

3

1

2

R9 0R

C1881uF

U7 TPS3808G30

SENSE5

CT4

MR3

VC

C6

VS

S2

RST1

C108

4.7uF

C74

4.7uF

C1868.2nF

R75 4.3K 1%

D15

BAT54CLT1G

1

3

2

FB2 120R 1.2ANC

R1091.47K 1%

R8524K 0.1%

C421uF

C43

2.2uF

R86110K 0.1%

ADD= 0xAx

'1' = WP

U3 BR24G04NUX-3TTR

A01

A12

A23

VSS4

SDA5SCL6WP7VCC8

PA

D9

Y232.768KHz

1 2

D530V,100mA

U17TLV70218DBVR

VIN1

EN3

GND2

VOUT5

NC4

R8223.7K 1%

TP7

SW71101M2S3CQE2

C101

100nF

J9

HDR2.54_2x1_Shrouded

12

R42100KNC

Q10FDV301N

1

32

L2

4.7uH1 2

C89

22uF

R4010K

C105

10uF

R74 0RNC

R1394.99R 1%R0805

U29FPF2193

FLAGA1

ENA2 Vout

B1Vin

B2

IsetC1

GNDC2

C82180pF

R56 0RNC

C1898.2nF

NC

D14

R17 0RNC

D21

PG

B1010603M

R

JBT1CR1225-HOLDER

+1

-3

++2

C106

10uF

Q2

AON7407

D5D6D7D8

S2 S3

G4

S1

C838.2nF

Q6

2N7002P

3

1

2Q12N7002P

3

1

2

R5910K

C11

100nF

D2730V,100mA

C99

10uF

R76 2.4K 1%

R11910K

SW5

FSM4JSMATR

12

34

Q7

2N7002P

3

1

2

D13

C100

10uF

U19 RT7299BHGQW

SS/TR9 GND

2

GND3

PVIN4

PVIN5

RT/SYNC1

FB7

COMP8

GN

D15

VIN6

EN10

LX11

LX12

BOOT13

PGOOD14

R81 100K

C107

100nF

R1523.6K 0.1%

R84 100K

R1412.2K 1%

VCC_RTCRTC_IN

XI

XO

VCC_12V_PJ

VCC_3V3_BAD_B

VCC_3V3_5V_EN

VCC_5V_BAD_BVCC_5V_BAD_B

RST_CT

PINS_31_33_35_PWR_EN

BASE_EN

FAN_PWR

VCC_3V3_BAD_B

VCC_3V3_5V_EN

DISCHRG_EN

VCC_12V_IN_OFF

RST_SW

VCC_3V3_5V_EN

COIN_IN

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Headphones

Line In

uSD CARD

DIGITAL MIC

06. uSD, Audio,CAN

CAN BUS

SD POWER

GND

GND

GND

GND

AGND GND GND

GND GNDAGND

GND

BASE_PER_3V3

BASE_PER_3V3

BASE_PER_3V3

BASE_PER_1V8

SW_3P3_SD1

BASE_PER_3V3

GND

BASE_PER_3V3

GND

SW_3P3_SD1

BASE_PER_3V3

GND

GND

USDHC#A_DAT1USDHC#A_DAT0

USDHC#A_DAT3USDHC#A_DAT2

USDHC#A_CMD

USDHC#A_CLK

AC#_HPLOUT

AC#_HPROUT

AC#_LINEIN_RP

AC#_LINEIN_LP

AC#_HPOUTFB

USDHC#A_CD_B

AC#_DMIC_CLK

AC#_DMIC_DATA

FLEXCAN#A_TX

CANH0

FLEXCAN#A_RXCANL0

SAI#A_RXC_USDHC#A_RESET_B

Title




06. uSD, Audio,CAN

A4


Symphony-Board

Title




06. uSD, Audio,CAN

A4


Symphony-Board

Title




06. uSD, Audio,CAN

A4


Symphony-Board

J12

STEREO JACK12

3

R11510K

U13

TCAN332GD

TXD1

GND2

VCC3

RXD4

NC15

CANL6

CANH7

NC28

R900R NC

J2

HEADER 2X1

NC12

C12

100nF

J14STEREO JACK

12

3

C181

4.7uF

Q32N7002P

3

1

2

C361uF

C66

100nF

C291uF

R7 2.2K

R3 0R

J28 MR01A-01202

CD/DAT32 CMD3 VDD4 CLK5 VSS6 DAT07

DAT21

DAT18

SHL10

SHL13

CD9

SHL11SHL12

R20 2.2K

C41 10uF

R4 0R

Q4TPS27081A

1

3

26

5

4

C181uF

D8

C120100nF

R68120R

D4

D18IP4220CZ6

4

25

3

16

R107100K

D17IP4220CZ6

4

25

3

16

R320R

D2

TP

D1E

10B

09D

PY

R

C1211uF

U1

CMM-4737DT-26186

VDD6

L/R2

GND3

GND1

DATA5

CLK4

R45 0R

C13

4.7uF

R892.2K

C50 10uF

D1

TP

D1E

10B

09D

PY

R

R12510K

AC#_LLINEIN_C

AC#_HPLOUT_C

AC#_HPROUT_C

AC#_RLINEIN_C

USDHC#A_CD_B

USDHC#A_DAT1

USDHC#A_DAT0

USDHC#A_CLK

ST_JACK_RTN

USDHC#A_DAT2 USDHC#A_DAT3

USDHC#A_CMD

AC#_DMIC_CLK_R

AC#_DMIC_DATA_R

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

MIPI-CSI

07. Camera, HDMI, DP

J13: MX6/MX8-HDMI, MX8-DP, MX8X-CSI, MX8MP-2nd MIPI-CSI

[//CSI_D04]

[//CSI_D02][//CSI_D03] [//CSI_D01]

[//CSI_D00]

[//CSI_D06][//CSI_D07]

[//CSI_EN][//CSI_PCLK][//CSI_VSYNC][//CSI_HSYNC][//CSI_D05]

[//CSI_RST_B]

LAYOUT NOTE:

HS mode: DIFFLP mode: SELane rate 1.5Gbps

Differential Impedance:100 ohms SE 50 ohms

DIR L: B>A H: A>B

HSEC8-113-01-L-RA-MATING - FOR HDMI/DP ADAPTERHSEC8-113-01-L-DV-A-K-MATING - FOR MX8X Camera Adapter

Note for U32 (analog switch):

Switch is to enable support for the following adapters:

Parallel camera, HDMI, DisplayPoty and second MIPI-CSI .

Switch select controlled on adaptor will select between:

1) I2C#B which can export

VAR-SOM-MX8X: I2C3 Used by parallel camera

VAR-SOM-MX8: HDMI DDC Used by HDMI (GPIO1_22 in should be set High in SW)

2) LVDS#B_TX3 which can export:

VAR-SOM-MX8(DP assembly option): HDMI AUX used by DP

Switch can be omitted when designing for only one of the the above interfaces.

MIPI-CSI-D3_P diff. pair.for MX8MP

MX8MP - via 50mbps buffer on SOMMX8MP - SOC IO

MX8MP - SOC IO

Note:MIPI_CSI#A signals appears on bottom side of J19 as of SymphonyBoard V1.4.

MX8X signals:

MX8X signals: MX8MP signal note:

MX8MP - via 50mbps buffer on SOM

MIPI-CSI-D3_N diff. pair.for MX8MP

BASE_PER_1V8BASE_PER_3V3

GND GND

GND

GND GND

BASE_PER_3V3VCC_5V

BASE_PER_3V3

BASE_PER_1V8

GND

BASE_PER_3V3

BASE_PER_1V8

GND

BASE_PER_3V3 BASE_PER_1V8

GND GND

GND

BASE_PER_3V3

GND

GND

BASE_PER_1V8

GND

GND

I2C#A_SDAI2C#A_SCL



J1.152-HDMI_CLKPJ1.150-HDMI_CLKM


J1.48J1.84J1.173J1.154-HDMI_HPDJ1.156-HDMI_DDCCEC

J1.79

MIPI_CSI#A_DATA3_PMIPI_CSI#A_DATA3_N

MIPI_CSI#A_DATA2_NMIPI_CSI#A_DATA2_P


MIPI_CSI#A_CLK_NMIPI_CSI#A_CLK_P


J1.77-MIPI_CSI_PWDNJ1.117-MIPI_CAM_OPTJ1.70-MIPI_CAM_SYNC

J1.86-MIPI_CAM_BUF_CTL

J1.75-MIPI_CAM_TRIGGER

I2C#B_SCLI2C#B_SDA

LVDS#B_TX3_PLVDS#B_TX3_N

J1.40-MIPI_CAM_RST

Title





A3


Symphony-Board

Title





A3


Symphony-Board

Title





A3


Symphony-Board

R69

10K

R129

10K

NC

J19HSEC8-130-01-SM-DV-A-MATING

VCC_3V31VCC_3V33VCC_1V85

VCC_1V8 7DGND 9

CSI_P1_DP0 11CSI_P1_DN0 13

DGND 15CSI_P1_CKP 17CSI_P1_CKN 19

DGND21CSI_P1_DP123CSI_P1_DN125

DGND 27CSI_P1_DP2 29CSI_P1_DN2

31DGND33CSI_P1_DP335

CSI_P1_DN3 37DGND 39

CSI_P1_TRIGGER41DGND43CSI_P1_SYNC45

CSI_P1_OPT 47CSI_P1_RST 49

CSI_P1_PWR_EN51DGND53CSI_P1_I2C_SCL55

CSI_P1_I2C_SDA 57DGND 59

DGND2 CSI_P2_I2C_SDA4 CSI_P2_I2C_SCL6

DGND8CSI_P2_PWR_EN10CSI_P2_RST

12 CSI_P2_OPT14 CSI_P2_SYNC16

DGND18CSI_P2_TRIGGER20DGND

22 CSI_P2_DN324 CSI_P2_DP326

DGND28CSI_P2_DN230CSI_P2_DP2

32 DGND34 CSI_P2_DN136

CSI_P2_DP138DGND40CSI_P2_CKN

42 CSI_P2_CKP44 DGND46

CSI_P2_DN048CSI_P2_DP050DGND

52 VCC_1V854 VCC_1V856

VCC_3V358VCC_3V360

VCCA

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

08. Ethernet

MX8/MX8X/MX8MP- Gigabit Ethernet (External)

Giga Ethernet Differential Pair,Follow Giga Ethernet routingguidelines.Differential Impedance: 100 ohms

LAYOUT NOTE:

LAYOUT NOTE:

Gigabit Ethernet (Internal)Giga Ethernet Differential Pair,Follow Giga Ethernet routingguidelines.Differential Impedance: 100 ohms

LEDs - active LOW, address 00101bS="L" B0A (MX6/SOLO): VCC_SOM (same as BASE_3V3 timing)S="H" B1A {MX8/MX8X}: ETH#1_VDDIO_REG

Header/Stub isolation resistors

CL=20pF

CIN < 2pF

EXP_ENET_SELL : SOM to J30 EXT (Power up Default) U11 PHY RESET forced to reset.H : SOM to PHY U11 PHY RESET controlled with EXP_ENET1_RESET_B

L: B0 to AH: B1 to A

For cases where ETH1 not used (e.g. using other SOMs):1. Short ETH1_VDDIO_REG to ETH1_VDDH_REG will bring 2.6V to U11 PHY VDDIO making RGMII I/Os 3.3V tolerant.2. Hold U11 PHY in reset condition so that RGMII I/O become IN + PD

Note: Customer requiring usage of J30 header (located on bottom side)should assemble RN1-4 if not assembled by default; Manf. PN: YC124-JR-0733RL YAGEO

U11 boot strap

VDD_ENET for SOM-MX8/MX8X/MX8MP

CL=18pF

Demonstartion purpose only:

* See D30 in this page

Power for ENET1_RGMII IOs on SOM power fed from pin J1.38 For specific SOM listed above, requiring second ETH port on ENET1 this power should be set to 1.8V source from U11 PHYETH1_VDDIO_REG when not shorted to ETH1_VDDH_REG will output 1.5V after power up and set to 1.8V after OS boot.

ETH1_VDDIO_REG ETH1_VDDH_REG

BASE_PER_3V3 ETH1_DVDDL

GNDGND GNDGND GND GND GND

GND GND GND GND

GND GND GND

GND

GNDGND GND

GND GNDGND GND GND GND

BASE_PER_3V3

BASE_PER_3V3

GND

GND

ETH1_VDDH_REG

BASE_PER_3V3

ETH1_VDDIO_REG

GND

GND

BASE_PER_3V3

ETH1_VDDIO_REGETH1_VDDH_REG

BASE_PER_3V3

BASE_PER_3V3

GND

GND

GND

ETH1_VDDIO_REG

EXP_ENET1_RESET_B

J1.30-ENET_MDIOJ1.74-ENET_MDC

ETH#A_MDI_A_P ETH#A_LED_ACTETH#A_MDI_A_M

ETH#A_MDI_B_PETH#A_MDI_B_M

ETH#A_MDI_C_PETH#A_MDI_C_M ETH#A_LED_LINK_10_100_1000

ETH#A_MDI_D_PETH#A_MDI_D_M

J1.81-ENET1_RGMII_RXD1

J1.120-ENET1_RGMII_RX_CTL

J1.57-ENET1_RGMII_RXC

J1.177_EXTJ1.73_EXT

J1.56_EXTJ1.55_EXT

J1.113-ENET1_RGMII_TX_CTLJ1.96-ENET1_RGMII_TXCJ1.73-ENET1_RGMII_TXD0


J1.56-ENET1_RGMII_TXD2J1.55-ENET1_RGMII_TXD3

J1.113_EXTJ1.96_EXT

J1.81_EXT

J1.120_EXT

J1.54-ENET1_RGMII_RXD3 J1.54_EXT

J1.122-ENET1_RGMII_RXD0J1.71-ENET1_RGMII_RXD2

J1.122_EXTJ1.71_EXT

J1.38_POWER

EXP_SOM_VSELECT

EXP_ENET_SEL

J1.57_EXT

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08. Ethernet

A3


Symphony-Board

Title




08. Ethernet

A3


Symphony-Board

Title




08. Ethernet

A3


Symphony-Board

Gre

enY

ello

w

Ora

gne

J21 S26-ZZ-0018

L2Y-

L1Y+

L4G_O_1

TCT3R1

TD3-R2 TD3+R3

TD2+R4

TCT4R7

TD4+R8

TD4-R9

TD1-R10

SH1SH1

SH2SH2

TD2-R5

TCT2R6

TD1+R11

TCT1R12

L5G_O_2

R78

49.9R 1%

RN1-133R

R46

10K

C46

100nF

R14710K

D2930V,100mA

RN1-233R

SGMII/1000FX

1588v2

U11

AR8033-AL1A-R

LED_LINK_100024

VD

D33

4

LED_LINK_10_10026

TXD036

TXD137

TXD238

TXD339

GTX_CLK35

TX_EN34

RXD327

RXD130 RXD031

RX_DV32

SIP46

RX_CLK33

MDC1 MDIO

48

INT_N5

DV

DD

L47

LX3

CLK25M25

RESET_N2

RBIAS9

XTLO6

XTLI7

AV

DD

3316

PPS22

SIN45

TRXP_011

TRXM_012

TRXP_114

TRXM_115

TRXP_217

TRXM_218

TRXP_320

TRXM_321

WOL_INT40

RXD228

VD

DH

_RE

G10

P_G

ND

49A

VD

DL#

18

LED_ACT23

AV

DD

L#2

13

AV

DD

L#3

19

VD

DIO

_RE

G29

AV

DD

L#4

44

SOP43

SON42

SD41

C62

100nF

C45

1uF

C47

470pF

C94

100nF

RN3-133R

C55

4.7uF

RN1-333R

Y1

25 Mhz_TSX3225

1

2

3

4

C91

100nF

R15149.9R 1%

C52

470pF

C95

100nF

C56

4.7uF

C44100nF

RN1-433R

C92

100nF

R80 49.9R 1%

R1361.0K 1%

C51

100nF

C53

470pF

C96

100nF

L14.7uH

12

R48

10K

C93

100nF

RN2-133R

U9NFL18ST207X1C3

RN3-233R

C97

100nF

C48100nF

C68

33pF

RN2-233R

C59

100nF

R652.37K 1%

Gre

enY

ello

w

Ora

gne

J20 S26-ZZ-0018

L2Y-

L1Y+

L4G_O_1

TCT3R1

TD3-R2 TD3+R3

TD2+R4

TCT4R7

TD4+R8

TD4-R9

TD1-R10

SH1SH1

SH2SH2

TD2-R5

TCT2R6

TD1+R11

TCT1R12

L5G_O_2

R62

10K

C58

100nF

C67

33pF

RN2-333R

C57

100nF

C1261nF 2KV

RN3-333R

FB5120R 1.2A

C54

100nF

RN2-433R

U33

FSA5157P6X

S6

VC

C5

GN

D2

B03

4A

B11

R77

49.9R 1%

FB4120R 1.2A

RN3-433R

C60

1uF

D2830V,100mA

R79 49.9R 1%

C1351nF 2KV

C90

100nF

C61

100nF

C64

100nF

C63

1uF

D3030V,100mA

C65

4.7uF

U12

FSA5157P6X

S6

VC

C5

GN

D2

B03

4A

B11

ETH1_AVDD33

ETH1_LX_OUT

ETH1_MDI_A_P

ENET1_RGMII_RXD0

ETH1_MDI_A_M

ENET1_RGMII_RXD1ENET1_RGMII_RXD2

ETH1_MDI_B_PETH1_MDI_B_M

ENET1_RGMII_RX_CTLETH1_MDI_C_P

ENET1_RGMII_TXD0 ETH1_MDI_C_MENET1_RGMII_TXD1ENET1_RGMII_TXD2ENET1_RGMII_TXD3 ETH1_MDI_D_P

ETH1_MDI_D_MENET1_RGMII_TXCENET1_RGMII_TX_CTL

ETH1_LED_ACTETH1_LED_LINK_10_100ETH1_LED_LINK_1000

ETH1_CLK_O

ETH1_CLK_I

ETH1_AVDDL

ENET1_RGMII_RXD3

ENET1_RGMII_RXC

ETH1_LED_ACT

ENET1_RGMII_RXD3ENET1_RGMII_RXD2ENET1_RGMII_RXD0ENET1_RGMII_RXD1

ENET1_RGMII_RX_CTL

ENET1_RGMII_RXC

ENET1_RGMII_TX_CTLENET1_RGMII_TXCENET1_RGMII_TXD0ENET1_RGMII_TXD1

ENET1_RGMII_TXD2ENET1_RGMII_TXD3

ENET1_RGMII_RXD0

ETH1_LED_LINK_10_100_1000

ETH1_LED_LINK_10_100_1000

ENET1_RGMII_RXC_AR

ETH1_PHY_RST_B

ETH1_PHY_RST_B

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Note: 1. Default always ON, To disable clock install R21.2. Replacement PN: AB-557-03-HCHC-F-L-C-T3. Disabled with SW6 in ON state

Differential Impedance:100 ohms

LAYOUT NOTE:

LAYOUT NOTE:PCIE Differential Pairs, Follow PCIe routing guidelines.Differential Impedance: 85 ohmsLength match +/-5mil

1.5V_LDO Current limited to 300mA

PCIe CLK09. PCIe

Place parallel termination resistorsclose to the mPCIe connector

Place parallel termination resistorsas close to the SOM connector as possible.

FOR SOM-MX6 using internal SoC clock:install 100nF instead of R37,R38remove R22,R23,R35,R36

mPCIexp

LAYOUT NOTE:

LAYOUT NOTE:Place AC caps close to the connector

LAYOUT NOTE:

SOM-6UL NAND signals should not be driven

GND

GND

GND

GND GND

GND

GND

BASE_PER_3V3BASE_PER_1V5

BASE_PER_3V3

GND

PCIE#A_REFCLK100M_PPCIE#A_REFCLK100M_N

PCIE#A_RX0_N

PCIE#A_RX0_P

PCIE#A_TX0_P

PCIE#A_TX0_NI2C#A_SDAI2C#A_SCL

SAI#A_RXFS_PCIE#A_RESET_B

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09. PCIe

A4


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09. PCIe

A4


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09. PCIe

A4


C4

100nF

R230R

R1 49.9R

FB3120R 1.2A

C6100nF

R210RNC

R360R

R2 49.9R

C5100nF

R350R

TP1

C3

4.7uF

R50

49.9R

C31

100nF

C30

100nF

C40

100uFC33

4.7uF

C1

100uF

J15

MM60-52B1-E1-R650

WAKE#1

COEX13

COEX25

CLKREQ#7

GND19

REFCLK-11

REFCLK+13

GND215

Reserved/UIM_C817

Reserved/UIM_C419

GND321

PERn023

PERp025

GND427

GND529

PETn031

PETp033

GND635

GND1437

+3.3Vaux139

+3.3Vaux241

GND1343

Reserved745

Reserved847

Reserved949

Reserved1051

3.3V_12

GND74

1.5V_16

UIM_PWR8

UIM_DATA10

UIM_CLK12

UIM_RESET14

UIM_VPP16

GND818

W_DISABLE#20

PERST#22

+3.3Vaux24

GND926

1.5V_228

SMB_CLK30

SMB_DATA32

GND1034

USB_D-36

USB_D+38

GND1140

LED_WWAN#42

LED_WLAN#44

LED_WPAN#46

1.5V_348

GND1250

3.3V_252

C80R

TP2

C34

100uF

C70R

R38 0RNC

C32

2.2uF

C392.2uF

R49

49.9R

R37 0RNC

U6

DSC557-0344FL1T

OE1

NC_22

NC_33

VS

S4

NC_55

NC_66

NC_77 CLK1+

8

CLK1-9

CLK0-10CLK0+11V

DD

112

VD

D0

13

EP

15

NC_1414

C38100nF

R220R

PWR_OSC_PCIE

OSC_PCIE_CLK1_POSC_PCIE_CLK1_N

OSC_PCIE_CLK0_NOSC_PCIE_CLK0_P

PCIe_CTXM

PCIe_CRXPPCIe_CRXM

PCIe_CTXP

PCIE#A_DIS_B

PCIE#A_REFCLK100M_N_CPCIE#A_REFCLK100M_P_C

PCIE#A_REFCLK100M_P_CPCIE#A_REFCLK100M_N_C

PCIE#A_WAKE_B

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

USB UART DEBUG

BACK

GP BUTTON GP LED

10. Debug, GPIO Exp, Buttons, LED

USB 2.0 Differential Pair, annotatedwith a ring around the pair. FollowUSB 2.0 routing guidelines.Length Match: +/- 100 milsDifferential Impedance: 90 ohms

LAYOUT NOTE:

HOME

MENU

GPIO EXPANDER

I2C ADDRESS= 0x20

@Powerup all IN SW can set to output as push-pull

In VAR-SOM-MX8 SOM pin 29 EXP_INT is referenced to 1.8V. When using pin 29 as an input pin driven by higher input voltage,use an external voltage divider or limit the current using a series resistor to a maximum of 1mA.

GND

DEBUG_VBUS3V3OUT

BASE_PER_3V3 3V3OUT

DEBUG_VBUS_C

3V3OUT

GND GND

GND GNDGND

GNDGND

GND

GND

GND GND

GND

BASE_PER_3V3

GND

GND

BASE_PER_3V3

GND

GND

GNDGNDGNDGND

UART#_DEBUG_RX

UART#_DEBUG_TX

EXP_LEDEXP_SW1

EXP_SW2

EXP_SW3

EXP_LEDI2C#A_SDA EXP_SW1I2C#A_SCL EXP_SW2

EXP_SW3EXP_USB3_SATA_SELEXP_ENET1_RESET_BEXP_SOM_VSELECTEXP_ENET_SEL

EXP_INT

Title





A4


Title





A4


Title





A4


TP5

R30

10K

C133

100nF

L6MCZ1210AH900L2T

14

3 2

U24FT230XQ

TXD15

RTS#16

VC

CIO

1

RXD2

GN

D13

CTS#4

CBUS25

CBUS314

CBUS012

CBUS111

GN

D3

VCC10

RESET#9

EP

AD

17

3V3O

UT

8

USBDM7

USBDP6

C144

10nF

R1910K

C125

100nF

TP6

FB8120R 1.2A

C134

4.7uF

SW2

FSM4JSMATR

12

34

'0'-B->A

U23SN74AVC4T245

VCCA1

1DIR2

2DIR3

1A14

1A25

2A16

2A27

GND8

GND92B2102B1111B2121B1132OE#141OE#15VCCB16

PA

D17

D3TPD1E10B09DPYR

D6TPD1E10B09DPYR

U5

PCA9534PWR

A01

A12

A23

P04

P15

P26

P37

GND8

P49

P510

P611

P712

INT13 SCL14 SDA15 VCC16

J29USB MICRO AB

VCC1

DATAN2

DATAP3

ID4

GND5

S6

S7

S11

S10

C35

100nF

R64 221R 1%R24

100K

R44

10KN

C

SW4

FSM4JSMATR

12

34

C122

100nF

R25

100K

R281.0K 1%

C185

1uF

R26

100K

C123

100nF

R29

10K

U28TPD4EUSB30

D1+1

D1-2

GND3

D2+4

D2-5

NC110

NC29

GND8

NC37

NC46

C124

100nF

R27

100K

D10

SW1

FSM4JSMATR

12

34R

4310K

D9TPD1E10B09DPYR

USB_DEBUG_DM

USB_DEBUG_DP

USB_DEBUG_DM_CUSB_DEBUG_DP_C

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

11. LVDS, DSI, Touch

RESISTIVE TOUCH

CAPACITIVE TOUCH

MIPI DSI DISPLAY

LAYOUT NOTE:LVDS Differential Pair, FollowLVDS routing guidelines.Differential Impedance: 100 ohms

LVDS DISPLAY A

LVDS Differential Pair, FollowLVDS routing guidelines.Differential Impedance: 100 ohms

LAYOUT NOTE:

LVDS DISPLAY B

LVDS Differential Pair, FollowLVDS routing guidelines.Differential Impedance: 100 ohms

LAYOUT NOTE:

Short circuit protection

Note: Please see note on Headers pageregarding Touch interrupt

Note for U30 U31: Recommneded PN for new design FPF2193Assembled board can have FPF2194.

See note in :"Headers" Page 14

MX8X: QSPI/ADC

MX8X: QSPI/ADC

GND

GND

GNDGND

GND

BASE_PER_3V3

GND

GND GND

GND

GND

GND GND

GND

GND

BASE_PER_1V8

GND

BASE_PER_3V3VCC_DISP_3V3

VCC_DISP_3V3

VCC_DISP_3V3VCC_DISP_3V3

VCC_DISP_5V

GND

VCC_5V

VCC_DISP_5V

VCC_DISP_5V

VCC_5VBASE_PER_3V3

PWM#B_CPT_INTI2C#C_SCLI2C#C_SDA

LVDS#A_TX1_NLVDS#A_TX1_PLVDS#A_TX2_N LVDS#A_TX2_P

LVDS#A_CLK_NLVDS#A_CLK_P

LVDS#A_TX0_N LVDS#A_TX0_P

PWM#A

I2C#A_SDAI2C#A_SCL

LVDS#A_TX3_NLVDS#A_TX3_P

LVDS#B_TX3_P

LVDS#B_TX0_N

LVDS#B_TX3_N

LVDS#B_TX0_PLVDS#B_TX1_N

LVDS#B_TX1_PLVDS#B_TX2_N LVDS#B_TX2_P

LVDS#B_CLK_NLVDS#B_CLK_P

J1.140-DSI_CLK0PJ1.142-DSI_CLK0M

J1.143-DSI_D0PJ1.145-DSI_D1M

J1.147-DSI_D1P

J1.141-DSI_D0M

PWM#A

PWM#A

TP#_TS_X-_CONN

TP#_TS_X+_CONNTP#_TS_Y+_CONN

TP#_TS_Y-_CONN

J1.57_EXT

CB_WDOG_B

J1.82-USB#A_HOST_PWR

CB-USB#A_HOST_PWR

Title





A4


Symphony-Board

Title





A4


Symphony-Board

Title





A4


Symphony-Board

R5

10K

C16

470pF

C9

100nF

C2710uF

C17

470pF

C160

100nF

U31FPF2193

FLAGA1

ENA2 Vout

B1Vin

B2

IsetC1

GNDC2

C210uF

C161

10uF

J5

CH81202M10100

11

33

55

99

1111

1313

1515

1717

1919

22

44

66

88

1010

1212

1414

1616

1818

2020

77

D26

R12310KNC

M1M2

J10

4 POS FFC/FPC

123456

R122 221R 1%

C2510uF

R12710KNC

C1910uF

J3

CH81202M10100

11

33

55

99

1111

1313

1515

1717

1919

22

44

66

88

1010

1212

1414

1616

1818

2020

77

D25

M1M2

J11CF20061D0R0-LF

1234

78

56

C182

10uF

R126 475R 1%

J6

HEADER 2X1

NC12

R124365R 1%

C183

100nF

C2410uF

J7

CH81202M10100

11

33

55

99

1111

1313

1515

1717

1919

22

44

66

88

1010

1212

1414

1616

1818

2020

77

U30FPF2193

FLAGA1

ENA2 Vout

B1Vin

B2

IsetC1

GNDC2

R128365R 1%

C15

470pF

C14

470pFR

610

K

J4

HEADER 2X1NC1

2

C2010uF

J8

HEADER 2X1

NC12

CPT_RST

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

12. USB2 Host

USB 2.0 Differential Pair, annotatedwith a ring around the pair. FollowUSB 2.0 routing guidelines.Length Match: +/- 100 milsDifferential Impedance: 90 ohms

USB2 Host

LAYOUT NOTE: Alternative PN defined.

NOTE:Power always enabled;In order to control the power see page 14 "Headers"

VCC_5V USB#A_HOST_VBUS

USB#A_HOST_VBUS

GND

GND

GND

BASE_PER_3V3

USB#A_HOST_DN

USB#A_HOST_DP

USB#A_HOST_VBUS

CB-USB#A_HOST_PWR

Title




12. USB2 Host

A4


Symphony-Board

Title




12. USB2 Host

A4


Symphony-Board

Title




12. USB2 Host

A4


Symphony-Board

C113

47uF

12

L4MCZ1210AH900L2T

1 4

32

C111

10uFR15010K

NC

R110787R 1%

R9310K

C114

100nF

D16IP4220CZ6

4

25

3

16

J23USB304FA-C1031301

12

34

5

6

U22FPF2193

FLAGA1

ENA2 Vout

B1Vin

B2

IsetC1

GNDC2

USB#A_HOST_DN_C

USB#A_HOST_DP_C

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Bleeder

USB TYPE C Circuitry

5V Source Load Switch

LAYOUT NOTE:USB 2.0 Differential Pair, annotatedwith a ring around the pair. FollowUSB 2.0 routing guidelines.Differential Impedance: 90 ohms

USB TYPE C

Config Channel Logic Detection & Indication of Plug Orientation

Ilim: 68K ~0.85A54K ~ 1A23.7K ~2.1A

USB Profile 1 = 5 V @ 2.1 A

28V VBUS w/PD

Place AC-coupling CAPscloser to transmit side.

USB3 SIGNALS

7 kV ESD immunity - HBM

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��

USB 3.0 Differential Pair, annotatedwith a ring around the pair. FollowUSB 3.0 routing guidelines.Differential Impedance: 90 ohms

LAYOUT NOTE:

13. USB3, uSATA SATA 2.0

Layout Note Place AC caps close to the connector

LAYOUT NOTE:SATA Differential Pair, FollowSATA routing guidelines.Differential Impedance: 85 ohmsLength match +/-5mil

6UL-BOOT_MODE1

LAYOUT NOTE:

SEL = LOW: A BSEL = HIGH: A CXSD = LOW: ONXSD = HIGH: OFFBy deafult, lines routed to SATA

SATA/USB select

SATA Differential Pair, FollowSATA routing guidelines.Differential Impedance: 85 ohmsLength match +/-5mil

LAYOUT NOTE:

USB 3.0 Differential Pair, annotatedwith a ring around the pair. FollowUSB 3.0 routing guidelines.Differential Impedance: 90 ohms

LAYOUT NOTE:

6UL-BOOT_MODE0

Usage of native USB_ID for iMX8MP requires patches not included in the formal release, pull up should be to 1.8V.For simple OTG function for VAR-SOM-MX8M-PLUSConnect J1.72 GPIO to U22 PTN ID output - same solution appIies also for VAR-SOM-MX8/8X/8M-MI NIUSB#B_OTG_ID can be left floating if not used.

NOTE FOR U25:P/N PTN36043BXY is EOL; New designs should include PTN36043ABXY

BASE_PER_1V8

GNDGND

USB_SS3_VBUS

GND

GNDGND

GND GND

GND

GNDGND GND


VCC_5V

USB_SS3_VBUS

GND

GND

GND

BASE_PER_3V3

GND

BASE_PER_3V3

GNDGND

GNDGND GND

BASE_PER_1V8

GND

BASE_PER_3V3

GND

BASE_PER_3V3

GNDVCC_5V

GND

GND

GNDGND

VCC_5V

BASE_PER_3V3

USB_SS3_VBUS

GND

USB#B_OTG_DP

USB#B_OTG_DN

USB#B_OTG_IDJ1.72-USB3_INTB

EXP_USB3_SATA_SEL

USB#B_OTG_VBUS

J1.93-SATA_RXP-USB3_SS3_RX_PJ1.91-SATA_RXN-USB3_SS3_RX_NJ1.97-SATA_TXP-USB3_SS3_TX_PJ1.99-SATA_TXN-USB3_SS3_TX_N

USB#B_OTG_IDJ1.72-USB3_INTB

I2C#A_SDAI2C#A_SCL

Title




13. USB3, uSATA

A3


Symphony-Board

Title




13. USB3, uSATA

A3


Symphony-Board

Title




13. USB3, uSATA

A3


Symphony-Board

C139100nF

C22

100nF

R11

310

KC132

22uF

C143100nF

R98 2.2KNC

C117100nF

R1110R

R96 2.2KNC

R14910K

U26

NX5P3090UKZ

ENA1

FAULTA2

ILIMA3

VINT1B1

VINT2B2

GN

D1

B3

VINT3C1

VBUS1C2

GN

D2

C3

VBUS2D1

VBUS3D2

GN

D3

D3

C98

100nF

D19

TP

D1E

10B

09D

PY

R

L5

MCZ1210AH900L2T

1 4

32

R11610K

C115100nF

R99 2.2K

R130 0RNC R131 0RNC

C112

100nF

C119100nF

R11

210

K

R97 2.2KNC

C23

100nFJ27

SATA 7Circuits

GND11

TXP/A+2

TXN/A-3

GND24

RXN/B-5

RXP/B+6

GND37

MP18

MP29

U25

PTN36043BXY

RX_AP_+18

RX_AP_-17

TX_AP_+15

TX_AP_-14 TX_CON_1+

6

TX_CON_1-7

RX_CON_1+2

RX_CON_1-3

TX_CON_2+12

TX_CON_2-11

RX_CON_2+9

RX_CON_2-8

SEL16

CH1_SET1/RXDE1

CH1_SET2/TXEQ4

CH2_SET1/TXDE13

CH2_SET2/RXEQ10

VD

D1V

85

GN

D19

R87

10K

C140100nF

C1302.2uF 50VC0805_v1

FB7

120R 1.2A

TP3

R88

10K

R104

10K

R132 0R

C138100nF

R1034.7K

NC

J26

USB3 TYPE C RA

GND_1A1

SSTXP1A2

SSTXN1A3

VBUS_1A4

CC1A5

DP1A6

DN1A7

SBU1A8

VBUS_2A9

SSRXN2A10

SSRXP2A11

GND_2A12

GND_4B1SSTXP2B2SSTXN2B3VBUS_4B4CC2B5DP2B6DN2B7SBU2B8VBUS_3B9SSRXN1B10SSRXP1B11GND_3B12

SH1SH1 SH3

SH3

SH2SH2

SH4SH4

U2CBTL02043B

GN

D1

1

A0_P2

B0_N17

B1_P14

C1_P8

C0_P4

XSD19

A0_N3

C0_N5

B1_N13A1_P

6

VD

D2

16

VD

D3

20

VD

D1

11

C1_N9

GN

D2

10

GN

D3

15

B0_P18

SEL12

A1_N7

GN

D4

21

J22

HDR2.54_3x1_Shrouded

123

R94 2.2KNC

TP4

U21

PTN5150AHXMP

PORT3

VBUS_DET4

ADR/CON_DET5

INTB/OUT36

SDA/OUT17

SCL/OUT28

ID9

GN

D10

EXT_SEL11

VD

D12

CC11

CC22

R100 2.2KNC

R106 0RNCC116100nF

C141100nF

C127

2.2uF

R11423.7K 1%

D20PGB1010603MR

R105

10K

C128100nF

C136

2.2uF

R101 2.2KNC

C10

100nF

C131

22uFC0805_v1

C129

10uF

C142100nF

C118100nF

D22

TP

D1E

10B

09D

PY

R

C137

100nF

R95 2.2K

R1024.7K

NC

U27TPD4EUSB30

D1+1

D1-2

GND3

D2+4

D2-5

NC110

NC29

GND8

NC37

NC46

R11710K

Q52N7002P

3

1

2

SS_REDRV_VDD1V8

USB3_SS3_TX_P USB3_AP_TX_P SS_CON_TX1_P SS_TX1_P

USB3_SS3_TX_N USB3_AP_TX_N SS_CON_TX1_N SS_TX1_N

USB3_SS3_RX_P USB3_AP_RX_P SS_CON_TX2_P SS_TX2_P

USB3_SS3_RX_N USB3_AP_RX_N SS_CON_TX2_N SS_TX2_N

SS_RX1_PPTN5150A_SEL SS_RX1_N

PTN36043_CH1SET1SS_RX2_PSS_RX2_NPTN36043_CH1SET2

PTN36043_CH2SET1

SS_TX1_P SS_RX1_PSS_TX1_N SS_RX1_N

PTN36043_CH2SET2

USB_SS3_CC1 SBU2USB_C_OTG2_DP USB_C_OTG2_DNUSB_C_OTG2_DN USB_C_OTG2_DP

SBU1 USB_SS3_CC2

SS_RX2_N SS_TX2_NSS_RX2_P SS_TX2_P

CON_DET INTB

NX5P3090_EN

PTN5150A_SELUSB_SS3_CC1

PTN5150A_PORT USB_SS3_CC2

NX5P3090_ILIM

USB#B_OTG_ID_C

SATA_TXPSATAc_TXPSATAc_TXNSATA_TXN

SATAc_RXNSATA_RXNSATAc_RXP

SATA_RXP

USB3_SS3_RX_PUSB3_SS3_RX_NUSB3_SS3_TX_PUSB3_SS3_TX_N

SATA_RXPSATA_RXNSATA_TXPSATA_TXN

USB#B_OTG_ID_C

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

14. Headers

I2C PULL UPS

BT UARTUART#AUART#B

I2C#C

SPI#A

I2C#AI2C#B

SAI

CAN

PWM#B PWM#C

I2C_A has internal pulls in Camera buffer

I2C_B has internal pulls in MX6/MX8/MX8X/MX8MP SOMs. For MX8MM/MX8MN/6UL SOMs - external pull ups should be added.

Located on PS

MX6/SOLO: PIN68 WDOG1_BSOM_6UL: PIN57 WDOG1_B

See J3.12

See J3.18UART

SAI/SPI

Headers arranged for partial compatible alternate function

UART/QSPI

Headers arranged for compatible alternate function

UART

For complete header alternate function refer to "VAR-SOMs_Compatibility_and_Pinout.XLS " located at: ftp://ftp.variscite.com/SOM_Compatibility

Listed above SOMs require short on headers to get "reboot" to function.For all other watch dog looped on SOM

COLD RESET ON WDOG_B EVENTfor MX6/SOLO and 6UL SOMs

Symphony Board reset circuitry watch dog input

USB#A Host VBUS power control

See J18.1See J3.11

See J3.17

In order to control the USB#A HOST VBUS power a short is required: Symphony Board U22 control input

BASE_PER_3V3

GND

GND


GND

I2C#B_SCLI2C#B_SDA

I2C#C_SDAI2C#C_SCL

I2C#A_SCLI2C#A_SDA

TP#_TS_X-TP#_TS_X+TP#_TS_Y+

TP#_TS_Y-

CANL0CANH0

J1.96_EXTJ1.73_EXT

J1.56_EXT

J1.71_EXTJ1.81_EXT

J1.120_EXT

J1.177_EXTJ1.113_EXT

J1.55_EXT

J1.54_EXT

J1.86-MIPI_CAM_BUF_CTLJ1.84J1.48

J1.79J1.117-MIPI_CAM_OPT

J1.173

J1.40-MIPI_CAM_RSTJ1.70-MIPI_CAM_SYNCJ1.75-MIPI_CAM_TRIGGERJ1.77-MIPI_CSI_PWDN

J1.72-USB3_INTB

SAI#A_RXFS_PCIE#A_RESET_BSAI#A_TXCSAI#A_RXD

SAI#A_TXDSAI#A_TXFS

SPI#A_SCK

SPI#A_SDI

SAI#A_RXC_USDHC#A_RESET_BI2C#B_SCLI2C#B_SDA

SPI#A_SDO

SPI#A_CS0

I2C#A_SCLI2C#A_SDA

I2C#C_SCLI2C#C_SDA

UART#A_TXUART#A_RXUART#B_TXUART#B_RX

UART#BT_CTS_BUART#BT_RTS_B

UART#BT_RXUART#BT_TX

PWM#B_CPT_INT PWM#C

J1.122_EXT J1.57_EXT

J1.82-USB#A_HOST_PWR

J1.57_EXTPWM#B_CPT_INT

CB_WDOG_B

CB-USB#A_HOST_PWR

Title




14. Headers

A4


Symphony-Board

Title




14. Headers

A4


Symphony-Board

Title




14. Headers

A4


Symphony-Board

J17

CH81102M10100

108642

97531

J30

CH81202M10100

NC

11

33

55

99

1111

1313

1515

1717

1919

22

44

66

88

1010

1212

1414

1616

1818

2020

77

J18

CH81102M10100

108642

97531

R33

10K

NC

R14

10K

NC

R51

10K

J16

CH81202M10100

11

33

55

99

1111

1313

1515

1717

1919

22

44

66

88

1010

1212

1414

1616

1818

2020

77

R53

10K

NC

R34

10K

NC

R52

10K

R118 1.2K J1.173_R

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

��

��

�� -��

��

��

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��

��

��

�� !

"�

��#�$%&�'(

��#�$%&�'(

��)��)��

��*+�

�,-.��

/��

�%0�.

/��

�%0�.

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��1�.�2%-3

/��

�%0�.

�*'��4��.$��)��'��

��&'��'

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��!�

��5

�� '� ��*+��

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��.,%$��%4�.%�#�$%&�'(

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�','�,6��-7

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�%0+7�&�'

��89��

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::��:��

/��

�%0�.

��.��2%-3

/��

�%0�.

::��:��

��.��2%-3

��

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�%0�.

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�%0�.

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�%0�.

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5,�%�,�

�7�.&�� ;

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�%0�.

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�%0�.

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�%0�.

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02. Block Diagram VAR-SOM-MX8M-MINI

Title





A3


Symphony-Board

Title





A3


Symphony-Board

Title





A3


Symphony-Board

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

04. VAR-SOM-MX8M-MINI Connector

PIN NAMING MNEMONICS:"/" - Prefix number of "/" denotes alternate function number; none is ALT0=PAD name"/*/" - Prefix denotes pin connected to a configurable module on SOM; E.g. with "EC" pin ENET_TD3/////GPIO1_IO18/*/ETH_TRX0_P source is Ethernet PHY"~" - Prefix points to an alternate function optionally used or shared on SOM; Verify with SOM datasheet before using this pin;

SOM usage: RES-TOUCH_CS_B

SOM usage: CAN-FD_CS

IO Voltage set on SOM 1.8V/3.3V

Shared on SOM with "AC"Shared on SOM with "AC"

SOM usage: RES-TOUCH_INT_B

Pin 71, 80 IO levels running from NVCC_SD2 set on SOM;EXP_ENET_SEL - Set to Header

SETUP NOTES FOR VAR-SOM-MX8M-MINI:

SOM usage: CAN_INT_B

SOM usage: CN-TX_INT(v1.3 and up)

GND J1.1ETH#A_MDI_C_P ETH#A_MDI_A_PETH#A_MDI_C_M ETH#A_MDI_A_M

GND GNDETH#A_MDI_D_P ETH#A_MDI_B_PETH#A_MDI_D_M ETH#A_MDI_B_M

GND GNDETH#A_LED_LINK_10_100_1000 ETH#A_LED_ACT

AC#_DMIC_CLK PWM#AAC#_DMIC_DATA GND

SAI#A_RXC_USDHC#A_RESET_B SAI#A_RXDSAI#A_TXFS SAI#A_RXFS_PCIE#A_RESET_BSAI#A_TXD SAI#A_TXC

GND GNDJ1.30-ENET_MDIO EXP_INT

VCC_SOM J.31_33_35_PWRVCC_SOM J.31_33_35_PWR

J1.36 J.31_33_35_PWRJ1.38_POWER GND

J1.40-MIPI_CAM_RST SPI#A_CS0

BOOT#_SEL SPI#A_SDIFLEXCAN#A_TX SPI#A_SCKFLEXCAN#A_RX SPI#A_SDO

J1.48 GNDUART#BT_RTS_B SOM_3V3

UART#BT_TX UART#BT_CTS_BJ1.54-ENET1_RGMII_RXD3 UART#BT_RXJ1.56-ENET1_RGMII_TXD2 J1.55-ENET1_RGMII_TXD3

J1.57-ENET1_RGMII_RXCJ1.58USDHC#A_CLK GNDUSDHC#A_DAT0 USDHC#A_DAT2USDHC#A_CMD USDHC#A_DAT1

GND USDHC#A_DAT3GND

J1.70-MIPI_CAM_SYNCJ1.72-USB3_INTB J1.71-ENET1_RGMII_RXD2J1.74-ENET_MDC J1.73-ENET1_RGMII_TXD0

GND J1.75-MIPI_CAM_TRIGGERGND J1.77-MIPI_CSI_PWDN

USDHC#A_CD_B J1.79J1.82-USB#A_HOST_PWR J1.81-ENET1_RGMII_RXD1

J1.84 UART#_DEBUG_RXJ1.86-MIPI_CAM_BUF_CTL UART#_DEBUG_TX

I2C#A_SCL I2C#A_SDAI2C#C_SDA GNDI2C#C_SCL J1.91-SATA_RXN-USB3_SS3_RX_N

USB#B_OTG_ID J1.93-SATA_RXP-USB3_SS3_RX_PJ1.96-ENET1_RGMII_TXC GND

J1.97-SATA_TXP-USB3_SS3_TX_PPCIE#A_REFCLK100M_N J1.99-SATA_TXN-USB3_SS3_TX_NPCIE#A_REFCLK100M_P GND

USB#A_HOST_VBUS VCC_SOMUSB#B_OTG_VBUS VCC_SOM

USB#A_HOST_DN VCC_SOMUSB#A_HOST_DP VCC_SOM

GND VCC_SOMUSB#B_OTG_DN J1.113-ENET1_RGMII_TX_CTLUSB#B_OTG_DP UART#B_RX

GND J1.117-MIPI_CAM_OPTJ1.120-ENET1_RGMII_RX_CTL MIPI_CSI#A_DATA0_P

J1.122-ENET1_RGMII_RXD0 MIPI_CSI#A_DATA0_NUART#A_TX MIPI_CSI#A_DATA1_N

GND MIPI_CSI#A_DATA1_PPCIE#A_TX0_N MIPI_CSI#A_DATA2_PPCIE#A_TX0_P MIPI_CSI#A_DATA2_N

GND MIPI_CSI#A_DATA3_NPCIE#A_RX0_P MIPI_CSI#A_DATA3_PPCIE#A_RX0_N MIPI_CSI#A_CLK_P

GND MIPI_CSI#A_CLK_NJ1.140-DSI_CLK0P GNDJ1.142-DSI_CLK0M J1.141-DSI_D0M

GND J1.143-DSI_D0PJ1.146-HDMI_D1P J1.145-DSI_D1MJ1.148-HDMI_D1M J1.147-DSI_D1PJ1.150-HDMI_CLKM GNDJ1.152-HDMI_CLKP J1.151-HDMI_D2PJ1.154-HDMI_HPD J1.153-HDMI_D2M

J1.155-HDMI_D0PJ1.156GND J1.157-HDMI_D0M

LVDS#A_TX1_N GNDLVDS#A_TX1_P LVDS#A_TX0_NLVDS#A_TX2_N LVDS#A_TX0_PLVDS#A_TX2_P LVDS#A_TX3_NLVDS#A_CLK_N LVDS#A_TX3_PLVDS#A_CLK_P GND

GND UART#B_TXI2C#B_SCL J1.173I2C#B_SDA UART#A_RX

GND J1.177-ENET1_RGMII_TXD1LVDS#B_CLK_N GNDLVDS#B_CLK_P LVDS#B_TX3_PLVDS#B_TX0_N LVDS#B_TX3_NLVDS#B_TX0_P GNDLVDS#B_TX1_N TP#_TS_X-LVDS#B_TX1_P TP#_TS_X+LVDS#B_TX2_N TP#_TS_Y+LVDS#B_TX2_P TP#_TS_Y-AC#_HPOUTFB AC#_AGNDAC#_HPLOUT AC#_LINEIN_LPAC#_HPROUT AC#_LINEIN_RP

POR_B#_3V3

PWM#B_CPT_INTPWM#C

Title



Project1.5_R1.17


A2


Symphony-BoardSymphony-Board

Title



Project1.5_R1.17


A2



Title



Project1.5_R1.17


A2



Version V1.1VAR-SOM-MX8MM

J1

GND2

ENET_RD0/////GPIO1_IO26/*/ETH_TRX2_P4

ENET_RD1/////GPIO1_IO27/*/ETH_TRX2_N6

GND8

ENET_RD2/////GPIO1_IO28/*/ETH_TRX3_P10

ENET_RD3/////GPIO1_IO29/*/ETH_TRX3_N12

GND14

ENET_RXC/ENET_RX_ER/////GPIO1_IO25/*/LED_LINK10_100_100016

SAI5_RXD3/SAI1_TXD5//SAI1_TXFS///SAI5_TXD0////PDM_BIT3/////GPIO3_IO24/*/DMIC_CLK18

SAI5_MCLK/SAI1_TXC/////GPIO3_IO25/*/DMIC_DATA20

SAI2_RXC/SAI5_TXC////UART1_RXD/////GPIO4_IO2222

SAI2_TXFS/SAI5_TXD1///SAI2_TXD1////UART1_CTS_B/////GPIO4_IO2424

SAI2_TXD0/SAI5_TXD3/////GPIO4_IO2626

GND28

~ENET_MDIO/////GPIO1_IO1730

VCC_SOM32

VCC_SOM34

VCC_SOM36

VDD_ENET/*/NC38

GPIO1_IO13/USB1_OTG_OC/////PWM2_OUT40

BOOT_SEL42

NC/*/CAN_TX44

NC/*/CAN_RX46

GPIO1_IO02/~WDOG_B/////WDOG_ANY48

SAI3_RXC/GPT1_CLK//SAI5_RXC////~UART2_CTS_B/////GPIO4_IO2950

SAI3_TXC/GPT1_COMPARE2//SAI5_RXD2////~UART2_TXD/////GPIO5_IO0052

UART1_RXD/ECSPI3_SCLK/////GPIO5_IO2254

UART1_TXD/ECSPI3_MOSI/////GPIO5_IO2356

GND58

SD2_CLK/////GPIO2_IO1360

SD2_DATA0/////GPIO2_IO1562

SD2_CMD/////GPIO2_IO1464

GND66

SPDIF_RX/PWM2_OUT/////GPIO5_IO0468

ECSPI2_MOSI/UART4_TXD/////GPIO5_IO1170

GPIO1_IO11/USB2_OTG_ID72

~ENET_MDC/////GPIO1_IO1674

GND76

GND78

GPIO1_IO10/USB1_OTG_ID80

SAI3_TXD/GPT1_COMPARE3//SAI5_RXD3/////GPIO5_IO0182

SAI1_RXD1/SAI5_RXD1///PDM_BIT1/////GPIO4_IO03//////~BOOT_CFG0184

SAI1_RXD3/SAI5_RXD3///PDM_BIT3/////GPIO4_IO05//////~BOOT_CFG0386

I2C2_SCL/ENET1_1588_EVENT1_IN/////GPIO5_IO1688

~I2C3_SDA/PWM3_OUT//GPT3_CLK/////GPIO5_IO1990

~I2C3_SCL/PWM4_OUT//GPT2_CLK/////GPIO5_IO1892

USB1_ID94

GPIO1_IO06/ENET1_MDC/////SD1_CD_B//////EXT_CLK396

PMIC_PWRON_B98

PCIE1_REF_CLK_N100

PCIE1_REF_CLK_P102

USB2_VBUS104

USB1_VBUS106

USB2_D_N108

USB2_D_P110

GND112

USB1_D_N114

USB1_D_P116

GND118

SAI3_MCLK/PWM4_OUT//SAI5_MCLK/////GPIO5_IO02120

GPIO1_IO12/USB1_OTG_PWR122

UART3_TXD/UART1_RTS_B/////GPIO5_IO27124

GND126

PCIE1_TX_N128

PCIE1_TX_P130

GND132

PCIE1_RX_P134

PCIE1_RX_N136

GND138

PMIC_STBY_REQ140

PMIC_ON_REQ142

GND144

SAI1_TXD6/SAI6_RXFS//SAI6_TXFS/////GPIO4_IO18//////~BOOT_CFG14146

SAI1_RXD0/SAI5_RXD0//SAI1_TXD1///PDM_BIT0/////GPIO4_IO02//////~BOOT_CFG00148

~GPIO1_IO03/USDHC1_VSELECT150

SAI1_TXD1/SAI5_TXD1/////GPIO4_IO13//////~BOOT_CFG09152

GPIO1_IO01/PWM1_OUT/////REF_CLK_24M//////EXT_CLK2154

SAI1_TXD7/SAI6_MCLK///PDM_CLK/////GPIO4_IO19//////~BOOT_CFG15156

GND158

DSI_TX1_N/*/LVDS0_CH0_TX1_N160

DSI_TX1_P/*/LVDS0_CH0_TX1_P162



DSI_CLK_N/*/LVDS0_CH0_CLK_N168

DSI_CLK_P/*/LVDS0_CH0_CLK_P170

GND172

I2C4_SCL/PWM2_OUT//PCIE1_CLKREQ_B/////GPIO5_IO20174

I2C4_SDA/PWM1_OUT/////GPIO5_IO21176

GND178

NC/*/LVDS0_CH1_CLK_N180

NC/*/LVDS0_CH1_CLK_P182

NC/*/LVDS0_CH1_TX0_N184

NC/*/LVDS0_CH1_TX0_P186





SAI5_RXFS/SAI1_TXD0/////GPIO3_IO19/*/HPOUTFB196

SAI5_RXD0/SAI1_TXD2////PDM_BIT0/////GPIO3_IO21/*/HPLOUT198

SAI5_RXD2/SAI1_TXD4//SAI1_TXFS///SAI5_TXC////PDM_BIT2/////GPIO3_IO23/*/HPROUT200

ENET_TX_CTL/////GPIO1_IO22/*/NC1

ENET_TD3/////GPIO1_IO18/*/ETH_TRX0_P3

ENET_TD2/ENET_TX_CLK_IN|ENET_REF_CLK_ROOT_OUT/////GPIO1_IO19/*/ETH_TRX0_N5

GND7

ENET_TD1/////GPIO1_IO20/*/ETH_TRX1_P9

ENET_TD0/////GPIO1_IO21/*/ETH_TRX1_N11

GND13

ENET_RX_CTL/////GPIO1_IO24/*/LED_ACT15

SPDIF_EXT_CLK/PWM1_OUT/////GPIO5_IO0517

GND19

SAI2_RXD0/SAI5_TXD0////UART1_RTS_B/////GPIO4_IO2321

SAI2_RXFS/SAI5_TXFS//SAI5_TXD1///SAI2_RXD1////UART1_TXD/////GPIO4_IO2123

SAI2_TXC/SAI5_TXD2/////GPIO4_IO2525

GND27

GPIO1_IO07/ENET_MDIO//////EXT_CLK429

NC_VCC_SOM_GND_131

NC_VCC_SOM_GND_233

NC_VCC_SOM_GND_335

GND37

ECSPI1_SS0/UART3_RTS_B/////GPIO5_IO0939

~ECSPI1_MISO/UART3_CTS_B/////GPIO5_IO0841

~ECSPI1_SCLK/UART3_RXD/////GPIO5_IO0643

~ECSPI1_MOSI/UART3_TXD/////GPIO5_IO0745

GND47

SOM_3V3_PER49

SAI3_RXD/GPT1_COMPARE1//SAI5_RXD0////~UART2_RTS_B/////GPIO4_IO3051

SAI3_TXFS/GPT1_CAPTURE2//SAI5_RXD1///SAI3_TXD1////~UART2_RXD/////GPIO4_IO3153

_UART3_RXD/UART1_CTS_B/////GPIO5_IO2655

_UART3_TXD/UART1_RTS_B/////GPIO5_IO2757

GND59




GND67

SPDIF_TX/PWM3_OUT/////GPIO5_IO0369

SD2_RESET_B/////GPIO2_IO1971

SAI2_MCLK/SAI5_MCLK/////GPIO4_IO2773

ECSPI2_SCLK/UART4_RXD/////GPIO5_IO1075

ECSPI2_MISO/UART4_CTS_B/////GPIO5_IO1277

ECSPI2_SS0/UART4_RTS_B/////GPIO5_IO1379

~GPIO1_IO00/ENET_PHY_REF_CLK_ROOT_OUT/////REF_CLK_32K//////EXT_CLK181

UART4_RXD/UART2_CTS_B//PCIE1_CLKREQ_B/////GPIO5_IO2883

UART4_TXD/UART2_RTS_B/////GPIO5_IO2985

I2C2_SDA/ENET1_1588_EVENT1_OUT/////GPIO5_IO1787

GND89

~GPIO1_IO15/USB2_OTG_OC/////PWM4_OUT//////CLKO291

SAI1_TXFS/SAI5_TXFS/////GPIO4_IO1093

GND95

ENET_TXC/ENET_TX_ER/////GPIO1_IO23/*/NC97

~GPIO1_IO14/USB2_OTG_PWR/////PWM3_OUT//////CLKO199

GND101

VCC_SOM103

VCC_SOM105

VCC_SOM107

VCC_SOM109

VCC_SOM111

SAI3_RXFS/GPT1_CAPTURE1//SAI5_RXFS///SAI3_RXD1/////GPIO4_IO28113

UART2_RXD/ECSPI3_MISO/////GPIO5_IO24115

GPIO1_IO08/ENET1_1588_EVENT0_IN/////SD2_RESET_B117

CSI_P1_D0_P119

CSI_P1_D0_N121

CSI_P1_D1_N123

CSI_P1_D1_P125

CSI_P1_D2_P127

CSI_P1_D2_N129

CSI_P1_D3_N131

CSI_P1_D3_P133

CSI_P1_CK_P135

CSI_P1_CK_N137

GND139


ONOFF143

SAI1_RXD5/SAI6_TXD0//SAI6_RXD0///SAI1_RXFS/////GPIO4_IO07//////~BOOT_CFG05145


GND149

SAI1_RXD4/SAI6_TXC//SAI6_RXC/////GPIO4_IO06//////~BOOT_CFG04151

~GPIO1_IO05/M4_NMI/////PMIC_READY153

SAI1_TXD5/SAI6_RXD0//SAI6_TXD0/////GPIO4_IO17//////~BOOT_CFG13155

SAI1_RXD6/SAI6_TXFS//SAI6_RXFS/////GPIO4_IO08//////~BOOT_CFG06157

GND159





GND169

UART2_TXD/ECSPI3_SS0/////GPIO5_IO25171


UART3_RXD/UART1_CTS_B/////GPIO5_IO26175

SAI1_TXC/SAI5_TXC/////GPIO4_IO11177

GND179



GND185

SAI1_RXD2/SAI5_RXD2///PDM_BIT2/////GPIO4_IO04//////~BOOT_CFG02/*/TS_X-187

SAI1_MCLK/SAI5_MCLK//SAI1_TXC///PDM_CLK/////GPIO4_IO20/*/TS_X+189

SAI1_RXFS/SAI5_RXFS/////GPIO4_IO00/*/TS_Y+191

SAI1_RXC/SAI5_RXC/////GPIO4_IO01/*/TS_Y-193

AGND195

SAI5_RXC/SAI1_TXD1////PDM_CLK/////GPIO3_IO20/*/LINEIN1_LP197

SAI5_RXD1/SAI1_TXD3//SAI1_TXFS///SAI5_TXFS////PDM_BIT1/////GPIO3_IO22/*/LINEIN1_RP199

Design HierarchyRoot [Symphony-Board]01. Cover03. SOMSOM [VAR-SOM-MX8M-MINI]02. BD VAR-SOM-MX8M-MINI04. VAR-SOM-MX8M-MINI Connector

05. Power,Reset,Boot,RTC,EEPROM06. uSD, Audio,CAN07. Camera, HDMI, DP08. Ethernet09. PCIe10. Debug, GPIO Exp, Buttons11. LVDS, DSI, Touch12. USB2 Host13. USB3, uSATA14. Headers

Reference DesignatorsC1C10C100C101C102C103C104C105C106C107C108C109C11C110C111C112C113C114C115C116C117C118C119C12C120C121C122C123C124C125C126C127C128C129C13C130C131C132C133C134C135C136C137C138C139C14C140C141C142C143C144C145C15C157C158C159C16C160C161C17C18C181C182C183C184C185C186C187C188C189C19C2C20C21C22C23C24C25C26C27C28C29C3C30C31C32C33C34C35C36C37C38C39C4C40C41C42C43C44C45C46C47C48C49C5C50C51C52C53C54C55C56C57C58C59C6C60C61C62C63C64C65C66C67C68C7C70C71C72C73C74C75C76C77C78C79C8C80C81C82C83C84C85C86C87C88C89C9C90C91C92C93C94C95C96C97C98C99D1D10D11D12D13D14D15D16D17D18D19D2D20D21D22D23D24D25D26D27D28D29D3D30D4D5D6D7D8D9FB1FB2FB3FB4FB5FB6FB7FB8FD1FD2FD3FD4HOLE1HOLE2HOLE3HOLE4J1J10J11J12J13J14J15J16J17J18J19J2J20J21J22J23J24J25J26J27J28J29J3J30J4J5J6J7J8J9JBT1L1L2L3L4L5L6MS1MS2MS3MS4MS5MS6Q1Q10Q2Q3Q4Q5Q6Q7Q8Q9R1R10R100R101R102R103R104R105R106R107R109R11R110R111R112R113R114R115R116R117R118R119R12R120R121R122R123R124R125R126R127R128R129R13R130R131R132R133R134R136R138R139R14R140R141R142R143R144R145R147R149R150R151R152R17R18R19R2R20R21R22R23R24R25R26R27R28R29R3R30R32R33R34R35R36R37R38R4R40R42R43R44R45R46R48R49R5R50R51R52R53R54R55R56R57R58R59R6R60R61R62R64R65R66R67R68R69R7R70R71R72R73R74R75R76R77R78R79R8R80R81R82R83R84R85R86R87R88R89R9R90R92R93R94R95R96R97R98R99RN1-1RN1-2RN1-3RN1-4RN2-1RN2-2RN2-3RN2-4RN3-1RN3-2RN3-3RN3-4SW1SW2SW3SW4SW5SW6SW7TP1TP2TP3TP4TP5TP6TP7TP8U1U11U12U13U14U15U16U17U18U19U2U20U21U22U23U24U25U26U27U28U29U3U30U31U32U33U4U5U6U7U9VPC1Y1Y2

Nets - Connected component pins3V3OUTC133.1 (C133.1)U24.VCCIO (U24.1)U24.RESET# (U24.9)U24.3V3OUT (U24.8)U23.VCCB (U23.16)C124.1 (C124.1)

AC#_AGNDSOM.AC#_AGNDR11.1 (R11.1)R9.1 (R9.1)J1.AGND (J1.195)

AC#_DMIC_CLKSOM.AC#_DMIC_CLKJ2.1 (J2.1)R3.2 (R3.2)J1.SAI5_RXD3/SAI1_TXD5//SAI1_TXFS///SAI5_TXD0////PDM_BIT3/////GPIO3_IO24/*/DMIC_CLK (J1.18)

AC#_DMIC_CLK_RR3.1 (R3.1)U1.CLK (U1.4)

AC#_DMIC_DATASOM.AC#_DMIC_DATAJ2.2 (J2.2)R4.2 (R4.2)J1.SAI5_MCLK/SAI1_TXC/////GPIO3_IO25/*/DMIC_DATA (J1.20)

AC#_DMIC_DATA_RR4.1 (R4.1)U1.DATA (U1.5)

AC#_HPLOUTSOM.AC#_HPLOUTC41.1 (C41.1)J1.SAI5_RXD0/SAI1_TXD2////PDM_BIT0/////GPIO3_IO21/*/HPLOUT (J1.198)

AC#_HPLOUT_CJ14.L (J14.2)C41.2 (C41.2)D4.2 (D4.2)

AC#_HPOUTFBSOM.AC#_HPOUTFBR45.2 (R45.2)J1.SAI5_RXFS/SAI1_TXD0/////GPIO3_IO19/*/HPOUTFB (J1.196)

AC#_HPROUTSOM.AC#_HPROUTC50.1 (C50.1)J1.SAI5_RXD2/SAI1_TXD4//SAI1_TXFS///SAI5_TXC////PDM_BIT2/////GPIO3_IO23/*/HPROUT (J1.200)

AC#_HPROUT_CJ14.R (J14.3)D8.2 (D8.2)C50.2 (C50.2)

AC#_LINEIN_LPSOM.AC#_LINEIN_LPC18.1 (C18.1)J1.SAI5_RXC/SAI1_TXD1////PDM_CLK/////GPIO3_IO20/*/LINEIN1_LP (J1.197)

AC#_LINEIN_RPSOM.AC#_LINEIN_RPC36.1 (C36.1)J1.SAI5_RXD1/SAI1_TXD3//SAI1_TXFS///SAI5_TXFS////PDM_BIT1/////GPIO3_IO22/*/LINEIN1_RP (J1.199)

AC#_LLINEIN_CJ12.L (J12.2)R7.2 (R7.2)C18.2 (C18.2)D1.2 (D1.2)

AC#_RLINEIN_CJ12.R (J12.3)C36.2 (C36.2)R20.2 (R20.2)D2.2 (D2.2)

AGNDR9.2 (R9.2)J12.COM (J12.1)C29.2 (C29.2)R32.1 (R32.1)

BASE_ENR143.1 (R143.1)R67.2 (R67.2)R145.2 (R145.2)C189.1 (C189.1)Q1.GATE (Q1.1)

BASE_PER_1V5U4.VOUT (U4.5)C37.1 (C37.1)C31.1 (C31.1)C30.1 (C30.1)C33.1 (C33.1)J15.1.5V_1 (J15.6)J15.1.5V_2 (J15.28)J15.1.5V_3 (J15.48)

BASE_PER_1V8C74.1 (C74.1)U17.VOUT (U17.5)C29.1 (C29.1)R7.1 (R7.1)R20.1 (R20.1)J19.VCC_1V8 (J19.5)J19.VCC_1V8 (J19.7)J19.VCC_1V8 (J19.54)J19.VCC_1V8 (J19.56)U15.VCCA (U15.1)U15.OE (U15.8)U16.VCCB (U16.13)C157.1 (C157.1)U14.VCC (U14.5)C71.1 (C71.1)C76.1 (C76.1)C73.1 (C73.1)C2.1 (C2.1)J3.2 (J3.2)R98.1 (R98.1)R96.1 (R96.1)R87.1 (R87.1)FB7.1 (FB7.1)R94.1 (R94.1)R100.1 (R100.1)C127.1 (C127.1)

BASE_PER_3V3C75.1 (C75.1)R11.2 (R11.2)R66.2 (R66.2)U4.VIN (U4.1)U4.EN (U4.3)R144.1 (R144.1)C28.1 (C28.1)C186.1 (C186.1)D15.ANODE1 (D15.1)C42.1 (C42.1)U3.A2 (U3.3)U3.VCC (U3.8)U17.VIN (U17.1)U17.EN (U17.3)R74.2 (R74.2)R56.2 (R56.2)Q2.D (Q2.5)Q2.D (Q2.6)Q2.D (Q2.7)Q2.D (Q2.8)R115.2 (R115.2)U13.VCC (U13.3)R90.1 (R90.1)C12.1 (C12.1)C181.1 (C181.1)C66.1 (C66.1)Q4.VIi (Q4.4)D18.A5 (D18.5)R107.1 (R107.1)D17.A5 (D17.5)U1.VDD (U1.6)C13.1 (C13.1)R125.1 (R125.1)J19.VCC_3V3 (J19.1)J19.VCC_3V3 (J19.3)J19.VCC_3V3 (J19.58)J19.VCC_3V3 (J19.60)U15.VCCB (U15.14)C184.1 (C184.1)R73.1 (R73.1)U16.DIR2 (U16.16)U16.DIR1 (U16.15)U16.VCCA (U16.14)J13.2 (J13.2)J13.4 (J13.4)C72.1 (C72.1)U32.VCC (U32.10)C70.1 (C70.1)C77.1 (C77.1)R78.2 (R78.2)U11.VDD33 (U11.4)C44.2 (C44.2)R80.2 (R80.2)C58.2 (C58.2)FB5.1 (FB5.1)U33.VCC (U33.5)R77.2 (R77.2)R79.2 (R79.2)C65.1 (C65.1)U12.VCC (U12.5)U12.B0 (U12.3)C4.1 (C4.1)FB3.1 (FB3.1)C3.1 (C3.1)C40.1 (C40.1)C1.1 (C1.1)J15.+3.3Vaux1 (J15.39)J15.+3.3Vaux2 (J15.41)J15.3.3V_1 (J15.2)J15.+3.3Vaux (J15.24)J15.3.3V_2 (J15.52)C34.1 (C34.1)C32.1 (C32.1)R30.1 (R30.1)R19.1 (R19.1)U23.VCCA (U23.1)U23.2DIR (U23.3)U5.VCC (U5.16)C35.1 (C35.1)R64.1 (R64.1)R24.1 (R24.1)C122.1 (C122.1)R25.1 (R25.1)R26.1 (R26.1)C123.1 (C123.1)R27.1 (R27.1)R43.1 (R43.1)R5.1 (R5.1)C9.1 (C9.1)C161.1 (C161.1)R123.1 (R123.1)R122.2 (R122.2)J11.5 (J11.5)U30.EN (U30.A2)U30.Vin (U30.B2)R6.1 (R6.1)R93.1 (R93.1)C22.1 (C22.1)R113.2 (R113.2)C98.1 (C98.1)R112.1 (R112.1)C23.1 (C23.1)R88.1 (R88.1)R104.1 (R104.1)U2.VDD2 (U2.16)U2.VDD3 (U2.20)U2.VDD1 (U2.11)J22.1 (J22.1)U21.VDD (U21.12)R105.2 (R105.2)C10.1 (C10.1)C131.1 (C131.1)R102.1 (R102.1)R117.1 (R117.1)J30.1 (J30.1)J30.2 (J30.2)R33.1 (R33.1)R14.2

document carrier symphony-board - variscite...revision history 1.5 1.2a disconnected r129 added...

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