![Page 1: Atanasoff’s Computer — its impact to the present Information Technology Tokyo Metropolitan University Chikara Fukunaga 04.09.20091 Japan-Bulgaria Mathematics](https://reader030.vdocuments.net/reader030/viewer/2022032803/56649e365503460f94b2621b/html5/thumbnails/1.jpg)
Atanasoff’s Computer— its impact to the present Information Technology
Tokyo Metropolitan UniversityChikara Fukunaga
04.09.2009 1
Japa
n-Bu
lgar
ia M
athe
mat
ics
Mee
ting
![Page 2: Atanasoff’s Computer — its impact to the present Information Technology Tokyo Metropolitan University Chikara Fukunaga 04.09.20091 Japan-Bulgaria Mathematics](https://reader030.vdocuments.net/reader030/viewer/2022032803/56649e365503460f94b2621b/html5/thumbnails/2.jpg)
Contents
• Overview of Atanasoff’s computer• Algorithm used in the computer• Logical circuits with vacuum tubes• Performance• Summary• Historical position of the computer
04.09.2009
Japa
n-Bu
lgar
ia M
athe
mat
ics
Mee
ting
2
![Page 3: Atanasoff’s Computer — its impact to the present Information Technology Tokyo Metropolitan University Chikara Fukunaga 04.09.20091 Japan-Bulgaria Mathematics](https://reader030.vdocuments.net/reader030/viewer/2022032803/56649e365503460f94b2621b/html5/thumbnails/3.jpg)
Atanasoff’s computer• John Vincent Atanasoff and Cliff Berry developed a computing
machine (Atanasoff & Berry Computer; ABC) to solve linear simultaneous algebraic equations with max. 29 unknowns at Iowa State University in 1940
• Although the machine was for the specific purpose, was neither stored-program architecture nor universal, it is regarded now as the origin of the digital (electric) computer. He was regarded as an inventor of it
• We try to clarify the above reasons through this talk
04.09.2009
Japa
n-Bu
lgar
ia M
athe
mat
ics
Mee
ting
3
Джон Винсент Атанасов (1903-1995)
His father was an immigrant from Bulgaria
![Page 4: Atanasoff’s Computer — its impact to the present Information Technology Tokyo Metropolitan University Chikara Fukunaga 04.09.20091 Japan-Bulgaria Mathematics](https://reader030.vdocuments.net/reader030/viewer/2022032803/56649e365503460f94b2621b/html5/thumbnails/4.jpg)
Principal structure of Atanasoff’s computer
04.09.2009
Japa
n-Bu
lgar
ia M
athe
mat
ics
Mee
ting
4
![Page 5: Atanasoff’s Computer — its impact to the present Information Technology Tokyo Metropolitan University Chikara Fukunaga 04.09.20091 Japan-Bulgaria Mathematics](https://reader030.vdocuments.net/reader030/viewer/2022032803/56649e365503460f94b2621b/html5/thumbnails/5.jpg)
Synchronization and Control Scheme• Synchronization has been achieved by a purely mechanical way :
electric motor (900rpm) + worm gear (15:1) system
04.09.2009
Japa
n-Bu
lgar
ia M
athe
mat
ics
Mee
ting
5
![Page 6: Atanasoff’s Computer — its impact to the present Information Technology Tokyo Metropolitan University Chikara Fukunaga 04.09.20091 Japan-Bulgaria Mathematics](https://reader030.vdocuments.net/reader030/viewer/2022032803/56649e365503460f94b2621b/html5/thumbnails/6.jpg)
Atanasoff’s Algorithm• Forward part – elimination of coefficients of x1 to xn one by one
• With max. 28 pairs (for j=2…29), number of unknowns reduced to 28, and 27,26, … finally we get value of Xn
• Backward substitution using the same algorithm used in forward part
04.09.2009
Japa
n-Bu
lgar
ia M
athe
mat
ics
Mee
ting
6….. x1
![Page 7: Atanasoff’s Computer — its impact to the present Information Technology Tokyo Metropolitan University Chikara Fukunaga 04.09.20091 Japan-Bulgaria Mathematics](https://reader030.vdocuments.net/reader030/viewer/2022032803/56649e365503460f94b2621b/html5/thumbnails/7.jpg)
• aij=aik –
(akk/akj)aij is the principle calculation for both forward and backward
• Atanasoff tried to make (akk/akj) with only addition and subtraction
Algorithm 2 update of aij
04.09.2009
Japa
n-Bu
lgar
ia M
athe
mat
ics
Mee
ting
7
akj,j=k..n+1 to Keyboard drumaij,j=k..n+1 to Counter drum
![Page 8: Atanasoff’s Computer — its impact to the present Information Technology Tokyo Metropolitan University Chikara Fukunaga 04.09.20091 Japan-Bulgaria Mathematics](https://reader030.vdocuments.net/reader030/viewer/2022032803/56649e365503460f94b2621b/html5/thumbnails/8.jpg)
Logical circuit for arithmetic calculation
Atanasoff newly – Introduced logical operation for Arithmetic calculation – devised the following logical table for full adder and subtractor
before the switching theory was born– And realized this logic
in a circuit with vacuum tubes (tri-poles) and resistors network
– Eventually established the base of present digital computer system
04.09.2009
Japa
n-Bu
lgar
ia M
athe
mat
ics
Mee
ting
8
InputAdder Output
Subtractor Output
A B Carry X Carry X Carry
0 0 0 0 0 0 0
0 0 1 1 0 1 1
0 1 0 1 0 1 1
0 1 1 0 1 0 1
1 0 0 1 0 1 0
1 0 1 0 1 0 0
1 1 0 0 1 0 0
1 1 1 1 1 1 1
Truth Table for 1bit full adder/subtractor
![Page 9: Atanasoff’s Computer — its impact to the present Information Technology Tokyo Metropolitan University Chikara Fukunaga 04.09.20091 Japan-Bulgaria Mathematics](https://reader030.vdocuments.net/reader030/viewer/2022032803/56649e365503460f94b2621b/html5/thumbnails/9.jpg)
Logical circuits with vacuum tubes
• A combination circuit can be constructed with three logical components NOT, NAND and NOR.
• NOT, NAND and NOR can be realized with a resisters network and one tri-pole tube.
04.09.2009
Japa
n-Bu
lgar
ia M
athe
mat
ics
Mee
ting
9
High voltage
ON
~0 V (ground)Low VoltageLow voltage
OFF
~+Vplate
High Voltage
![Page 10: Atanasoff’s Computer — its impact to the present Information Technology Tokyo Metropolitan University Chikara Fukunaga 04.09.20091 Japan-Bulgaria Mathematics](https://reader030.vdocuments.net/reader030/viewer/2022032803/56649e365503460f94b2621b/html5/thumbnails/10.jpg)
• We can construct the Adder output with combination of NOT,NAND and NOR
• Atanasoff established in this waylogic circuits of full adder/subtractor
Adder output from NOT,NAND and NOR
04.09.2009
Japa
n-Bu
lgar
ia M
athe
mat
ics
Mee
ting
10
InputAdder Output
Subtractor Output
A B Carry X Carry X Carry
0 0 0 0 0 0 0
0 0 1 1 0 1 1
0 1 0 1 0 1 1
0 1 1 0 1 0 1
1 0 0 1 0 1 0
1 0 1 0 1 0 0
1 1 0 0 1 0 0
1 1 1 1 1 1 1
![Page 11: Atanasoff’s Computer — its impact to the present Information Technology Tokyo Metropolitan University Chikara Fukunaga 04.09.20091 Japan-Bulgaria Mathematics](https://reader030.vdocuments.net/reader030/viewer/2022032803/56649e365503460f94b2621b/html5/thumbnails/11.jpg)
• Computing time estimation fromA.R.Burks and A.W.Burks “The First Electronic Computer: The Atanasoff Story”, 1988, Univ. Michigan
• Anatasoff estimated time=n3/64 hours if we used a table calculator of that time (1940), and it was 380 hours with n=29
Performance
04.09.2009
Japa
n-Bu
lgar
ia M
athe
mat
ics
Mee
ting
11
![Page 12: Atanasoff’s Computer — its impact to the present Information Technology Tokyo Metropolitan University Chikara Fukunaga 04.09.20091 Japan-Bulgaria Mathematics](https://reader030.vdocuments.net/reader030/viewer/2022032803/56649e365503460f94b2621b/html5/thumbnails/12.jpg)
Summary: What did Atanasoff established
• Digital electric computation– abandoned to use (old fashioned) analogue computers– brought “digital computation” into the calculation machine system
• Electric switching– used a vacuum tube as a simple on/off switch– implemented Boolean logic (truth table) calculation with vacuum tube
circuits• Memory
– Separated memory from arithmetic operation unit (new architecture)– Chose capacitor as the memory element, and refresh system ( DRAM)– developed Rotary drum memory
( magnetic drum, hard disk)• Sequential control system
– Introduced sequential and synchronization concept for machine control04.09.2009
Japa
n-Bu
lgar
ia M
athe
mat
ics
Mee
ting
12
![Page 13: Atanasoff’s Computer — its impact to the present Information Technology Tokyo Metropolitan University Chikara Fukunaga 04.09.20091 Japan-Bulgaria Mathematics](https://reader030.vdocuments.net/reader030/viewer/2022032803/56649e365503460f94b2621b/html5/thumbnails/13.jpg)
Historical position of Atanasoff’s computer
04.09.2009
Japa
n-Bu
lgar
ia M
athe
mat
ics
Mee
ting
13
![Page 14: Atanasoff’s Computer — its impact to the present Information Technology Tokyo Metropolitan University Chikara Fukunaga 04.09.20091 Japan-Bulgaria Mathematics](https://reader030.vdocuments.net/reader030/viewer/2022032803/56649e365503460f94b2621b/html5/thumbnails/14.jpg)
Computer programming
Japa
n-Bu
lgar
ia M
athe
mat
ics
Mee
ting
Programming sequence of a computer program will be expressed as follows ;– It usually consists of
• Sequential operation• Condition Jump (Branch)• Loop (repetition)
For carrying out such a complicated script, we need various hardware components for a computer– Memory (to store program,
variables and constants )– Arithmetic and Logical Operation Unit– Registers for Arith./Logic Unit and status– Control system
04.09.2009 14
Follow up 1
![Page 15: Atanasoff’s Computer — its impact to the present Information Technology Tokyo Metropolitan University Chikara Fukunaga 04.09.20091 Japan-Bulgaria Mathematics](https://reader030.vdocuments.net/reader030/viewer/2022032803/56649e365503460f94b2621b/html5/thumbnails/15.jpg)
Basic hardware structure of a processor
• A typical (simplest) structure will be depicted as
04.09.2009
Japa
n-Bu
lgar
ia M
athe
mat
ics
Mee
ting
15
Follow up 2
![Page 16: Atanasoff’s Computer — its impact to the present Information Technology Tokyo Metropolitan University Chikara Fukunaga 04.09.20091 Japan-Bulgaria Mathematics](https://reader030.vdocuments.net/reader030/viewer/2022032803/56649e365503460f94b2621b/html5/thumbnails/16.jpg)
von Neumann architecture (1945)
The following conditions are required to be fulfilled in if a machine is regarded as a modern (universal) computer : – Memory access through the address (linear address)– Stored program architecture
• program and data are stored in mix in memory– Program logic dependency
• No distinction between program instructions and data in memory
• Distinction can be made only by the concerned program• If the logic in program is intentionally setup so, the
program can also modify instructions like data– Sequential instruction execution
• A register holds the address of the next instruction to be executed. Instructions are done one by one sequentially
04.09.2009
Japa
n-Bu
lgar
ia M
athe
mat
ics
Mee
ting
16
Follow up 3