Fundamentals of Power Electronics 1 Chapter 10: Input Filter Design
Chapter 10Input Filter Design
10.1 Introduction10.1.1 Conducted EMI10.1.2 The Input Filter Design Problem
10.2 Effect of an Input Filter on Converter Transfer Functions10.2.1 Discussion10.2.2 Impedance Inequalities
10.3 Buck Converter Example10.3.1 Effect of Undamped Input Filter10.3.2 Damping the Input Filter
10.4 Design of a Damped Input Filter10.4.1 Rf–Cb Parallel Damping10.4.2 Rf–Lb Parallel Damping10.4.3 Rf–Lb Series Damping10.4.4 Cascading Filter Sections10.4.5 Example: Two Stage Input Filter
10.5 Summary of Key Points
Fundamentals of Power Electronics 2 Chapter 10: Input Filter Design
10.1.1 Conducted Electromagnetic Interference(EMI)
+– C R
+
v
–
Liig 1
2vg(t)
t
ig(t)
DTs Ts
00
0
i i
Buck converter exampleInput current ig(t) is pulsating:
ig(t) = DI + 2Ikπ sin kπD cos kωtΣ
k = 1
∞Approximate Fourier series of ig(t):
High frequency current harmonics of substantial amplitude are injectedback into vg(t) source. These harmonics can interfere with operation ofnearby equipment. Regulations limit their amplitude, typically to valuesof 10 µA to 100 µA.
Fundamentals of Power Electronics 3 Chapter 10: Input Filter Design
Addition of Low-Pass Filter
+– C R
+
v
–
Liig 1
2
iinLf
Cf
Input filter
vg(t)
t
ig(t)
DTs Ts
00
0
iin(t)
iin(t) = H(0)DI + H(kjω) 2Ikπ sin kπD cos kωt + ∠H(kjω)Σ
k = 1
∞
Magnitudes and phases of input current harmonics are modified byinput filter transfer function H(s):
The input filter may be required to attenuate the current harmonics byfactors of 80 dB or more.
Fundamentals of Power Electronics 4 Chapter 10: Input Filter Design
Electromagnetic Compatibility
Ability of the device (e.g. power supply) to:function satisfactorily in its electromagnetic environment
(susceptibility or immunity aspect)
without introducing intolerable electromagnetic disturbances (emissionaspect)
EMC
Emission Susceptibility
ConductedRadiated
Harmonics EMI
ConductedRadiated Electrostatic
Discharge
Fundamentals of Power Electronics 5 Chapter 10: Input Filter Design
Conducted EMI
Sample of EMC regulations that include limits on radio-frequency emissions:
European Community Directive on EMC: Euro-Norm EN 55022 or55081, earlier known as CISPR 22
National standards: VDE (German), FCC (US)
vac(t)
iac(t)+
–
C
i2(t)ig(t)
vg(t)
i(t)
load
+
v(t)
–
pload(t) = VI = Pload
Energy storagecapacitor
vC(t)
+
–
DC/DCconverter
EMIfilter
AC line source
RegulatedDC output
AC/DC rectifier
Spectrumanalyzer Test result: spectrum of the voltage across a standard impedance in the LISN
LISN
“Earth” ground
Fundamentals of Power Electronics 6 Chapter 10: Input Filter Design
LISN
C1
C1
CN
CN
RN
RN
Me
asu
rem
en
t p
oin
ts
50Ω
50ΩAC
lin
e s
ou
rce
De
vice
un
de
r te
st
0.1µF
0.1µF
L1
L1
R1
R1
1µF
1µF
50µH
50µH5Ω
5Ω • LISN: “Line ImpedanceStabilization Network,” or“artificial mains network”
• Purpose: to standardizeimpedance of the power sourceused to supply the device undertest
• Spectrum of conductedemissions is measured acrossthe standard impedance (50Ωabove 150kHz)
LISN example
Fundamentals of Power Electronics 7 Chapter 10: Input Filter Design
An Example of EMI Limits
• Frequency range:150kHz-30MHz
• Class B: residentialenvironment
• Quasi-peak/Average: twodifferent setups of themeasurement device(such as narrow-bandvoltmeter or spectrumanalyzer)
• Measurement bandwidth:9kHz
100 kHz 1 MHz
70 dBµV
60 dBµV
50 dBµV
40 dBµV10 MHz 100 MHz
100µV
200µV
316µV
631µV
1mVQuasi-peak
Average
EN 55022 Class B limits
Fundamentals of Power Electronics 8 Chapter 10: Input Filter Design
Differential and Common-Mode EMI
• Differential mode EMI : input current waveform of the PFC. Differential-modenoise depends on the PFC realization and circuit parameters.
• Common-mode EMI : currents through parasitic capacitances between highdv/dt points and earth ground (such as from transistor drain to transistor heatsink). Common-mode noise depends on: dv/dt, circuit and mechanical layout.
vac(t)
iac(t)+
–
C
i2(t)ig(t)
vg(t)
i(t)
load
+
v(t)
–
pload(t) = VI = Pload
vC(t)
+
–
DC/DCconverter
EMIfilter
AC line source
RegulatedDC outputAC/DC rectifier
Spectrumanalyzer Test result: spectrum of the voltage across a standard impedance in the LISN
LISN
“Earth” ground
Differential-mode EMI currentsCommon-mode EMI currents
Fundamentals of Power Electronics 9 Chapter 10: Input Filter Design
10.1.2 The Input Filter Design Problem
A typical design approach:
1. Engineer designs switching regulator that meets specifications(stability, transient response, output impedance, etc.). Inperforming this design, a basic converter model is employed, suchas the one below:
+–
L
C R
+–1 : D
+
–
Converter model
Vgd
I d
i
vvg
d
(no input filter)
(buckconverterexample)
Fundamentals of Power Electronics 10 Chapter 10: Input Filter Design
Input Filter Design Problem, p. 2
2. Later, the problem of conducted EMI is addressed. An input filter isadded, that attenuates harmonics sufficiently to meet regulations.
3. A new problem arises: the controller no longer meets dynamicresponse specifications. The controller may even become unstable.
Reason: input filter changes converter transfer functions
+–
L
C R
+–1 : D
+
–
Converter model
Vgd
I d
i
vvg
d
Lf
Input filter
Cf
Converterac model ismodified byinput filter
Fundamentals of Power Electronics 11 Chapter 10: Input Filter Design
Input Filter Design Problem, p. 3
f
|| Gvd || ∠ Gvd
0˚
– 360˚
– 540˚
0 dB
– 10 dB
20 dB
30 dB
100 Hz
40 dB
1 kHz 10 kHz
– 180˚
10 dB
|| Gvd ||
∠ Gvd
Effect of L-C inputfilter on control-to-output transferfunction Gvd (s),buck converterexample.
Dashed lines:original magnitudeand phase
Solid lines: withaddition of inputfilter
Fundamentals of Power Electronics 12 Chapter 10: Input Filter Design
10.2 Effect of an Input Filteron Converter Transfer Functions
+–
Inputfilter
Converter
T(s)
Controller
vg
Zo(s) Zi(s)
H(s)
d
v
Gvd(s) =v(s)d (s)
vg(s) = 0
Control-to-output transfer function is
Fundamentals of Power Electronics 13 Chapter 10: Input Filter Design
Gvd(s) = Gvd(s)Zo(s) = 0
1 +Zo(s)ZN(s)
1 +Zo(s)ZD(s)
Determination of Gvd(s)
Converter
d
v
Zo(s)Gvd(s)
Gvd(s) =v(s)d (s)
vg(s) = 0
Zo(s) = output impedance ofinput filter
vg(s) source short circuit
We will use Middlebrook’s Extra Element Theorem to show that the inputfilter modifies Gvd (s) as follows:
Fundamentals of Power Electronics 14 Chapter 10: Input Filter Design
How an input filter changes Gvd(s)Summary of result
Gvd(s) = Gvd(s)Zo(s) = 0
1 +Zo(s)ZN(s)
1 +Zo(s)ZD(s)
Gvd(s)Zo(s) = 0 is the original transfer function, before addition of input filter
ZD(s) = Zi(s)d(s) = 0
is the converter input impedance, with d set to zero
ZN(s) = Zi(s)v(s) o 0 is the converter input impedance, with the output v
nulled to zero
(see Appendix C for proof using EET)
Fundamentals of Power Electronics 15 Chapter 10: Input Filter Design
Design criteria for basic converters
Table 10.1 Input filter design criteria for basic converters
Converter ZN(s) ZD(s) Ze(s)
Buck
Boost
Buck–boost
– RD2 R
D2
1 + s LR + s2LC
1 + sRC
sLD2
– D′ 2R 1 – sLD′ 2R D′ 2R
1 + s LD′ 2R
+ s2 LCD′ 2
1 + sRC
sL
– D′ 2RD2 1 – sDL
D′ 2RD′ 2RD2
1 + s LD′ 2R
+ s2 LCD′ 2
1 + sRC
sLD2
Fundamentals of Power Electronics 16 Chapter 10: Input Filter Design
10.2.2 Impedance Inequalities
Gvd(s) = Gvd(s)Zo(s) = 0
1 +Zo(s)ZN(s)
1 +Zo(s)ZD(s)
The correction factor
Zo < ZN , and
Zo < ZD
1 +Zo(s)ZN(s)
1 +Zo(s)ZD(s)
shows how the input filter modifies thetransfer function Gvd (s).
The correction factor has a magnitude of approximately unity providedthat the following inequalities are satisfied:
These provide design criteria, which are relatively easy to apply.
Fundamentals of Power Electronics 17 Chapter 10: Input Filter Design
Effect of input filter on converter outputimpedance
Zo < Ze , and
Zo < ZD
A similar analysis leads to the following inequalities, which guaranteethat the converter output impedance is not substantially affected by theinput filter:
The quantity Ze is given by:
Ze = Ziv = 0
(converter input impedance when the output is shorted)
Fundamentals of Power Electronics 18 Chapter 10: Input Filter Design
10.2.1 Discussion
ZN(s) = Zi(s)v(s) o 0 is the converter input impedance, with the output v
nulled to zero
+–
Inputfilter
Converter
T(s)
Controller
vg
Zo(s) Zi(s)
H(s)
d
v
Note that this is the same as the function performed by an idealcontroller, which varies the duty cycle as necessary to maintain zeroerror of the output voltage. So ZN coincides with the input impedancewhen an ideal feedback loop perfectly regulates the output voltage.
Fundamentals of Power Electronics 19 Chapter 10: Input Filter Design
When the output voltage is perfectly regulated
+–
+–
vg(t) Ts
ig(t) Ts
Pload
Closed-loopvoltage regulator
R
+
V
–
• For a given loadcharacteristic, the outputpower Pload is independent ofthe converter input voltage
• If losses are negligible, thenthe input port i-vcharacteristic is a power sinkcharacteristic, equal to Pload:
Quiescentoperating
point
vg(t) Ts
ig(t) Ts
vg(t) Tsig(t) Ts
= Pload
slope = –Ig
Vg= – M 2
R
Vg
Ig
vg(t) Tsig(t) Ts
= Pload
• Incremental input resistanceis negative, and is equal to:
– RM 2
(same as dc asymptote of ZN)
Fundamentals of Power Electronics 20 Chapter 10: Input Filter Design
Negative resistance oscillator
1Zi(s)
= 1ZN(s)
T(s)1 + T(s)
+ 1ZD(s)
11 + T(s)
It can be shown that the closed-loop converter input impedance isgiven by:
where T(s) is the converter loop gain.
At frequencies below the loop crossover frequency, the inputimpedance is approximately equal to ZN, which is a negativeresistance.
When an undamped or lightly damped input filter is connected to theregulator input port, the input filter can interact with ZN to form anegative resistance oscillator.
Fundamentals of Power Electronics 21 Chapter 10: Input Filter Design
10.3 Buck Converter Example10.3.1 Effect of undamped input filter
+–
C R
+
v
–
L i1
2Vg
Lf
Cf
Input filter Converter
30 V
330 µH
470 µF
100 µH
100 µF 3 Ω
D = 0.5
+–
L
C R
+–1 : D
+
–
Converter model
Vgd
I d
i
vvg
d
Lf
Input filter
Cf
Zo(s) Zi(s)
330 µH
470 µF
100 µH
100 µF 3 Ω
Buck converterwith input filter
Small-signal model
Fundamentals of Power Electronics 22 Chapter 10: Input Filter Design
Determination of ZD
L
C R
1 : D
+
–
i
v
ZD(s)
ZD(s) = 1D2 sL + R || 1
sC
100 Hz 1 kHz 10 kHz
40 dBΩ
0 dBΩ
20 dBΩ || ZN ||
|| ZD ||
f
RD2 = 12 Ω
f1 = 12πRC
530 Hz
fo = 12π LC
1.59 kHz
Q = R CL =
fof1
= 3 → 9.5 dB
1ωD2C
ωLD2
10 dBΩ
30 dBΩ
R0/D2
Fundamentals of Power Electronics 23 Chapter 10: Input Filter Design
Determination of ZN
L
C R
+–1 : D
+
–
Vgd
I d
i o 0
v o 0
d
ZN(s)
+
–
vs o 0itest vtest
+
–
ZN(s) =vtest(s)i test(s)
v o 0
i test(s) = Id (s)
vtest(s) = –Vgd (s)
D
ZN(s) =–
Vgd (s)D
Id (s)= – R
D2
Solution: Hence,
Fundamentals of Power Electronics 24 Chapter 10: Input Filter Design
Zo of undamped input filter
Lf
Cf
Zo(s)
Zo(s) = sL f || 1sC f
100 Hz 1 kHz
40 dBΩ
0 dBΩ
– 20 dBΩ
20 dBΩ
f
|| Zo ||
– 10 dBΩ
10 dBΩ
30 dBΩ
1ωC f
ωL f
ff = 12π L fC f
= 400 Hz
Q f → ∞
R0 f =L f
C f= 0.84 Ω
No resistance, hence poles are undamped (infinite Q-factor).
In practice, losses limit Q-factor; nonetheless, Qf may be very large.
Fundamentals of Power Electronics 25 Chapter 10: Input Filter Design
Design criteria
100 Hz 1 kHz 10 kHz
40 dBΩ
0 dBΩ
– 20 dBΩ
20 dBΩ || ZN ||
|| ZD ||
f
|| Zo ||
ωL f 1ωC f
12 Ω
Q f → ∞
1ωD2C
fo = 1.59 kHz
f1 = 530 Hz
Q = 3
ωLD2
R0f
10 dBΩ
30 dBΩ
– 10 dBΩ ff = 400 Hz
R0/D2
Zo < ZN , and
Zo < ZD
Can meetinequalitieseverywhereexcept atresonantfrequency ff.
Need to dampinput filter!
Fundamentals of Power Electronics 26 Chapter 10: Input Filter Design
Resulting correction factor
f
0˚
– 360˚
0 dB
– 10 dB
100 Hz 1 kHz 10 kHz
– 180˚
10 dB
∠1 +
Zo
ZN
1 +Zo
ZD
1 +Zo
ZN
1 +Zo
ZD
Fundamentals of Power Electronics 27 Chapter 10: Input Filter Design
Resulting transfer function
f
|| Gvd || ∠ Gvd
0˚
– 360˚
– 540˚
0 dB
– 10 dB
20 dB
30 dB
100 Hz
40 dB
1 kHz 10 kHz
– 180˚
10 dB
|| Gvd ||
∠ Gvd
Dashed lines: noinput filter
Solid lines:including effect ofinput filter
Fundamentals of Power Electronics 28 Chapter 10: Input Filter Design
10.3.2 Damping the input filter
Lf
Cf
Zo(s)
Undamped filter:
Lf
Cf Rf
Lf
Cf
Rf
Two possible approaches:
Fundamentals of Power Electronics 29 Chapter 10: Input Filter Design
Addition of Rf across Cf
Lf
Cf Rf
To meet the requirement Rf < || ZN ||:
R f <
RD2
The power loss in Rf is Vg2/ Rf,
which is larger than the load power!
Cb
Lf
Cf
Rf
A solution: add dc blockingcapacitor Cb.
Choose Cb so that its impedance issufficiently smaller than Rf at thefilter resonant frequency.
Fundamentals of Power Electronics 30 Chapter 10: Input Filter Design
Damped input filter
1ωC f
ωL fff
Rf
R0f
Cb
Lf
Cf
Rf
|| Zo ||, with large Cb
Fundamentals of Power Electronics 31 Chapter 10: Input Filter Design
Design criteria, with damped input filter
100 Hz 1 kHz 10 kHz
40 dBΩ
0 dBΩ
– 20 dBΩ
20 dBΩ || ZN ||
|| ZD ||
f
|| Zo ||
ωL f 1ωC f
12 Ω
1ωD2C
fo = 1.59 kHzf1 = 530 Hz
Q = 3
ωLD2
R0f
10 dBΩ
30 dBΩ
– 10 dBΩ ff = 400 Hz
Rf = 1 Ω
R0/D2
Fundamentals of Power Electronics 32 Chapter 10: Input Filter Design
Resulting transfer function
f
|| Gvd || ∠ Gvd
0˚0 dB
– 10 dB
20 dB
30 dB
100 Hz
40 dB
1 kHz 10 kHz– 180˚
10 dB
|| Gvd ||
∠ Gvd
– 90˚
Dashed lines: noinput filter
Solid lines:including effect ofinput filter
Fundamentals of Power Electronics 33 Chapter 10: Input Filter Design
10.4 Design of a Damped Input Filter
+–v1
+
v2
–
Cb
Rf
Cf
Lf
+–v1
+
v2
–
LbRf
Cf
Lf
+–v1
+
v2
–
Lb
Rf
Cf
Lf
Rf –Lb Parallel Damping
Rf –Lb Series DampingRf –Cb Parallel Damping
• Size of Cb or Lb can becomevery large
• Need to optimize design
Fundamentals of Power Electronics 34 Chapter 10: Input Filter Design
Dependence of || Zo || on Rf
Rf ÐLb Parallel Damping
-30 dB
-20 dB
-10 dB
0 dB
10 dB
20 dB
30 dB
0.1 1 10
Original undampedfilter (Qf = ∞)
Undampedfilter (Qf = 0)
Optimal damping(Qopt = 0.93)
Suboptimal damping(Qf = 0.2Qopt )
Suboptimal damping(Qf = 5Qopt )
Zo
R0 f
ffo
For thisexample,n = Lb/L = 0.516
Fundamentals of Power Electronics 35 Chapter 10: Input Filter Design
10.4.1 RfÐCb Parallel Damping
+–v1
+
v2
–
Cb
Rf
Cf
Lf
• Filter is damped by Rf
• Cb blocks dc current fromflowing through Rf
• Cb can be large in value,and is an element to beoptimized
Fundamentals of Power Electronics 36 Chapter 10: Input Filter Design
Optimal design equations Rf ÐCb Parallel Damping
n =Cb
C fDefine
The value of the peak output impedance for the optimum design is
Zo mm= R0 f
2 2 + nn
where R0f = characteristic impedanceof original undamped input filter
Given a desired value of the peak output impedance, can solve aboveequation for n. The required value of damping resistance Rf can then befound from:
Qopt =R f
R0 f
=2 + n 4 + 3n
2n2 4 + n
The peak occurs at the frequency
fm = ff2
2 + n
Fundamentals of Power Electronics 37 Chapter 10: Input Filter Design
ExampleBuck converter of Section 10.3.2
n =R0 f
2
Zo mm2 1 + 1 + 4
Zo mm2
R0 f2 = 2.5 R f = R0 f
2 + n 4 + 3n
2n2 4 + n= 0.67 Ω
100 Hz 1 kHz 10 kHz
0 dBΩ
– 20 dBΩ
20 dBΩ
f
|| Zo ||10 dBΩ
– 10 dBΩ
– 30 dBΩ
Undamped
OptimaldampingCb = 1200 µFRf = 0.67 Ω
SuboptimaldampingCb = 4700 µFRf = 1 Ω
Comparison of designs
Optimal dampingachieves same peakoutput impedance, withmuch smaller Cb.
Fundamentals of Power Electronics 38 Chapter 10: Input Filter Design
SummaryOptimal R-Cd damping
Basic results
with
R0 = LC
• Does not degrade HF attenuation• No limit on || Z ||mm
• Cd is typically larger than C
+–
L
Cv1
+
v2
–
Cd
R
Qopt = R
R0=
2 + n 4 + 3n
2n2 4 + n
Zmm
R0=
2 2 + nn
n =Cd
C
0.1
1
10
100
0.1 1 10
n =CdC
Zo mmRo
Fundamentals of Power Electronics 39 Chapter 10: Input Filter Design
Optimal R-Ld damping+–
L
Cv1
+
v2
–
LdR
-30 dB
-20 dB
-10 dB
0 dB
10 dB
20 dB
30 dB
0.1 1 10
Original undampedfilter (Q = ∞)
ff0
Z mmR0
Undampedfilter (Q = 0)
Optimal damping(Qopt = 0.93)
Suboptimal damping(Q = 0.2Qopt )
Suboptimal damping(Q = 5Qopt )
Qopt =
n 3 + 4n 1 + 2n
2 1 + 4n
Zmm
R0= 2n 1 + 2n
Qopt =optimum value of R
R0
Basic results
with
n =Ld
L R0 = L
C
Fundamentals of Power Electronics 40 Chapter 10: Input Filter Design
Discussion:Optimal R-Ld damping
-10 dB
0 dB
10 dB
20 dB
30 dB
0.1 1 10
Z mmR0
L dL
Degradation of HFfilter attenuation
LL||Ld
= 1 + 1n
• Ld is physically very small
• A simple low-cost approach todamping the input filter
• Disadvantage: Ld degrades high-frequency attenuation of filter, bythe factor
+–
L
Cv1
+
v2
–
LdR
• Basic tradeoff: peak outputimpedance vs. high-frequencyattenuation
• Example: the choice n = 1 (Ld = L)degrades the HF attenuation by 6dB, an leads to peak outputimpedance of Z mm = 6 R0
Fundamentals of Power Electronics 41 Chapter 10: Input Filter Design
Optimal R-Ldseries damping
Basic results
with
n =Ld
L
R0 = LC
+–
L
Cv1
+
v2
–
Ld
R
Qopt =
R0R = 1 + n
n2 1 + n 4 + n
2 + n 4 + 3n
Zmm
R0=
2 1 + n 2 + nn
• Does not degrade HF attenuation
• Ld must conduct entire dc current
• Peak output impedance cannot bereduced below 2 R0
1
10
100
0.1 1 10
n =
Z mmR0
L dL
Qopt
Fundamentals of Power Electronics 42 Chapter 10: Input Filter Design
10.4.4 Cascading Filter Sections
• Cascade connection of multiple L-C filter sections can achieve agiven high-frequency attenuation with much smaller volume andweight
• Need to damp each section of the filter
• One approach: add new filter section to an existing filter, using newdesign criteria
• Stagger-tuning of filter sections
Fundamentals of Power Electronics 43 Chapter 10: Input Filter Design
Addition of filter section
+–
Existingfilter
Additionalfilter
sectionZoZa
itestvgZi1
+
vtest
–
How the additional filter section changes the output impedance of theexisting filter:
modified Zo(s) = Zo(s)Za(s) = 0
1 +Za(s)
ZN1(s)
1 +Za(s)ZD1(s)
ZN1(s) = Zi1(s)vtest(s) o 0
ZD1(s) = Zi1(s)i test(s) = 0
Fundamentals of Power Electronics 44 Chapter 10: Input Filter Design
Design criteria
+–
Existingfilter
Additionalfilter
sectionZoZa
itestvgZi1
+
vtest
–
Za < ZN1 and
Za < ZD1
The presence of the additional filter section does not substantiallyalter the output impedance Zo of the existing filter provided that
ZN1(s) = Zi1(s)vtest(s) o 0
ZD1(s) = Zi1(s)i test(s) = 0
(with filter output port short-circuited)
(with filter output port open-circuited)
Fundamentals of Power Electronics 45 Chapter 10: Input Filter Design
10.4.5 ExampleTwo-Stage Input Filter
+–vg
L1
n1L1R1
C1
L2
n2L2R2
C2
Section 2 Section 1
Zo
Requirements: For the samebuck converter example,achieve the following:
• 80 dB of attenuation at 250 kHz
• Section 1 to satisfy Zoimpedance inequalities asbefore:
100 Hz 1 kHz 10 kHz
40 dBΩ
0 dBΩ
20 dBΩ || ZN ||
|| ZD ||
f
RD2 = 12 Ω
f1 = 12πRC
530 Hz
fo = 12π LC
1.59 kHz
Q = R CL =
fof1
= 3 → 9.5 dB
1ωD2C
ωLD2
10 dBΩ
30 dBΩ
R0/D2
Fundamentals of Power Electronics 46 Chapter 10: Input Filter Design
Section 2 impedance inequalities
To avoid disrupting the output impedance Zo of section 1, section 2should satisfy the following inequalities:
+–vg
L1
n1L1R1
C1
L2
n2L2R2
C2
Section 2 Section 1
Za itestZi1
+
vtest
–
Za < ZN1 = Zi1 output shorted= R1 + sn1L 1 ||sL 1
Za < ZD1 = Zi1 output open-circuited= 1
sC1+ R1 + sn1L 1 ||sL 1
Fundamentals of Power Electronics 47 Chapter 10: Input Filter Design
Plots of ZN1 and ZD1
1 kHz 10 kHz 100 kHz 1 MHz
–20 dBΩ
0 dBΩ
20 dBΩ
–90˚
–45˚
0˚
45˚
90˚
|| ZN1 ||
|| ZD1 ||
∠ZN1
|| Za ||
∠Za
∠ZD1
Fundamentals of Power Electronics 48 Chapter 10: Input Filter Design
Section 1 output impedance inequalities
-20 dBΩ
-10 dBΩ
0 dBΩ
10 dBΩ
20 dBΩ
1 kHz 10 kHz 100 kHz
Section 1alone
Cascadedsections 1 and 2
30 dBΩ
|| ZN |||| ZD ||
fo
Fundamentals of Power Electronics 49 Chapter 10: Input Filter Design
Resulting filter transfer function
1 kHz 10 kHz 100 kHz 1 MHz
-120 dB
-100 dB
-80 dB
-60 dB
-40 dB
-20 dB
0 dB
20 dB
|| H ||
– 80 dBat 250 kHz
f
Fundamentals of Power Electronics 50 Chapter 10: Input Filter Design
Comparison of single-section andtwo-section designs
+–vg
Cb
Rf
Cf
Lf
330 µH
470 µF
1200 µF
0.67 Ω
+–vg
L1
n1L1R1
C1
L2
n2L2R2
C2
6.9 µF
31.2 µH
15.6 µH1.9 Ω0.65 Ω 2.9 µH
5.8 µH
11.7 µF