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Chapter 6: Frequency Modulation Reception
EET-223: RF Communication Circuits
Walter Lara
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Basic FM Receiver
• Refer to Block Diagram at Fig 6-1
• Based on the superhetereodyne principle
• Similarities to AM Superheterodyne Receiver: – RF Amplifier: pre-amplifies RF signal (if required)
– Local Oscillator (LO): provides steady sine wave
– Mixer (aka first detector): mixes RF signal with LO sine wave to produce an RF signal at fixed/known frequency
– Intermediate Frequency (IF) Amplifier: provides bulk of RF amplification at fixed frequency (constant BW, avoiding variable-selectivity problem)
– Audio/Power Amplifier: amplify as need by speaker
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Basic FM Receiver – Cont’d
• Differences from AM Superheterodyne Receiver:
– AGC not needed on modern receivers with highly stable LO frequency
– Addition of Deemphasis Network
– Addition of Limiter (more later)
– Discriminator instead of Detector (more later)
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Figure 6-1 FM receiver block diagram.
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Limiters
• Outputs a constant amplitude as long as their input amplitude is above certain level (~1V)
• When input amplitude is large enough, limiting occurs: – Any variation in amplitude (such as noise) is suppressed
– AGC action (for free) because it provides constant input level to Discriminator
• Minimum required voltage for limiting is called quieting voltage (aka threshold voltage or limiting knee voltage)
• See example circuit at Fig 6-3 & 6-4
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Figure 6-3 Transistor limiting circuit.
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Figure 6-4 Limiter input/output and flywheel effects.
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Discriminators
• Extract the intelligence that has been modulated onto the carrier via frequency variations
• Provides an intelligence signal whose:
– Amplitude is dependent on instantaneous carrier frequency deviation
– Frequency is dependent on carrier’s rate of frequency deviation
• Desired output amplitude vs input frequency characteristic is shown in Fig 6-5
• Simplest circuit is Slope Detector shown in Fig 6-6
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Figure 6-5 FM discriminator characteristic.
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Figure 6-6 Slope detection.
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Phase-Locked Loop (PLL) Receiver
• Refer to block diagram in Fig 6-12
• Phase comparator compares input signal and output of VCO and generates error signal proportional to difference between the two
• Error signal drives VCO to change frequency so that the error is reduced to zero
• When VCO frequency equals input frequency, the PLL is locked and the control voltage stays constant until PLL input frequency changes again
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Phase-Locked Loop (PLL) Receiver – Cont’d
• If the PLL input frequency changes, the VCO starts to change frequency until its output is the same frequency as the input
• PLL has three states of operation: – Free-running: difference between fvco and fin is too large,
PLL cannot adjust to make fvco equal to fin , fvco defaults to a nominal frequency value
– Capture: fvco different from fin, but fvco is changing and approaching fin
– Locked or tracking: capture has happened, so fvco is equal to fin
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Figure 6-12 PLL block diagram.
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LM 565 PLL
• The LM 565 is an integrated VCO circuit that can be used to build a simple PLL receiver (see Fig 6-13)
• Formulas for component parameter calculations are provided by the manufacturer: – Free-Running Frequency:
f0 = 0.3 / (R0 C0 )
– Loop Gain:
K0 KD = (33.6 f0) / VC
– Hold-In Range (frequency band through which PLL will remain locked):
fH = ± (8 f0) / VC
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Figure 6-13 An example of an FM receiver using the LM565 PLL.
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Stereo Demodulation
• Refer to block diagram in Fig 6-15
• FM Stereo receiver are similar to standard (monophonic) up to discriminator output
• LPF used to extract L + R signal (30 Hz – 15 KHz)
• BPF used to extract L - R double side-band (DSB) signal (23 KHz – 53 KHz)
• BPF used to extract 19 KHz subcarrier
• AM Demodulator used to demodulate L - R signals
• Matrix & Deemphasis Network generates L & R audio signals (see Fig 6-16)
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Figure 6-15 Monophonic and stereo receivers.
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Figure 6-16 Stereo signal processing.