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Mr. KU CHENG FUI
Bsc Campbell University,
Msc Sunderland University
AACS2284 Operating Systems
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Lecturer Room No
A223
Consultation Hours
Tue : 2pm 4pmWed : 10am 11am
Thu : 3pm 5pm
Fri : 10am 11am
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AACS2284 Operating Systems
Level : Diploma Year 2
Lecture Hours : 2 hrs /week
Tutorial Hours : 1.5 hrs /week
Practical Hours : 2 hrs /week
Credit : 4
Assessment Mode : Examination 60%,
Coursework 20%,
Practical 20%
Tutors : Mr. Ku CF, Ms. Kher PS
Practical : Ms. Chin CL, Mr. Khoo LJ
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Syllabus of AACS2284 Operating Systems
Chapter 1: System S/W and H/W Technology
Chapter 2: Device Management
Chapter 3: Process Management
Chapter 4: DeadlockChapter 5: Memory Management
Chapter 6: Concurrent Processes
Chapter 7: File ManagementChapter 8: System Management
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The Objectives
To provide students basic knowledge andfoundation of the structures and mechanisms
of modern-day operating systems and an
understanding of the underlying concepts in
operating systems.
To provides students with the working
knowledge of the general structure and facility
of operating system commands hands-onpractical.
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Learning Outcome
Upon the completion of this unit, the student shouldbe able to
Understand the overview of operating systems and
different type of system computer software.
Describe how the processor, memory, I/O modules are
interconnected, describes the characteristic of
secondary storage devices and the computer
classification.
Understand the principles of I/O operations, the I/O-CPU
interface and device management.
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Understand how the CPU schedules the processes
and explain interrupts are generated and
resolved.
Describe the four conditions of deadlock and
identify the deadlock state by using deadlock
modeling.
Describe how the tasks are allocated into the
memory space.
Understand the file implementation and realize theimportance of keeping the system secure.
Use Operating system commands, interact write
simple scripts.
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Reading List for Operating Systems
1.Flynn.I.M, Understanding Operating System, 5th Edition.
Thomson Course technology
2. Gorma, Stubbs, CEP inc, Introduction to Operating System,
Thomson Course Technology.
3. Amir Afzal. 2007, Unix Unbounded, A Beginning Approach,
5th edn. Pearson Prentice Hall
Supplementary Reading
3. Stallings, W. Operating Systems, 5th Edition, Prentice Hall.
4.Gary Nutt A. Operating Systems A Modern Perspective,
2nd Edition Addison Wesley.
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Coursework
Homework 20%
Semester Test 1 (week 7) 40%
Semester Test 2 (week 11) 40%
Examination (100%)
4 questions, each question 25%
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Make Good Opportunity
- Eligibility of students for make good.
Must have submitted the required assignment.
Must have attempted the semester test.Must have valid reason (e.g Medical Certificate, etc) if
the above is not fulfilled).
*Only one make good chance has given.
*Make Good doesnt mean you will pass your coursework.*If you fail your coursework or/and practical (
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Chapter 1
Software and HardwareTechnology
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Computer System Components
HardwareProvides basic computing resources (CPU, memory,
I/O devices).
Operating System (OS)Controls and coordinates the use of the hardware
among the various application programs for the
various users.
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Applications Programs /Application Software
Define the ways in which the system resources are
used to solve the computing problems of the users
(compilers, database systems, video games,business programs).
Users
Include people, machines, and other computers.
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Windows
Linux
Unix
MS DOS
SOFTWARE TECHNOLOGY
(example)
example
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Hardware
User
Application program
Operating system
Make the computer system
convenient to use.
Use the computer hardwarein an efficient manner.
Allocate resources
Controls the execution ofuser programs and the
operations of I/O devices .
Overview of Operating Systems
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Characteristics of an operating system
Concurrency (example)
Sharing (example)
Long-term storage (example)
Non-determinacy
Respond to events which will occur in an unpredictable manner
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UserCommand
Interface
Processor Manager
Device ManagerFile Manager
Memory Manager
non-networked operating system
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Tasks Performed by Each Subsystem
Monitor its resources continuously
Enforce the policies that determine who gets what,
when and how much
Allocate the resource when appropriate
Deallocate the resource (reclaim it) when
appropriate
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Networked systems have a Network Manager
that assumes responsibility for networking tasks while working
harmoniously with every other manager)
Processor
ManagerMemory
Manager
DeviceManager
Network
Manager
File Manager
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Subsystems must work with each other
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Processor Manager
Allocates CPU time
Keeps track of each process status - waiting,
executing
Sets up necessary registers and tables
Reclaims processor when job is finished and/or
time for job has expired
Two levels of responsibility
(Job and Process scheduler)
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Memory Manager
Checks validity of each request for memoryspace and if it is a legal request, allocates a
portion of memory that isnt already in use (example)
Sets up a table to keep track of who is using
which section of memory.
Deallocates memory blocks once program
completes execution
Protects OS memory space so that it cannot be
altered by other programs
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Device Manager
Monitors every device, channel, and control unit.
Allocate in the most efficient manner all of the systems
devices (e.g. printers, devices, ports, disk drives)
based on a scheduling policy chosen by the systemsdesigners.
Functions include:
Allocation of devicesStarting operation of devices
Deallocation of devices once job completes (eg)
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File Manager
Keeps track of each file in the system (e.g. data files,
program files, compilers, application programs)
Allocate resources (e.g. opening files) and deallocate
resources (e.g. closing files)
Uses predetermined access policies to enforce
restrictions on who has access to which files
Example:
Restrictions on each file system only, user only,
group only, general access
User restriction read only, read/write only, allowed
to create file, allowed to delete file
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Five Categories of OS
Batch systems
Interactive systems
Real Time systems
Embedded systems
Hybrid systems
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Batch Systems
Jobs processed serially without user interaction
Efficiency is measured in throughput ,i.e. the
number of jobs completed in a given a mount of
time (e.g. 550 jobs per hour)
Example:
Preparation of a weekly payroll for anorganization whereby time cards are collected,
data entered and processed, paychecks and
reports are then printed
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Interactive Systems
User interacts directly with the operating system via
commands entered from the keyboard
Operating system provides immediate feedback to the
user.
Response time can be measured in fractions of a
second.
Example:
Banks automatic teller machines (ATMs) which
provides immediate cash and transaction details for its
users.
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Real-Time Systems
Extremely fast systems which are used in
time-critical environments where reliability is a
major factor and data must be processed
within a strict time limit.
Usually a real-time system is a dedicated
system which spends all or most of its time on
a single job.
Must be 100% responsive 100% of the time.
Example:
Air traffic control system used by the airport
authority such as the radar system
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Air Traffic Control System
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Physical Oceanographic
Real-Time System
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Hybrid Systems
A combination of batch and interactive systems.
Appear to be interactive because individual users
can access the system and get fast responses but
actually accepts and runs batch programs in eh
background when the interactive load is light.
Takes advantage of the free time between high-
demand usage of the system and low-demand
times.
Many large computer systems are hybrids.
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Embedded Systems
Embedded systems are computers placed
inside other products to add features and
capabilities.
Example:
In automobiles, embedded computers can
help with engine performance, braking and
navigation.
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Utility Programs
Most operating systems use a set of utility routinessuch as :
linkage editors
loaders
line editors
disk formatting modules
sort routines
debugging featureslibrary management routines
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Hardware
User
Application program
Operating system
Make the computer system
convenient to use.
Use the computer hardwarein an efficient manner.
Allocate resources
Controls the execution ofuser programs and the
operations of I/O devices .
Overview of Operating Systems
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UserCommand Interface
Processor Manager
Device ManagerFile Manager
Memory Manager
non-networked operating system
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Five Categories of OS
Batch systems
Interactive systems
Real Time systems
Embedded systems
Hybrid systems
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HARDWARE TECHNOLOGY
Basic unit of data representation
Bits are grouped to form bytes, which in turn
are grouped to form words.
Bit: one binary digit (0 or 1).
Byte: eight bits (1 character).
Word: a group of bytes.
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Byte 0
11111111
Byte 1
11111111
Byte 2
11111111
Byte 3
11111111
Word 0
Word 0
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Basic elements of computer system - I/O Unit,
Memory and Processor
Memory
Memory holds active programs and data.
A program must be stored in memory before it can beexecuted.
Data must be stored in memory before the computer
can manipulate them.
Memory write is a destructive operation.
Memory read is not destructive
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Memory Address
Consist of a number of locations (cells)
Each location has a number called address.
If a memory has n locations (cells), they will haveaddresses 0 to n-1.
All locations in the memory contain the samenumber of bits.
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If a location ofk bits, itcan hold any one of2different bitcombinations
(k bits => can hold 2kcombinations)
if K= 3 then 8 locations
000001010
011100101
110111
0
1
2
3
4
5
6
723 = 8 locations2k - 1
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In fact, for an address used toreference the memory need at
least 4 bits in order to express allthe address numbers from 0 to 11.
0000
000100100011
1111
0
1
2
3
15
000
001010011
100101110
111
0
12
3
4
5
6
7
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1.3.3 The Operation of Memory
The MAR and MDR act as aninterface between the CPU andMemory, whereby each cell in thememory unit holds one bit of data.
Each row consists of a group of oneor more bytes. Each grouprepresents the data cells for one of
more consecutive memory addresses.(AD is Address Decoder)
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M
A
R
A
D
MDR
One or
more bytes
addressline
0
1
26 -1
If a location of6 bits
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M
A
R
A
D
MDR
One or
more bytes
1 01
63
1
0
0
0
11 1 0 1 1
490 0 0
active
line
1 1 0 0 0 1 49
6-bit MAR
If 36-bit MAR can support ? of
addressable memory
63
Th d t i t (MDR) i d i d h
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The memory data register (MDR) is designed such
that it is effectively connected to every cell in the
memory unit. Each bit of the MDR is connected in
a column to corresponding bit of every location inmemory
However, the addressing method assures that only
a single row of cells is activated at any given time.
If a machine has a 4GB memory data register
(MDR), then 32 bits are used for the value of that
memory buffer.
4GB = 4 X 1 GB4GB = 22 230
= 232
Therefore 32 bits are used for MDR
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If a machine use 33 bits for memory data register,
then the capacity of memory buffer is 8GB ( 23 230)then 8GB = 8 X 1GB
8GB = 23 230
If a machine has a 64-bit memory address register
(MAR), then the machine can address 264 addresses
and 264 1 is the last memory address location.
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If the memory address register value is 1000101
then the memory location is 69
10001012625 24 23 22 21 20
1 0 0 0 1 0 1
Therefore, 64+0+0+0+4+0+1 = 69
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If the memory address register value is 1100111
then the memory location is 103,
11001112625 24 23 22 21 20
1 1 0 0 1 1 1
Therefore, 64+32+0+0+4+2+1 = 103
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If the memory location is 65 and assume 7 bits are
used in memory address register (MA
R) then thebinary content of MAR is 1000001
652
32 11684
21
000
00
Therefore the binary content of MAR is1000001
2222
2
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KB 210
MB 220
GB 230
TB 240
PB 250
EB 260
ZB 270
YB 280
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The Processor
The processormanipulates data stored in
memory under the control of a program stored
in memory.
Processor
Memory
Program Data
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Cache Memory
Cache memory is a staging area for the processor.
The rocessor
Cache memory
Mai memory
The com lete
rogram
Active ata
a
i str ctio s
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The program is stored in standard RAM.
As the program executes, the active instructions
and the active data are transferred to high-speed
cache memory.
Consequently, the processor waits for high-
speed cache instead of slower RAM and that
increases processing speed.
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Operatio co e
ADD
Opera s
1000,1004
A program is a series of instructions.
Each instruction has an operation code and one
or more operands
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The processor contains four key components.
Clock
Instruction
control unit
Arithmetic and
logic unit
Registers
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Operating system
Command processor
Input/output control system
Other operating system components
The input/output control system (IOCS) communicates
directly with the computers peripheral devices.
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The input/output control system generates the
primitive commands that control the peripheraldevice.
Applicatio
program
I put/output
co trol system
Peripheral
evice
ogical I/O
re uest
Primitive
comma s
Primitive command
a low-level operation that causes a peripheral device to perform a single task)
Logical I/Othe programmers view-one logicalrecord
Physical I/O
the transfer of aphysicalrecord between memory and a peripheral device
Primitive
command
Logical I/O
request
M C i d P S d
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Memory Capacity and Processor Speed
On most systems, the internal components are
designed around a common word size.
Example:
On a 32-bit computer, the processor manipulates 32-
bit numbers, memory and the registers store 32-bit
words, and data and instructions move between the
components over a 32-bit bus.
A computers word size affects its processing speed,
memory capacity, precision, instruction set size, and
cost.
E l f h d i ff t i d
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Example of how word-size can affect processing speed
A32-bit bus contains 32 wires and thus can carry
32 bits at a time.
A 16-bit bus has only 16 parallel wires and thus
can carry only 16 bits at a time.
Because the bus moves twice as much data in
the same amount of time, the 32-bit machine is
clearly faster.
Generally, the bigger the word size the faster the
computer is.
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Example of how memory capacity can be affected by word size
To access memory, the processor must transmit over a
bus the address of desired instruction or data element.
On a 32-bit machine, a 32-bit address can be
transmitted.
The biggest 32-bit number is roughly 4 billion in
decimal terms, so the processor can access as many
as 4 billion different memory locations.
A 16-bit computer, transmits a 16-bit address, limiting it
to roughly 64,000 memory locations.
Generally, the bigger its word size, the more memory a
computer can address.
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Progressions Exercise-1
1) If this machine has a 4GB memory data register, how
many bits are used for the value of that memory buffer?
2) If a machine has a 32-bit Memory Address Register.
How much memory can this machine address?
3) What is the memory location for the memory addressregister value of 111110, 111111, 000000 and 100111
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1) If this machine has a 4GB memory data register, how
many bits are used for the value of that memory buffer?
4 GB = 4 X1 GB= 22X230
= 232
therefore, 32bits of MDR
2) If a machine has a 32-bit Memory Address Register.
How much memory can this machine address?
232 addressable memory
3) What is the memory location for the memory address
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3) What is the memory location for the memory address
register value of 111110, 111111, 000000 and 100111
a. 11111025 24 23 22 21 20
1 1 1 1 1 0Therefore, 32+16+ 8 +4+2= 62
b. 11111125 24 23 22 21 20
11
11
1
1
Therefore, 32+16+ 8 +4+2+1 = 63
c. 00000025 24 23 22 21 20
0 0 0 0 0 0
Therefore, 0+0+0+0+0+0= 0
d. 100111 25 24 23 22 21 20
1 0 0 1 1 1
Therefore, 32+0+0 +4+2+1 = 39
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DeviceDevice--Status TableStatus Table
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DeviceDevice--Status TableStatus Table
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User space
System stack
I/O space
Unused
spaces
Reserved for
Operating
System
Register00 %r0
Register01 %r1
Register02 %r2
Register03%r303
Register04 %r4
Register05 %r5
Register06 %r6
Register07 %r7
Register08 %r8
Register11 %r11
Register12 %r12
Register13 %r13
Register14 %r14
Register15%r15
Register16 %r16
Register17 %r17
Register18 %r18
Register19 %r19
Register22 %r22
Register23 %r23
Register24 %r24
Register25 %r25
Register26 %r26
Register27 %r27
Register28 %r28
Register29 %r29
Register30 %r30
Register10 %r10 Register21 %r21
PSR %psr PC %pc
Figure 1.18b
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A
P4
P3
P1
P2
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Memory Protection
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Memory Protection
OS
Job1
Job2
Job3
Job4
0
256000
300040
420940
880000
1024000
300040
120900
Base register
Limit register
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D1 D12
DC1
CPU
D2 D22
DC2
Dn Dn2
DCn
Memory Controller
Memory
System Bus
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