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Class : VLSI SoC Advisor : Jou, Jer MinStudent : X. Q. Huang Date : 2012/11/28 ATPA 11ATPA ATPA ATPAATPA2/29

3/29(Real-Time Operating Systems, RTOS )

(Application-Turned Processor Architecture, ATPA )

( )

4/29:

5/29In a computer, the processor only receives instructions and is not aware of tasks. Thus task scheduling is often handled by the operating system, which is the closest software to the hardware (processor).

5 ATPA 6/29In a computer, the processor only receives instructions and is not aware of tasks. Thus task scheduling is often handled by the operating system, which is the closest software to the hardware (processor).

6: :: ( Program Counter, PC )( general purpose registers, GPRs )7/29

ATPA 8/29ATPA ATPA

ALUGPRFRIRADDRPCSX

9/299ATPA ATPA TNEWTKILLTNEW(task description block, TDB)TDBTDBTNEWTDB(Context Register Files)TKILL

10/29ATPA ATPA (IDLE) GPRsALUPCSXATPA

11/29ATPA(Semaphore arbiter)STAKESGIVE( TPR )ID

12/29ATPAIDTPRIDTPR

13/29ATPA4:TNEWTKILLMTU

14/29ATPA( Monitor and Tuner Unit, MTU )MTU

15/29ATPA16/2916ATPA17/2917ATPAATPA(Prototype heterogeneous multi-core ATPA processor, PAMAP)100MHz XTALXilinx XC4VLX15 FPGA PAMAP8-bit(01)()8 bits16 bits24 bits(8 bits16 bits)

18/29ATPAADDSUBANDANDNOPAOPBOPAOPBMTUJZJIJMP(LDSTO)(LDMSTOM)0x000xFFTNEWTKILLTRUNTSTOPTNEWTDB4-byteTNEWIDAXTKILL

AXPCPCTDB (4-byte)TNEW19/29ATPATNEWTKILLTRUNTSTOPTRUNTSTOPTRUNTSTOPSTAKESGIVETMSETTMCLR(timer)INT(interruption instruction)IRET(interruption return instruction)0INTISR(interruption Service Routine)ISRIRETISRHLT20/29ATPAPAMAP

21/2922/291169=999.96%95.09%

23/29ATPA24/29ATPAP(P0,P1,P2,P3,P4)=(1,p,p,1/p,1/p)Pii

normalMTUaggressiveMTU25/29ATPAPP02.58%19PAMAP27%P1ATPA

26/29ATPAPP1ATPAMTUATPA

27/29MTUMTUATPAMTUMTUMTUATPA28/29Thanks for your attention!!29/29