Download - Copyright by Pandarinath Murali 2011
Copyright
by
Pandarinath Murali
2011
Dynamic Modeling of Six-Pulse Rectifier for
Short-Circuit Current Characterization
APPROVED BY
SUPERVISING COMMITTEE:
Supervisor:Surya Santoso
Alexis Kwasinski
Dynamic Modeling of Six-Pulse Rectifier for
Short-Circuit Current Characterization
by
Pandarinath Murali, B.E.
THESIS
Presented to the Faculty of the Graduate School of
of the University of Texas at Austin
in Partial Fulfillment
of the Requirements
for the Degree of
Master of Science in Engineering
THE UNIVERSITY OF TEXAS AT AUSTIN
December 2011
Dedicated to my parents.
Acknowledgments
I wish to thank Prof. Surya Santoso for his invaluable guidance, mo-
tivation and support. I would like to thank Saurabh Kulkarni for his help
in writing well-organized reports during my research. Finally, I would like to
thank my classmate Anirudh Guha for giving moral support and I acknowledge
his help in writing my thesis using LATEX.
v
Dynamic Modeling of Six-Pulse Rectifier for
Short-Circuit Current Characterization
by
Pandarinath Murali, M.S.E.
The University of Texas at Austin, 2011
SUPERVISOR: Surya Santoso
Existing models describing the dynamic behavior of a six-pulse recti-
fier during a short-circuit fault condition are derived from switch models using
time-domain average value parametric functions. Unlike these models, novel
non-parametric dynamic models have been developed using analytical average-
value modeling approach. In this modeling approach, depending upon the
number of switches conducting during a switching cycle, the operating point
of the rectifier is brought into one of three modes of operation of a six-pulse
rectifier. The model for each mode is represented by a differential equation.
During output current calculation for the rectifier the operating model is se-
lected based on firing angle and overlap angle functions derived in this research
work. They completely characterize the dynamic behavior of current flowing
through the dc inductor for a wide range of operating conditions with the ex-
ception of harmonics and asymmetrical currents which are dominant for faults
occurring at the terminals of the rectifier upstream of the smoothing inductor.
The results from the average value model and few other simple models
vi
have been applied for Thevenin ac source and synchronous generator supplied
rectifier models to determine the characteristics of short circuit current from
the rectifier.
vii
Table of Contents
Acknowledgments v
Abstract vi
List of Tables xi
List of Figures xii
Chapter 1. Introduction 1
1.1 Motivation and Background . . . . . . . . . . . . . . . . . . . 1
1.2 Scope of Work . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3 Objectives for this Research . . . . . . . . . . . . . . . . . . . 6
1.4 Approach . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
1.5 Organisation of the Thesis . . . . . . . . . . . . . . . . . . . . 10
1.6 Technical Contribution . . . . . . . . . . . . . . . . . . . . . . 10
Chapter 2. The State of the Art in DC Power System Protectionand Short Circuit Modeling 12
2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.2 Modeling a Six-Pulse Rectifier . . . . . . . . . . . . . . . . . . 13
2.3 DC Current Interruption . . . . . . . . . . . . . . . . . . . . . 17
2.4 Methods of Breaking DC Currents . . . . . . . . . . . . . . . . 18
2.4.1 Source Potential Reduction Method . . . . . . . . . . . 20
2.4.2 Current Suppression Method . . . . . . . . . . . . . . . 21
2.5 DC Breaker Manufacturers . . . . . . . . . . . . . . . . . . . . 26
viii
Chapter 3. Operation of Six-Pulse Rectifier 29
3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3.2 Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . 29
3.2.1 Mode 1 Operation . . . . . . . . . . . . . . . . . . . . . 31
3.2.2 Mode 2 Operation . . . . . . . . . . . . . . . . . . . . . 36
3.2.3 Mode 3 Operation . . . . . . . . . . . . . . . . . . . . . 39
Chapter 4. Modeling of Six-Pulse Rectifier using Average ValueModeling Approach and its Validation 44
4.1 Analytical Model Derivation . . . . . . . . . . . . . . . . . . . 45
4.1.1 Overlap Angle and Firing Angle in Mode 1 and Mode 2 48
4.2 Analytical Model for Mode 1 and Mode 2 Operation . . . . . . 52
4.2.1 Validation of Analytical Model for Mode 1 Operationwith an Uncontrolled Rectifier . . . . . . . . . . . . . . 54
4.2.2 Validation of Analytical Model for Mode 2 Operationwith Uncontrolled Rectifier . . . . . . . . . . . . . . . . 58
4.2.3 Overlap Angle for Mode 3 . . . . . . . . . . . . . . . . . 61
4.2.4 Analytical Model for Mode 3 Operation . . . . . . . . . 67
4.2.5 Validation of Analytical Model for Mode 3 Operationwith Uncontrolled Rectifier . . . . . . . . . . . . . . . . 70
4.3 AC Current Estimation . . . . . . . . . . . . . . . . . . . . . . 73
4.3.1 Mode 1 and Mode 2 AC Currents . . . . . . . . . . . . . 74
4.3.2 Mode 3 AC Currents . . . . . . . . . . . . . . . . . . . . 76
4.4 Validation of Average Value Model of the Rectifier . . . . . . . 80
4.4.1 Method of Calculation . . . . . . . . . . . . . . . . . . . 80
4.4.2 Verification . . . . . . . . . . . . . . . . . . . . . . . . . 81
4.5 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Chapter 5. Fault current characterisation and interruption withinduced oscillations 90
5.1 Fault Current Interruption with Purely Resistive Fault CurrentPath . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
5.1.1 Fault Current from the Capacitor . . . . . . . . . . . . . 93
5.1.2 Fault Current from the Rectifier . . . . . . . . . . . . . 94
ix
5.2 Fault Current Interruption with Series Inductance in the FaultCurrent Path . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
5.2.1 Second Order RLC Circuit Model . . . . . . . . . . . . 101
5.2.2 Third Order Equivalent Circuit Model . . . . . . . . . . 103
5.2.3 Results and Discussion for Rectifier Fault Current Profile 103
5.2.4 Fault Current Interruption using AC Circuit Breakers . 106
5.3 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
Chapter 6. Short-circuit Current Profiles of a Faulted Six-PulseDiode Bridge Rectifier Fed by a Synchronous Gen-erator 112
6.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
6.2 PSCAD Simulation with Detailed Synchronous Generator Model 113
6.3 PSCAD Simulation with an Equivalent Simple Thevenin Equiv-alent AC Source Model . . . . . . . . . . . . . . . . . . . . . . 117
6.4 Steady-State Fault Current for a Short-Circuit on the DC Ter-minals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
6.5 Comparison of Time-to-Crest of Fault Currents for Short-Circuitson Terminals of a Synchronous Machine and a Rectifier . . . . 122
6.6 Short Circuit Current for a Close Bolted Fault at the Rectifier 124
6.6.1 Short Circuit Current for Thevenin Equivalent Fed Rectifier124
6.6.2 Short Circuit Current for Synchronous Generator FedRectifier . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
Chapter 7. Summary 136
Appendices 138
Bibliography 140
Vita 145
x
List of Tables
2.1 DC breakers in market and their ratings. . . . . . . . . . . . . 27
2.2 DC breakers in market and their ratings. . . . . . . . . . . . . 28
3.1 Modes of operation of six-pulse rectifier . . . . . . . . . . . . . 40
5.1 Rate of rise and peak of fault current obtained from all the models.106
6.1 DC fault current profile. . . . . . . . . . . . . . . . . . . . . . 117
xi
List of Figures
1.1 A typical MVDC IPS with many ac/dc converters at the powersource. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.2 A six-pulse self-commutated thyristor bridge rectifier consideredfor analysis in this research work . . . . . . . . . . . . . . . . 5
2.1 An uncontrolled six-pulse diode bridge rectifier . . . . . . . . . 14
2.2 A controlled six-pulse thyristor bridge rectifier . . . . . . . . . 14
2.3 A switch mode rectifier with antiparallel diodes . . . . . . . . 15
2.4 A switch mode rectifier with antiparallel thyristors . . . . . . 16
2.5 Classification of dc circuit breakers. . . . . . . . . . . . . . . . 19
2.6 Source control method for a simple power system with mainand backup system . . . . . . . . . . . . . . . . . . . . . . . . 20
2.7 Hybrid circuit breaker. . . . . . . . . . . . . . . . . . . . . . . 26
3.1 A six-pulse rectifier model used for analysis. . . . . . . . . . . 32
3.2 Firing angle α, overlap angle u, dc voltage edc, and current idcfor decreasing load resistance. . . . . . . . . . . . . . . . . . . 33
3.3 AC and dc currents during mode 1 pattern of conduction . . . 35
3.4 Conduction pattern during commutation sub-interval in mode 1. 35
3.5 Conduction pattern during conduction sub-interval in Mode 1. 36
3.6 An instance of switching cycle with ac source voltages and volt-age at points ‘b’ and ‘c’ in Fig. 3.1 when thyristors ‘6’ and ‘2’conduct(i.e. during commutation). . . . . . . . . . . . . . . . 37
3.7 AC and dc currents during mode 2 pattern of conduction. . . . 37
3.8 Mode 2 circuit path at point ‘A’ in Fig. 3.6. The greyed outswitches are non-conducting. . . . . . . . . . . . . . . . . . . . 38
3.9 Mode 2 circuit path at some time after point ‘A’ in Fig. 3.6when the commutation in the lower half of the bridge ends.The greyed out switches are non-conducting. . . . . . . . . . . 38
3.10 AC and dc currents during mode 3 pattern of conduction . . . 41
xii
3.11 Mode 3 conduction pattern from α to δ − π3. The greyed out
switches are non-conducting. . . . . . . . . . . . . . . . . . . . 41
3.12 Mode 3 conduction pattern from δ − π3
to α + π3. The greyed
out switches are non-conducting. . . . . . . . . . . . . . . . . 42
3.13 Mode 3 conduction pattern from α + π3
to δ. The greyed outswitches are non-conducting. . . . . . . . . . . . . . . . . . . . 42
4.1 Basic six-pulse rectifier model used for derivation of AVM. . . 46
4.2 Red line shows the linear approximation of the instantaneousinductor current (blue) averaged over a switching cycle. . . . . 47
4.3 ac and dc current flow in mode 1 operation. . . . . . . . . . . 49
4.4 Three-switch conduction configuration for mode 1 (α < θ < α+u), mode 2 (α < θ < α+π/3) and mode 3 (δ−π/3 < θ < α+π/3). 49
4.5 Two-switch conduction configuration for mode 1 (α + u < θ <α + π/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
4.6 A 10 MVA rectifier used for validation of AVM . . . . . . . . . 55
4.7 Rectifier terminal voltage at the dc side in mode 1. . . . . . . 56
4.8 Rectifier terminal current at the dc side in mode 1. . . . . . . 56
4.9 Overlap angle of the rectifier in mode 1. . . . . . . . . . . . . 57
4.10 Firing angle of the rectifier in mode 1. . . . . . . . . . . . . . 57
4.11 Number of conducting switches in Mode 1. . . . . . . . . . . . 58
4.12 Rectifier terminal voltage at the DC side in mode 2. . . . . . . 59
4.13 Rectifier terminal current at the DC side in mode 2. . . . . . . 59
4.14 Overlap angle of the rectifier in mode 2. . . . . . . . . . . . . 60
4.15 Firing angle of the rectifier in mode 2. . . . . . . . . . . . . . 60
4.16 Number of conducting switches in mode 2. . . . . . . . . . . . 61
4.17 AC and dc currents during a switching cycle of the rectifier inMode 3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
4.18 Four-switch conduction configuration for Mode 3 during (α <θ < δ − π/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
4.19 Four-switch conduction configuration for Mode 3 during (α +π/3 < θ < δ) . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
4.20 Rectifier terminal voltage at the DC side in mode 3. . . . . . . 71
4.21 Rectifier terminal current at the DC side in mode 3. . . . . . . 71
4.22 Overlap angle of the rectifier in mode 3. . . . . . . . . . . . . 72
xiii
4.23 Firing angle of the rectifier in mode 3. . . . . . . . . . . . . . 72
4.24 Number of conducting switches in mode 2. . . . . . . . . . . . 73
4.25 AC current for mode 1 and mode 2. . . . . . . . . . . . . . . . 75
4.26 ‘b’ phase ac current for mode 3. . . . . . . . . . . . . . . . . . 76
4.27 Bridge conduction configuration for Mode 3 during α to δ − π3.
The greyed out switches are non-conducting. . . . . . . . . . . 77
4.28 Bridge conduction configuration for mode 3 during δ − π3
toα + π
3. The greyed out switches are non-conducting. . . . . . . 78
4.29 Bridge conduction configuration for Mode 3 during α+ π3
to δ.The greyed out switches are non-conducting. . . . . . . . . . . 79
4.30 Bridge conduction configuration for Mode 3 during δ to α+ 2π3
.The greyed out switches are non-conducting. . . . . . . . . . . 79
4.31 Schematic for calculating ac and dc fault currents. . . . . . . . 81
4.32 Rectifier model used for verification of results. . . . . . . . . . 82
4.33 DC inductor current, ‘b’ phase inductor current and dc capac-itor voltage in various modes obtained using AVM (continuousline) are verified with switch model results (dotted line). . . . 84
4.34 Short-circuit dc capacitor voltage, dc inductor current and ‘b’phase inductor current obtained using AVM are verified withswitch model results. . . . . . . . . . . . . . . . . . . . . . . . 86
4.35 Rectifier model with low dc filter inductance used for testingAVM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
4.36 Short-circuit dc capacitor voltage, dc inductor current and ‘b’phase inductor current obtained using AVM are verified withswitch model results. The switch model is shown in Fig. 4.35 . 88
5.1 Three-phase line commutated phase-controlled rectifier with purelyresistive fault current path. . . . . . . . . . . . . . . . . . . . . 92
5.2 Fault current profile for rectifier in Fig. 5.1. . . . . . . . . . . 92
5.3 Equivalent circuit for the fault current contribution from thefilter capacitor. . . . . . . . . . . . . . . . . . . . . . . . . . . 93
5.4 Fault current contribution from the filter capacitor. . . . . . . 94
5.5 Equivalent circuit for the fault current contribution from therectifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
5.6 Fault current contribution from the rectifier. . . . . . . . . . . 96
5.7 Average dc voltage vs firing angle α. . . . . . . . . . . . . . . 97
xiv
5.8 Three-phase line commutated phase-controlled rectifier with se-ries RL fault current path. . . . . . . . . . . . . . . . . . . . . 99
5.9 Fault current profile for Fig. 5.8. . . . . . . . . . . . . . . . . 100
5.10 Equivalent circuit for the fault current contribution from thecapacitor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
5.11 Third order equivalent circuit used for modeling the fault cur-rent profile. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
5.12 Comparison of fault current profile from switch model (shownin blue), third order model (shown in green) and second ordermodel (shown in brown). . . . . . . . . . . . . . . . . . . . . . 104
5.13 Fault currents for purely resistive fault current path and induc-tive fault current path. . . . . . . . . . . . . . . . . . . . . . . 107
5.14 Three phase line commutated phase-controlled rectifier with se-ries RL fault current path and ac circuit breaker. . . . . . . . 108
5.15 Fast fault current interruption with ac circuit breaker schematicshown in Fig. 5.14. . . . . . . . . . . . . . . . . . . . . . . . . 108
5.16 Faster fault current interruption with ac circuit breaker schematicshown in Fig. 5.14. . . . . . . . . . . . . . . . . . . . . . . . . 109
6.1 Synchronous generator (SG) with dc field excitation control con-nected to passive diode bridge rectifier. . . . . . . . . . . . . . 113
6.2 PSCAD simulation of a generation scheme shown in Fig. 6.1. . 114
6.3 DC current flowing through the filter inductor for the PSCADsimulation shown in Fig. 6.2. . . . . . . . . . . . . . . . . . . 114
6.4 DC voltage across the filter capacitor for the PSCAD simulationshown in Fig. 6.2. . . . . . . . . . . . . . . . . . . . . . . . . . 115
6.5 dc and ac fault currents for 0.01 Ω fault. . . . . . . . . . . . . 115
6.6 Free-wheeling circuit on the dc side. . . . . . . . . . . . . . . . 118
6.7 PSCAD simulation of generation scheme shown in Fig. 6.2 withsimplified circuit schematic. . . . . . . . . . . . . . . . . . . . 119
6.8 DC current flowing through the filter inductor for the PSCADsimulation shown in Fig. 6.7. . . . . . . . . . . . . . . . . . . 120
6.9 DC voltage across the filter capacitor for the PSCAD simulationshown in Fig. 6.7. . . . . . . . . . . . . . . . . . . . . . . . . . 121
6.10 Synchronous generator fault current for a three-phase 0.01 Ωfault on the ac side for the circuit shown in Fig. 6.3. . . . . . 123
6.11 During a bolted fault at the terminals of the rectifier, threediodes conduct in the rectifier bridge . . . . . . . . . . . . . . 127
xv
6.12 For a bolted fault at the terminals of the rectifier as shown inFig. 6.11, three diodes conduct in the rectifier bridge and theac source sees a complete three-phase short circuit. . . . . . . 127
6.13 Switch model simulated in PSCAD. . . . . . . . . . . . . . . . 130
6.14 Verification of the results in (6.6) with the switch model simu-lated in PSCAD. . . . . . . . . . . . . . . . . . . . . . . . . . 130
6.15 The graph of the absolute values of ac current (6.3). . . . . . . 131
6.16 The exponential decay of the dc short circuit current along withthe switch model results. . . . . . . . . . . . . . . . . . . . . . 131
6.17 Switch model simulated in PSCAD. . . . . . . . . . . . . . . . 133
6.18 Verification of the results in (6.10) with the switch model sim-ulated in PSCAD. . . . . . . . . . . . . . . . . . . . . . . . . . 134
6.19 The graph of the absolute values of ac current (6.10) and shortcircuit dc current from PSCAD. . . . . . . . . . . . . . . . . . 134
6.20 The exponential decay of the dc short circuit current along withthe switch model results. . . . . . . . . . . . . . . . . . . . . . 135
xvi
Chapter 1
Introduction
1.1 Motivation and Background
This work was done to support the realization of a dc power system
for an all electric ship (AES) [1]. In ships it is economical to supply the large
power needs of radar, propulsion systems, and weapons systems in a combined
fashion rather than using separate generators for each load. This lead to the
consideration of an integrated power system (IPS) that can supply all the loads
in the ship. Medium voltage ac (MVAC) at 60 Hz, high frequency ac (HFAC)
and medium voltage dc (MVDC) power supply systems are being considered
for serving the ship loads connected to the IPS. MVDC is considered as one
of the attractive options due to the reduction in size and weight that can be
achieved when compared against other ac alternatives. The distribution of dc
power to the loads throughout the ship would require a overcurrent protection
system to deliver reliable and safe power to the loads.
Figure 1.1 shows the typical loads and sources in an AES with IPS. The
propulsion loads, pulse loads and other ac and dc loads are fed by a redundant
system of dc power power generation modules. The power generation modules
consisting of synchronous generators feed ac power to rectifiers. The rectifier,
1
which may be a six-pulse rectifier or twelve-pulse rectifier, converts ac power
to dc power and supplies it to the IPS. By interconnecting the ac sources
through a dc line, decoupling of synchronous generators is made possible and
each generator can operate at its optimal speed.
Apart from an AES the work done here is also relevant to other fields.
For example an alternator-rectifier combination is widely used in automobiles
[2],[3] and it is being considered for future hybrid electric vehicles (HEV) [4].
The rectifier connected to the generator converts ac power to dc for use in
battery charging and for supplying dc power to the internal automobile power
system.
Bridge rectifiers have also been opted for HVDC applications such as
long distance transmission and back to back connection of unsynchronized ac
systems [5]. With the development of semiconductor technology there has
been a large scale adoption of thyristor controlled rectifiers in HVDC. The
benefits of HVDC were the lack of reactive power transmission and the ability
to control active power transmission.
In all the dc power supply schemes discussed above traditional methods
for fault detection and interruption through circuit breakers cannot be applied
due to the absence of current zeros in dc. The dc current has to be interrupted
with the help of advanced control of power electronic switches. The timing of
overcurrent protection is also an important factor. The switches in the rectifier
which is one of the weak links have I2t limits to limit the junction tempera-
ture rise for subsequent blocking of fault current [6]. Timing in overcurrent
2
protection is also important to select proper fuse ratings for backup protection
[7]. Characterization of the dc short circuit current will assist the selection of
suitable method of current interruption and it will help choose proper require-
ments and specifications for the power supply protection plan. Research into
dc power system protection plan has been relatively scarce when compared to
other topics. This work has been done to characterize the short circuit current
from the commonly used dc source, six pulse rectifier, and identify methods
of interrupting short circuit current.
1.2 Scope of Work
The characteristics of fault current in a dc system is dependent on the
characteristics of the power source employed. It has been evaluated that ac/dc
converters with six-pulse and twelve-pulse rectifiers supplied by a synchronous
generator or synchronous generator-transformer combination is ideal for an
MVDC system with the power supply requirements of a large ship. For higher
phase numbers the rectifier modules will be connected in series or parallel.
The ripple content of the rectifier voltage will decrease with increase in the
number of phases. Six-pulse and twelve-pulse rectifiers which use three-phase
and six-phase ac are the most optimal rectifiers which give smooth dc output
with minimal components.
This work reported herein has been restricted to study one of the rec-
tifiers, six-pulse rectifiers with naturally commutating switches, uncontrolled
diodes and controllable thyristors as switches in bridge topology. Figure 1.2
3
!"" #
$#%&'
&'Figure 1.1: A typical MVDC IPS with many ac/dc converters at the powersource.
4
shows the six-pulse controlled rectifier considered for analysis in this work.
The rectifiers are usually equipped with LC filters at the output end. In this
work, the behavior of the rectifier under faults after the filter and bolted faults
before the filter, at its terminals, have been studied.
The characteristics of the short circuit current such as rate of rise,
peak current, current oscillations have been studied with the help of a novel
model from established average value modeling (AVM) techniques for power
converters [8], [9], [10]. Due to the assumptions taken in the AVM approach,
the model is applicable only for rectifiers with high filter inductance in case of
large signal studies. Therefore the model is accurate only for current source
rectifiers which supply constant current and some voltage source rectifiers with
high dc filter inductance.
ae
be
ce
cL
cL
cL
dcL
dciai
bi
ci
1i
2i
3i 5i
4i 6i
dcR
C
dce
loadR
Figure 1.2: A six-pulse self-commutated thyristor bridge rectifier consideredfor analysis in this research work
5
1.3 Objectives for this Research
The general objective of this research is to determine the characteristics
of short circuit current from a six-pulse rectifier to develop a protection plan for
six-pulse rectifier fed MVDC power system. To accomplish this the following
specific objectives were identified:
• The existing methods of modeling a six-pulse rectifier [11], [12], [13], [10],
[14] will be studied.
• Some of the methods of dc current interruption available at this time
when this research work was done will be studied and a list of feasible
commercial circuit breakers for use in MVDC systems will be produced.
• The operation of a six-pulse rectifier under lightly loaded conditions to
heavily faulted conditions will be studied to develop a complete under-
standing of its working under extreme conditions. Also the complex
switching operations of the rectifier under those conditions which would
vary depending upon the load current will be studied.
• Using the studied switching operation, a technique to model the dynamic
behavior of a six-pulse rectifier using AVM will be described. The model
will characterize the behavior of the short circuit current sourced by
the rectifier. Also the rate of rise, magnitude and oscillations of the
fault current and voltage during the fault will be characterized. Any
limitations of the model in characterizing the short circuit current will
be identified.
6
• The results from the model will be used to derive the ac short circuit
current absorbed by the rectifier. The ac short circuit currents will be
represented in a way such that that it can be converted to a convenient
frame of reference like dq0 or αβγ frame.
• The derivation will be used to develop a Matlab/Simulink model to cal-
culate short circuit currents on both ac and dc sides of the rectifier.
The results from the simulation will be validated with a switch model
simulation of the rectifier.
• As an application for the model developed in this literature, the short
circuit current characteristics will be used to find a method of dc current
interruption with ac circuit breakers. Here the contribution of short
circuit current from the rectifier and filter capacitor will be specified.
• As an extension for the rectifier modeling, the model will also be adopted
for a synchronous generator-rectifier dc source to find its short circuit
characteristics.
• The short circuit current for bolted faults at the terminals of the rectifier
before any inductors like dc filter inductor has been derived in the exist-
ing literature. A simple method for extending this derivation to include
synchronous generator ac source will be discussed.
7
1.4 Approach
Six-pulse rectifiers with naturally commutating switches like diodes and
thyristors do not have any control over its turn off time. During turn off these
switches do not turn off immediately with high currents due to the stored
energy in the ac series inductors. This causes overlap between conduction
of various switches and it leads to complex switching patterns during high
currents. The operation of the rectifier has been explained by classifying the
switching pattern into three categories: mode 1, mode 2 and mode 3. In each
of these switching pattern there is a consistent pattern of switching during
every cycle. But, due to this switching the system becomes discontinuous.
The circuit model cannot be modeled with a simple Kirchoff’s voltage law
(KVL) equations or Kirchoff’s current law (KCL) equations. In such cases an
average value modeling technique can be used. In an average value modeling
(AVM) technique, the state variables in a circuit like inductor current and
capacitor voltage which vary slowly over time are averaged in a switching
cycle to approximate a discontinuous system as continuous system to model
the system using continuous differential equations. In this work, the current
in the dc filter is assumed to be smooth enough and the output voltage is
averaged. The ac source has been modeled as a three-phase Thevenin source
with infinite ac voltage sources in series with inductive impedances. Due to the
inherent properties of the assumption in the AVM, it has limitations when the
current through the rectifier filter inductor changes rapidly within a switching
cycle. The model has been found to be applicable and accurate for current
8
source rectifiers and limited cases of voltage source rectifiers only.
The intermediate results from the AVM equations were found to be
useful in deriving the ac currents absorbed by the rectifier. A piecewise con-
tinuous function has been obtained to represent the ac short circuit current
through the rectifier. A scheme for calculating the short circuit current by
combining mode 1, mode 2 and mode 3 AVM model was devised. The ana-
lytical models were simulated numerically by creating a simulink model. The
differential equation solvers in simulink were used to simulate the short circuit
current from the rectifier. It was tested with various loads and faults.
To validate the model, an equivalent switch model was developed in
PSCAD with diodes and thyristors. The results were compared and errors
were calculated graphically.
With the understanding of the rectifier working and a suitable model
developed, a method of fast current interruptions was developed in simulation.
The filter capacitor was used with a series inductor to create oscillations in
the short circuit current and to interrupt the fault current with the resulting
current zeros. Since current zeros are used here to interrupt the current a light
and inexpensive ac breaker will be sufficient for current interruption rather
than a dc breaker.
The key difference between a Thevenin equivalent model with which the
AVM derivation is obtained and an actual synchronous generator is the varying
series inductance in the ac circuit. An AVM model was developed with the
9
changes in inductance incorporated to represent the operation of synchronous
generator rectifier model under short circuit conditions.
1.5 Organisation of the Thesis
Firstly, the models available for characterizing the short circuit current
from a six-pulse rectifier will be listed and a number of dc current interruption
technique with commercial breakers in the market will be shown in Chapter
2. In Chapter 3, the switching operation of six-pulse rectifier under normal,
heavy and short circuit conditions will be detailed. The switching operation
description will be used to derive an average value model for the rectifier in
Chapter 4. The same will be validated with switch models from PSCAD. In
Chapter 5 and 6, the AVM model and some of the older models available in
other literature for rectifiers will be applied for studying the characteristics of
the short circuit current with a theoretical Thevenin equivalent ac source and
a synchronous generator ac source feeding the rectifier. Also in Chapter 5 a
new form of dc current interruption technique with ac breakers is discussed.
It makes use of induced oscillations introduced in the dc current to interrupt
fault current.
1.6 Technical Contribution
Using average value modeling technique for dynamical modeling of con-
trolled six-pulse rectifier is the main contribution. This is an extended version
of earlier papers [9], [10], [14] which are referenced in this work. It includes the
10
operation of controlled six-pulse rectifier and its mode 2 and mode 3 operation
while the earlier papers only includes discussions for mode 1 operation in un-
controlled rectifiers. This modeling approach may help power engineers and
power system experts understand the behavior of the rectifiers under faults.
The dc current interruption technique with induced oscillations that will be
discussed in Chapter 5 is also novel.
The AVM model has been presented as a conference paper in IEEE
Electric Ship Technology Symposium (IESTS) conference [15]. It is antici-
pated that in the future a practical protection plan for the MVDC system
will be devised based on the results produced in this work and presented as a
transaction paper.
11
Chapter 2
The State of the Art in DC Power System
Protection and Short Circuit Modeling
2.1 Introduction
Most of the dc systems designed today are fed by bridge rectifiers. The
bridge rectifiers converts power from an ac source like synchronous generator
to dc. The ac power to a rectifier module can be in single-phase, two-phase
or three-phase form. For higher phase numbers the rectifier modules are con-
nected in series or parallel. The ripple content of the rectifier voltage decreases
with increase in the number of phases. Six-pulse and twelve-pulse rectifiers
which use three-phase and six-phase ac are the most optimal rectifiers which
give smooth dc output with minimal components. For this reason six-pulse
rectifiers and twelve-pulse rectifiers are widely used in ac to dc power conver-
sion.
In this work, only the operation and protection of six-pulse rectifiers
is considered for simplicity and relevancy to recent research interests. In this
chapter some of the existing methods of modeling the rectifier for short circuit
operation are discussed.
Also some of the existing methods of dc current interruption techniques
12
are discussed. The current interruption methods are classified based on the
techniques used. The methods are explained briefly and a list of commercially
available dc circuit breakers are listed with their applications.
2.2 Modeling a Six-Pulse Rectifier
Six-pulse rectifiers can be classified as either uncontrolled or controlled
based on the type of switches used. A six-pulse rectifier with diodes as switch
elements shown in Fig. 2.1 does not have any control over its output voltage
or current. If the bridge is formed with thyristors as shown in Fig. 2.2, then
its firing signal at the gate can be modified to control the output voltage and
current by controlling the turn-on time. The normal operating output voltage
of the rectifiers usually will be below the open circuit voltage. The maximum
output voltage occurs for zero firing angle and the output voltage for thyristor
controlled rectifiers can be reduced by increasing the firing angle.
There is another class of switch mode rectifiers built with MOSFETs
and IGBTs. These rectifiers absorb ac currents at unity power factor and
produce less harmonics. These rectifiers operate in boost mode and the normal
operational voltage will always be above the open circuit voltage of the rectifier
obtained without any gate signals for the IGBTs and rectifiers. The MOSFETs
and IGBTs are defenseless under short circuit conditions. They do not have
any control if the output voltage drops below the open circuit voltage. During
short circuit conditions the antiparallel diodes or thyristors in the bridge shown
in Fig. 2.3 and 2.4 conduct the short circuit current and behave like a six-pulse
13
ae
be
ceLoad
Figure 2.1: An uncontrolled six-pulse diode bridge rectifier
ae
be
ceLoad
Figure 2.2: A controlled six-pulse thyristor bridge rectifier
14
ae
be
ceLoad
Figure 2.3: A switch mode rectifier with antiparallel diodes
rectifier [16].
In this work, six-pulse rectifiers with diode and thyristor bridges are
mainly studied. The operation of all the other rectifiers under short circuit
can be explained with the studied category. The work done here for short
circuit operation of diode and thyristor controlled rectifier can be extended in
the future for IGBT and MOSFET controlled rectifiers.
In [11], a steady-state model of the six-pulse rectifier has been analyzed.
The switching pattern of the rectifier and the voltage regulation of the rectifier
are well analyzed in the book [11]. The rectifier circuit is analyzed by assuming
a infinite filter inductance on the dc side, symmetrical conditions on the ac
side and switches with zero impedance. It classifies the operation of rectifier
into three modes based on the number of simultaneously conducting switches.
15
ae
be
ceLoad
Figure 2.4: A switch mode rectifier with antiparallel thyristors
In another model presented by Denning, the short circuit characteristics
of a rectifier is obtained from an envelope of the ac short-circuit current wave-
form of the rectifier ac source. This model was further analyzed by Pozzobon
in [12]. This model is explained in Chapter 6.
According to [13], a model proposed by Fujimura and Honda estimates
high impedance dc fault current and initial rate of rise by using an equivalent
dc circuit model consisting of a dc voltage source and a series resistor and an
inductor calculated with three-diode conduction pattern.
The operation of the rectifier with the same configuration varies so
widely with changes in inductance and capacitance values that no single model
specified above can be used for different short circuit conditions. The first
model presented by Denning is applicable for faults close to the rectifier and
16
the second model presented by Fujimura and Honda is applicable for remote
faults.
In [10], [9] and [14] an average value model (AVM) for the rectifier is
studied for small signal studies. The model is applicable for limited operation
range (mode 1, which is explained in Chapter 3). The AVM consists of a
first order continuous differential equation with overlap angle function. In this
work, the AVM is extended for mode 2 and mode 3 to get the short circuit
characteristics of a rectifier.
In the following section, fault current interruption methods available
for dc power systems in general will be studied.
2.3 DC Current Interruption
Designing a protection plan for a dc power system is more challenging
than that for an ac power system. This is mainly due to the absence of current
zeros in dc current. Almost all the ac circuit breakers from high voltage class
to low voltage class make use of arc interruption techniques for interrupting
the fault current. Interrupting fault currents in an ac power system circuit
breaker involves creation of physical open gap. The gap is realized by sepa-
rating a pair of contacts thereby preventing the current from flowing through
once the electric arc across the contacts is extinguished [17]. Extinguishing the
electric arc is critically important in interrupting a high-magnitude current.
The arc across the contacts arises from a voltage build up across the inter-
rupter contacts. Because it is a stream of hot plasma (hence it is a conductive
17
medium), the current flows through the arc. In an alternating current, there
exists a rapid collapse of arc voltages before the current reverses its polarity,
i.e., at zero crossings, allowing the electric arc to be extinguished. During the
subsequent half cycle, the arc reignites only if the rate of rise of voltage across
the contacts is higher than the rate of rise of the recovery voltage across the
contacts. Successful arc extinction brings about a current interruption. Exist-
ing techniques to expedite arc extinctions include elongating the arc column,
increasing the pressure to constrict the arc, and forcing the arc to pass through
a number of metal plates (arc chutes). Due to a direct current not possess-
ing an inherent zero crossing, extinguishing the electric arc of a direct current
is extremely challenging. Especially for medium voltage and high voltage dc
power systems special methods need to be implemented for interrupting the
current.
2.4 Methods of Breaking DC Currents
Current interruption in a power system depends upon the excitation
voltage source, load, and the energy storage elements in the network. When a
fault occurs in the network, the energy supplied by the source will be dumped
into the resistors and the inductors along the path of the fault current, while
the capacitors will give out some energy proportional to the voltage reduction
in the network. From basic circuit analysis, the fault current is simply
Ifault = Vs/Z (2.1)
18
Based on the formula, two methods for fault current control are evident. The
first method is to control or modify the excitation voltage Vs and the other is
to control the apparent impedance, Z, between the excitation source and the
fault location. Based on these two principles, current interruption is broadly
classified into “Source potential reduction” and “Switch assisted interruption”
as illustrated in Fig. 2.5. The various principle used for classification are
explained in the subsequent sections.
Figure 2.5: Classification of dc circuit breakers.
19
2.4.1 Source Potential Reduction Method
The first method for current interruption involves switching off or re-
ducing the potential of the power source, forcing the current to decay imme-
diately or over time. Although this method may be effective in breaking load
current, unfortunately it is not practical in fault clearing unless the system
is equipped with extra switches at critical points. Switching off the power
source without such switches can result in service interruptions to loads sup-
plied from the same power source. Figure 2.6 shows source control method for
a simple system with backup storage system. Under fault conditions without
two switches the backup system will be feeding current into the fault even if
the source voltage (dc source) is brought to zero. To ensure fault current in-
terruption and to continue serving power to the load both the switches should
be opened.
DC
Fault
Ordinary circuit breaker
source
Circuit breaker with bidirectional
capability
Backup storage
Sensitive loads
Is Ib
Figure 2.6: Source control method for a simple power system with main andbackup system
Source control is an option that is being considered for dc power sys-
tems with ac/dc converters. The firing angle in ac/dc converter can be used
20
for reducing source voltage quickly. This method is investigated in detail in
Chapter 5.
The second method of fault current interruption involves creating a
physical open gap in the conductor carrying the current. The second method
is examined in the following sections. Existing and newly proposed techniques
utilize electromechanical interrupters, solid-state switches, and combinations
of both to interrupt direct currents. Apart from these methods some of the
new methods that are still in research are also examined.
2.4.2 Current Suppression Method
In this method, the source voltage and the apparent impedance to the
fault location are left unmodified at normal currents levels. When a fault
occurs, a sufficiently large impedance is introduced in series to reduce the
current and ultimately bring it to zero. Modern day circuit breakers either
use an arc or a non-linear device for producing the required impedance in
the network. The arc is subsequently extinguished using an electromechanical
switch to completely break the flow of the fault current. Therefore, the current
suppression method is a switch assisted interruption utilizing dc breakers as
shown in Fig. 2.5.
There are three common interruption methods used in dc breakers.
They are
• Direct Current Suppression: These dc breakers, due to the absence
of current zero, are designed to produce a voltage drop equal to the source
21
voltage and withstand the energy dissipation caused by the inductor and
the voltage source until the energy from the inductor reduces to zero.
Direct current suppression breakers can be further classified as those
with non-linear devices and conventional mechanical devices.
• Current Oscillation Based DC Breakers: Usually ac breakers are
designed to interrupt currents at inherent current zeros when the arc
extinguishes temporarily. These breakers can be used for dc current
breaking by fitting an oscillator in parallel with the ac breaker. The
oscillator circuit consists of a capacitor in series with an inductor. Based
on the charge stored across the capacitor, this circuit can be classified
as a passive- or active-circuit oscillator.
• Fuses: They are similar to ac fuses. Once a fuse interrupts a fault
current, the fuse link must be replaced.
Direct current suppression breakers employ non-linear devices and con-
ventional electro-mechanical apparatus. They are
• Breakers employing non-linear devices with current commutation:
1. Pyro-Breakers: Pyro-Breakers consist of a solid copper bar, ex-
plosive charge and a fuse [18]. The solid copper strip in the breaker
carries the continuous current. The copper bar along with the ex-
plosive charge forms the pyrotechnic disconnector. On receiving a
trip command from a relay, the pyrotechnic disconnector shears the
22
copper bar with the help of the explosive charge and commutates
the current to the fuse. The fuse interrupts the current later. This
breaker has special applications in rectifier protection on ac and dc
sides.
2. Solid State Breakers: Solid State Breakers (SSB) are high speed
breakers making use of power thyristors, GTOs, IGBTs, and MOS-
FETs for current interruption. SSBs produce a PN junction barrier
region during current interruption for impeding the current with-
out any arc. Since the above process does not involve any wear and
tear, the life of the breaker is almost infinite. Since power electronic
devices are prone to breakdown at high voltage transients, SSBs are
fitted with a series isolation switch for galvanic isolation. Snubber
capacitors and surge arresters are fitted in parallel with the break-
ers for absorbing the voltage and current surges during turn on and
turn off periods. SSBs are mostly used as current limiting breakers
in those networks where the devices have low short time current
ratings [19], [20] and [21].
• Breakers employing non-linear devices without current commutation:
1. PTC Breakers: PTC breakers make use of positive temperature
coefficient (PTC) resistors as the current-limiting element. The
PTC resistors are made of metal-filled polymer matrix for carrying
the current. Under normal conditions, the heat produced is equal
23
to the heat dissipated such that the filler materials in the matrix
cling together. When the current increases, the matrix expands and
the filler particles move apart due to heat production and produce
almost a step increase in the resistance value [22] and [23]. These
PTC materials conduct the entire steady state current under normal
conditions.
2. Super-conducting Current Limiter: Only resistive supercon-
ducting current limiters (SCCL) are used for dc interruption [24].
All superconductors have a time dependent critical current value.
When the current through the superconductor is lower than the
critical current, the resistance of the superconductor is zero. The
cooling of the superconductors is designed to keep the critical cur-
rent above the load current under normal conditions. When a high
short circuit current above the critical value flows through the con-
ductor, the superconductor loses its zero resistance state and gets
heated up. This process acts like a positive feedback loop and in
a few milliseconds causes a step increase in the superconductors’
impedance. This process is used in SCCL breakers for current in-
terruption.
• Conventional electromechanical breakers: These circuit breakers
use conventional arc quenching media like air, oil, vacuum and SF6.
These breakers can also use auxiliaries like puffers, forced blast, and arc
chutes for enhancing arc interruption.
24
DC breakers with the current oscillation method employ passive- and active-
circuit oscillators:
• Passive circuit oscillator: In this type of circuit breaker, an LC cir-
cuit is connected across the circuit breaker contacts before the opening
of circuit breaker contacts. When the contacts of a circuit breaker start
to move apart, a small voltage appears across the arc. This voltage
excites the LC circuit into oscillation. The oscillation increases in mag-
nitude with time. Finally at some point in time the current through
the oscillator will be equal to the fault current. When this happens,
the fault current commutates from the breaker to the LC circuit. The
transmission line inductance charges the capacitor to a high voltage.
• Active circuit oscillator: The circuit for an active current commu-
tation breaker looks almost similar to the passive circuit, except that
the capacitor is always kept pre-charged. When the circuit breaker re-
ceives a trip command, the contacts are retracted and a counter current
is injected through the arcing contacts with the help of the capacitor.
• Hybrid circuit breakers: Hybrid circuit breakers are designed with
mechanical and solid state breakers in such a way that they have the
advantages of both technologies [25], [26]. The schematic of a hybrid
circuit breaker is shown in Fig. 2.7. During normal operating condi-
tions, the current flows through the mechanical breaker (S). When a
fault is detected, breaker (S) opens and the current is commuted to the
25
semiconductor device. As a result, the mechanical part does not need
to extinguish the arc. The semiconductor device conducts until breaker
(S) is able to fully block the voltage. The stored energy in the line in-
ductance causes fast voltage increase until the varistor conducts. The
varistor blocks voltage above the grid voltage and hence the line induc-
tance is demagnetized.
Mechanical Breaker (S) Isolation switch
Snubber circuit
Varistor
Power Electronic
Switch
Figure 2.7: Hybrid circuit breaker.
2.5 DC Breaker Manufacturers
Table 2.2 provides some of the dc breakers available in the market with
their important ratings. These ratings are main factors used to determine the
adequacy of a breaker for a dc network.
26
Table 2.1: DC breakers in market and their ratings.
Siemens Siemens ControlledPower LLC
ControlledPower LLC
BrandName
Sitras DSG Sitras CSG HSN FBK
RatedVoltage
900, 1800, 3600V
900, 1800 V 800/1600 V 300, 800 to 1kV
RatedCurrent
4.7,,10 kA 3.3 kA 4-12 kA 1.6-12 kA
InterruptionTime
High speed Semi highspeed, Highspeed
RatedShortCircuitCurrent
50 kA 25 kA 120/60 kA 120 kA
Area ofApplica-tion
dc railwaysmass transitsystem
dc railwaysmass transitsystem, tramsand trolleys
- Railways,crane, steelmills
Typeof TestPassed
EN 50123-6,IEC 61992-6
EN 50123-6,EN 50328
ANSI C37-14:1979, BS4752:1977, IEC157:1976, ANSIC37-16:1980,BS 5227:1975,IEC 298:1981,ANSI C37-17:1972, ANSIC37-20:1974
ANSI C37-16:1980
27
Table 2.2: DC breakers in market and their ratings.
GE Secheron Hawker Sidde-ley, Whipp &bourne
ABB
BrandName
Gerapid MB lightning Is limiter
RatedVoltage
1.0-3.9kVdc 750-3000 V 1600V 0.75-40.5kV
RatedCurrent
2.6-6.0 kA 1-6 kA 4-8kA 630-5000 A
InterruptionTime
max 3 ms (highspeed)
RatedShortCircuitCurrent
134 kAdc @1.2kV
100-178 kA 140-210 kA rms
Mechanicalswitch
Electrodynamiccircuit breaker
- Mechanicalswitch with arcchutes
Pyro technique
Area ofApplica-tion
Railway and in-dustrial appli-cations, physicsresearch
dc traction Railway, in-dustrial andmilitary appli-cations
Upgrading ex-isting distribu-tion system
Typeof TestPassed
IEC947-2,EN50123-2,ANSI C37.14
EN 50123, IEC61992
BS EN 50123-1: 2003, BSEN 50123-2:2003, BS EN50123-6: 2003,ANSI C37.14:2002, ANSIC37.16: 2000,ANSI C37.20.1:2002
28
Chapter 3
Operation of Six-Pulse Rectifier
3.1 Introduction
Average value models (AVM) for power electronic converters are de-
rived by averaging state variables in a circuit like inductor current and capaci-
tor voltage in the converter over one switching interval of the power converter
operation [8]. Deriving the AVM for line-commutated six-pulse rectifiers re-
quires knowledge about the switching operation of six-pulse rectifiers. In this
chapter, the operation of six-pulse rectifier is explained with various switch-
ings. The switching configurations for a six-pulse rectifier are found to change
with load conditions as shown in Fig. 3.2 so they are classified into three
modes of operation: mode 1, mode 2 and mode 3. Each mode of operation
has its own boundary conditions based on current and voltage. Section 3.2
explains the modes of operation of a six-pulse rectifier.
3.2 Modes of Operation
To explain the behavior of a six-pulse rectifier the circuit shown in
Fig. 3.1 is used here. The circuit is composed of an ac source (ea,eb,ec), ac
inductance (Lc), thyristors 1, 3 and 5 which form the upper part of the bridge
29
and carry positive current, and thyristors 2, 4 and 6 which form the lower part
of the bridge and carry negative current. On the dc side there is a second order
dc filter composed of Ldc and C with a series resistor Rdc and a dc resistive
load Rload. As the load is varied from light load to short circuit conditions the
six-pulse rectifier exhibits three different forms of switching pattern due to the
action of ac inductor Lc. For a cycle of sinusoidal ac input voltage the rectifier
exhibits six switching intervals. These six switching intervals are identical in
terms of the number of conducting switches in the upper and lower half of the
bridge and each interval lasts 60o. Depending upon the number of diodes that
conduct simultaneously during a switching interval, the rectifier would operate
in mode 1, mode 2 or mode 3.
To study the operation of the rectifier a detailed model simulation
was conducted. Power System Computer Aided Design (PSCAD) simulator
was used for the simulation. PSCAD accepts details of the switches like on-
resistance, breakdown voltage and off resistance to simulate transients in the
circuit. Even though it uses fixed simulation steps it uses interpolation tech-
niques to detect switchings in between simulation steps. This makes it easier
to create fast and accurate simulation models for short circuit calculations in
switching circuits [27] . The model used here for studying the steady state op-
eration is later modified for short circuit calculations in next chapter. It was
also found to be ideal for measuring firing angle and overlap angle accurately
for the converter using in-built library blocks. Figure 3.2 shows the voltage,
current, firing angle, overlap angle and switch conduction pattern for a slow
30
negative ramp in dc load resistance. The results were obtained from a PSCAD
simulation of a rectifier with,
AC line-to-line voltage = 4.16 kV
AC inductance Lc = 2.29 mH
DC filter inductor Ldc = 15 mH
DC filter capacitor C = 500 µF
DC filter series resistor Rdc = 0.1mΩ
The firing signal to the thyristors were always maintained at 0o throughout the
simulation. The negative ramp in load resistance (Rload) was obtained by using
a variable resistor and an integrator with negative integration constant. The
changes were maintained slow enough to monitor the steady state operation
of the rectifier for various load resistance values. Each mode shown in Fig. 3.2
has been explained in the following subsections.
3.2.1 Mode 1 Operation
The operation of rectifiers in Mode 1 has been studied extensively since
it is the normal mode of operation for six-pulse rectifiers feeding dc loads.
During light to normal load conditions as shown in Fig. 3.2 from 0 to around
17.5 s when the load resistance is high (approx 10 to 2.5 Ω), the rectifier
exhibits Mode 1 conduction pattern. In Mode 1, each switching interval can
be divided into two sub-intervals: conduction and commutation sub-intervals.
This pattern is illustrated with an instance of switching where ‘b’ phase starts
31
ae
be
ce
cL
cL
cL
dcL
dciai
bi
ci
1i
2i
3i 5i
4i 6i
dcR
C
dce
loadR
Figure 3.1: A six-pulse rectifier model used for analysis.
conducting the positive dc current to bus ‘dc1’ in Fig. 3.3.
The exact instance where thyristor ‘3’ starts conducting ‘b’ phase cur-
rent is controlled by the firing signal of thyristor ‘3’. When thyristor ‘3’ starts
conducting which is marked as α in Fig. 3.3, thyristor ‘1’ which has been
conducting ‘a’ phase positive current does not stop conducting immediately
because of the magnetic energy stored in the ‘a’ phase ac inductor Lc. The
corresponding circuit path with three switch conduction pattern is shown in
Fig. 3.4. α is called as firing angle of the thyristor. It is usually measured
from a reference 0o. The reference 0o falls at a point when ‘b’ phase voltage
becomes greater than the other two AC voltages ea and ec.
During the commutation the ‘a’ phase current drops and ‘b’ phase
current increases to take over the entire positive dc current. This lasts for a
32
0 2 4 6 8 10 12 14 16 18 200
10
20
Time (s)
Rlo
ad(o
hm)
0 2 4 6 8 10 12 14 16 18 200
2
4
6
8
Time (s)
DC
cur
rent
(kA
)/D
C v
olta
ge(k
V)
0 2 4 6 8 10 12 14 16 18 200
50
100
Time (s)
Gam
ma(
deg)
/A
lpha
(deg
)
0 2 4 6 8 10 12 14 16 18 202
3
4
Time (s)
Num
ber
of
cond
uctin
g di
odes
dce dci
u α
Figure 3.2: Firing angle α, overlap angle u, dc voltage edc, and current idc fordecreasing load resistance.
33
period u, where u is the overlap angle. It is defined as the period when two
switches from the same half of the bridge conduct together. The overlap angle
of the switches depends upon the source inductance on the ac side and the
current flowing through them. During this period the dc voltage dips due to
a line-to-line short-circuit on the ac side.
At the end of commutation, thyristor ‘1’ stops conducting and conduc-
tion sub-interval starts as shown in Fig. 3.3 at point α+u. During conduction,
two switch conduction occurs as shown in Fig. 3.5. This pattern from α to
α + π3
repeats for all the six switches forming the six switching intervals of
mode 1.
By examining Fig. 3.3 it can be observed that the overlap angle u can
potentially increase up to 120o for increasing load. But it is not possible for
the overlap angle to increase smoothly without an increase in the firing angle
α. The explanation for the temporary constantness of overlap angle in Fig. 3.2
is explained with a separate mode of operation called Mode 2 in the following
section.
34
DC and AC currents
time(s) 0.2330 0.2340 0.2350 0.2360 0.2370 0.2380 0.2390 0.2400 0.2410 . . .
-4.0
-3.0
-2.0
-1.0
0.0
1.0
2.0
3.0
Cur
rent
(kA
)
Ia Ib Ic dcCrnt
α u+α3
πα +
Figure 3.3: AC and dc currents during mode 1 pattern of conduction
ae
be
ce
cL
cL
cL
dcL
dciai
bi
ci
1i
2i
3i 5i
4i 6i
dcR
C
de
rectv
Figure 3.4: Conduction pattern during commutation sub-interval in mode 1.
35
ae
be
ce
cL
cL
cL
dcL
dciai
bi
ci
1i
2i
3i 5i
4i 6i
dcR
C
de
rectv
Figure 3.5: Conduction pattern during conduction sub-interval in Mode 1.
3.2.2 Mode 2 Operation
In Mode 1, not more than three switches conduct at any point of time
and the overlap angle always stays below 60o. During Mode 2 operation shown
in Fig. 3.2, the firing angle increases for increase in dc load current while
the overlap angle stays constant at 60o. This change happens automatically
without any change in the firing signals of the thyristors, this change is called
as auto phase control [11].
Mode 2 pattern of conduction can be illustrated with the circuit shown
in Fig. 3.1 and an instance of its switching cycle in Fig. 3.6. At point ‘A’ in
the Fig. 3.6, thyristor ‘1’ will be conducting ‘a’ phase current and ‘a’ phase
voltage will be the red waveform shown in Fig. 3.6. Thyristors ‘6’ and ‘2’ will
short together points ‘b’ and ‘c’ to the bus ‘dc2’ shown in Fig. 3.1 and the
voltage in phase ‘b’ and ‘c’ will be the waveform shown in black in Fig. 3.6.
36
ae be ce
A
B
2cb ee +
)(θv
θ
Figure 3.6: An instance of switching cycle with ac source voltages and voltageat points ‘b’ and ‘c’ in Fig. 3.1 when thyristors ‘6’ and ‘2’ conduct(i.e. duringcommutation).
DC and AC currents
Angle 7.6275 7.6300 7.6325 7.6350 7.6375 7.6400 7.6425 7.6450 7.6475 7.6500 . . .
-12.5
-10.0
-7.5
-5.0
-2.5
0.0
2.5
5.0
7.5
10.0
Cur
rent
(kA
)
ia ib ic idc
α3
πα +
Figure 3.7: AC and dc currents during mode 2 pattern of conduction.
37
ae
be
ce
cL
cL
cL
dcL
dciai
bi
ci
1i
2i
3i 5i
4i 6i
dcR
C
de
rectv
Figure 3.8: Mode 2 circuit path at point ‘A’ in Fig. 3.6. The greyed outswitches are non-conducting.
ae
be
ce
cL
cL
cL
dcL
dciai
bi
ci
1i
2i
3i 5i
4i 6i
dcR
C
de
rectv
Figure 3.9: Mode 2 circuit path at some time after point ‘A’ in Fig. 3.6 whenthe commutation in the lower half of the bridge ends. The greyed out switchesare non-conducting.
38
Thyristor ‘3’ which would normally conduct at point ‘A’ in the graph of Fig.
3.6 with the normal ‘b’ phase positive bias voltage shown as green waveform
in Fig. 3.6 will not able to conduct due to the overlapping conduction in the
other half of the bridge and the resultant negative bias it creates on thyristor
‘3’. Due to the above reason, thyristor ‘3’ can conduct current only when the
commutation in the lower half of the bridge ends. As a result of this the circuit
configuration in Fig. 3.8 directly changes to that in Fig. 3.9 and three switch
conduction configuration occurs throughout a switching interval as shown in
Fig. 3.7.
The overlap angle can increase beyond 60o, only if the firing angle
increases to 30o, where at point ‘B’ in the graph favorable conditions exist for
the conduction of thyristor ‘3’ (the black wave becomes greater than the red at
point ‘B’ in Fig. 3.6) at the same time when commutation can still take place
in the negative half of the bridge. Therefore for overlap angle to be above
60o, commutation should take place on both half of the bridge and the firing
angle should be above 30o. This pattern of conduction leads to four thyristors
conducting at the same instance giving rise to mode 3 pattern of conduction
which is explained in the following subsection.
3.2.3 Mode 3 Operation
In mode 3 due to the reasons explained in mode 2 subsection, four
switch conduction occurs. The conduction pattern starting from point ‘B’ of
the ac emf waveform in Fig. 3.6 up to the point δ (in Fig. 3.10) where ‘b’
39
phase completely takes over the positive dc current is shown in Fig. 3.11,
3.12 and 3.13 with the ac currents in Fig. 3.10. Here δ = α + u is the angle
for completion of commutation in one half of the bridge. Continuing from
the argument in the previous subsection, thyristor ‘3’ starts conducting at the
same time when commutation is happening in the lower half of the bridge.
This four switch conduction pattern is shown in Fig. 3.11. After some time,
commutation in the lower half of the bridge ends and the conduction pattern
as shown in Fig. 3.12 happens. During this period, commutation happens
only at the top half of the bridge. At α + π3
thyristor ‘4’ from the lower half
of the bridge is fired and the four switch conduction happens again as shown
in Fig. 3.13 until δ.
Table 3.1 summarizes the results explained in this chapter. In Mode
1, not more than three switches conduct at any point of time and the overlap
angle always stays below 60o. In Mode 2, three switches conduct during a
switching cycle and the overlap angle stays at 60o. In Mode 3, three and
four switches conduct during a switching cycle and the overlap angle is always
between 60o and 120o.
Table 3.1: Modes of operation of six-pulse rectifier
Mode of operation Conduction Overlappattern angle
Mode 1 2-3 0o < u < 60o
Mode 2 3 u = 60o
Mode 3 3-4 60o < u < 120o
40
DC and AC currents
Angle 7.9640 7.9660 7.9680 7.9700 7.9720 7.9740 7.9760 7.9780 7.9800 7.9820 . . .
-20.0
-15.0
-10.0
-5.0
0.0
5.0
10.0
15.0
20.0
Cur
rent
(kA
)
ia ib ic idc
α3
πδ −3
πα + δ3
2πα +
Figure 3.10: AC and dc currents during mode 3 pattern of conduction
ae
be
ce
cL
cL
cL
dcL
dciai
bi
ci
1i
2i
3i 5i
4i 6i
dcR
C
de
rectv
Figure 3.11: Mode 3 conduction pattern from α to δ − π3. The greyed out
switches are non-conducting.
41
ae
be
ce
cL
cL
cL
dcL
dciai
bi
ci
1i
2i
3i 5i
4i 6i
dcR
C
de
rectv
Figure 3.12: Mode 3 conduction pattern from δ− π3
to α+ π3. The greyed out
switches are non-conducting.
ae
be
ce
cL
cL
cL
dcL
dciai
bi
ci
1i
2i
3i 5i
4i 6i
dcR
C
de
rectv
Figure 3.13: Mode 3 conduction pattern from α + π3
to δ. The greyed outswitches are non-conducting.
42
In Chapter 4, the switching pattern explained above for Mode 1, Mode
2 and Mode 3 are used to obtain an average value model for a six-pulse rectifier.
Due to the variation in the conduction pattern of the rectifier switches three
average value models are derived for three modes.
43
Chapter 4
Modeling of Six-Pulse Rectifier using Average
Value Modeling Approach and its Validation
In the previous chapter, it was seen that the circuit path in a recti-
fier keeps changing consistently during an ac input cycle. Detailed switching
models that make use of separate state space equations for each switching in
a circuit can not be used to get an analytical model for a rectifier. To develop
an analytical model for a rectifier average value modeling technique has been
adopted here. In average value modeling technique, these switchings, which
happen within a switching interval, are neglected or averaged and the resultant
model describes the dynamics of switching circuits for use in various applica-
tions like controller design and fast simulation models. In the next chapter,
applicability of the model for characterizing a short-circuit current for a dc
fault is discussed.
Average value modeling can be done analytically or parametrically for
a given circuit. In parametric approach the final AVM is obtained by numer-
ically extracting the key model parameters from several detailed simulations.
Even though it is simpler, it needs several detailed model simulation runs to
characterize the switching circuit. On the other hand analytical approach for
44
AVM does not need any detailed model simulations in packages like PSCAD
or PSIM but they need analytical derivation by taking into account all the
changes the circuit undergoes during a switching interval. The switching pat-
tern required for AVM derivation has been illustrated in Chapter 3. Analytical
and parametric average value models (AVM) of six-pulse rectifier have been
presented in [10], and [14]. These AVMs are capable of determining the dy-
namics of dc current, however analytical models are available only for Mode 1
which is the mode of operation for normal loads and overloads during steady-
state. Mode 2 and mode 3 have not been analyzed using analytical models
due to the complexity of switching involved in these modes. In this chap-
ter analytical AVM has been derived for mode 2 and 3 operation of rectifier
using the switching pattern given in the previous chapter. For completeness
of analysis mode 1 derivation is also presented in this chapter. The models
are applicable for both controlled and uncontrolled six-pulse bridge rectifiers.
Section 4.1 shows the analytical models for the three modes of operation. The
AVM results have been used to derive the AC short-circuit current in section
4.3. The analytical models derived in Sections 4.1 and 4.3 are explained and
the results are validated with detailed switch model simulations from PSCAD
in Section 4.4.
4.1 Analytical Model Derivation
Analytical models for the rectifier have been derived using the method
defined in [9]. In this method the dc current flowing through the filter inductor
45
ae
be
ceLoad
Figure 4.1: Basic six-pulse rectifier model used for derivation of AVM.
is assumed to be smooth enough to be represented approximately with first
order Taylor series,
idc(θ) = idc0 + k(θ − α− u
2
)(4.1)
In (4.1), current idc0 is the instantaneous dc current flowing through the dc
inductor halfway through commutation, u is the overlap angle, α is the firing
angle of the bridge switches and k is the rate of rise of dc current with respect
to θ = ωt. By assuming such a linear representation instead of a constant
value for a switching interval, which is typical for average value modeling, the
dynamics of the rectifier current within a switching interval can be captured.
The dc current given in equation form (4.1) is shown in Fig. 4.2. To satisfac-
torily represent the rectifier current using (4.1) the dc filter inductance should
be high which is applicable for current source rectifiers and limited cases of
46
0.202 0.203 0.204 0.205 0.206 0.207 0.208 0.209 0.21 0.211
150
200
250
300
350
400
450
500
Time(s)
Idc(
A)
DetailedAVM
−+=20u
kii dcdc θ
0dci
dci
Figure 4.2: Red line shows the linear approximation of the instantaneousinductor current (blue) averaged over a switching cycle.
voltage source rectifiers.
Reference [9] contains the average value equations for mode 1 and the
overlap angle function for mode 1 of an uncontrolled rectifier. In this section,
the derivation is extended for mode 1, mode 2 and mode 3 operation of a
controlled rectifier. Firing angle and overlap angle functions that define the
boundary conditions for each mode are also derived. In this derivation, a three-
phase voltage source with 60o phase lead is used so that ‘b’ phase positive leg
thyristor ‘3’ shown in Fig. 4.1, can start conducting at 0o if firing angle is 0o.
The ac voltage is shown below in equation form.
ea = Em cos(ωt+
π
3
)eb = Em cos
(ωt− π
3
)(4.2)
ec = Em cos (ωt− π)
47
In (4.2), Em is the peak line-to-neutral ac voltage and ω is the angular fre-
quency of the ac voltage.
4.1.1 Overlap Angle and Firing Angle in Mode 1 and Mode 2
In mode 1, the rectifier exhibits two-switch and three-switch conduction
configurations in a switching cycle. The current waveform for an instance of
mode 1 operation and the corresponding circuit diagrams are shown in Fig. 4.3,
4.4 and 4.5 respectively. The circuit for the commutation period corresponds
to Fig. 4.4 which is obtained from switching pattern shown in Fig. 3.4 and
the circuit for the conduction period corresponds to Fig. 4.5 which is obtained
from switching pattern shown in Fig. 3.5. By applying Kirchoff’s voltage law
(KVL) for the commutation circuit in Fig. 4.4, the following equation can be
obtained.
ea(t)− eb(t) = Lcdiadt− Lc
dibdt
(4.3)
Applying Kirchoff’s current law (KCL),
ia(t) + ib(t) = idc(t) (4.4)
Substituting (4.4) and (4.2) in (4.3) yields,
− 2Lcdibdt
+ Lcdidcdt
=√
3Em sin(ωt) (4.5)
− 2Lcdibdωt
+ Lcdidcdωt
=
√3
ωEm sin(ωt) (4.6)
Substituting idc from (4.1)and integrating (4.6) from α to θ yields,∫ θ
α
dib(θ)
dθdθ =
k(θ − α)
2−√
3Em2ωLc
∫ θ
α
sin(ωt)dθ (4.7)
48
DC and AC currents
Angle 0.2340 0.2360 0.2380 0.2400 0.2420 . . .
-8.0
-6.0
-4.0
-2.0
0.0
2.0
4.0
6.0
8.0 C
urre
nt (
kA)
ia ib ic idc
α3
πα +u
dci
ai
bi
ci
Figure 4.3: ac and dc current flow in mode 1 operation.
ae
be
ce
cL
cL
cL
dcLai
bi
ci
2i
dce
3i
C loadR
dcR
dci
dcV
1i
Figure 4.4: Three-switch conduction configuration for mode 1 (α < θ < α+u),mode 2 (α < θ < α + π/3) and mode 3 (δ − π/3 < θ < α + π/3).
49
be bi
2i
3i
ce
cL
cL ci
dcL
dceC loadR
dcR
dci
dcV
Figure 4.5: Two-switch conduction configuration for mode 1 (α + u < θ <α + π/3).
ib(θ) = ib(α) +k(θ − α)
2+
√3Em
2ωLc(cos(α)− cos(θ)) (4.8)
From Fig. 4.3 it can be seen that ‘b’ phase current starts flowing only after
switch ‘3’ gets fired. Using this initial condition at α,
ib(α) = 0 (4.9)
Substituting in (4.8),
ib(θ) =k(θ − α)
2+
√3Em
2ωLc(cos(α)− cos(θ)) (4.10)
At the end of commutation, phase ‘b’ current will be equal to the dc current.
By substituting ib(u+ α) = idc(u+ α) in (4.1),
ib(u+ α) = idc0 +ku
2(4.11)
50
Substituting the result shown above in (4.10) yields,
idc0 +ku
2− k(α + u− α)
2−√
3Em2ωLc
(cos(α)− cos(α + u)) = 0 (4.12)
idc0 =
√3Em
2ωLc(cos(α)− cos(α + u)) (4.13)
cos(α)− cos(α + u) = idc02ωLc√
3Em(4.14)
cos(α + u) = cos(α)− idc02ωLc√
3Em(4.15)
Therefore overlap angle for mode 1 can be given by,
u = −α + arccos
(cos(α)− 2ωLcidc0√
3Em
)(4.16)
Since (4.16) is derived with the commutation circuit shown in Fig. 4.4, the
results are applicable for mode 2, if overlap angle u = π/3 is substituted in
(4.16).
cos(π/3 + α) = cos(α)− 2ωLcidc0√3Em
cos(π/3 + α)− cos(α) = −2ωLcidc0√3Em
2 sin(π/6 + α)sin(π/6) = −2ωLcidc0√3Em
sin(π/6 + α) = −2ωLcidc0√3Em
cos(π/3− α) = −2ωLcidc0√3Em
The resulting auto firing angle function for mode 2 is shown below.
α = π/3− arccos
(2ωLcidc0√
3Em
)(4.17)
51
4.2 Analytical Model for Mode 1 and Mode 2 Operation
By applying KVL to the circuit in Fig. 4.4 and Fig. 4.5, the dc voltage
at the rectifier terminals can be shown to be,
vdc(θ) = eb − ec − ωLcdibdθ
+ ωLcdicdθ
(4.18)
This equation is applicable for the entire switching cycle. By averaging (4.18)
over α < θ < α+ π3
according to average value modeling approach, Vdc(t) can
be obtained.
Vdc(ωt) =3
π
∫ α+π/3
α
eb(θ)− ec(θ)− ωLc(dibdθ− dicdθ
)dθ (4.19)
The bar over the variables in the equation indicate that these are av-
eraged values. Let,
Vdc1(ωt) =3
π
∫ α+π/3
α
(eb(θ)− ec(θ))dθ (4.20)
Vdc2(ωt) =3
π
∫ α+π/3
α
ωLc
(dibdθ− dicdθ
)dθ (4.21)
From (4.20)
Vdc1(ωt) =3
π
∫ α+π/3
α
(eb(θ)− ec(θ))dθ (4.22)
=3Emπ
∫ α+π/3
α
cos(ωt+ π/3)− cos(ωt− π)dθ
=3Emπ
(sin
(α +
2π
3
)− sin
(α +
π
3
)− sin
(α− 2π
3
)+ sin (α− π)
)Vdc1(ωt) =
3√
3Emπ
cos(α) (4.23)
52
From equation (4.21)
Vdc2(ωt) =3
π
∫ α+π/3
α
ωLc
(dibdθ− dicdθ
)dθ (4.24)
Vdc2(ωt) =3ωLcπ
(∫ α+u
α
dibdθdθ +
∫ α+π/3
α+u
dibdθdθ−
∫ α+π/3
α
dicdθdθ
)(4.25)
From Fig. 4.4 and 4.5, it can be seen that ‘c’ phase current is equal to the
dc current for α < θ < α + π3. ‘b’ phase current for α < θ < α + u has been
derived in (4.10). For the period α+u < θ < α+ π3, ‘b’ phase current is equal
to the dc current as shown in Fig. 4.5. By above argument equations (4.10)
and (4.1) can be substituted in (4.25) as shown below.
Vdc2(ωt) =3ωLcπ
(∫ α+u
α
(k
2+
√3Em
2ωLcsin θ
)dθ +
∫ α+π/3
α+u
kdθ +
∫ α+π/3
α
kdθ
)
Vdc2(ωt) =ku
2+
√3Em
2ωLc(− cos(u+ α) + cos(α)) + k(π/3− u) + k(π/3)
Substituting from (4.14)
Vdc2(ωt) = ωLck
(2− 3u
2π
)+
3ωLcπ
idc0 (4.26)
From equations (4.20), (4.21), (4.23), (4.26) and (4.18)
Vdc(ωt) =3√
3Emπ
cos(α)− ωLck(
2− 3u
2π
)− 3ωLc
πidc0 (4.27)
53
Vdc(t) =3√
3Emπ
cos(α)− 3ωLcπ
idc0 − Lcdidcdt
(2− 3u
2π
)(4.28)
By applying KVL to the dc side of the circuit in Fig. 4.1 following
equation can be obtained for the dc voltage vdc(t).
vdc(t) = idc0Rdc +didcdt
Ldc + edc (4.29)
Substituting (4.29) into (4.28) yields,
didcdt
=3√3Em
πcos(α)− idc0
(Rdc + 3ωLc
π
)− edc
Ldc + Lc(2− 3u
2π
) (4.30)
Equation (4.30) describes the dc current dynamics of the rectifier and the dc
filter inductor in mode 1 and mode 2.
4.2.1 Validation of Analytical Model for Mode 1 Operation withan Uncontrolled Rectifier
To verify the working of the AVM in mode 1 a sample uncontrolled
rectifier model shown in Fig. 4.6 was subjected to various load conditions.
The rectifier has a full load capacity of 10 MW and supplies 5 kV during full
load conditions. On the ac side, the ac source supplies 4.16 kV line-to-line
voltage and has 0.1 pu short circuit impedance. The results obtained from
the AVM and the detailed model for edc, idc, overlap angle and firing angle
are shown in Fig. 4.7, 4.8, 4.9 and 4.10 respectively. The detailed model was
simulated using PSCAD and the AVM was simulated using Simulink.
Figure 4.11 shows the number of switches conducting in the rectifier. In
mode 1 operation, the rectifier can be seen to have 2 to 3 switches conducting
54
during a switching cycle. The rectifier operates at half of the rated load (5
MVA corresponding to load resistance of 5.94Ω) at the start of the simulation.
The dc voltage is 5457 V and the difference between detailed model result and
AVM result is very slight. The dc current based on the Average Value Model
is 918.7 A and it has a flat profile corresponding to the average value of the
dc link current computed by the detailed model.
A
B
C
VaRec
NaR
VbRec
NbR
VcRec
NcR
3 PhaseRMS Vpu_RecVpuR
A
B
C
R=0
dcCrnt
0.459e-3 [H]
LcD1
D2
D3
D6
D5
D4
20e-3[H]
Ldc
0.01 [ohm]
Rdc
Ia
Ib
Ic
4.16 kV AC 60 Hz
3 phase voltage source
Rlo
ad +
50
0[u
F]
loa
dC
rnt
edc
0.459e-3 [H]
0.459e-3 [H]
Figure 4.6: A 10 MVA rectifier used for validation of AVM
At t = 0.2 s the load is changed to the full rated value (10 MVA corre-
sponding to load of resistance of 2.71 Ω). The dc current and voltage obtained
from the mode 1 AVM can be seen to closely follow the values obtained from
the detailed model even during the transients in Fig. 4.7 and 4.8. The dc link
current and voltage are around 1946 A and 5277 V for the AVM. It can be
observed from the results that mode 1 AVM results are accurate during steady
state as well as transient conditions.
55
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.40
1000
2000
3000
4000
5000
6000
7000
time(s)
e dc(V
)
Detailed modelAVM Mode 1
5277 V5457 V
Rload
=5.94 Ω Rload
=2.71 Ω
Figure 4.7: Rectifier terminal voltage at the dc side in mode 1.
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.40
500
1000
1500
2000
2500
Time(s)
I dc(A
)
Detailed modelAVM Mode 1
918.7 A
1946 A
Rload
=5.94 Ω Rload
=2.71 Ω
Figure 4.8: Rectifier terminal current at the dc side in mode 1.
56
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.40
5
10
15
20
25
30
Time(s)
Ove
rlap
angl
e u
(in d
egre
es)
18.92o
27.69o
Rload
=5.94 Ω Rload
=2.71 Ω
Figure 4.9: Overlap angle of the rectifier in mode 1.
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8−1
−0.8
−0.6
−0.4
−0.2
0
0.2
0.4
0.6
0.8
1
time(s)
Aut
o fin
ing
angl
e α
(in d
egre
es)
Rload
=5.94 Ω Rload
=2.71 Ω
Figure 4.10: Firing angle of the rectifier in mode 1.
57
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.42
2.5
3
3.5
4
4.5
5
5.5
6
Time(s)
Num
ber
of c
ondu
ctin
g sw
itche
s
Rload
=5.94 Ω Rload
=2.71 Ω
Figure 4.11: Number of conducting switches in Mode 1.
4.2.2 Validation of Analytical Model for Mode 2 Operation withUncontrolled Rectifier
Mode 2 AVM results are verified with the PSCAD switch model results
(Fig. 4.6) under heavy load conditions in Fig. 4.12, 4.13, 4.14, and 4.15. At
t = 0.2 s a heavy load (with resistance of 0.4 Ω) is simulated at the terminals
of the rectifier. The load draws a dc current of 9.73 kA. At t = 0.4 s, another
heavy load (with a resistance of 0.4 Ω) is simulated at the terminals of the
rectifier. Due to simultaneous conduction of three switches at the same time
and the increase in firing angle(auto phase control) as shown in Fig. 4.16 the
voltage on the dc side decreases.
58
0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6
3
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
Time(s)
e dc (
kV)
Detailed modelAVM mode 2
Rload
=0.4 Ω Rload
=0.3 Ω
3.879 kV
3.454 kV
Figure 4.12: Rectifier terminal voltage at the DC side in mode 2.
0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6
9.8
10
10.2
10.4
10.6
10.8
11
11.2
11.4
11.6
11.8
Time(s)
i dc(k
A)
Detailed modelAVM mode 2
Rload
=0.4 Ω Rload
=0.3 Ω
9.73 kA
11.49 kA
Figure 4.13: Rectifier terminal current at the DC side in mode 2.
59
0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.658.5
59
59.5
60
60.5
61
time(s)
Ove
rlap
angl
e u
(in d
egre
es)
Rload
=0.4 Ω Rload
=0.3 Ω
Figure 4.14: Overlap angle of the rectifier in mode 2.
0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.64
5
6
7
8
9
10
11
12
13
time(s)
Aut
o fin
ing
angl
e α
(in d
egre
es)
Rload
=0.3 ΩRload
=0.4 Ω4.9o
12.7o
Figure 4.15: Firing angle of the rectifier in mode 2.
60
0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.62
2.2
2.4
2.6
2.8
3
3.2
3.4
3.6
3.8
4
time(s)
Num
ber
of c
ondu
ctin
g di
odes
Rload
= 0.3 ΩRload
= 0.4 Ω
Figure 4.16: Number of conducting switches in mode 2.
4.2.3 Overlap Angle for Mode 3
For mode 3, during a switching cycle, the circuit changes between three-
switch and four-switch conduction configurations. Figure 4.17, 4.4, 4.18 and
4.19 show an instance of mode 3 current waveform and the corresponding
circuit diagrams in three-switch and four-switch conduction configurations.
During the commutation on the top and bottom half of the bridge,
α < θ < δ − π/3, four switches conduct. Here δ = α + u. The conduction
configuration is shown in Fig. 4.18. Applying KVL on the ac side of the
rectifier, the following equation can be obtained for the three-phase ac short-
circuit.
ea − eb = Lcdiadt− Lc
dibdt
(4.31)
61
DC and AC currents
Angle 0.6200 0.6220 0.6240 0.6260 . . .
-20.0
-15.0
-10.0
-5.0
0.0
5.0
10.0
15.0
20.0 C
urre
nt (
kA)
ia ib ic idc
α3
πδ −3
πα + δ
dci
ai
bi
ci
Figure 4.17: AC and dc currents during a switching cycle of the rectifier inMode 3.
Since ia + ib + ic = 0,
ea − eb − 2Lcdiadt− Lc
dicdt
= 0 (4.32)
Similarly,
ec − eb − 2Lcdicdt− Lc
diadt
= 0 (4.33)
From 4.32 and 4.33,
eaLc
=diadt
(4.34)
Since ia(θ) = i1(θ) = idc(θ) − i3(θ) for the period α < θ < δ − π/3, the
following equation can be obtained.
eaLc
=didcdt− di3
dt(4.35)
62
1i
2i
3i
6i
ae
be
ce
cL
cL
cL
ai
bi
ci
dcL
dceC loadR
dcR
dci
dcV
Figure 4.18: Four-switch conduction configuration for Mode 3 during (α <θ < δ − π/3).
ae
be
ce
cL
cL
cL
1i
ai
bi
ci
2i
3i
4i
dcL
dceC loadR
dcR
dci
dcV
Figure 4.19: Four-switch conduction configuration for Mode 3 during (α +π/3 < θ < δ)
63
Substituting (4.1)
eaωLc
= k − di3dθ
(4.36)
di3dθ
= k − Em cos(ωt+ pi/3)
ωLc(4.37)
Integrating from α to θ
i3(θ) = k (θ − α)− EmωLc
[sin(θ +
π
3
)− sin
(α +
π
3
)](4.38)
At θ = δ − π/3,
i3(δ − π/3) = k(δ − α− π
3
)− EmωLc
[sin (δ)
− sin(α +
π
3
)](4.39)
During the next part, δ−π/3 < θ < α+π/3, three-switch conduction as
shown in Fig. 4.4 occurs. By applying KVL to the circuit, following equation
can be obtained.
eb − ea = Lcdi3dt− Lc
di1dt
Since i1 = idc − i3,
eb − ea = 2Lcdi3dt− Lc
didcdt
(4.40)
eb − eaω
= 2Lcdi3dθ− Lck (4.41)
2di3dθ
=eb − eaωLc
+ k (4.42)
64
Using (4.2) in (4.42) and integrating from δ − π/3 to θ yields current
i3(θ) for δ − π/3 < θ < α + π/3.
i3(θ)− i3(δ − π/3) =
√3Em
2ωLc
(sin(θ − π
2
)− sin
(δ − 5π
6
))+k
2
(θ − δ +
π
3
)From (4.39),
i3(θ) =
√3Em
2ωLc
(sin(θ − π
2
)− sin
(δ − 5π
6
))+k
2
(θ − δ +
π
3
)+ k(δ − π/3− α)
− EmωLc
(sin (δ)− sin
(α +
π
3
))(4.43)
During the next switching cycle α + π/3 < θ < δ, four-switch conduction as
shown in Fig. 4.19 occurs again. The current i3 through thyristor ‘3’ takes
over the entire positive dc current.
By applying KVL to the circuit in Fig. 4.19, the following equation
can be obtained.
ea − eb = Lcdiadt− Lc
dibdt
= −2Lcdibdt− Lc
dicdt
(4.44)
ec − ea = Lcdicdt− Lc
diadt
= 2Lcdicdt
+ Lcdibdt
(4.45)
After eliminating dicdt
from (4.44) and (4.45) and substituting ib = i3 the fol-
lowing equation can be obtained,
di3dt
=ebLc
di3dθ
=ebωLc
= Emcos (ωt− π/3)
ωLc
65
Integrating from α + π/3 to θ,
i3 (θ)− i3 (α + π/3) =EmωLc
[sin (θ − π/3)− sin (α)]
Substituting i3(α + π/3) from (4.43),
i3(θ) =EmωLc
[sin(θ − π
3
)− sin (α) +
√3
2sin(α− π
6
)−√
3
2sin
(δ − 5π
6
)− sin(δ) + sin
(α +
π
3
)]+k
2(δ − α)
i3(θ) =Em
2ωLc
[1
2sin(α +
π
3
)− 1
2sin(δ − π
3
)− sin(δ) + sin
(θ − π
3
)]+k
2(δ − α)
(4.46)
By observing thyristor ‘3’ current in Fig. 4.17, it can be inferred that
i3(δ) = idc(δ). Substituting the expression in (4.46) yields,
idc(δ) =Em
2ωLc
[sin(α +
π
3
)+ sin
(δ − π
3
)]+k
2(δ − α)
Substituting idc(δ) from (4.1),
idc0 + k
(δ − α
2
)=
Em2ωLc
[sin(α +
π
3
)+ sin
(δ − π
3
)]+k
2(δ − α)
Since δ = α + u
idc0 =Em
2ωLc
[sin(α +
π
3
)+ sin
(α + u− π
3
)]sin(α + u− π
3
)=
2ωLcEm
idc0 − sin(α +
π
3
)(4.47)
66
δ =π
3+ sin−1
(2ωLcEm
idc0 − sin(α +
π
3
))
Substituting δ = α + u and converting the expression in terms of cos,
overlap angle u for mode 3 can be obtained,
cos
(5π
6− α− u
)+ cos
(π6− α
)=
2ωLcEm
idc0
u = arccos
(cos(π
6− α
)− 2ωLc
Emidc0
)− α− π
6(4.48)
Equation (4.48) can be used for calculating the overlap angle during ode 3
operation.
4.2.4 Analytical Model for Mode 3 Operation
To obtain the average voltage at the rectifier terminals, vdc(t) is inte-
grated over a switching cycle from α to α + π/3,
V dc(θ) =3
π
∫ α+π/3
α
eb(θ)− ec(θ)− ωLc(dibdθ− dicdθ
)dθ
Here vdc(t) is substituted from KVL equations of mode 3 switching circuit in
Fig. 4.4, 4.18 and 4.19.
In Fig. 4.18 it can be observed that vdc = 0 from α to δ− π/3. Substi-
tuting the value of vdc in the previous expression,
V dc(θ) =3
π
∫ α+π/3
δ−π/3eb(θ)− ec(θ)− ωLc
(dibdθ− dicdθ
)dθ (4.49)
67
Let,
V dc1(θ) =3
π
∫ α+π/3
δ−π/3eb(θ)− ec(θ)dθ (4.50)
V dc2(θ) =3
π
∫ α+π/3
δ−π/3ωLc
(dibdθ− dicdθ
)dθ (4.51)
Integrating (4.50) yields,
V dc1(θ) =3
π
∫ α+π/3
δ−π/3eb(θ)− ec(θ)dθ
=3Emπ
∫ α+π/3
δ−π/3cos(ωt− π
3
)− cos (ωt− π) dθ
=3Emπ
∫ α+π/3
δ−π/3sin(ωt+
π
3
)dθ
V dc1(θ) =3√
3Emπ
[− cos
(α +
2π
3
)+ cos (δ)
](4.52)
The ac currents flowing into the rectifier from δ − π/3 to α + π/3 can
be derived using the circuit configuration given in Fig. 4.4. iaibic
=
idc − i3i3−idc
(4.53)
Integrating (4.51) yields,
V dc2(θ) =3
π
∫ α+π/3
δ−π/3ωLc
(dibdθ− dicdθ
)dθ
=3ωLcπ
[[ib]
α+π/3δ−π/3 − [ic]
α+π/3δ−π/3
]Substituting (4.53) in the equation shown above yields,
V dc2(θ) =3ωLcπ
[i3(α + π/3)− i3(δ − π/3) + idc(α + π/3)− idc(δ − π/3)]
68
Substituting the value of idc from (4.1),
V dc2(θ) =3ωLcπ
[i3(α + π/3)− i3(δ − π/3) + idc0 + k
(α +
π
3− α
−u2
)− idc0 − k
(δ − π
3− α− u
2
)]=
3ωLcπ
[i3(α + π/3)− i3(δ − π/3) + k
(α− δ +
2π
3
)]
Substituting the value of i3(α + π
3
)and i3
(δ − π
3
)from (4.43) and
(4.39) yields,
V dc2(θ) =3ωLcπ
[√3Em
2ωLc
(sin(α− π
6
)− sin
(δ − 5π
6
))(4.54)
+k
2
(α− δ +
2π
3
)+ k
(α− δ +
2π
3
)]V dc2(θ) =
3ωLcπ
[√3Em
2ωLc
(sin(α− π
6
)− sin
(δ − 5π
6
))(4.55)
+3k
2
(α− δ +
2π
3
)](4.56)
Substituting (4.52) and (4.56) in (4.49) yields,
Vdc(θ) =3√
3Emπ
[− cos
(α +
2π
3
)+ cos (δ)
]+
3ωLcπ
[√3Em
2ωLc
(sin(α− π
6
)− sin
(δ − 5π
6
))+
3k
2
(α− δ +
2π
3
)]
=3√
3Emπ
[− cos
(α +
2π
3
)+ cos (δ) +
1
2sin(α− π
6
)− 1
2sin
(δ − 5π
6
)]+
9ωLc2π
(α− δ +
2π
3
)Vdc(θ) =
3√
3Emπ
[√3
2
(sin(α +
π
3
)− sin
(δ − π
3
))]+
9ωLc2π
(α− δ +
2π
3
)
69
Substituting for sin(δ − π
3
)from (4.47),
Vdc(θ) =9Emπ
sin(α +
π
3
)− 9ωLc
πidc0 +
9ωLc2π
(α− δ +
2π
3
)(4.57)
By substituting (4.29) into (4.57), the dynamic AVM equation for mode
3 dc current can be obtained.
didcdt
=9Em
πsin(α + π
3
)− idc0
(Rdc + 9ωLc
π
)− edc
Ldc + Lc(3− 9u
2π
) (4.58)
4.2.5 Validation of Analytical Model for Mode 3 Operation withUncontrolled Rectifier
The AVM model for mode 3 has been tested with the uncontrolled
rectifier model shown in Fig. 4.6 by applying low resistance faults. The results
obtained from the AVM and the detailed model for edc, idc, overlap angle and
firing angle are shown in Fig. 4.20, 4.21, 4.22 and 4.23 respectively. Three
to four switches conducting in a switching interval as shown in Fig. 4.24
indicating that the rectifier operates in mode 3. After the transients decay
out a fault of 0.05 Ω is applied at the terminals of the rectifier followed by a
fault of 0.01 Ω. The dc terminal voltage dips from 875.1 V to 187.5 V and the
dc current increases from 17.51 kA to 18.85 kA. The results from AVM follow
the detailed switch model results of PSCAD even though the error is slightly
higher compared to mode 1 and mode 2 results.
70
0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.60
0.2
0.4
0.6
0.8
1
1.2
Time(s)
e dc(k
V)
Detailed modelAVM mode 3
Rload
=0.05 Ω Rload
=0.01 Ω
875.1 V
187.5 V
Figure 4.20: Rectifier terminal voltage at the DC side in mode 3.
0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.617
17.5
18
18.5
19
19.5
20
Time(s)
i dc(k
A)
Detailed modelAVM mode 3
Rload
=0.05 Ω Rload
=0.01 Ω
17.51kA
18.85kA
Figure 4.21: Rectifier terminal current at the DC side in mode 3.
71
0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.680
82
84
86
88
90
92
94
96
98
Time(s)
Ove
rlap
angl
e u
(in d
egre
es)
Rload
=0.05 Ω Rload
=0.01 Ω
97.16o
81.63o
Figure 4.22: Overlap angle of the rectifier in mode 3.
0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.628.5
29
29.5
30
30.5
31
Time(s)
Aut
o fin
ing
angl
e α
(in d
egre
es)
Rload
=0.05 Ω Rload
=0.01 Ω
Figure 4.23: Firing angle of the rectifier in mode 3.
72
0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.62
2.2
2.4
2.6
2.8
3
3.2
3.4
3.6
3.8
4
Time(s)
Num
ber
of c
ondu
ctin
g sw
itche
s
Rload
=0.05 Ω Rload
=0.01 Ω
Figure 4.24: Number of conducting switches in mode 2.
Expressions (4.30), (4.58), (4.16),(4.17) and (4.48) together can be used
to find a closed-form expression for transient and steady-state dc inductor
current using AVM approach given that the dc current is continuous and the
ac circuit is symmetrical. The ac currents through the inductors can also be
reconstructed using the intermediate results for thyristor currents used in the
derivation. These ac currents can be transformed into any required frame of
reference for convenient representation.
4.3 AC Current Estimation
In this section, ac fault current profile for a rectifier is derived using
AVM results described in the previous section. The intermediate equations
and final results of the dc current AVM derivation for mode 1, mode 2 and
73
mode 3 are used for deriving the ac current equations. To avoid repetition,
the equations are shown only for phase ‘b’ of the three-phase ac input. The
results are incorporated into the dc analytical models derived previously and
the results are compared with detailed switch model results at the end.
4.3.1 Mode 1 and Mode 2 AC Currents
When deriving the dc current equations for six-pulse rectifiers in mode 1
and mode 2, the following intermediate result was obtained for the alternating
‘b’ phase current ib (4.10) and (4.1),
ib(θ) =
k θ−α
2+√3Em
2ωLc(cos(α)− cos(θ)) , if α < θ < α + u
idc0 + kθ, if α + u < θ < π3
(4.59)
where,
k = the rate of rise of averaged dc current in a switching cycle,θ = ωt,α = the firing angle,Lc = the ac inductance,idc0 = the dc current magnitude occurring at the
middle of commutation in a switching cycle,u = overlap angle.
(4.59) can be used to reconstruct the ac current in mode 1 and mode 2
as shown in Fig. 4.25. The ac current graph is divided into four parts for each
half cycle and the equations for each part of the waveform are given below.
By using (4.59) the rising portion of the ac current from α to α + u
during commutation can be given by,
ib(θ) = kθ − α
2+
√3Em
2ωLc(cos(α)− cos(θ)) (4.60)
74
α u+α3
2πα +3
2πα ++ u πα +
)2.4(.Eq )3.4(.Eq )4.4(.Eq
Figure 4.25: AC current for mode 1 and mode 2.
During conduction from α + u to α + 2π3
, the ac current can be represented
using the dc current equation,
ib(θ) = idc0 + kθ (4.61)
The falling portion of the ac current during commutation from α + 2π3
to
α+ u+ 2π3
can be obtained by subtracting (4.60) from (4.61) and displacing θ
by 120o.
ib(θ) = idc0 + k
(θ − 2π
3
)−
(k
(θ − 2π/3− α)
2+
√3Em
2ωLc
(cos(α)− cos
(θ − 2π
3
)))(4.62)
From α + u + 2π/3 to α + π, the current remains zero and the entire cycle
repeats again on the negative side of the bridge. By displacing (4.60), (4.61)
and (4.62) by−120o and +120o ‘a’ phase and ‘c’ phase currents can be obtained
for mode 1 and mode 2 operation.
75
4.3.2 Mode 3 AC Currents
When deriving the dc current for mode 3 (4.38), (4.43) and (4.46) the
current through thyristor ‘3’, i3, was derived,
i3(θ) =
k (θ − α)− Em
ωLc
(sin(θ + π
3
)− sin
(α + π
3
)), if α < θ < δ − π
3
√3Em
2ωLc
(sin(θ − π
2
)− sin
(δ − 5π
6
))+ k
2(θ + δ
−π3− 2α
)− Em
ωLc
(sin (δ)− sin
(α + π
3
)), if δ − π
3< θ < α + π
3
Em
2ωLc
[12
sin(α + π
3
)− 1
2sin(δ − π
3
)− sin(δ) + sin
(θ − π
3
)]+ k
2(δ − α) , if α + π
3< θ < δ
(4.63)
where, δ is the sum α + u. This equation can be used to reconstruct the ac
current in mode 3 as shown in Fig. 4.26. The conducting thyristors during
the period are shown in Figs. 4.27, 4.28, 4.29 and 4.30.
α3
πδ −3
πα + δ3
2πα +3
πδ + πα +
)8.4(.Eq )9.4(.Eq ).4(.Eq )11.4(.Eq10
Figure 4.26: ‘b’ phase ac current for mode 3.
For the period α to δ − π3
shown in Fig. 4.26, thyristors ‘3’ and ‘6’
both conduct ‘b’ phase ac current to the dc side as shown in the Fig. 4.27.
76
Therefore,
ib(θ) = i3 − i6 (4.64)
Current i6 can be expressed using KVL as follows,
i6 =EmωLc
(sin(δ − π
3
)− sin(θ)
)− k
(δ − π
3− θ)
(4.65)
Using (4.63), (4.64) and (4.65), ib(θ) for α to δ − π3
can be derived as,
ib(θ) = k(u− π
3
)+EmωLc
(sin(α +
π
3
)− sin
(δ − π
3
)− cos
(θ +
π
6
))(4.66)
ae
be
ce
cL
cL
cL
dcL
dciai
bi
ci
1i
2i
3i 5i
4i 6i
dcR
C
de
rectv
Figure 4.27: Bridge conduction configuration for Mode 3 during α to δ − π3.
The greyed out switches are non-conducting.
From δ to α + 2π3
, thyristor ‘3’ conducts ‘b’ phase current as shown in
Fig. 4.28. Using (4.63), current ib(θ) can be expressed as,
ib(θ) = k(u− π
3
)+EmωLc
(sin(α +
π
3
)− sin
(δ − π
3
)− cos
(θ +
π
6
))(4.67)
77
ae
be
ce
cL
cL
cL
dcL
dciai
bi
ci
1i
2i
3i 5i
4i 6i
dcR
C
de
rectv
Figure 4.28: Bridge conduction configuration for mode 3 during δ− π3
to α+ π3.
The greyed out switches are non-conducting.
Again during α + π3
to δ thyristor ‘3’ conducts ‘b’ phase current as
shown in Fig. 4.29. Using (4.63) ib(θ) can be calculated as follows,
ib(θ) =ku
2+EmωLc
(sin(θ − π
3
)− sin(α)
+
√3
2
(sin(α− π
6
))− sin(δ) + sin
(α +
π
3
))(4.68)
From δ to α + 2π3
, thyristor ‘3’ conducts the whole positive dc current
as shown in Fig. 4.30. For this reason current ib(θ) for the given period is
ib(θ) = idc0 + kθ (4.69)
These equations can be extended for the other three quarters of current
ib(θ) waveform to obtain ‘b’ phase current. Angle θ in these equations can be
displaced by −120o and +120o to get ‘a’ and ‘c’ phase currents in mode 3
operation.
78
ae
be
ce
cL
cL
cL
dcL
dciai
bi
ci
1i
2i
3i 5i
4i 6i
dcR
C
de
rectv
Figure 4.29: Bridge conduction configuration for Mode 3 during α + π3
to δ.The greyed out switches are non-conducting.
ae
be
ce
cL
cL
cL
dcL
dciai
bi
ci
1i
2i
3i 5i
4i 6i
dcR
C
de
rectv
Figure 4.30: Bridge conduction configuration for Mode 3 during δ to α + 2π3
.The greyed out switches are non-conducting.
79
4.4 Validation of Average Value Model of the Rectifier
For verification of the ac current reconstruction equations in mode 1,
mode 2 and mode 3, the uncontrolled rectifier shown in Fig. 4.6 was simu-
lated with various load and fault conditions using AVM and detailed model.
The results are shown below. Although the verifications were done with an
uncontrolled rectifier the results are applicable for controlled rectifiers with
thyristors as switches if the dc current through the filter inductor is smooth.
The method of calculation of the fault current profile and its verification with
PSCAD switch model results are explained below.
4.4.1 Method of Calculation
The schematic used for calculation of ac and dc fault currents using
rectifier AVM is shown in Fig. 4.31. The overlap angle and firing angle func-
tions derived in Section 4.1 were used to find the overlap and the firing angle
of the rectifier. The Table 3.1 was implemented as a Matlab function to detect
the mode of operation of the rectifier. After determining the mode of opera-
tion, corresponding analytical models were invoked to calculate the dynamics
of the rectifier current. The overlap angle and firing angle functions and the
AVM model were implemented using Matlab functions and integrated using
Simulink to create the rectifier AVM model.
Equations (4.16), (4.17) and (4.48) were used to determine the mode of
operation of the rectifier and the corresponding firing angle and overlap angle.
In case of controlled rectifiers operating in mode 2 and mode 3, the auto phase
80
!"
#
#$%
&
$
#'
(
%$
αmE
)(tedc
)(tidc
)(tiac
dtdidc
mE θ
)(ti fault
)
)(tidc
)(tidc
Figure 4.31: Schematic for calculating ac and dc fault currents.
angle should be compared with the commanded firing angle for determining
the effective firing angle of the rectifiers. The effective firing angle is always
the greater of the two values as shown in the auto firing angle block of Fig.
4.31. The dc load were varied using edc(t) in (4.30) and (4.58). The ac current
for mode 1 and mode 2 calculated using the results (4.60), (4.61) and (4.62).
For mode 3, results (4.66), (4.67), (4.68) and (4.69) were used.
4.4.2 Verification
An AVM simulation model of an uncontrolled rectifier was developed
in Simulink using the schematic of Fig. 4.31. To verify the AVM, three
simulations were performed. The results of the simulations were verified with
81
VaRec
NaR
VbRec
NbR
VcRec
NcR
A
B
C
R=0
dcCrnt
0.459e-3 [H]
Lc
0.459e-3 [H]
0.459e-3 [H]
D1
D2
D3
D6
D5
D4
20e-3[H]
Ldc
0.01 [ohm]
Rdc
Ia
Ib
Ic
4.16 kV AC 60 Hz
3 phase voltage source
500
[uF
]
loa
dCrnt
edc
Rlo
ad
+
Figure 4.32: Rectifier model used for verification of results.
PSCAD switch models. Figure 4.32 shows the circuit diagram of a hypothetical
six-pulse rectifier circuit with 10 MW rating and 0.1 pu (at 10 MVA base) ac
short-circuit impedance. For the first two simulations the rectifier model shown
in Fig. 4.32 was used. For the third simulation the rectifier model shown in
Fig. 4.35 with lower dc filter inductance was used. In the first simulation
shown in Fig. 4.33, the rectifier operates at half load (5 MW) until 0.2 s. At
t = 0.2 s the load is changed to the full rated value (10 MW). The dc link
voltage dips during the transients because of the low RC time constant. After
few milliseconds it recharges with the current from the inductor. The AVM
results can be seen to accurately represent these phenomenon. At t = 0.4 s a
heavy load (5x load current) is simulated at the terminals of the rectifier. The
load draws a dc current of 10 kA which is about five times the normal load
current. During this period the rectifier operates in mode 2. At t = 0.6 s, a
82
fault (with a resistance of 0.01Ω) is simulated at the terminals of the rectifier
which forces the rectifier to operate in mode 3. The difference (sixth order
harmonics and higher) between AVM and switch model results are low for all
the three modes.
In the second simulation shown in Fig. 4.34, short-circuit transients
obtained with AVM were compared with switch model simulations by subject-
ing the fully loaded rectifier to undergo a fault of 0.01Ω at the dc link. It
is to be noted for the fault simulations in both the cases that even though
the rectifier operates in Mode 3 during high fault currents, and the voltage
vdc(t) falls to zero occasionally during four-diode conduction configuration, the
dc voltage edc(t) is never zero because of continuous conduction of smoothing
inductor. Furthermore in steady-state, the inductor is charged periodically
during three-diode conduction of the rectifier and the dc fault current does
not decay and get extinguished after the fault. The AVM is able to represent
the above mentioned phenomenon and follows the switch model results closely
throughout the simulation. With the first simulation, steady-state operation
in various modes were verified. With the second simulation, the performance
of AVM for short-circuit studies were verified.
In the third simulation shown in Fig. 4.36, due to low inductance value
asymmetrical current flows on the ac side which cannot be captured in AVM.
The AVM model has been derived by assuming that all the three phases of the
ac side are symmetrical. The asymmetrical current during the short circuit
shows up as error in Fig. 4.36 ac current ib. This produces large errors in idc
83
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.80
1
2
3
4
5
6
7
Time(s)
e dc(k
V)
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.80
5
10
15
20
time(s)
I dc(k
A)
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8-20
-15
-10
-5
0
5
10
15
20
time(s)
I b(kA
)
Ω94.5 Ω71.2 Ω01.0Ω35.0
Figure 4.33: DC inductor current, ‘b’ phase inductor current and dc capacitorvoltage in various modes obtained using AVM (continuous line) are verifiedwith switch model results (dotted line).
84
and ib results of AVM simulation.
85
Ω01.0Ω71.2
Figure 4.34: Short-circuit dc capacitor voltage, dc inductor current and ‘b’phase inductor current obtained using AVM are verified with switch modelresults.
86
VaRec
NaR
VbRec
NbR
VcRec
NcR
A
B
C
R=0
dcCrnt
0.459e-3 [H]
Lc
0.459e-3 [H]
0.459e-3 [H]
D1
D2
D3
D6
D5
D4
0.1e-3[H]
Ldc
0.01 [ohm]
Rdc
Ia
Ib
Ic
4.16 kV AC 60 Hz
3 phase voltage source
50
0[u
F]
loa
dC
rnt
edc
Rlo
ad
+
SStart
Sequence
SetS
Rload = 2.71
Wait For
0.2[s]
S SetS
Rload = 0.01
Figure 4.35: Rectifier model with low dc filter inductance used for testingAVM
87
Ω01.0Ω71.2
Figure 4.36: Short-circuit dc capacitor voltage, dc inductor current and ‘b’phase inductor current obtained using AVM are verified with switch modelresults. The switch model is shown in Fig. 4.35
88
4.5 Conclusion
The estimate from the analytical model is close to switch model simu-
lation with reasonable accuracy at all periods including inter-mode transitions
when the inductance is high enough to keep the dc current constant. The error
in the AVM results is due to the asymmetrical dc current flowing on the ac
side and dc harmonics which cannot be represented in an AVM equation. To
represent synchronous generator-phase controlled rectifier sources that are to
be used in future ship board power systems the single impedance Thevenin
equivalent can be replaced with a synchronous machine having different sub-
transient, transient and steady-state inductances. This technique is further
explained in Chapter 6.
89
Chapter 5
Fault current characterisation and
interruption with induced oscillations
This chapter focuses on analyzing and interrupting dc fault currents
for faults at the terminals of a controlled rectifier after dc filter. The char-
acteristics of the rectifier derived in the previous chapter is used to interrupt
the fault current with the help of firing angle control of the rectifier, an ac
breaker and a series inductor in the dc link. By using this method, the use
of relatively expensive dc breakers listed in Chapter 2 can be avoided. In this
method, the rectifier firing angle is set to 90o immediately after the detection
of fault. The inductor current in the circuit oscillates with the dc capacitor
to produce current zeros in fault current. This action is similar to the forced
oscillation hybrid dc breakers described in Chapter 2 except that it does not
need any separate capacitor for creating the oscillations. After producing the
oscillations the ac breaker can be opened and the firing of rectifier switches
can be blocked.
To explain the characteristics of the rectifier fault current a purely
resistive fault is also simulated and an equivalent model is obtained. The role
of inductance in creating an oscillation in the dc current is discussed. In case
90
of purely resistive fault current path the rectifier firing angle is set to 90o.
During the fault current decay, the rectifier current is interrupted by blocking
the firing pulses during the discontinuous conduction of the rectifier.
5.1 Fault Current Interruption with Purely ResistiveFault Current Path
Fig. 5.1 shows the six-pulse phase-controlled rectifier used for illustrat-
ing the fault current profile with a purely resistive fault current path. The
three-phase ac source is modeled to supply 4.15 kV, 60 Hz ac voltage at the
ac terminals of the rectifier. It has Rc = 0.12 Ω, Lc = 0.6371 mH series RL
impedance and 25 Ω parallel resistor across the RL branch, with 10 kA short-
circuit current capacity. To mimic the voltage control of a practical source, a
closed loop with a measurement time constant of 0.02 s and controller time
constant of 0.05 s has been added to control the ac terminal voltage. The
dc inductor Ldc = 2.4431 µH, maintains continuous rectifier current and the
dc filter capacitor C = 8 mF filters dc voltage ripple at and above the sixth
harmonic.
During normal load conditions, the rectifier supplies 5.6 kV to the DC
load. To get the worst case fault current conditions any series inductance in
the path of the fault has been neglected. At 0.3 s a fault of 0.1 Ω has been
applied. The fault current and the dc voltage profile are shown in Fig. 5.2.
The fault is detected at 0.315 s and the firing angle of the rectifier is set to 90o.
The current decays after few milliseconds and then the firing pulses are blocked
91
3 PhaseRMS
Vacrms
A
B
C
AM
GM
KB
ComBus
1 3 5
4 6 2
AO
A
B
C
alpha
gamma
DCbus_V
Controlled Rectifier
kb_control
8E
3 [u
F]ao_controlC
B
A
BRK_GenRRL
RRL
A
B
C
Vmes
RRL
Vsrc_A
Vsrc_B
Vsrc_C
7.0
[oh
m]
TimedFaultLogicFault
Permanent fault
Rf = 0.1 ohm applied at 0.3 s
Fa
ult
Generator Breakers
also as back-up
Aggregated 4 MW load
Idc_load
4.16 kV source with10 kA short-ckt current
Ia2.4431E-6 [H]
Figure 5.1: Three-phase line commutated phase-controlled rectifier with purelyresistive fault current path.
Voltage and current at Rectifier Terminals
0.2900 0.3000 0.3100 0.3200 0.3300 0.3400 0.3500 . . .
-10
0
10
20
30
40
50
60
(kA
)
Idc_load = Rectifier DC load current
0.0
1.0
2.0
3.0
4.0
5.0
6.0
(kV
)
DCbus_V = Rectifier DC voltage
Current impulseat fault initiation(1st order RC circuit)
Fault occursat 0.3 s
t = 0.315Fault detected in 15 msSet firing angle to 90 degrees
t = 0.340 Block firing pulses
Current decay following new firingangle (90 deg) is not instantaneous
Second current peak(1st order RL circuit)
Figure 5.2: Fault current profile for rectifier in Fig. 5.1.
92
at 0.34 s, when the rectifier operates in discontinuous conduction mode.
To understand the fault current characteristics, simplified circuits have
been formed. The fault current is fed from two sources, namely, dc filter
capacitor and rectifier. The fault current contribution from each of the sources
is explained in detail below.
5.1.1 Fault Current from the Capacitor
Figure 5.3: Equivalent circuit for the fault current contribution from the filtercapacitor.
The dc filter capacitor of the rectifier is charged to Vc0 = 5.6 kV during
the normal load operations. During the fault it discharges through the fault
resistance Rfault = 0.1 Ω. The circuit is shown in Fig. 5.3. Since this circuit
does not have any series inductance, the fault current rises immediately to
a peak of Vc0/Rfault = 56 kA. This current decays over time and can be
represented using the RC circuit transients as follows,
Ifault(t) =VdcRf
e−t/τ (5.1)
93
time (s) 0.2980 0.2990 0.3000 0.3010 0.3020 0.3030 0.3040 0.3050 . . .
0
10
20
30
40
50
60
(kA
)
Idc_load = Rectifier DC load current Icth=Theoretical Capacitor current
Figure 5.4: Fault current contribution from the filter capacitor.
where time constant τ = RfC = 0.1 Ω×8 mF= 0.8 ms. Fig. 5.4 compares the
theoretical results of (5.1) with the switch model shown in Fig. 5.2. The fault
current peak estimate from the theoretical model is accurate and the current
decay is followed up to 0.301 s, after which the fault current contribution
from the rectifier becomes appreciable. The capacitor voltage decays to fault
voltage.
5.1.2 Fault Current from the Rectifier
The second peak of the fault current in Fig. 5.2 is due to the rectifier
feeding current into the fault. To represent the rectifier in a simplified form,
the Mode 1 dc average value model of the rectifier (4.30) has been used with
94
u = 0 approximation.
didcdt
=3√3Em
πcos(α)− idc(t)3ωLc
π− edc
Ldc + 2Lc(5.2)
where Em is the line to neutral peak voltage, Lc is the ac inductance,
and Ldc is the dc inductance. This differential equation is represented in
equivalent circuit form in Fig. 5.5, where, the voltage of the controlled dc
source is
Vd =3√
3Emπ
cos(α) = 5618 cos(α) (5.3)
The equivalent dc series resistor
rd =3ωLcπ
= 0.2293 Ω (5.4)
the equivalent dc series inductor
ld = Ldc + 2Lc = 0.0013H (5.5)
Due to the faster time constant of the capacitor circuit compared with
the rectifier circuit, the peak from the capacitor precedes the peak of the fault
current from the rectifier. The results of the analytical model from (5.2) and
the switch model results from Fig. 5.2 are shown in Fig. 5.6.
The rationale behind setting the firing angle control is explained as
follows. The dc voltage from the rectifier Vd during continuous conduction is
dependent upon the firing angle, α. Figure 5.7 shows a plot of perunitised
average dc voltage against firing angle. At firing angle of 90o, the rectifier
internal voltage Vd drops to zero. This technique can be used to force the
95
Figure 5.5: Equivalent circuit for the fault current contribution from the rec-tifier.
time (s) 0.2950 0.3000 0.3050 0.3100 0.3150 0.3200 0.3250 0.3300 0.3350 0.3400 . . .
0.0
5.0
10.0
15.0
20.0
(kA
)
Idc_load = Rectifier DC load current Irect=Theoretical Rectifier current
Figure 5.6: Fault current contribution from the rectifier.
96
rectifier to operate in discontinuous conduction mode after a high fault current
event. Even though the rectifier internal voltage Vd is negative above α = 90o,
the firing angle is set to 90o to avoid any misfiring of thyristors which may
cause unwanted transients.
0 20 40 60 80 100 120 140 160 180-2
-1.5
-1
-0.5
0
0.5
1
1.5
2
α
Vav
g/Em
Figure 5.7: Average dc voltage vs firing angle α.
After the fault occurs at 0.3 s in Fig. 5.6, the fault current slowly
increases. To keep the analytical model simple, only Mode 1 operation has
been considered. The error between the analytical model and switch model
fault currents becomes maximum at high fault currents. This is due to the
97
assumption made in the analytical model that the rectifier operates in Mode 1
throughout the fault current event. In the switch model, the rectifier actually
goes into mode 2 and mode 3 operation when the fault current reaches the
peak. As a result of the mode difference, the actual series equivalent inductance
and the resistance of the equivalent circuit should change which have not been
accounted in Fig. 5.5.
At 0.315 s, the fault is detected and the firing angle is set to 90o.
Since the rectifier is line commutated and has uncontrolled turn off time, this
command firing pulse affects the fault current only during the next switch-
ing cycle. The delaying effect is evident from the results obtained from the
analytical model which responds instantaneously as compared to the detailed
switch model in PSCAD. The results are shown in Fig. 5.6. After the delay
the rectifier current decays over the next few switching cycles and the rectifier
goes into discontinuous conduction mode when the current is sufficiently low
at 0.34 s. At this point current interruption is achieved by blocking the firing
pulses to the rectifier. Current interruption from the time of fault inception
using the above method of firing angle control, without any circuit breaker
takes approximately 0.344 s−0.300 s= 44 ms.
5.2 Fault Current Interruption with Series Inductancein the Fault Current Path
Fig. 5.8 shows the six-pulse phase-controlled rectifier used for illustrat-
ing its fault current profile with a series RL fault current path. The three-phase
98
ac source, the rectifier components and the filter components are same as those
used in Fig. 5.1. However, in this section, a series fault current limiting in-
ductor has been added to the dc current path. As the name suggest, this
inductor has been added to reduce the peak magnitude of the transient fault
current shown in Fig. 5.2. In a practical case the value of the series inductor
is arbitrary, depending upon the location of the fault on the dc transmission
line. Since variation will be small for short transmission lines, the inductance
has been fixed at 1 mH.
3 PhaseRMS
Vacrms
A
B
C
AM
GM
KB
ComBus
1 3 5
4 6 2
AO
A
B
C
alpha
gamma
DCbus_V
Controlled Rectifier
kb_control
8E
3 [u
F]
ao_controlC
B
A
BRK_GenRRL
RRL
A
B
C
Vmes
RRL
Vsrc_A
Vsrc_B
Vsrc_C
7.0
[oh
m]
TimedFaultLogicFault
Permanent fault
Rf = 0.1 ohm applied at 0.3 s
Fa
ult
Generator Breakers
also as back-up
Aggregated 4 MW load
Idc_load
4.16 kV source with10 kA short-ckt current
Ia1E-3 [H]2.4431E-6 [H]
Figure 5.8: Three-phase line commutated phase-controlled rectifier with seriesRL fault current path.
Fig. 5.9 shows the current and voltage profile of the dc bus in Fig. 5.8
under load and fault conditions. The dc bus supplies a 5.6 kV dc voltage to
the load until 0.3 s. At 0.3 s, a fault of 0.1 Ω is applied across the dc bus.
The fault current from the rectifier and the capacitor increases initially. If the
current limiting inductor and the filter capacitor form an underdamped loop,
then the capacitor current will be oscillatory after the initial rise. At the same
99
Voltage and current at Rectifier Terminals
0.2900 0.3000 0.3100 0.3200 0.3300 0.3400 0.3500 . . .
-4.0 -2.0 0.0 2.0 4.0 6.0 8.0
10.0 12.0 14.0 16.0
(kA
)
Idc_load = Rectifier DC load current
-1.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
(kV
)
DCbus_V = Rectifier DC voltage
Fault occursat 0.3 s
t = 0.315Set firing angleto 90 degrees
t = 0.340 Block firing pulses
Figure 5.9: Fault current profile for Fig. 5.8.
100
time, the rectifier current keeps rising to the steady state value. Similar to
the previous case, the fault is detected at 0.315 s and the firing angle of the
rectifier is set to 90o. The fault current from the rectifier starts decaying after
a small delay. During this decay, the fault current has several zero crossings;
for instance one of the zero crossings occurs at 0.325 s in Fig. 5.9. This zero
crossing can be used to interrupt the fault current using an ac circuit breaker.
The rectifier current, which keeps decreasing slowly with time, can be
interrupted by blocking the firing pulses after the rectifier goes into discontin-
uous conduction mode (DCM). This happens when the rectifier current decays
below the load current. Since the rectifier filter inductor is designed to conduct
continuously for normal load currents, DCM operation of the rectifier occurs
only for rectifier currents below normal load currents. The fault current profile
has been analytically modeled using two circuit models, namely, second order
series RLC circuit model and third order circuit model.
5.2.1 Second Order RLC Circuit Model
After the fault, the filter capacitor C, which is charged to normal dc bus
voltage, discharges through the series limiting inductor L into the fault. The
capacitor current contributes the major share of the fault current through the
limiting inductor during the initial few milliseconds, when the rectifier current
is negligible (0.3 to 0.305 s) and also after the decay of rectifier current (after
0.32 s). This can be seen in Fig. 5.9. During those periods, the equivalent
circuit shown in Fig. 5.10 can be used for describing the fault current profile.
101
Figure 5.10: Equivalent circuit for the fault current contribution from thecapacitor.
In Fig. 5.10, C = 8 mF is the filter capacitor, L = 1 mH is the fault
current limiting inductor and Rfault = 0.1Ω is the fault resistance. The current
in the circuit can be obtained using the second order ODE.
d2i(t)
dt2+ 2α
di
dt+ ω2
0 i(t) = 0 (5.6)
where,
damping coefficient α =Rf
2L= 50 nepers/s,
natural frequency ω0 = 1√LC
= 353.5355 rad/s or 56.27 Hz,
damping ratio ζ = αω0
= 0.141.
Since ζ < 1 for (5.6), its solution can be given by the general solution for the
underdamped case,
Ifault(t) = B1e−αt cos(ωdt) +B2e
−αt sin(ωdt) (5.7)
where, damped frequency ωd =√ω20 − α2 = 350rad/s or 55.7 Hz. B1 and B2
can be derived from the initial conditions for the capacitor Vc(0) = Vc0 = 0 V
102
and the inductor Ifault(0) = 0 A.
B1 = 0 (5.8)
B2 =Vcap(tt=0)
Lωd= 16.11 (5.9)
Substituting (5.8) and (5.8) in (5.7) yields,
Ifault(t) = 16.11e−50t sin(350t) (5.10)
The peak time and peak current from Eq. (5.10) are,
tpeak =π
2ωd= 0.0048 s (5.11)
Ifault,peak = Ifault(tt=t,peak) = 12.78 kA (5.12)
5.2.2 Third Order Equivalent Circuit Model
The results from the RLC circuit model in Fig. 5.10 can be made more
accurate by adding a parallel equivalent rectifier circuit (Vd, Rd, Ld) that was
derived in section 5.1.2. The equivalent circuit is shown in Fig. 5.11. The
values of Vd, Rd and Ld are same as that shown in Fig. 5.5.
The results of the second order model, (5.10) and the third order equiv-
alent circuit model in Fig. 5.11 are shown in Fig. 5.12.
5.2.3 Results and Discussion for Rectifier Fault Current Profile
Both second and third order models track the rising portion of the
fault current up to the first peak. The time constant of the rising portion
can therefore be derived sufficiently accurately using the second order ODE
103
Figure 5.11: Third order equivalent circuit used for modeling the fault currentprofile.
time(s) 0.260 0.270 0.280 0.290 0.300 0.310 0.320 0.330 0.340 0.350 0.360 0.370 0.380 0.390 0.400 . . .
-10.0
-5.0
0.0
5.0
10.0
15.0
20.0
(kA
)
Idc_load = Rectifier DC load current idc = 3rd order model idc = 2nd order model
Figure 5.12: Comparison of fault current profile from switch model (shown inblue), third order model (shown in green) and second order model (shown inbrown).
104
solution given in (5.10). After the first peak, the rectifier current forms an ap-
preciable portion of the inductor current; therefore the second order solution
does not track the fault current after the first peak. Whereas, the third order
model which also includes the rectifier model follows the fault current approx-
imately after the first peak. The third order model overestimates the second
peak from the rectifier current because it does not consider the increase in the
value of equivalent resistance Rd and inductance Ld of the rectifier equivalent
circuit. This increase is due to the increase in rectifier overlap angle above
60o. The third order model shown in Fig. 5.11 is applicable only when overlap
angle is below 60o, which is known as Mode 1 operation of the rectifier. After
0.315 s the firing angle is changed to 90o. Since the rectifier is line commutated
with uncontrolled turn off switches, the commanded firing angle takes about
one switching cycle to affect the dc fault current. This explains the delay in
the start of current decay after 0.315 s. During the decay, the third order
model describes the rate of fall in the fault current accurately until the recti-
fier operates in continuous conduction mode (CCM). Since the filter inductor
is designed to ensure continuous conduction during full load conditions, the
rectifier operates in CCM until the rectifier current falls below the full load
current. After the rectifier current becomes discontinuous, the rectifier current
can be interrupted by blocking the firing pulses to the rectifier as shown in
Fig. 5.9 at 0.34 s. The rate of rise and peak magnitude obtained from all the
models are also shown in table 5.1.
105
Table 5.1: Rate of rise and peak of fault current obtained from all the models.
Model Detailed 2nd Order Series 3rd Order Rectifier(PSCAD) RLC Circuit Model Equiv. and Filter Model
Time-to-peak (s) 0.0044 0.0044 0.0044Peak Magnitude (kA) 14.10 12.78 13.68
5.2.4 Fault Current Interruption using AC Circuit Breakers
In Section 5.1 and 5.2 it was seen that the impulse current from the
capacitor can be mitigated by adding a series inductor in the fault current
path as shown in Fig. 5.13. However, by adding the inductor the fault current
does not go to zero, after blocking the firing pulses of the rectifier due to RLC
series oscillations through the fault. These oscillations are show in green after
0.32 s in Fig. 5.13. Since this high oscillatory current flows for a relatively
long time through the capacitor, the dc bus and transmission cables, it can be
damaging to those components. This current has to be interrupted as soon as
the rectifier current reduces below the load current.
The fault current with frequent zero crossings after 0.32 s can be inter-
rupted with an ac circuit breaker. The rectifier schematic with the ac circuit
breaker is shown in Fig. 5.14. The fault current interruption for the circuit
in Fig. 5.14 is shown in Fig. 5.15. In this interruption technique the circuit
breaker is set to trip as soon as firing angle is set to 90o at 0.315 s. Since
the fault current has the first zero crossing at 0.325 s, the ac circuit breaker
interrupts the fault current at this instant. The circuit breaker remains open
106
after 0.325 s, if the recovery voltage across it does not cause any dielectric
breakdown.
0.3 0.32 0.34 0.36 0.38 0.4-4
-2
0
2
4
6
8
10
12
14
16
time (s)
kA
No series inductor in the circuitNo circuit breaker
With series inductorNo circuit breaker
Fault occursat 0.3 s
t = 0.315Set firing angleto 90 degrees
t = 0.340 Block firing pulses
Figure 5.13: Fault currents for purely resistive fault current path and inductivefault current path.
The fault current can be interrupted faster before the occurrence of
the second peak by sending the breaker trip signal and firing angle command
before 0.31 s. Fig. 5.16 shows the results of the faster fault current interruption
scheme. The trip signal and firing angle command are sent when the dc fault
current exceeds 5 kA which happens before the first peak. Since the first peak
107
3 PhaseRMS
Vacrms
A
B
C
AM
GM
KB
ComBus
1 3 5
4 6 2
AO
A
B
C
alpha
gamm a
DCbus_V
ControlledRectifier
kb_control
8E3 [uF]
ao_controlC
B
A
BRK_Gen
Tim edBreaker
LogicClosed@t0BRK_Gen
Idc_load
LoadBRK
RRL
RRL
A
B
C
Vmes
RRL
2.4431E-6 [H]
Vsrc_A
Vsrc_B
Vsrc_C
7.0
[ohm
]
TimedFaultLogicFault
Permanent faultRf = 0.1 ohm applied at 0.3 s
Fault1E-3 [H ]
4.16 kV source with10 kA short-ckt current
Generator Breakersalso as back-up
Aggregated 4 MW load
Figure 5.14: Three phase line commutated phase-controlled rectifier with seriesRL fault current path and ac circuit breaker.
Voltage and current at rectifier terminals
0.280 0.290 0.300 0.310 0.320 0.330 0.340 0.350 0.360 0.370 0.380 0.390 0.400 . . .
-2.0
0.0
2.0
4.0
6.0
8.0
10.0
12.0
14.0
(kA
)
Idc_load = Rectifier DC load current
-1.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
(kV
)
DCbus_V = Rectifier DC voltage
Fault occursat 0.3 s
t = 0.315Firing angle set to 90 degrees,Breaker trip signal is sent.
Breaker interrupts at the first current zero. Time to clear = 0.3250 – 0.3 = 25 ms
Figure 5.15: Fast fault current interruption with ac circuit breaker schematicshown in Fig. 5.14.
108
of the fault current is a result of the capacitor discharge, its magnitude is not
affected by the the firing angle setting of the rectifier. However, the rectifier
current is interrupted before reaching its peak. The RLC oscillation causes a
zero crossing after the first peak at 0.3094 s, the fault current is interrupted
at this instant using the ac breaker.
Voltage and current at rectifier terminals
0.280 0.290 0.300 0.310 0.320 0.330 0.340 0.350 0.360 0.370 0.380 0.390 0.400 . . .
-2.0
0.0
2.0
4.0
6.0
8.0
10.0
12.0
14.0
(kA
)
Idc_load = Rectifier DC load current
-1.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
(kV
)
DCbus_V = Rectifier DC voltage
Fault occursat 0.3 s
Time to clear = 0.30940 - 0.30 = 9.4 ms
Firing angle set to 90 degrees,Breaker trip signal is sent.
Figure 5.16: Faster fault current interruption with ac circuit breaker schematicshown in Fig. 5.14.
109
5.3 Conclusion
The fault current characteristics of a rectifier with LC filter was sim-
ulated with theoretical models and detailed switch models in PSCAD. The
fault current was found to be contributed from two components, namely, the
capacitor and the rectifier. In case of a purely resistive fault current path the
capacitor discharge produces a damaging impulse current to flow through the
circuit. Using a series limiting inductor it was shown that the impulse fault
current can be bounded. However, the inductor causes additional oscillations
after the rectifier interruption due to series RLC configuration of the result-
ing circuit. In the next step, this current was interrupted using an ac circuit
breaker which makes use of the inherent zero crossings of the RLC current for
faster fault current interruption. It has to be noted that the zero crossings are
possible only if the damping ratio γ < 1 and the oscillations have sufficient
amplitude to overcome rectifier fault current contribution. The fault current
interruption time was also found to be dependent upon the time of fault de-
tection. If the fault current is detected before the first peak, then the rectifier
current peak is mitigated and the fault current interruption occurs exactly at
the end of the first peak in 9.4 ms. If the fault current is detected after the
second peak which is caused due to the rectifier, then the fault current can
be interrupted only at the second zero crossing when the rectifier current is
reduced using the firing angle control. This takes approximately 25 ms. The
results show that an ac breaker with small series inductance at the terminals
of a rectifier causes fault current interruption and subsequently lower damage
110
to the capacitor, dc bus and the transmission lines.
111
Chapter 6
Short-circuit Current Profiles of a Faulted
Six-Pulse Diode Bridge Rectifier Fed by a
Synchronous Generator
6.1 Introduction
In this chapter, short circuit current profiles of a faulted six-pulse diode
bridge rectifier fed by a synchronous generator and a Thevenin equivalent
source are compared and analyzed. Analysis was conducted using simula-
tions performed in PSCAD. Figure 6.1 shows the schematic diagram of the
synchronous machine fed rectifier used for analysis.
Fig. 6.2 shows the detailed synchronous machine model used for sim-
ulations in PSCAD. A similar simulation is conducted with the synchronous
machine model replaced by a single ac impedance Thevenin equivalent. This
is shown in Fig. 6.7. The characteristics of short circuit current are compared.
The Thevenin equivalent model and the synchronous generator model were
also subject to close bolted fault at the terminals of the rectifier before the
filter and an analytical model was developed for both the models in Matlab.
112
Figure 6.1: Synchronous generator (SG) with dc field excitation control con-nected to passive diode bridge rectifier.
6.2 PSCAD Simulation with Detailed Synchronous Gen-erator Model
Fig. 6.2 shows the PSCAD circuit schematic in which a synchronous
generator was used as the ac source for dc power generation. The parameters
used for simulation were,
Nominal line-to-line ac RMS voltage atthe terminals of the generator = 4.16 kVNominal MVA rating of the synchronous machine = 5 MVAUnsaturated direct axis reactance Xd = 0.125 puUnsaturated direct axis transient reactance X ′d = 0.09 puUnsaturated direct axis sub-transient reactance X ′′d = 0.05 puUnsaturated quadrature axis reactance Xq = 0.26 puUnsaturated quadrature axis sub-transient reactance X ′′q = 0.05 puArmature time constant Ta = 0.278 sDirect axis transient time constant T ′d = 0.33 sDirect axis sub-transient time constant T ′′d = 0.03 sQuadrature axis sub-transient time constant T ′′q = 0.03 s
In the PSCAD simulation model shown in Fig. 6.2, the synchronous
generator is assumed to be running at a constant speed irrespective of the load
conditions. Figure 6.3 and Fig. 6.4 show dc voltage and dc current for full
113
A
B
C
VaRec
NaR
VbRec
NbR
VcRec
NcR
3 PhaseRMS Vpu_RecVpuR
dcCrnt
D1
D2
D3
D6
D5
D4
50e-3[H]
Ldc
0.01 [ohm]
Rdc
Ia
Ib
Ic
edc
50
0[u
F]
loa
dC
rntIF
0.0
A
B
C
S
IfEf
Te
TmTmw
Ef If
TimedFaultLogic
Fa
ult1 Fault1
Diode bridge rectifier
4 MW
Efield Fault at 0.2 s
0.0
1 [o
hm
]dcvltg
1.0
7 [o
hm
]
Figure 6.2: PSCAD simulation of a generation scheme shown in Fig. 6.1.
load and fault conditions at the terminals of the dc filter capacitor. The load
was assumed to be resistive for the sake of simplicity. From 0 to 0.2 s, the dc
load consumes 4 MW from the dc bus. At 0.2 s, a 0.01Ω fault is applied across
the terminals of the dc capacitor. The capacitor discharges quickly into the
fault due to low RC time constant and the capacitor voltage drops to zero.
Main : Graphs
0.00 0.20 0.40 0.60 0.80 1.00 1.20 . . .
0.0
2.0
4.0
6.0
8.0
10.0
12.0
y (k
A)
dcCrnt
Idc
(kA
)
DC Currents
Figure 6.3: DC current flowing through the filter inductor for the PSCADsimulation shown in Fig. 6.2.
114
Main : Graphs
0.00 0.20 0.40 0.60 0.80 1.00 1.20 . . .
0.0
1.0
2.0
3.0
4.0
5.0
6.0
y (k
V)
edc
Capacitor Voltage
edc
(kV
)
Figure 6.4: DC voltage across the filter capacitor for the PSCAD simulationshown in Fig. 6.2.
AC and DC currents
Time(s) 0.20 0.30 0.40 0.50 0.60 0.70 0.80 0.90 1.00 1.10 . . .
-10.0
-7.5
-5.0
-2.5
0.0
2.5
5.0
7.5
10.0
Cur
rent
(kA
)
dcCrnt Ia Ib Ic
Figure 6.5: dc and ac fault currents for 0.01 Ω fault.
115
The dc current supplied by the rectifier increases rapidly after 0.2 s.
Figure 6.5 shows the fault event from 0.2 to 1.1 s more clearly with dc and ac
currents. The dc current reaches the peak of 10530 A at 0.343 s. During the
rising portion of the fault current, the ac voltage generated by the synchronous
machine drops across the ac inductance and the dc filter inductor. The time
constant for the rate of rise can be calculated using the L/R value of the
equivalent circuit of the rectifier and generator given by (4.30) and (4.58) which
neglects the asymmetrical dc current component. In (4.30) and (4.58), Lc can
be assumed to be the time-varying inductance of the synchronous machine.
After the fault current reaches the peak, the entire ac voltage drop
occurs across the synchronous machine inductance. Since the time constant of
the dc filter inductor, along with fault resistance and diode resistance, is higher
than any of the time constants of the synchronous machine, the fault current
freewheels through the rectifier diodes and shorts out all three terminals of the
synchronous machine for a short period of time after the fault current reaches
the peak. Table 6.1 shows the rate of rise of dc fault current.
The circuit used by the freewheeling current (neglecting the forward
voltage drop of the diode) is shown in Fig. 6.6. The time constant calculation
for the circuit is shown below.
116
Table 6.1: DC fault current profile.
Time DurationRectifier Load Since the Fault DC Current
Inception (0.2 s)Load current before fault 0$s 776.9 A2x Load current 0.0075 s 1553.9 A3x Load current 0.015 s 2330.7 A5x Load current 0.031 s 3884.5 A10x Load current 0.0755 s 7769 APeak fault current 0.143 s 10530 ASteady state fault current 0.99 s 7668 A
DC circuit resistance = Rdc + fault resistance + diode resistance× 2
3
= 0.0233 Ω
Time constant =L
R= 2.1429 s
The falling portion of the dc fault current follows the time constant
shown in the above calculations. The steady state fault current profile is
explained in Section 6.4 after comparison with a simpler Thevenin equivalent
model.
6.3 PSCAD Simulation with an Equivalent Simple TheveninEquivalent AC Source Model
Short-circuit analysis was performed with a simple single impedance
Thevenin equivalent as the ac source. Figure 6.7 shows the circuit schematic
117
D1
D2
D3
D6
D5
D4
50e-3[H]
Ldc
0.01 [ohm]
Rdc
Fa
ult10.005 Ohm
Diode resistance
0.01 Ohm
Fault resistance
Figure 6.6: Free-wheeling circuit on the dc side.
118
used for PSCAD simulation. For comparison with the simulation shown in Fig.
6.2, the ac reactance was assumed to be equal to the unsaturated sub-transient
direct axis reactance of the synchronous machine.
A
B
C
VaRec
NaR
VbRec
NbR
VcRec
NcR
3 PhaseRMS Vpu_RecVpuR
A
B
C
R=0
dcCrnt
0.459e-3 [H]
Lc
0.459e-3 [H]
0.459e-3 [H]
D1
D2
D3
D6
D5
D4
50e-3[H]
Ldc
0.01 [ohm]
Rdc
Ia
Ib
Ic
4.16 kV AC 60 Hz
3 phase voltage source
50
0[u
F]
loa
dC
rnt
edc
TimedFaultLogic
Fa
ult Fault
7 [o
hm
]
Fault at 0.2 s
Figure 6.7: PSCAD simulation of generation scheme shown in Fig. 6.2 withsimplified circuit schematic.
Fig. 6.8 and Fig. 6.9 show dc voltage and current for full load and fault
conditions at the terminals of the dc filter capacitor obtained with detailed
single impedance Thevenin equivalent model, detailed synchronous machine
model, and AVM model of the Thevenin equivalent model. From 0 to 0.2 s
the dc load consumes 4 MW from the dc bus. At 0.2 s, a fault is applied
across the terminals of the dc capacitor and it discharges quickly into the fault
due to low RC time constant. During the rising portion of the fault current,
the fault current from the Thevenin equivalent and the synchronous machine
model matches accurately. After approximately 0.34 s, the fault current ob-
tained with the synchronous machine model decreases because of the increase
in synchronous machine impedance to transient reactance value. This shows
that the AVM results obtained with (4.30) and (4.58) can be used to obtain
119
the short circuit profile of the combined synchronous machine and uncontrolled
rectifier if the ac inductance Lc in (4.30) and (4.58) is varied with time.
0 0.2 0.4 0.6 0.8 1 1.20
5
10
15
20
Time(s)
Idc(
kA)
Detailed Thevenin equivalent model
AVM of Thevenin equivalent modelDetailed synchronous machine model
Figure 6.8: DC current flowing through the filter inductor for the PSCADsimulation shown in Fig. 6.7.
6.4 Steady-State Fault Current for a Short-Circuit onthe DC Terminals
In both the simulation models, after reaching steady-state fault con-
ditions, the circuit alternates between three-diode and four-diode switching
configuration in each switching cycle. The three-diode and four-diode conduc-
tion configurations are shown in Fig. 4.18 and Fig. 4.4 for a sample switching
cycle.
During the four-diode conduction configuration, the dc current is higher
than any of the ac phase currents and Vdc(t) becomes nearly zero causing the
dc current to decrease slightly. Even though Vdc(t) is zero, the fault voltage
120
0 0.2 0.4 0.6 0.8 1 1.20
1
2
3
4
5
6
Time(s)
Vdc
(kV
)
Detailed Thevenin equivalent model
AVM of Thevenin equivalent modelDetailed synchronous machine model
Figure 6.9: DC voltage across the filter capacitor for the PSCAD simulationshown in Fig. 6.7.
ed(t) is never zero due to the continuous current conduction of the dc filter
Ldc. The voltage across the filter inductor feeds the fault during four-diode
conduction configuration. The voltage waveform ed(t) is shown in Fig. 6.4.
In the three-diode conduction configuration, the dc current is boosted
back by the ac source electromotive force making the circuit ready for the
next four-diode conduction configuration. During the three-diode conduction
configuration period, the ac electromotive force feeds the fault current.
Due to this constant switching, the dc current never decays to zero. To
interrupt the fault current, either a dc breaker on the dc side which is capable
of interrupting fault currents without any zero crossings or an ac breaker on
the ac side of the rectifier is required. Coordinated actions between a dc or
ac breaker and a controlled bridged rectifier will also be a viable option to
121
interrupt a dc fault current.
6.5 Comparison of Time-to-Crest of Fault Currents forShort-Circuits on Terminals of a Synchronous Ma-chine and a Rectifier
For a three-phase fault on the terminals of a synchronous machine, the
fault current reaches the peak within half a cycle of the ac voltage. Whereas for
a dc fault on the terminals of a rectifier fed by the same synchronous machine,
the fault current reaches the peak value slowly depending upon the dc filter
inductance. This is illustrated with two fault cases - one on the source side
(ac) of the rectifier, and one on the load side (dc) of the rectifier shown in Fig.
6.2. The fault resistance is 0.01 Ω. For comparison purposes, the synchronous
machine parameters were the same as those used in Section 6.2.
Fig. 6.10 shows the worst-case ac fault current for a three-phase line-to-
ground fault on the synchronous machine shown in Fig. 6.2. Since there is an
appreciable amount of asymmetrical dc fault current flow in the synchronous
machine, the fault current profile is sensitive to the time of occurrence of
the fault. Until 0.1958 s, the synchronous machine operates under no load
conditions. At 0.1958 s, a three-phase fault with a fault resistance of 0.01 Ω
occurs across the three-phase machine terminals.
The fault current reaches the peak value within half a cycle of the ac
voltage. Due to the sharp increase in the fault current, ac breakers are designed
to be opened after several cycles of fault occurrence. By practicing the above
122
technique, the fault current interruption rating of the breaker can be reduced.
This is in contrast to the results obtained from rectifier dc faults.
Main : Graphs
0.180 0.200 0.220 0.240 0.260 0.280 0.300 0.320 0.340 0.360 . . .
-30
-20
-10
0
10
20
30
40
y (k
A)
Ia Ib Ic
AC Currents
Iac
(kA
)
Figure 6.10: Synchronous generator fault current for a three-phase 0.01Ω faulton the ac side for the circuit shown in Fig. 6.3.
In the dc fault case shown in Fig. 6.3, fault current increases slowly.
Since the dc fault current takes more than 0.14 s (more than eight cycles) to
reach the peak value, the dc breaker should be designed to interrupt the fault
current before it reaches its crest. The dc current will not die out on its own
as shown in Fig. 6.3. A circuit breaker either on the ac or dc side is necessary
to interrupt the fault current.
123
6.6 Short Circuit Current for a Close Bolted Fault atthe Rectifier
Short circuit current for a bolted fault close to the terminals of a rectifier
produces large transients. These transients were derived for a Thevenin source
fed rectifier without any assumptions for smoothing in reference [12]. This
method can be inducted to calculate the transients for a synchronous machine
fed rectifier. The calculations are given below to illustrate the approach with
examples for both synchronous machine fed rectifiers and infinite AC source
fed rectifier. For comparison purpose the infinite AC source has been modeled
from the Thevenin equivalent of the sub-transient model of the synchronous
generator. The switch models were simulated using PSCAD and the equivalent
model results derived below were compared with the switch model results from
PSCAD. The parameters for the synchronous machine used in the derivation
and PSCAD model were obtained from Section 6.2. Since the fault is close to
the rectifier terminals, the resistance on the ac side cannot be neglected for
short circuit calculations.
6.6.1 Short Circuit Current for Thevenin Equivalent Fed Rectifier
The instantaneous phase to neutral voltage for the Thevenin source can
be given by,
ea = Em cos(ωt+ α) = 2401.78√
2 cos(ωt+ α)
eb = Em cos(ωt+ α− 2π
3) = 2401.78
√2 cos(ωt+ α− 2π
3)
ec = Em cos(ωt+ α +2π
3) = 2401.78
√2 cos(ωt+ α +
2π
3) (6.1)
124
For a bolted fault shown in Fig. 6.11 all the three ac lines conduct current into
the fault. Since the fault voltage is zero, only one of the diodes in each phase
can conduct for any instantaneous voltage shown in (6.1). Therefore there
are always three diodes conducting the fault current leading to the equivalent
circuit shown in Fig. 6.12. Each three phase line is connected to the fault
through a diode. If the diode on-resistance is Rdiode,on then this can be added
to the AC short circuit resistance. The calculations are shown below: For a
125
Rdiode,on = 1mΩ,
Ta = 0.278 s
Ld =Xd
2π60= 1.1mH
Rd =LdTa
= 4.1mΩ
Modified d-axis resistance = Rd,m = Rd +Rdiode,on = 5.1mΩ
Modified Ta,m =LdRd,m
= 0.2238 s
T ′d = 0.33 s
L′d =X ′d
2π60= 0.826mH
R′d =L′dT ′d
= 3.5mΩ
Modified d-axis transient resistance = R′d,m = R′d +Rdiode,on = 4.5mΩ
Modified T ′d,m =L′dR′d,m
= 0.1835 s
T ′′d = 0.03 s
L′′d =X ′′d
2π60= 0.4591mH
R′′d =L′′dT ′′d
= 20.3mΩ
Modified d-axis sub-transient resistance = R′′d,m = R′′d +Rdiode,on = 21.3mΩ
Modified T ′′d,m =L′′dR′′d,m
= 0.0215 s
In the following section equivalent analytical models are derived for
the sub-transient Thevenin equivalent followed by synchronous equivalent an-
alytical model. The circuit in Fig. 6.12 has an ac short circuit impedance
126
1 3 5
4 6 2
ae
be
ce
scL
dcsci ,
asci ,
bsci ,
csci ,
1i
2i
3i 5i
4i 6i
scR
Bolted faultscL
scL
scR
scR
Figure 6.11: During a bolted fault at the terminals of the rectifier, three diodesconduct in the rectifier bridge
ae
be
ce
scL asci ,
bsci ,
csci ,
scR
scL
scL
scR
scR
Figure 6.12: For a bolted fault at the terminals of the rectifier as shown inFig. 6.11, three diodes conduct in the rectifier bridge and the ac source sees acomplete three-phase short circuit.
127
of
Zsc = Rsc + jωLsc (6.2)
In the model circuit,
Lsc = L′′d
Rsc = R′′d
Short circuit current for a three-phase short-circuit have been derived in a
number of text books [28]. The transients on each phase of the ac source is
given by,
isc,a(t) = I0[cos (ωt+ α− φc)− exp−t/τsc cos (α− φc)
]isc,b(t) = I0
[cos
(ωt− 2π
3+ α− φc
)− exp−t/τsc cos
(α− φc −
2π
3
)]isc,c(t) = I0
[cos
(ωt+
2π
3+ α− φc
)− exp−t/τsc cos
(α− φc +
2π
3
)](6.3)
where,
I0 =
√2E√
R2sc + ω2
gL2sc
= 19.5377 kA is the amplitude
of the steady state short circuit current on the ac side.
τsc =LscRsc
= 0.0215 s is the exponential decay time constant
φc = arctan (ωτsc) = 83o ≈ 90o is the relative phase displacement
of the ac short circuit current. with respect to the ac voltage(6.4)
Average short circuit current on the dc side can be given by,
Isc,0 =3
πI0 = 18, 6571 kA (6.5)
128
Using the result from [12] the dc side short circuit transient is given by the
equation,
isc,dc(t) = max (|isc,a(t)|+ |isc,b(t)|+ |isc,c(t)|) (6.6)
which is the envelope of the three-phase short-circuit current.
One of the currents on the ac lines forms the peak current on the dc
side. If the fault occurs at α = −π2, the maximum short circuit current occurs
on phase ‘A’. For such a case the current in line ‘A’ will be,
isc,a(t) = I0
[cos(ωt− π) + exp
(−tτsc
)]= I0
[exp
(−tτsc
)− cos(ωt)
](6.7)
At ωt = π, the short circuit current reaches its maximum where,
isc,a(t) = isc,dc(t) ≈ 2I0 (6.8)
A conservative value for the maximum rate of rise of current on the dc and ac
side is given by
disc,dc(t)
dt= I0 × ω (6.9)
Figure 6.14 shows a close match between the results of (6.6) and the
switch model simulated using PSCAD. Similar to ac three-phase short circuit
transients, dc transients can reach twice the steady state short current for a
bolted fault near the terminals of the rectifier. Figure 6.15 shows the absolute
value of the ac three-phase currents whose envelope is the dc short circuit
current in Fig. 6.14. Figure 6.16 shows the exponential decay of dc short
circuit current with a time constant given in (6.4).
129
VaRec
NaR
VbRec
NbR
VcRec
NcR
SStart
Sequence
SetS
Rload = 1000.0
Ia
Ib
Ic
4.16 kV AC 60 Hz
3 phase voltage source
Wait For
1.983[s]
S SetS
Rload = 0.0
RRL
dcCrnt
D1
D2
D3
D6
D5
D4
dcVltg
Rlo
ad +
load
Crn
tR_series = 0.0153 ohm
L_series = 0.45905 mH
0.0153 [ohm] 0.45905 [mH]
0.0153 [ohm] 0.45905 [mH]
0.0153 [ohm] 0.45905 [mH]
Figure 6.13: Switch model simulated in PSCAD.
0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.20
5
10
15
20
25
30
35
Time (s)
I sc,d
c (kA
)
Equivalent modelDetailed model
Figure 6.14: Verification of the results in (6.6) with the switch model simulatedin PSCAD.
130
0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04 0.045 0.050
5
10
15
20
25
30
35
Time (s)
I (kA
)
|I
sc,a|
|Isc,b
|
|Isc,c
|
Figure 6.15: The graph of the absolute values of ac current (6.3).
0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.10
5
10
15
20
25
30
35
40
Time (s)
I sc,d
c (kA
)
DecayDetailed model I
sc,dc
Figure 6.16: The exponential decay of the dc short circuit current along withthe switch model results.
131
6.6.2 Short Circuit Current for Synchronous Generator Fed Rec-tifier
The short circuit current for a synchronous generator fed rectifier ex-
hibits properties similar to the Thevenin equivalent shown in the previous
section. The three-phase AC short-circuit current for a synchronous generator
can be used to obtain the DC fault current. From [28] the three-phase AC
short-circuit current can be given by,
isc,a(t) =√
2E
((1
X ′′d− 1
X ′d
)e−t/T
′′d +
(1
X ′d− 1
Xd
)e−t/T
′d +
1
Xd
)cos (ωt− π)
−√
2E
X ′′dexp−t/Ta cos(π)
isc,b(t) =√
2E
((1
X ′′d− 1
X ′d
)e−t/T
′′d +
(1
X ′d− 1
Xd
)e−t/T
′d +
1
Xd
)cos
(ωt− π − 2π
3
)−√
2E
X ′′dexp−t/Ta cos(π − 2π
3)
isc,c(t) =√
2E
((1
X ′′d− 1
X ′d
)e−t/T
′′d +
(1
X ′d− 1
Xd
)e−t/T
′d +
1
Xd
)cos
(ωt− π +
2π
3
)−√
2E
X ′′dexp−t/Ta cos
(π +
2π
3
)Similar to the results obtained in the previous section the envelope of
the absolute values of the ac short circuit current forms the dc short circuit
current.
isc,dc(t) = max (|isc,a(t)|+ |isc,b(t)|+ |isc,c(t)|) (6.10)
The absolute values of the ac short circuit currents are plotted in Fig. 6.18.
The results of (6.10) is compared with the PSCAD switch model (Fig. 6.17)
132
in Fig. 6.19.
VaRec
NaR
VbRec
NbR
VcRec
NcR
dcCrnt
D1
D2
D3
D6
D5
D4
SStart
Sequence
SetS
Rload = 1000.0
Ia
Ib
Ic
dcVltg
4.16 kV AC 60 Hz
3 phase voltage source
Wait For
1.985[s]
S SetS
Rload = 0.0
Rlo
ad +
load
Crn
t
STe
TmTmw
Ef If
0.0
1.0
Figure 6.17: Switch model simulated in PSCAD.
The peak of the dc short circuit current is dependent upon the direct
axis sub-transient reactance of the synchronous generator. The rate of decay of
the short circuit current is dependent on armature time constant, and transient
and sub-transient time constant. Unlike the short circuit current from the
Thevenin equivalent the peak current can reach values above twice the steady
state short circuit current due to the decrease in inductance during transient
conditions.
The expressions derived above give the maximum force experienced by
a circuit breaker, bus bars and the conductors connected to the rectifier. The
short circuit current rises quickly after the fault and the maximum short circuit
133
0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.20
5
10
15
20
25
30
35
40
Time (s)
I (kA
)
Isc,a
Isc,b
Isc,c
Figure 6.18: Verification of the results in (6.10) with the switch model simu-lated in PSCAD.
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 10
5
10
15
20
25
30
35
40
Time (s)
I sc,d
c (kA
)
Equivalent modelDetailed model
Figure 6.19: The graph of the absolute values of ac current (6.10) and shortcircuit dc current from PSCAD.
134
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 10
5
10
15
20
25
30
35
40
Time (s)
I sc,d
c (kA
)
DecayDetailed model I
sc,dc
Figure 6.20: The exponential decay of the dc short circuit current along withthe switch model results.
current on the dc side is equal to the peak short circuit current on the ac side.
The steady state dc short circuit current can be approximately calculated using
the average dc short circuit current given by (6.5). These values can be used
for determining the short circuit ratings of rectifier components and the the
synchronous generator.
135
Chapter 7
Summary
In this work, a new model for six-pulse controlled rectifier has been
derived for obtaining its short circuit characteristics (AVM model for mode 2
and mode 3). The model was validated with a switch model from PSCAD and
it was found that the model is accurate if the dc inductance is high. It was
also found that if the inductance is low, then asymmetrical current flow on
the ac side caused considerable error. This model can be used to extract the
short-circuit peaks and rate of rise. From the differential equations of mode
1, mode 2 and mode 3 models, it can be found that short-circuit current does
not rise exponentially with single time constant but it increases with varying
time constant value. The model was also applied for a synchronous generator
rectifier source. It was found that the rate of rise of short-circuit current is
slow for dc fault when compared with an ac fault giving rise to different current
interruption requirements. Apart from the AVM model application, dc cur-
rent interruption methods available in commercial circuit breakers and recent
methods that are still in research stage for dc interruption were discussed.
The AVM models presented here have also been presented in IEEE
Electric Ship Technology Symposium (IESTS), 2011 [15]. In the future it is
136
expected that a scheme for overcurrent detection and protection based on the
work done here will be presented as a journal paper.
137
Appendices
138
Statement of Ethics and Academic Integrity
I certify that I have completed the online ethics training modules, par-
ticularly the Academic Integrity Module1, of the University of Texas at Austin
- Graduate School. I fully understand, and I am familiar with the University
policies and regulations relating to Academic Integrity, and the Academic Poli-
cies and Procedures2. I also attest that this report is the result of my own
original work and efforts. Any ideas of other authors, whether or not they
have been published or otherwise disclosed, are fully acknowledged and prop-
erly referenced. I also acknowledge the thoughts, direction, and supervision of
my research advisor, Prof. S. Santoso. I would also like to extend unrestricted
access to all my models implemented in PSCAD/MATLAB to Dr. Santoso
and his research group for future research.
1The University of Texas at Austin - Graduate Schools online ethics training mod-ules, http://www.utexas.edu/ogs/ethics/, and the ethics training on academic integrity,http://www.utexas.edu/ogs/ethics/transcripts/academic.html
2The University of Texas at Austin, General Information, 2006-2007, Chapter 11, Sec.11 101, http://www.utexas.edu/student/registrar/catalogs/gi06-07/app/appc11.html
139
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Vita
Pandarinath Murali was born in Thiruvallur, Tamil Nadu, India in
1988. Directly after finishing high school in 2005 at DRBCCC higher secondary
school, Thiruvallur, he began his undergraduate work in College of Engineering
Guindy in Chennai, India. He received his Bachelor of Engineering degree in
Electrical and Electronics Engineering from Anna University in May 2009. In
fall 2009, he joined the masters degree program in the Electrical and Computer
Engineering department at The University of Texas at Austin.
Permanent address: 2810 Salado st apt 129Austin, Texas 78705
This thesis was typed by the author .
145