Digital Computers
Only knows binary bits: 0 and 1(there are only 2 types of people in the
world: those who understand binary, and those who don’t)
204/19/23
Binary to Decimal
(xnxn-1…x0)2=xn×2n+xn-1×2n-1+…+x0×20
Xn: Most significant bit (MSB)
X0: Least significant bit (LSB)
Ex:(101) 2=1×22+0×21+1×20=4+0+1=5
04/19/23 3
Decimal to Binary
Ex: 11 binary number? 11/2: 1 (remainder) 5/2: 1 2/2: 0 1/2: 1 0 : STOP (1011)2
04/19/23 4
Binary Addition-Two Bits
04/19/23 5
1+ 1 11
1+ 0 01
0+ 1 01
0+ 0 00
Carry bit
Exercise: verify that they are correct in terms of decimal integers.
Binary Addition-Three Bits
04/19/23 6
1+ 1 1 11
Exercise: verify that they are correct in terms of decimal integers. 1
+ 1 0 10
1+ 0 1 10
1+ 0 0 01
0+ 1 1 10
0+ 1 0 01
0+ 0 1 01
0+ 0 0 00
Binary Addition: Bit-wise Addition
04/19/23 7
1011+ 1111 ?????
101 1+ 1111 1 ???? 0
Step 1: adding the rightmost bits, and recording the carry bit
10 1 1+ 11111 1 ??? 1 0
Step 2: adding the next bits (to the left) with the carry bit, and recording the carry bit
1 0 11+ 111111 ?? 0 10
Step 3: continue Step 2 until all bits are added. (finish it)
Finite Bits
Computer use finite bits to represent integers.• So only finite integers can be represented.Ex:2 bits can only represent 0, 1, 2, 3.• So overflow exists(finite bits are not sufficient)Ex: (10)2+(11) 2=(110) 2?
04/19/23 9
Finite Bits
Computer use finite bits to represent integers.• So only finite integers can be represented.Sln: use 8, 16, 32, 64, etc bits (integers
needed in our life can be represented)• So overflow exists(finite bits are not sufficient)What to do: depend on applicationsWho is responsible: systems,
programmer, users.
04/19/23 10
More Complicated: Negative Numbers
-3 binary number?Sln: use extra bit for sign (sign bit),0: + and 1: -Ex. (00)2=+0 (10)2=-0
(01)2=+1 (11)2=-1
04/19/23 11
Problems1.Two 0s (+0 and -0)2.Not easy to add positive and negative numbers
Negative Numbers: 2’s Complement
(xnxn-1…x0)2=-xn×2n+xn-1×2n-1+…+x0×20
Ex: (00)2= =-0×21+0×20=0
(01)2= =-0×21+1×20=1
(10)2= =-1×21+0×20=-2
(11)2= =-1×21+1×20=-1
04/19/23 12
Good: 1.only one zero2.Easy to add negative and positive numbers3.Two useful operations: negation and sign-extending
Exercise: (11)2 +(01)2=?
(11)2 +(10)2=?
Note: Xn not only represents sign, but has weights (different to the previous sign-magnititude representation).
2’s Complement: Negation
(011)2=3 binary number of -3?
(100)2 : complement of (011)2
+(001)2 : plus one
=(101)2 : -3
04/19/23 13
Exercise: find the negation of (110)2 and (100)2
2’s Complement: Sign Extension
Extend (001)2 to 6 bits ??????
(???001) 2 : copy the old bits to the right
(000001) 2 : MSBthe remaining bits
Exercise: extending (101)2 to 6 bits and verify that they are the same integer.
04/19/23 14
Exercise
1. Using 8 bits to represent integers.• Add 100 and -55• Add -55 and -802. Find negation of 1003. Sign extending -100 to 16 bits.
04/19/23 15
Digital Computers
• Knows only binary bits (commands to control computers), which difficult for people to handle.
• Therefore, assembly languages were developed for people to control computers.
• In this textbook, we learn MIPS.
04/19/23 16
MIPS
• An Instruction Set Architecture (ISA): a set of instructions(commands)1. Provides interface for programmers2. Different implementations may support the
same ISA
• More see WIKI, MIPS Technology, Yahoo Finance.
04/19/23 17
Instruction
Normally requires1. Operation (what to do: addition, and, jump, etc)2. Operands (what to work on: register, memory,
immediate numbers)Ex: • add $s1, $s2, $s3: $s1=$s2+$s3Operation: addOperands: $s1 (target), $s2 and $s3 (source)
04/19/23 18
sub $s1, $s2, $s3: $s1=$s2-$s3s
Instruction Operands-Registers
04/19/23 19
Processor
5 -54
Registers $s1 $s2 $s3× 9 After the execution of the sub instruction,
$s1 holds 9 [=4-(-5)]
Instruction Operands-Memory
Lw $s1, 20($s2): $s1mem[20+$s2]
04/19/23 20
Processor
5 -54
$s1 $s2 $s3
Memory
Registers Word Address2 1 3 4
0 1 1 34 24
0× ?
After the instruction,$s1 holds 1×216+1×28+34=65826
Instruction Operands-Immediate Number
addi $s1, $s2, 20: $s1=$s2+20
04/19/23 21
Processor
5 -54
$s1 $s2 $s3 Registers × 24 After the instruction,
$s1 holds 4+20=24
Addi $s1, $s2, 20 Instruction registers
Instruction Operands-Questions
1. Why register operandsAns: for performance: registers are the fastest to
access by CPU2. Why memory operandsAns: for performance: only a few registers for
which fast access is possible, then the other data must be in memory
3. Why immediate operandsAns: for performance: these numbers can be
encoded in instruction, no need to access registers/memory
04/19/23 22
Instruction Operations-Arithmetic
• Add $s1,$s2,$s3: $s1=$s2+$s3• Sub $s1,$s2,$s3: $s1=$s2-$s3• Addi $s1,$s2, 20: $s1=$s2+20
Exericse:• For $s1=1,$s2=2,$s3=3, write the results after
executing each instructions.• Write an instruction so that $s1=$s1-1.
04/19/23 23
Instruction Operations-Data Transfer
• Lw $s1, 30($s2): $s1mem[$s2+30] (load/read word from memory)
• Sw $s1, 20($s2): $s1mem[$s2+20] (store/write a word to memory)
• Lb $s1, 30($s2): $s1mem[$s2+30] (load/read a byte from memory)
Exercise: read a word/byte at $s2+20 in memory to $s2.
04/19/23 24
Word vs. Byte Address
04/19/23 25
Memory
2 00000000
Byte address Word address
00000000 3 00000001 10 00000010 1 00000011 5 00000100 00000100 3 00000101 22 00000110 4 00000111 0 00001000 00001000
Aligment restriction:Word address must be a multiple of 4(the last two bits are 00)
Word Value-Big/Little Endian
04/19/23 26
Memory
2
Word address
00000000 3
10
1
5 00000100 3
22
4
0 00001000
Word value at address 00000000?• big-endian:Value is : 2×224+3×216+10×28+1=33753601
2 3 10 1
• little-endian:Value is : 1×224+10×216+3×28+2=17433346
1 10 3 2
Data Transfer-Exercise
Suppose $s1 holds the address 0x00000000. Write instructions to swap the integers at address 0x00000000 and 0x00000100. Draw the memory contents after the swap.
04/19/23 27
Memory
2 00000000
Byte address
3 00000001 10 00000010 1 00000011 5 00000100 3 00000101 22 00000110 4 00000111 0 00001000
Instruction Operation-Logical
• And– And $s1,$s2,$s3
• Or– Or $s1,$s2,$s3
• And immediate– Andi $s1,$s2,20
• Shift left logic– Sll $s1, $s2,10
• Etc.
04/19/23 28
Logical Operation-And (Two Bits)
The following table specifies And operations.
04/19/23 29
Input 1 Input 2 Output of And
0 0 0
0 1 0
1 0 0
1 1 1
Logical Operation-And (Bit-Wise)
04/19/23 30
1010and 1110 ????
1010and 1110 ???0
For two binary numbers, and each bit independently (no carry bit like in addition)
1010and 1110 ??10
Continue and finish the example
Logical Operation-Or (Two Bits)
The following table specifies Or operations.
04/19/23 31
Input 1 Input 2 Output of Or
0 0 0
0 1 1
1 0 1
1 1 1
Logical Operation-Or (Bit-Wise)
04/19/23 32
1010 or 1110 ????
1010or 1110 ???0
For two binary numbers, or each bit independently (no carry bit like in addition)
1010 or 1110 ??10
Continue and finish the example
Logical Operation-Sll
Sll $s1, $s1,3
04/19/23 33
11110000111100001111000011111111
10000111100001111000011111111 111 000
Logical Operation-Exercise
• $s1=00000000 00000000 00000000 00001001 $s2=00000000 00000000 00000000 00001100• What is in $s1 after the following operation
(independently)1. Sll $s1, $s1,42. Srl $s1,$s1,43. And $s1,$s2,$s14. Or $s1,$s1,$s25. Andi $s1,$s2,8
04/19/23 34
Instruction Operation-Conditional Branch
• Branch if equal– Beq $s1, $s2, 25
• Branch if not equal– Bne $s1, $s2, 25
• Set on less than– Slt $s1,$s2,$s3
• Set on less than unsigned– Sltu $s1,$s2,$s3
• Set on less than immediate– $slti $s1,$s2,20
04/19/23 35
Conditional Branch-Beq
• Beq $s1, $s2, 25
04/19/23 36
Processor
4 -54
Memory
Beq $s1, $s2, 25
Sub $s1,$s2,$s3
$s1 $s2 Word Address
128
24
Beq $s1,$s2,25
Instruction registers
add $s1,$s2,$s3 28
Now pc=24, and$s1=$s2, then pc Changes to pc+4+25×4=128
24pc
Conditional Branch-Beq (Cont.)
• Beq $s1, $s2, 25
04/19/23 37
Processor
4 -54
Memory
Beq $s1, $s2, 25
Sub $s1,$s2,$s3
$s1 $s2 Word Address
128
24
Sub $s1,$s2,$s3
Instruction registers
add $s1,$s2,$s3 28
Now pc=24, and$s1=$s2, then pc Changes to pc+4+25×4=128,
Then next instruction to execute is from address 124.
128pc
Conditional Branch-Bne
• Bne $s1, $s2, 25
04/19/23 38
Processor
5 -54
Memory
Beq $s1, $s2, 25
Sub $s1,$s2,$s3
$s1 $s2 Word Address
128
24
Beq $s1,$s2,25
Instruction registers
add $s1,$s2,$s3 28
Now pc=24, and$s1≠$s2, then pc Changes to pc+4+25×4=124
24pc
Conditional Branch-Bne (Cont.)
• Beq $s1, $s2, 25
04/19/23 39
Processor
4 -54
Memory
Beq $s1, $s2, 25
Sub $s1,$s2,$s3
$s1 $s2 Word Address
128
24
Sub $s1,$s2,$s3
Instruction registers
add $s1,$s2,$s3 28
Now pc=24, and$s1≠$s2, then pc Changes to pc+4+25×4=128,
Then next instruction to execute is from address 124.
128pc
Conditional Branch-Slt
• Slt $s1, $s2, $s3
04/19/23 40
Processor
4 -54
$s1 $s2
Slt $s1,$s2,$s3
Instruction registers
$s3$s2!<$s3, so $s1=0.
× 0
For this configuration and instruction slt $s1,$s3,$s2,however, $s1=1, since $s3 <$s2
Conditional Branch-Sltu
• Sltu $s1, $s2, $s3
04/19/23 41
Processor
4 -54
$s1 $s2
Slt $s1,$s2,$s3
Instruction registers
$s3$s2<$s3 when $s3 is an unsigned integer, so $s1=1.
× 1
For this configuration and instruction slt $s1,$s3,$s2,however, $s1=0, since $s3 !<$s2
Conditiona Branch-Exercise
Write an instruction for address 124 which jumps to the instruction at address 200
1. when $s1<$s2.2. When $s1==$s2.3. When $s1!=$s24. When $s1>$s2
04/19/23 42
Memory
Instruction 1
Sub $s1,$s2,$s3 200
124
add $s1,$s2,$s3 128
Word Address
Instruction Operation-Unconditional Jump
• Jump register– Jr $ra
• Jump– J 2500
• Jump-and-link instruction– Jal 2500
04/19/23 43
Unconditional Jump-Jr
• Jr $ra
04/19/23 44
Processor
5 -54
Memory
Jr $ra
Sub $s1,$s2,$s3
$s1 $s2 Word Address
124
24
Jr $ra
Instruction registers
add $s1,$s2,$s3 28
Now $ra=124, then pc =$ra=124
124
$ra
24pc
Unconditional Jump-Jr(Cont.)
• Jr $ra
04/19/23 45
Processor
4 -54
Memory
Beq $s1, $s2, 25
Sub $s1,$s2,$s3
$s1 $s2 Word Address
124
24
Sub $s1,$s2,$s3
Instruction registers
add $s1,$s2,$s3 28
Then next instruction to execute is from address 124.
Now $ra=124, then pc =$ra=124
124
$ra
124pc
Unconditional Jump-J
• J 25
04/19/23 46
Processor
5 -54
Memory
J 25
Sub $s1,$s2,$s3
$s1 $s2 Word Address
100
24
J 25
Instruction registers
add $s1,$s2,$s3 28
Now $pc=24 and the immediate number is 25, then pc =100
124
$ra
24pc
Unconditional Jump-J (Cont.)
• J 25
04/19/23 47
Processor
5 -54
Memory
J 25
Sub $s1,$s2,$s3
$s1 $s2 Word Address
100
24
Sub $s1,$s2,$s3
Instruction registers
add $s1,$s2,$s3 28
124
$ra
100pc
Then next instruction to execute is from address 100.
Now $pc=24 and the immediate number is 25, then pc =100
Addressing Mod of J
• In the previous example, Why is the target address 100 not 25?
• Because J use Pseudodirect addressing mode
04/19/23 48
00000000 00000000 00000000 00011000 00 00000000 00000000 00011001
00000000 00000000 00000000 01100100
Pc (32 bits) Immediate number (26 bits)
Copy the leftmost 4 bits from pc, 26 bit from the immediate number,And then fill 00 in the last two bits
Target address (32 bits)
Unconditional Jump-Jal
• Jal 25
04/19/23 49
Processor
5 -54
Memory
Jal 25
Sub $s1,$s2,$s3
$s1 $s2 Word Address
100
24
Jal 25
Instruction registers
add $s1,$s2,$s3 28Now $pc=24 and the immediate number is 25, then $ra=pc+4=28 and pc =100
124
$ra
24pc
Unconditional Jump-Jal(Cont.)
• Jal 25
04/19/23 50
Processor
5 -54
Memory
Jal 25
Sub $s1,$s2,$s3
$s1 $s2 Word Address
100
24
Sub $s1,$s2,$s3
Instruction registers
add $s1,$s2,$s3 28Now $pc=24 and the immediate number is 25, then $ra=pc+4=28 and pc =100
28
$ra
100pc
Unconditional Jump-Exercise
Write an instruction for address 12 which
1. jump to the instruction at address 120.
2. jump to the instruction at address 120 and change $ra to 16.
04/19/23 51
Memory
Instruction 1
Sub $s1,$s2,$s3
Word Address
120
12
add $s1,$s2,$s3 16
Assembly Program .data
L1: .word 1 20 .text
la $t0, L1 lw $t1,0($t0) add $t2,$zero,$t1 lw $t1,4($t0) add $t2,$t2,$t1 li $v0,10 #end program syscall
04/19/23 52
An assembly program includes more than assembly instructions: directives, labels, comments, pseudo instructions, even procedure calls.
Program Loaded in Memory .data
L1: .word 1 20 .text
la $t0, L1 lw $t1,0($t0) add $t2,$zero,$t1 lw $t1,4($t0) add $t2,$t2,$t1 li $v0,10 #end program syscall
04/19/23 53
reserved
syscallori $2,$0,10add $10,$10,$9lw $9,4($8)add $10, $0,$9lw $9, 0($8)lui $8, 4097
Text
1Data20
Dynamic data
Stack
10010000
address
Details in the Assembly Program
• The .data and .text directives are used to separate variable declarations and assembly language instructions
• The .word directive is used to allocate and initialize space for a variable
04/19/23 Foundation of Systems, Yang Liu, UTPA 54
Program with Branch/Jump
04/19/23 55
.dataL1: .word 1 20 3 -5 L2: .word 0
.text la $t0, L1 # load address of the target number la $t1, L2 # load address where termination should occur lw $t2,0($t0) #load the target number #search until either the target is found or all numbers are compared with the target
LOOP: add $t0, $t0,4 # make 0($t0)$ point to next number beq $t1, $t0, EXIT # no more number to compare, exit lw $t3,0($t0) # load the number to compare beq $t2,$t3, EXIT # find a number equal to the target, exit j LOOP # continue search
EXIT: li $v0,10 # terminate program syscall
Exericse
Write a program with a positive integer n as input data such that the program output the summation of 1+…+n (output should be where the input data is).
Ex.If n=3, output should be 1+2+3=6. And the program replace input 3 with output 6.
04/19/23 56
Function
Function is called by jal addr with extra work where addr is the starting address/label of the callee function
1. Changing stack pointers and saving registers which are used by the calling function and will be used by the callee function when entering the callee function.
2. When returning from the callee function, changing stack pointers and restore the saved registers.
3. The callee function calls jr $ra to return to the calling function
04/19/23 57
Registers during Function Call
Who save and restore registers: calling or callee function?
Ans: depends on classification of registers (see the table on the right-bottom of the green page in the textbook)
04/19/23 58
Exericse
Write a program with a function which takes a positive integer n as an argument and calculates the summation of 1+…+n. The program has several input data to call the function, and output the sum for each input data
Ex. If the program has 3 and 5 as input data, then output should be:
3 6 5 15
04/19/23 59
Encoding Instructions
04/19/23 61
Format Fields Comments
6 bits 5 bits 5 bits 5 bits 5 bits 6 bits 32 bits long
R-format Op Rs Rt Rd Shamt Funct arithmetic
I-format Op Rs Rt Address/immediate Transfer,branch, immediate
J-format op Target address Jump instruction
Op: basic operation of the instructionRs: the first register source operandRt: the second register source operandRd: The register destination operandShamt: shift amountFunct: function code
Example
Find the encoding of add $s0, $a1, $t71.Find the format of add: R-format from the
green page. 2.Then find the encoding of all fields.
04/19/23 62
Format Fields Comments
6 bits 5 bits 5 bits 5 bits 5 bits 6 bits 32 bits long
R-format 000000 00101 01111 10000 ?????(00000)
100000
Exercise
Find the encoding of the following instructions.• Addi $s1, $t1, -2• Bne $t0,$t0, -16• J 200• Sll $s1,$s1, 5
04/19/23 63