Download - GRID.pdf GRID.pdf September 2013 · And Implications for Software and Business Methods biotech [more] SF-PES - 9/18 | Methods for Testing Medium Voltage Cables - DC- HI-pot, very

September 2013 V is i t us a t www .e-gr id .net

GRID.pdf GRID.pdf

September 2013

CHAPTER MEETINGS SCV-TMC - 9/5 | My Journey from Engineering to Management - immigrant, knowledge base, leadership skills, strategies ... [more]

SCV-EDS - 9/6 | Power Electronics: Beyond the Silicon Limit - high voltage, SiC, GaN, barriers, app'ns ... [more]

SCV-EMC - 9/10 | BRIC: Overview of the Emerging Markets - culture, laws, regulations, necessary approvals, insights ... [more]

SCV-CS - 9/10 | Revolutionary Server Management: Managing Platform Development for the Future - planning, challenges ... [more]

SCV-ComSoc - 9/11 | Google's Project Loon - intra-balloon network, remote areas and gaps, pilot test ... [more]

SCV-CPMT - 9/11 | Semiconducting Nanowire Arrays on Graphene: Precision Placement, App’ns- growth, transfer, contact ... [more]

SCV-PV - 9/11 | CdTe and Si Photovoltaics Under One Roof - utility-scale, rooftops, competitive technologies ... [more]

SCV-CAS - 9/16 | Circuits and Systems for Wearable and Implantable Medical Devices - communication, harvesting ... [more]

SCV+OEB-Life - 9/16 | Many Uncertainties About Climate Change - factors, carbon dioxide, regulations, costs, China ... [more]

SCV-Nano - 9/17 | Thermal Management at the Extremes - lengthscales, timescales, power densities, energy conversion ... [more]

SCV-Mag - 9/17 | Advanced Spintronic Materials for Generation and Control of Spin Current - precision, injectors/detectors ... [more]

SCV-Phot - 9/17 | Confessions of a Serial Entrepreneur: 30 Years of Photonic Start-ups in Academia and Industry - next steps ... [more]

SCV-EMBS - 9/18 | The Supreme Court Weighs in On Gene Patents: And Implications for Software and Business Methods biotech [more]

SF-PES - 9/18 | Methods for Testing Medium Voltage Cables - DC-HI-pot, very low frequency, tan-delta, partial discharge ... [more]

SPECTRUM - 9/19 | High Speed and High Power Connector Design - webinar, simulation, analysis, TDR, cross-probing ... [more]

SCV-ComSoc - 9/19 | Quantified Self: The Next Frontier in Mobile Healthcare - MEMS/bioMEMS, analytics, opportunities ... [more]

SCV-APS - 9/19 | Beacon Satellite Scintillation from Sputnik to Cubesat - remote sensing, weather forecasting ... [more]

SCV-WIE - 9/24 | Secrets of the Mobile World - Linux and HTML5 - Android, Chrome, iOS, fragmentation, client-side ... [more]

SCV-PSES - 9/24 | Chapter Planning Meeting: Product Safety Engineering - election planning, symposium, new meetings ... [more]

SF-IAS - 9/24 | Generator Paralleling Switchgear and New Innovations - digital synchronizing, loadsharing, functionality ... [more]

Additoinal September, Ocdtober Meetings =====>>

Santa Clara University Grad School of Engineering Fall Open University [more] - Early-morning, evening, Saturday classes

CONFERENCE CALENDAR

Sept 17-19: OLEDs World Summit 2013 - Hyatt at Fishermans Wharf, S.F. [more]

Oct 6-9: IEEE Int'l Conference on Big Data (IEEE BigData) - Hyatt Regency, Santa Clara [more]

Oct 15-17: Big Data TechCon 2013 - Hyatt Regency, Burlingame [more]

Oct 13-16: IEEE Compound Semiconductor IC Symposium - Portola Hotel & Spa, Monterey [more]

Oct 20-23: IEEE Global Humanitarian Technology Conference 2013 - Airport Garden Hotel, San Jose [more]

Oct 22-24: Open Server Summit 2013 - Santa Clara Convention Center [more]

Oct 28-29: Symposium on Energy Efficient Electronic Systems - UC-Berkeley [more]

Oct 29: IEEE Rock Stars of Big Data - Computer History Museum, Mtn View [more]

Nov 12-15: Android Developer Conference (AnDevCon) - Hyatt Regency Burlingame [more]

Nov 19-22: Printed Electronics USA Conference - Santa Clara Convention Center [more] Calls for Papers: Int'l Symposium on Quality Electronic Design (ISQED) Interdisciplinary Engng Design Education Conference - March 10-12, 2014 - TechMart, Santa Clara [more] - Papers due September 14

Chapter Seminars Power Electronics: Beyond the Silicon Limit [more]

- September 6, Santa Clara EMI Reduction; PCB Applications Notes; Multi-layer PCBs - October 17, Santa Clara [more]

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Worldwide leader in RF and Wireless Training Besser Associate Fall Classes [more]- RF Techniques - DSP - Wireless Design - RF Power Amplifiers - Data Converters - Power Conversion

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September 2013 V is i t us a t w w w . e - G R I D . n e t

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September 2013 • Volume 60 • Number 9

IEEE-SFBAC ©2013

IEEE GRID is the monthly newsmagazine of the San Francisco Bay Area Council of the Institute of Electrical and Electronics Engineers, Inc. As a medium for news for technologists, managers and professors, the editorial objectives of IEEE GRID are to inform readers of newsworthy IEEE activities sponsored by local IEEE units (Chapters, Affinity Groups) taking place in and around the Bay Area; to publicize locally sponsored conferences and seminars; to publish paid advertising for conferences, workshops, symposia and classes coming to the Bay Area; and advertise services provided by local firms and entrepreneurs.

IEEE GRID is published as the GRID Online Edition

residing at www.e-GRID.net, in a handy printable GRID.pdf edition at the end of each month, and also as the e-GRID sent by email twice each month to more than 30,000 Bay Area members and other professionals.

Editor: Paul Wesling IEEE GRID PO Box 2110 Cupertino CA 95015-2110 Tel: 408 331-0114 / 510 500-0106 / 415 367-7323 Fax: 408 904-6997 Email: edi tor@e-gr id.net www.e-GRID.net

Select a Chapter event to learn about new developments and to network with fellow professionals -- choose a course

or conference to master new skills.

Stay ahead of changing professional demands;

sharpen your competitive edge with up-to-date technical skills and through your networking activities. Technology to your INBOX, twice a month.

NOTE: This PDF version of the IEEE GRID – the GRID.pdf – is a monthly publication and is issued a few days before the first of the month. It is not updated after that. Please refer to the Online edition and Interactive Calendar for the latest information.

DIRECTORS

Santa Clara Valley

Ed Aoki

John Swan

Oakland East Bay

Catherine Jenkins

Bill DeHope

San Francisco

Michael Butler

Shirin Tabatabai

OFFICERS Chair: Ed Aoki

Secretary: Bill DeHope Treasurer: Shirin Tabatabai

IEEE-SFBAC PO Box 2110

Cupertino, CA 95015-2110

IEEE GRIDAdditional Chapter Meetings

SCV-CPMT - 9/26 | Low-CTE Organic Interposer Technology for 2.5D Packaging - need, design rules, qualification ... [more]

SCV-CNSV - 10/1 | Intel's Transition to Success: From Memory to the Microprocessor - early days, roadmap, growth, new devices ... [more]

SPECTRUM - 10/9 | Electromagnetic Compatibility (EMC) Design and Verification for Embedded Systems - webinar, ssusceptibility, interference, testing ... [more]

SCV-CPMT - 10/9 | Advanced Package Migration to System-Level Integration - markets, drivers, 2.5D interposers, embedded active die, package-on-package ... [more]

SCV Section - 10/14 | Senior Elevation Upgrade Night - time to upgrade? Make it easy ... (Cogswell, 6PM) [more]

SCV-CSS - 10/16 | Simulating Beyond a Billion Degrees of Freedom - cores, petabytes, algorithmic approaches, decomposition, accuracy ... [more]

OEB-IAS - 10/17 | Distributed Generation Interconnection Workshop - full-day: PV, Wind, Biomass, Hydro, Geothermal, Cogeneration ... [more]

SF-IAS - 10/22 | Title 24 2014 Changes with Lighting Control Developments - review, dimming, daylighting, plug load controls ... [more]


Patent Agent Jay Chesavage, PE

MSEE Stanford 3833 Middlefield Road, Palo Alto 94303

[email protected]

www.File-EE-Patents.com

TEL: 650-619-5270 FAX: 650-494-3835

Do you provide a service? Would you like more inquiries?

Access 25,000 engineers and managers IEEE Members across the Bay Area Monthly and Annual Rates available

Visit our Marketplace (page 3)

Download Rates and Services information: www.e-grid.net/docs/marketplace-f lyer.pdf

GRID.pdf

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Professional Services Marketplace – [email protected] for information

Say you found them in our GRID MARKETPLACE

MET Laboratories

EMC – Product Safety

US & Canada

• Electromagnetic Compatibility • Product Safety Cert. • Environmental Simulation • Full TCB Services • Design Consultations • MIL-STD testing • NEBS (Verizon ITL & FOC) • Telecom • Wireless, RFID (DASH7 & EPCglobal Test Lab)

Facilities in Union City and Santa Clara

www.metlabs.com [email protected] 510-489-6300

IEEE-CNSV Consultants' Network

of Silicon Valley

• Become a member • Find a Consultant • Submit a Project

CaliforniaConsultants.org

http://www.metlabs.com/

mailto:[email protected]?subject=GRID Inquiry:

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http://www.CaliforniaConsultants.org/

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CSICS provides the latest results in high-speed digital, analog, microwave/millimeter wave, mixed mode, and optoelectronic integrated circuits. Advances in compound semiconductors including GaAs, GaN, InP, as well as high-speed and mm-wave CMOS and more advanced materials systems are featured. The technical program is strong, yet the atmosphere is casual, for excellent opportunities to interact with your professional peers.

Highlights: • Short Courses – Terabit Optical Communications and Sub-mm-Wave/THz Systems & Measurements

(Separate registration allowed) • Vendor’s Exhibition – demonstrations and face-to-

face meetings with state-of-the-art exhibitors • Panel Sessions Terabit-Per-Second Networks:

How do we get there? - Embedded Thermal Management: Problems and Opportunities - Doherty or Envelope Tracking: Breaking the 60% barrier - The Future of GaN Technology

Bringing together researchers who are working on breakthrough improvements in energy efficiency for information processing systems.

Featured Speaker: Arun Majumdar, VP of Energy, Google Inc, &

Former Acting Undersecretary of Energy, and Founding Director of ARPA-E

Keynotes: Shekhar Borkar, Director of Microprocessor

Technology Lab, Intel Corp

Rahul Sarpeshkar, MIT

Sessions: Ultra Low Voltage Nanoelectronics Milli -Volt Nanomechanical Logic Spintronics & Other Memories Optical Chip Scale Interconnect Low Voltage CMOS Circuits & Architectures Energy Efficient Computing Systems

Sessions: - Terabit-Per-Second Networks - Advanced Doherty Power Amplifiers - High-speed Mixed Signal

Circuits - Thermal Management - High-Power Technologies - mm-Wave Transmitter Building Blocks

- Device Characterization - Advanced Device Modeling - The Future of GaN Technology … and many more.

Save, through September 23rd Full information, and to register:

www.csics.org

Invited, contributed and poster papers

Invited Speakers: Ashok V. Krishnamoorthy, Architect & Chief

Technologist, Photonics, Oracle Corp

Dennis Newns, IBM

Seung H. Kang, Qualcomm. Inc.

Kerstin Eder, Bristol University

Philip Feng, Case Western Reserve

Michael B. Taylor , UC San Diego

Katsuhiro Tomioka, Hokkaido University

Qing-Tai Zhao, Forschungszentrum Jülich

$225, through Sept. 23rd; register early

Full information, and to register:

www.e3s-center.org/symposium

2013 IEEE

Compound Semiconductor IC Symposium

INTEGRATED CIRCUITS IN GaAs, InP, SiGe, GaN and OTHER COMPOUND SEMICONDUCTORS

October 13-16, 2013 Portola Hotel & Spa Monterey

http://www.csics.org/

http://www.e3s-center.org/symposium/


Transitioning from Individual Contributor to Manager

– Date/Time: Tuesday, Sept 17, 9 AM – 5 PM – Location: – Tibco, Palo Alto – Fee: $425 for IEEE Members; $525 non-members

"…walked away with some practical tips even after years of management experience. New and old managers would definitely benefit from this class." Synaptics Inc., Instructional Designer

Breakthrough Project Management – Date/Time: Tues-Wed, Oct 8-9, 9 AM-5 PM – Location: Synopsys, Sunnyvale – Fee: $650 for IEEE Members; $725 non-members

Getting Things Done Across Organizational Borders

– Date/Time: Thursday, Oct 10, 9 AM – 5 PM – Location: – Synopsys, Sunnyvale – Fee: $425 for IEEE Members; $525 non-members

Upgrade your skill set – prepare for future challenges

IEEE has a strong focus on applying technology for the benefit of humanity. GHTC has these goals:

● Foster exchange of information and networking in the humanitarian field

● Focus attention of businesses on emerging market opportunities and related technology enablers

● Impact in positive and meaningful ways the lives of disadvantaged billions of people around the world

● Promote science, engineering and technology as key to development of solutions for disadvantaged communities and attract young people to these professional fields

Keynote Speakers: ● Dr. Aydogan Ozcan, EE/BioEngineering Depts, UCLA ● Nigel Snoad, Product Manager, Google Crisis Response ● Tala de los Santos, Diagnostic Group Leader, PATH

SCV Chapters, Technology Management & Components, Packaging and Manufacturing Technology Societies

5 Habits of Intentional Leadership – Date/Time: Thursday, Oct 17, 9 AM – 5 PM – Location: – Tibco, Palo Alto – Fee: $425 for IEEE Members; $525 non-members

Consulting Skills for Engineers: How to Become a Trusted Advisor

– Date/Time: Thursday, Nov 7, 9 AM – 5 PM – Location: – Tibco, Palo Alto – Fee: $425 for IEEE Members; $525 non-members

Delegation and Coaching: The Winning Combination

– Date/Time: Wednesday, Nov 13, 9 AM – 5 PM – Location: – Tibco, Palo Alto – Fee: $425 for IEEE Members; $525 non-members

For complete course information, schedule, and registration form, see our website:

www.EffectiveTraining.com* GHTC 2013 Topics: ● Health, Medical Technology, Telemedicine ● Disaster Warning, Avoidance, and Response ● Water Planning, Availability and Quality, Sanitation ● Power Infrastructure/Off-grid Power/Renewable and

Sustainable Energy ● Connectivity and Communications Technologies

(data/voice) for Remote Locations ● Educational Technologies ● Agricultural Technologies ● Applying Science, Engineering and Technology for

Environmental Sustainability

Tutorials: ● Low Energy Application – Analysis and Practice ● Building Affordable Community Networks

Register today – save, through August 31st!

www.ieeeghtc.org

IEEE Professional Skills Courses

GLOBAL HUMANITARIAN TECHNOLOGY CONFERENCE

October 20-23, 2013 Airport Garden Hotel, San Jose

http://www.effectivetraining.com/calendar.php?loc=local

http://www.ieeeghtc.org/


Join more than 250 of the top names in the OLED industry for an in-depth look into the state of OLEDs -- issues and materials, unresolved challenges, technical talks, panel presentations. You will see Sony, LG Display, Konica Minolta, NIST, UDC, Panasonic, Philips and many more of the industry's most influential players in one room together talking about the future of OLEDs.

Keynotes: The Present & Future of AMOLEDs - Dr. Ho-Kyoon Chung, Chair Professor, Sungkyunkwan Universi ty (SKKU), Korea New Approaches Towards High-Efficiency Materials - Professor Chihaya Adachi, Center for Organic Photonics and Electronics Research (OPERA), and Center for Future Chemistry, Kyushu University, Japan - How to Meet Cost Targets : A Panel Discussion on the Path Toward OLED Lighting Commercialization

… plus 10 networking events, Exhibi ts f loor.

AnDevCon Comes Back to Burlingame!

AnDevCon is the technical conference for software developers building or selling Android apps. Whether you're an enterprise developer, work for a commercial software company, or are driving your own start-up, if you are building Android apps, you need to attend AnDevCon. You’ll find hundreds of experienced developers and engineers (like you) choosing from more than 50 classes to bring Android open source development to a high level. Exhibit Hall hours:

Thursday Nov 14 11:00 am – 7:00 pm Friday Nov 15, 11:00 am – 2:30 pm

“This was a great conference! The scope and breadth of

classes gave a great opportunity to learn more about Android development in general AND gave the

opportunity to network with other people at all levels. It's a great learning place with wonderful people!”

Andrew Mauer, Sr. Project Manager, B-Line Express, Inc.

Celebrating 15 years of OLED-specific focus

Covering everything from AMOLED to OLED TV

Eight Sessions (more than 30 presentations): - State of the OLEDs Industry - Driving From Concept to Market - Unresolved Challenges - Material Development and Novel Components - OLED Lighting: Opportunities and Challenges - Understanding Color - Advancements in OLED Materials for Lighting - Smart Substrates

Three Short Courses: - OLED Fundamentals and Applications - Overview of the OLED Industry from a Patent

Perspective - Defining the SSL Market Potential for OLEDs

Save $300 with code "IEEE2013" More details on the website:

www.oledsworldsummit.com

November 12-15, 2013 Hyatt Regency Burlingame

Technical Classes Keynotes, Exhibits, more

Keynote: “The Golden Age of Android,” Jeff Seibert, Twitter

Technical Classes: - Product-Centric Mobile Apps and the Internet of Things - Advanced Patterns for Connected Apps - Agile Android - Android as the New Embedded Linux - Android Custom Views, the Right Way - Android Connected TV Nuts and Bolts - Android OpenGL ES Essentials - Battle-Tested Patterns in Android Concurrency - Android Performance Tips - Bootstrapping Android Development - Becoming More Effective with the Android Emulator - Creating Composite Views in Android - Cross-Platform Dev’t for Android and iOS using C# - Dynamic Audio for Apps and Games - OK, Glass, Let's Explore … plus dozens more.

Earlybird registration thru Sept 20th – save $400 And save $100 by using Code “IEEE”

on 3-day passport, or for free exhibits admission.

For information and to register, visit

www.AnDevCon.com

http://www.oledsworldsummit.com/

http://www.AnDevCon.com/


Big Data is transforming science, engineering, medicine, healthcare, finance, business, and ultimately society itself. IEEE BigData 2013 provides a leading forum for disseminating the latest advances in Big Data Research, Development, and Application.

Keynotes:

Key Usage Patterns for Apache Hadoop in the Enterprise Amr Awadallah, CTO, Cloudera

The Berkeley Data Analytics Stack: Present and Future Mike Franklin, UC Berkeley

Using Crowdsourcing for Data Analytics Hector Garcia-Molina, Stanford University

Security - A Big Question for Big Data Roger Schell, University of Southern California

November 19-22, 2013 Santa Clara Convention Center

The tenth annual Printed Electronics USA conference and exhibition covers all the applications, technologies and opportunities.

Printed Electronics USA gives the big picture, with speakers from around the world from a range of industries including consumer goods, healthcare, military, electronics, advertising, publishing and others. Commercialization and the full range of technologies are the emphasis, from interactive packaging to sensing fabrics and ultra low cost wireless identification tags.

OLEDs USA is the premier event covering all aspects of the technology, covering the market opportunities, challenges and technical progress from around the world.

Graphene LIVE! covers all promising applications of graphene, including graphene composites, batteries and supercapacitors, functional inks, logic and memory, touch screens, sensors and bio-electronics and beyond.

3D Printing LIVE! Gain a comprehensive understanding of the state-of-the-art in 3D Printing, across a range of application areas and the latest technological advances.

October 6-9, 2013 Hyatt Regency,

Santa Clara

Workshops: - Distributed Storage Systems and Coding for BigData - Big Data Mining Techniques - Large-Scale Graph Data Management and Analytics - Intelligent Agents for Big Data - Big Data Benchmarking - Real-Time Mining and Analytics for Big Data - Big Data in Bioinformatics - Big Data and the Humanities - Scalable Cloud Data Management ... and more.

Plus sessions of research papers.

Save, through September 10th.

Information:

www.ischool.drexel.edu/bigdata/bigdata2013

The Application of Printed, Organic & Flexible Electronics

Master Classes on Nov 19 & 22: • Intro to Printed Electronics • Intro to Energy Harvesting • Printing Technologies for Electronics • Displays & Lighting: OLED, LED, E-Paper • Graphene and Carbon Nanotubes • Sensors & Actuators • Energy Storage: Batteries & Supercapacitors • The Internet of Things • 3D Printing • Thin Film Photovoltaics … and more!

Earlybird rates through September 13th

Use code “IEEE-30” for 30% discount thru Nov 17th. Exhibits-only option available.

www.PrintedElectronicsUSA.com

Exhibit at the Tradeshow! Over 100 leading companies will be showcasing innovative technologies and commercial applications in the field of printed electronics, OLEDs and 3D Printing at the world’s biggest tradeshow on the topic – an ideal place to meet your potential customers. For information on exhibiting, please contact Sarah Parish, [email protected]

http://www.ischool.drexel.edu/bigdata/bigdata2013/

http://www.PrintedElectronicsUSA.com/

mailto:[email protected]?subject=GRID_Inquiry:


Have you ever wanted to continue your education in engineering while you continued working? Santa Clara University’s School of Engineering offers graduate degree and non-degree programs to both full-time students and working professionals. Simplified registration for the Winter Open University. Graduate-level instruction. Up to 16 units may be transferred to a graduate-degree program.

Early-morning classes: - Probability - Database Systems - Linear Control Systems - Analog ICs - Energy Transmission and Distribution - Active Microwave Devices (and more)

Evening classes: - Linear Algebra - Intro to Nano-Bioengineering - VLSI Design - Computer Architecture - Network Management - Logic Design using HDL - Robotics (and more)

Saturday classes: - Secure Coding in C and C++ - Project Risk Management - Gender and Engineering (and more)

Email LeAnn Marchewka with inquiries: [email protected]

Attend Big Data TechCon — the best Big Data Training, Tutorials, and Classes, in the World!

Big Data TechCon is the HOW-TO conference for Big Data. Practical, classes and tutorials for IT and Big Data professionals – Hadoop, Map/Reduce, R, Hive, Pig, NoSQL, Mongo DB, Cassandra and more.

Learn how to

- Collect, sort and store structured and unstructured data - Process real-time data - Master Big Data tools and technologies - Integrate data collection technologies with data analytics.

Prepare for that next

project or assignment!

To remain competitive in Silicon Valley's changing environment, engineers need to update their knowledge base. The School of Engineering offers professional Certificates and Open University programs, as well as graduate degrees, for those who are driven to become leaders in their fields.

Fall Registration opens August 15th Classes begin September 23rd

Located in the heart of Silicon Valley, with easy parking

Review fall quarter Open University courses:

www.scu.edu/engineering/graduate Tutorials: - Hadoop: A One-Day, Hands-On

- Approach to Big Data Solutions - Getting Started with Cassandra - Storing and Analyzing Your Data with Apache Hive - Data Science in a Spreadsheet: Learning What's Really Going on in Those Black-Box Models - Engineering Your Approach to Big Data Solutions - Programming with Scalding and Algebird - NoSQL for SQL Professionals ... plus more.

More than 50 technical classes.

Register by Sept 22nd, to save $200.

Add'l $100 off with code "IEEE". For full details, see

www.bigdatatechcon.com

Santa Clara University School of Engineering Graduate Programs

SCU Fall Open University

October 15-17, 2013 Hyatt Regency, Burlingame

mailto:[email protected] ?subject=GRID_Inquiry:

http://www.scu.edu/engineering/graduate/

http://www.bigdatatechcon.com/


CALL FOR PAPERS ISQED 2014

15th International Symposium on

QUALITY ELECTRONIC DESIGN

March 10-12 , 2014 Techmart Center, Santa Clara, CA, USA

www.isqed.org

Paper Submission Deadline: Sept. 14, 2013 Acceptance Notifications: November 24, 2013 Final Camera-Ready paper: January 10, 2014

Papers are requested in the following areas: A pioneer and leading multidisciplinary conference, ISQED accepts and promotes papers in following areas:

System-level Design, Methodologies & Tools Analog, Digital, Mixed-Signal, RFIC and SoC Design FPGA Architecture, Design, and CAD Design of Embedded Systems Advanced 3D ICs & 3D Packaging, and Co-Design Robust & Power-conscious Circuits & Systems Emerging/Innovative Design Issues

Sensors Technology, Design, and Application IP Design, quality, interoperability and reuse Design Verification and Design for Testability Physical Design, Methodologies & Tools EDA Methodologies, Tools, Flows Design for Manufacturability/Yield & Quality Effects of Technology on IC Design, Performance, Reliability, and Yield

Submission of Papers The guidelines for the final paper format are provided on the conference web site. Paper submission must be done on-line through the conference web site at www.isqed.org. In case of any problems email [email protected]. Past ISQED papers have been published in IEEE Xplore and indexed by SCOPUS.

CALL FOR PAPERS

IEDEC 2014 Interdisciplinary

Engineering Education Conference

March 10-11 , 2014 Techmart Center, Santa Clara, CA, USA

www.iedec.org

Paper Submission Deadline: Sept. 14, 2013 Acceptance Notifications: November 24, 2013 Final Camera-Ready paper: January 10, 2014

Papers are requested in the following areas: IEDEC accepts and promotes papers in following areas:

Learning Environments Educational Hardware and Software Tools Role of Interdisciplinary Engineering in Human Life Innovation and Creativity in Engineering Design Trends in Engineering Education Engineering Design Management Medical Integrated Circuits and Systems Games in Education and Educational Games Social Media in Engineering International and Global Aspects of Eng Education

Student Projects and Internships Learning Environments, Technology and eLearning/e-assessment Combining Teaching and Research Engineering Ethics Engineering for Sustainability and the Environment Continuing Education and Delivery Collaboration Between Universities, Industry, and Government Women in Engineering Distance Learning and Distance Teaching Engineering Education Outreach

Submission of Papers The guidelines for the final paper format are provided on the conference web site. Paper submission must be done on-line through the conferenceweb site at www.iedec.org. In case of any problems email [email protected]. Past IEDEC papers are published in IEEE Xplore and indexed in SCOPUS.

http://www.isqed.org/

http://www.isqed.org/

http://www.iedec.org/


San Jose/Mountain View Classes

September , 2013 RF and Wireless Simplified: Concepts and Terminology Sep 23-24

Transceiver and Systems Design for Digital Communications Sep 25-27

October , 2013 The Radio Modem: RF Transceiver from Antenna to Bits and Back Oct 21-25

RF Measurements: Principles and Demonstration Oct 28-Nov 1

November , 2013

Hardware DSP: A guide to building DSP Circuits in FPGAs Nov 18-22

LTE & LTE-Advanced: A Comprehensive Overview Nov 18-22

Phase-Locked Loop and Frequency Synthesis Design Nov 21-22

December , 2013 Introduction to Wireless Communication Systems Dec 9-10

Introduction to GaN Power Amplifiers Dec 9-11

Signal Integrity and EMI Fundamentals Dec 11-13

January , 2014 EMC/Shielding/Grounding Techniques for Chip & PCB Layout Jan 27-31

Besser Associates’ On-site Courses can be conducted at any US or International location and any course can be

customized to fit the specific needs of your group.

Upcoming Courses for

Engineering Professionals

Headquartered in Mountain View since 1985, we have delivered theory with hands-on practical training to professionals working with analog, RF, wireless, digital, and networking technologies -- to over 45,000 people in these industries. Besser Associates instructors are top luminaries in their field. Their work experience provides insights that help you avoid pitfalls on the job.

Web-Classroom Live eLearning

Phase Noise and Jitter Oct 2-4

Use the code below to download our schedule:

www.besserassociates.com/Schedule.pdf

For these and other classes, or customized/ private courses at your facility, visit the website:

www.besserassociates.com

http://www.besserassociates.com/

http://www.besserassociates.com/Schedule.pdf


Building Lean, Green, Open Servers, Reducing Server Energy Consumption, Increasing Server Performance, Designing Cloud Servers

Open Server Summit is the only event focused

entirely on the $50 billion server market. And it is the first event to deal with “Bringing Servers into the Cloud Computing Era.”

The Open Server Summit program will provide attendees with practical information on the current state of servers and their hardware, software, construction, applications, management, and operation. Talk with industry leaders, see the latest products, meet with potential partners. Organized in four main tracks:

● Computing ● Storage ● Networking ● Applications

HIghlights Three days packed full of seminars, forums, keynotes, and sessions:

SDN Applications Silicon Photonics Servers and big data Designing private clouds Increasing cloud performance Server roadmaps Accelerating applications Chat with the Experts

Evening Discussion Tables Beer, Pizza and Chat with the Experts Table Topics: • Memory •Storage •Architecture • High-speed links • Caching methods • Cloud servers • Cloud services • Marketing • Power and cooling • Security • Application Acceleration • Software Pre-Conference Seminars SDN/OpenFlow Applications with instructors from

ONF/Tilera, SDNcentral, 451 Research, IDC, SDN Academy, Dell, Brocade, Cisco and H-P

Silicon Photonics with instructors from Ovum, Cisco, Skorpios Technologies, Luxtera, Aurrion, Kotura and OpSIS

Keynote Speakers “Why Servers Should Be Treated Like Cattle, Not

Puppies” Joshua MeKenty, CTO, Piston Cloud Computing

“How the Demands of Cloud Services Will Affect Server Design” Kushagra Vaid, GM Server Hardware Engineering, Microsoft

“Changing the World of Networking” Bruce Davie, Principal Engineer, VMware,

… plus Jason Waxman, GM/High Density Servers, Intel and Andy Bechtolsheim, Chairman, Arista Networks

Special Session “Facebook Open Compute Project: An Update,” Matt Corddry, Facebook

Sessions and Panels (from 2012) - CPU Data Demands - Optimizing Cloud Servers for Cost and Performance - System Power Management - Increasing Storage Performance - Accelerating Cloud Connectivity - Data Center Server Strategies - System Scaling and Networking - Virtualization and Cloud Servers - Accelerating Application Performance - Cloud Server Design Tradeoffs - Future of Server Design ... and more!

Review the full program on the website

Save an additional $100 with code "IEEE"

For more information:

www.openserversummit.com

http://www.openserversummit.com/


U N L E A S H T H E P O W E R

Industry-defining keynotes, actionable advice, case studies and replicable best practices

OCTOBER 29, 2013 Computer History Museum

Mountain View Morning Session: 8:30 AM - Noon

Human/Ethical Aspects of Big Data Grady Booch, IBM

The Industrial Internet William Ruh, GE Software

Big Data Analytics: Linking Insights, Actions, Outcomes to Drive Performance Improvement Robert Mangel, Kaiser Permanente

Approaching Big Data as a Technical Compute Usage Model: What Shall We Do? Stephen Wheat, Intel

Putting Big Data to Work Bill Franks, Teradata

Lunch, Demos, Exhibits: Noon - 1:30 PM

Afternoon Session: 1:30 PM - 5:00 PM

Building a Data Science Team from Scratch Chris Pouliot, Netfl ix

The Fusion of Supercomputing and Big Data Peter Ungaro, Cray

Imagineering Big Data: How to Bring Rock Star Analysis to Your Company Josh Greenbaum, Enterprise App’ns Consult ing

Big Data, Analytics and Watson Stephen Brodsky, IBM

Building Big Data Processing Into Your Business Dan Sturman, Google

Reception: 5:00 PM - 7:00 PM

Group Discounts Available!

REGISTER TODAY!

ROCK STARS OF BIG DATA!

GRADY BOOCH Chief Scientist of

Software Engineering IBM

WILLIAM RUH Vice President GE Software

ROBERT MANGEL Director of Service Quality Research

Kaiser Permanente

DAN STURMAN Engineering Director

Google

CHRIS POULIOT Director of Algorithms

& Analytics Netflix

STEPHEN WHEAT General Manager - HPC Business Unit

Intel

Visi t :

www.computer.org/Big-Data

http://www.computer.org/Big-Data/


Sponsored by the Santa Clara Valley Section of IEEE

IEEE Senior Member Grade Elevation Night Date: Monday, October 14, 2013

Time: 6:00 PM – 8:00 PM (drop in at any time between 6:00 PM and 7:30 PM)

Location: Cogswell Polytechnical College, Board Room 1175 Bordeaux Drive, Sunnyvale, CA 94089

Refreshments will be provided

The IEEE Santa Clara Valley Section, in conjunction with PACE, is sponsoring a Senior Member Grade Elevation night for all IEEE members who meet the requirements for grade elevation to Senior Member. The requirements are posted at:

www.ieee.org/membership_services/membership/senior

Summary: * be an engineer, scientist, educator, or technical executive in IEEE-designated fields; * have been in professional practice for:

7 years if you hold a baccalaureate degree in an IEEE-designated field; 6 years if you hold a baccalaureate and a masters degree; 5 years if you hold a doctorate

* show professional maturity and "significant performance" over a period of at least five of those years in professional practice.

IEEE members who meet these requirements are encouraged to attend. Potential Senior Members will have an opportunity to meet with Senior/Fellow Members and possibly obtain the references that are required for the application, as well as to get a formal Nomination from the Section.

Get the Application Template from the GRID website: www.e-grid.net/docs/1205-sr-mem-template.doc, enter your background/answers and bring 4 copies. Do NOT begin the application process on the IEEE website (this is done AFTER our meeting). Write a few sentences on our template, or else in a file on the flash memory device, explaining/summarizing your professional experience and how you have significantly performed your professional duties for at least five years. We’ll help you refine these statements.

To help our volunteer Senior/Fellow members evaluate your application, particularly the sections on Professional Experience and Significant Performance, please prepare a Curriculum Vitae (CV) / resume that contains details that don’t “fit” into the application; the CV also contains details that explain possible questions that arise in the minds of the reviewers. Bring 4 copies of this resume.

Following our Upgrade Evening event, go to the IEEE’s website to enter your data: www.ieee.org/membership_services/membership/senior/application

Please remember that this collaborative exploratory process does not guarantee that you will receive all of the requisite references. But we’re here to help you along!

For any questions, please send email to John Berg [email protected]

Become a Senior Member -- See you there!

http://www.ieee.org/membership_services/membership/senior/

http://www.e-grid.net/docs/1205-sr-mem-template.doc

http://www.ieee.org/membership_services/membership/senior/application

mailto:[email protected]?subject=GRID_Inquiry:


My Journey from Engineering to Management

Speaker: Dr. Steve Hwang, Vice President, Technology and Product Development, Seagate Technology

Time: Networking at 6:00 PM; Management Forum at 6:30 PM; dinner at 7:00 PM; Presentation at 7:30 PM

Cost: $11 IEEE member; $14 non-member through Sept. 4th

Place: RAMADA Silicon Valley, 1217 Wildwood Ave, Sunnyvale

RSVP: from website Web: www.ieee-scv-tmc.org

Steve Hwang is Vice President of Technology &

Product Development, Seagate Technology. Steve leads a Media R&D team of 450 technical staff with an annual R&D budget of US$ 120 million. His responsibilities include technology and process development, new product qualification, customer engineering and product transfer to off shore production sites, as well as the site management of Seagate facility in Fremont, California. Steve holds a BS in Materials Engineering from National Cheng-Kung University, Taiwan, an MS in Materials Engineering from National Taiwan University, and a Ph.D. in Metallurgical Engineering from University of Utah. He has also attended Harvard Business School’s Strategic Leadership Development Program. In addition to numerous invited speeches on both technical subjects and engineering management career development, he has published three books on leadership and management: Five Secrets of Leadership and Management, Winning by the Seconds, and Creating a Diamond Class Enterprise, all in Chinese .

By providing audience with his exciting personal experiences and insights on advancing from an immigrant engineering student to a senior manager at a major technology company, Dr. Steve Hwang has become one of the most sought after leadership, management and motivational speakers in the engineering communities all over the world. You will learn how Steve prepared himself, built and led a winning team from success to success, and even more importantly, converted the knowledge he gained at the Harvard Strategic Leadership Development Program into advanced leadership and management skills and effective competitive strategies. Steve will show us exactly how we can win against all odds. You will further learn how to rapidly move up the management ladder through continuous contributions and positive impacts to your company.

THURSDAY September 5, 2013 SCV Technology Management


Power Electronics: Beyond the Silicon Limit

Speakers: Deva Pattanayak, Senior Director, Vishay

Siliconix; Dan Kinzer, CTO, Fairchild; Alex Lidow, CEO, EPC; Dave Anderson, Chief Technologist and GM, Kilby Labs Silicon Valley, Johan Strydom, Applications Engineering, EPC

Time: Registration at 12:30 PM; talks from 1:00 PM to 5:00 PM

Cost: $30 for IEEE members, $60 for non-members ($15 for student members, $30 for student non-members). $10 more on-site.

Place: Texas Instruments Building E Conference Center, 2900 Semiconductor Dr., Santa Clara

RSVP: from website Web: www.ewh.ieee.org/r6/scv/eds

Power electronics is re-emerging as an important

and innovative area. This is due to the increasing importance of electricity in our lives, and the need to use it more efficiently. The old paradigm involved large inductors and capacitors, slow silicon devices, and a barrier known as the “silicon limit”. The new revolution is fueled not only by improved Si device technology using conductivity and field-modulation, but also by exciting new materials such as GaN and SiC that have taken devices beyond the silicon limit. Designers are making use of this substantially improved performance to increase efficiency and reduce size. This half-day symposium has presentations from leading contributors in the multidisciplinary field of power electronics. Topics include Si, SiC and GaN device technology, the bottlenecks to power switching, and power electronics applications. It will be of significant interest to both device and circuit engineers, or students and experts, who wish to develop a broader perspective and increase their depth and breadth of knowledge.

Invited Speakers: Deva Pattanayak (Senior Director at Vishay Siliconix)

— “High Voltage Silicon Power Devices below the Silicon Limit”

Dan Kinzer (CTO of Fairchild) — "Silicon Carbide BJT Advances and Comparison to Alternative Wide Band Gap Devices"

Alex Lidow (CEO of EPC) — “GaN – the end of the Road for Si”

Dave Anderson (Chief Technologist and General Manager of Kilby Labs Silicon Valley) — “Power Electronics Applications”

Johan Strydom (Head of Applications Engineering at EPC) — “Barriers to High-speed Switching in Power Devices”

FRIDAY September 6, 2013

SCV Electron Devices


BRIC: Overview of the Emerging Markets

Speaker: Mark Maynard, SIEMIC, Inc. Time: Networking/light dinner at 5:30 PM;

Presentation at 6:30 PM Cost: none Place: Agilent Technologies, 5301 Stevens Creek

Blvd., Santa Clara RSVP: not required Web: www.ewh.ieee.org/r6/scv/emc

Mark Maynard is the Director of Marketing and Business Development at SIEMIC, Inc., a leading third-party compliance testing and certification company, with 9 global locations. At SIEMIC Mark is responsible for compliance consulting, business and brand development, working with standards committees, professional societies and government agencies, maintaining the SIEMIC regulatory standards database, and conducting training seminars. Mark holds two degrees from Texas State University, a Bachelor of Science in Pure Mathematics and Physics, and a Bachelor of Applied Arts and Sciences in Marketing and Business. Mark was inducted as a Senior Member of the IEEE by the Central Texas EMC Society in 2005, and is NARTE Certified Product Safety Engineer. His career in electronics began in 1978 as an Electronics Warfare Intercept Systems Repairman in the US Army Intelligence and Security Command. After his honorable discharge from the Army in 1982, he worked as a chief engineer at a radio station in Lufkin, Texas, and then worked for various companies in Texas and California as a field service engineer, installing and repairing mini-computers and PC networks. Mark joined Dell, Inc. in 1988, where he worked for 20 years in international regulatory compliance and product certifications, with various positions including wireless/telecom certification engineer, EMC engineer, product safety engineer, environmental engineering program manager, and lead environmental and quality auditor. In 2008, Mark left Dell to pursue teaching mathematics and science at the university and high school levels, and this year returned to the regulatory compliance field by joining SIEMIC, Inc.

The growing markets in Brazil, Russia, India and

China (BRIC) now are responsible for a sizable portion of the profits for most global companies. Working against this prize is a formidable maze of culture, laws, and overlapping regulations, causing confusion surrounding the regulatory requirements. If you are considering entering the BRIC marketplace with your electrical and electronic products, you need knowledge of how to obtain the necessary approvals. Whether your product is for telecommunications, computing, wireless, consumer electronics, or household appliances, you will face some distinct and unique obstacles, for which you need to be prepared. Distance, language, unfamiliar culture, and

unsophisticated commercial market conditions can make this a difficult and expensive procedure for the uninformed. Come to this presentation so you can gain some insight into the processes, and learn sources of information and allies to help you navigate a safe path to compliance.

TUESDAY September 10, 2013 SCV Electromagnetic Compatibility

MET Laboratories

EMC – Product Safety

US & Canada

• Electromagnetic Compatibility • Product Safety Cert. • Environmental Simulation • Full TCB Services • Design Consultations • MIL-STD testing • NEBS (Verizon ITL & FOC) • Telecom • Wireless, RFID (DASH7 & EPCglobal Test Lab)

Facilities in Union City and Santa Clara

www.metlabs.com [email protected] 510-489-6300


Revolutionary Server Management: Managing Platform

Development for the Future Speaker: Sachin Desai, Riverbed Technology Time: Networking/Refreshments at 6:30 PM;

Presentation at 7:00 PM Cost: none Place: Cadence / Bldg 10, 2655 Seely Ave, San

Jose RSVP: from website Web: sites.ieee.org/scv-cs

Sachin Desai is Member of Technical Staff with Riverbed, where he leads the next-generation platform development team. Prior to Riverbed, he has held various positions in management and server developer roles. He is experienced in building enterprise applications, performance appliances and embedded systems.

Sachin holds Masters in Computer Engineering from SCU, and Bachelors in Computer Science from UCSC.

With advances in Cloud Computing, and

Virtualization, the art of server appliance management has shifted. Managers and developers both need to adjust to the new paradigm. Technologies such as Open Stack allow innovation and the competitive edge required in the markets of the future. The traditional roles of development and IT have blurred, bringing forth the new role of DevOps. This presents unique engineering challenges, and requires a new way of planning future product roadmaps. This presentation examines the technical challenges for building world-class appliances and products.

TUESDAY September 10, 2013

SCV Computer


Google's Project Loon

Speakers: Sam Leffler and Sameera S. Ponda,

Google Time: Networking and refreshments at 6:30 PM;

Presentation at 7:00 PM Cost: $5 for food Place: TI Conference Center Auditorium, 1

Semiconductor Way, Santa Clara RSVP: from website Web: www.eventbrite.com/event/6708375933

Sam Leffler is responsible for making the Project Loon network work. Prior to joining GoogleX his main focus was keeping Chrome OS devices connected. Long distance wireless communication and mesh networking have been longstanding interests; prior to joining Google he worked on projects such as a 100 km wireless link between the European Southern Observatory (ESO) at LaSilla and the Inter-American Observatory at Cera Tolo.

Sameera Ponda is an Aerospace Engineer working on Project Loon at Google. Prior to Google, she received her B.S. in Aerospace Engineering from MIT in 2004, worked full-time at Draper Laboratory in Cambridge, MA as a simulation engineer until 2006, and pursued her M.S. and Ph.D. in Aerospace Engineering at MIT in 2008 and 2012. Her research interests include distributed multi-agent planning, estimation and control, and real-time planning algorithms.

Project Loon balloons float in the stratosphere,

twice as high as airplanes and the weather. They are carried around the Earth by winds and they can be controlled by rising or descending to an altitude with winds moving in the desired direction. People connect to the balloon network using a special Internet antenna attached to their building. The signal bounces from balloon to balloon, then to the global Internet back on Earth.

This session will introduce the project, discuss the balloon design and network architecture, then finish by sharing some of our experiences from our June 2013 Pilot Test in New Zealand.

WEDNESDAY September 11, 2013

SCV Communications


Semiconducting Nanowire Arrays Grown Directly on Graphene:

Towards Precision Placement of Wafer Scale Nanowire Arrays with

Improved Electrical Contact for Energy Storage and Harvesting

Speaker: John Alper, PhD Candidate, UC-Berkeley Time: Optional dinner at 6:00 PM; Presentation at

6:45 PM Cost: $20; $10 for full-time students and

unemployed ($5 more at door) Place: Biltmore Hotel, 2151 Laurelwood Rd, Santa

Clara RSVP: from website Web: www.cpmt.org/scv/meetings/cpmt1309.html

John Alper has given a number of talks at international meetings on materials and nano-manufacturing, and published 4 papers in peer-reviewed scientific journals. He graduated Summa Cum Laude from the University of Rhode Island in 2007, with an undergraduate degree in chemical engineering. He received the President's Award and the Toray Plastics America Industrial Scholarship. During his junior year he investigated the effects of micro structuring on the energy transfer between heat exchanger plates and viscous fluids as a RISE scholar in Germany.

John received his MS in chemical engineering from UC Berkeley in 2010; this included research work in antimicrobial coatings' chemistry for low cost water purifiers. He is a candidate for PhD in Chemical Engineering at UC Berkeley, with a focus on nanomaterials development for on-chip energy storage. He expects to get his PhD in May 2014.

Semiconducting nanowires (NWs) have been

demonstrated as promising in a number of devices due to novel properties which are intrinsic to their nanoscale. Silicon NW geometry allows for relaxation of mechanical stress associated with lithium insertion, potentially avoiding the rapid degradation observed in silicon Li-ion battery electrodes. They are also attractive for thin-film solar cells, where the NW array geometry results in enhanced broadband absorption and enables thinner cells with increased efficiency. As well as silicon, the properties of silicon carbide NWs including large specific surface area and high aspect ratio lend them to application as supercapacitor electrodes and field emitters respectively. In the fields of energy harvesting and storage, semiconducting NWs have the potential to be game-changers at both the micro and macro scale.

Typically these NW arrays are grown via vapor deposition techniques at high temperatures (800 - 1000 ºC) in corrosive atmospheres (e.g. hydrochloric acid vapor). These growth conditions require refractory, rigid and chemically inert growth substrates which are less than ideal as active components for many of the devices mentioned above. Thus in order to integrate NW arrays they must be accurately transferred to the desired location and electrically contacted. Previous efforts in the transfer step have utilized the Langmuir-Blodgett technique or polymer stamping. Such transfer schemes suffer from increased complexity due to the number of steps. As well polymer stamping methods increase the potential for contamination of the NW surfaces, which can be detrimental to performance. After the transfer, electrical contact is then typically made through metal evaporation which involves wasted materials, high energy requirements and masking to avoid deposition in undesired areas of the device. In this talk a greatly improved process flow for growth, transfer and contact of NW arrays will be described. The process begins with growth substrate choice -- graphene on sacrificial oxide. Graphene, a highly conductive, flexible, and mechanically robust substrate acts as both the electrical contact and mechanical support for the NWs during transfer from the sacrificial oxide to desired substrate. This reduces processing steps, potential for contamination, wasted materials, and energy costs for the manufacture of NW integrated devices.

The discussion will focus on describing the materials process flow and the potential benefits of the process in terms of ease of integration and enhanced performance for energy harvesting and storage. In addition results from the structural characterization of the NW-graphene hybrids will be shared. Silicon carbide nanowireâ€“graphene hybrid supercapacitor electrode performance studies, indicating good electrical contact throughout the array and robust lifetime cycling behavior, will also be presented as a device proof of concept.


SCV Components, Packaging and Manufacturing Technology


CdTe and Si Under One Roof

Speaker: Raffi Garabedian, Chief Technology

Officer, First Solar, Inc. Time: Networking and refreshments at 6:30 PM;

Presentation at 7:00 PM Cost: none Place: Palo Alto Research Center, (G.E. Pake

Auditorium), 3333 Coyote Hill Road, Palo Alto

RSVP: not required Web: ewh.ieee.org/r6/scv/pv

Raffi Garabedian has been the Chief Technology Officer of First Solar, Inc. since May 2012. Mr. Garabedian joined First Solar in 2008 as Director of Disruptive Technologies, and later served as VP Advanced Technologies where he oversaw advanced R&D in Santa Clara. Prior to joining First Solar, he founded Touchdown Technologies, Inc. and served as its CEO. Raffi has spent most of his career working in the semiconductor and MEMS industries, developing products ranging from automotive sensors to telecommunications switching systems. He holds a BS in Electrical Engineering from Rensselaer Polytechnic University and an M.S. in Electrical Engineering from the University of California at Davis.

Is the ideal utility-scale module technology also the

best for rooftops? (A silly question, isn't it?) In this presentation, Raffi Garabedian, CTO of First Solar, will discuss the company's strategy for maintaining and advancing two seemingly disparate and competitive technologies.


SCV PhotoVoltaics


Circuits and Systems for Wearable and Implantable

Medical Devices

Speaker: Prof. Wouter A. Serdijn, CAS Distinguished Lecturer, Head Biomedical Electronics Laboratory, Delft University of Technology, The Netherlands

Time: Networking/light dinner at 6:30 PM; Presentation at 7:00 PM

Cost: $2 requested for food Place: QualComm, Building B, 3165 Kifer Road,

Santa Clara RSVP: from website Web: sites.ieee.org/scv-cas

Wouter A. Serdijn received the Ingenieur’s (M.Sc.) degree (cum laude) in Electrical Engineering from Delft University of Technology, The Netherlands, in 1989. Subsequently, he joined the Electronics Research Laboratory of the same university where he received his Ph.D. in 1994. His research interests include low-voltage, ultra-low-power and ultra wideband analog integrated circuits for wireless communications, pacemakers, cochlear implants, portable, wearable, implantable and injectable ExG recorders and neurostimulators. In this field he co-authored 8 books, 6 book chapters and more than 250 scientific publications and presentations.

He has been supervising 25 Ph.D. students, 87 M.Sc. students and 19 B.Sc. students. He received the Electrical Engineering Best Teacher Award in 2001 and 2004. He has served, a.o., as Technical Program Chair for IEEE BioCAS 2010 and as Technical Program Chair for IEEE ISCAS 2010 and 2012, as a member of the Board of Governors (BoG) of the IEEE Circuits and Systems Society (2006—2011) and as Editor-in-Chief for IEEE Transactions on Circuits and Systems—I: Regular Papers (2010—2011). He will be General Co-Chair for IEEE BioCAS 2013, TPC Co-Chair for IEEE ISCAS 2014 and General Co-Chair for IEEE ISCAS 2015.

Wouter A. Serdijn is an IEEE Fellow, an IEEE Distinguished Lecturer and an IEEE mentor.

In the design process of wearable and

implantable medical devices (IMDs), such as hearing instruments, pacemakers, cochlear implants and neurostimulators, the tradeoff between performance and power consumption is a delicate balancing act. In this presentation I will cover techniques to deal with the acquisition and generation of electrophysiological signals and to provide reliable communication with and through the body. We will discuss signal-specific analog-to-digital converters, morphological filters, arbitrary-waveform neurostimulators, energy harvesting and ultra wideband wireless communication from a low-power circuits and system perspective. Design examples and their performance will be discussed in detail.

MONDAY September 16, 2013SCV Circuits and Systems


Many Uncertainties About Climate Change

Speaker: Donald Anthrop, Professor Emeritus,

Department of Environmental Studies, San Jose State University

Time: Networking/buffet dinner at 6:00 PM; Presentation at 7:00 PM

Cost: I EEE Members: $25; Non-members: $27 Place: Michaels at Shoreline, 2960 Shoreline Blvd.,

Mountain View RSVP: from website by September 13th Web: www.ieee4life.org

Donald Anthrop received a B.S. in Chemistry from Purdue University in 1957 and a Ph.D. in Materials Engineering from the University of California, Berkeley, in 1963. He specialized in high-temperature thermodynamics. He feels fortunate and honored to have studied thermodynamics from two renowned researchers, Professors Alan Searcy and William Giauque. Prof. Giauque was awarded the Nobel Prize in chemistry in 1949 for experimentally verifying the third law of thermodynamics.

After receiving his Ph.D., he worked in the aerospace industry, at Avco Corporation, for several years and then at Lawrence Livermore Laboratory. In 1968, he accepted a teaching position at Dominguez Hills State College, which at the time was the newest campus in the State University system. In 1971, he joined the faculty at San Jose State University to work in a new program in environmental science. He was only the second faculty member in that program at the time. At SJSU, he taught primarily energy and water courses. He retired from SJSU in 2004, returning occasionally to teach a course. He has over 70 published papers. One of his first papers on energy, "The Environmental Side Effects of Energy Production," was published in the Bulletin of Atomic Scientists in 1970.

In May 2013, atmospheric carbon dioxide levels

measured atop the Mauna Loa volcano on the island of Hawaii reached 399.5 parts per million (ppm). This compares with concentrations of about 370ppm measured in 2001 and 356ppm in 1990. However, global mean temperature has not tracked the atmospheric CO2 concentration particularly well. Since the beginning of the 20th century, global mean temperature has increased by about 0.8oC. However, since about 2001, global mean temperature has remained essentially unchanged while atmospheric concentrations increased from 370ppm to 400ppm. This would suggest that factors in addition to CO2 are affecting climate.

Despite the fact that the Obama Administration's energy regulations have already had very serious unintended consequences, in July the President announced his intention to implement new regulations to reduce CO2 emissions from existing power generating plants. The administration claims the new regulations will reduce US CO2 emissions by 17% between 2005 and 2020. EIA was already projecting a reduction of 545 million metric tons (mt) over this time period due to improved energy efficiency and increased use of natural gas. The new regulations will further reduce CO2 emissions by an additional 464 million mt. This reduction represents 1.3% of world CO2 emissions in 2020. More significantly, emissions from China alone are expected to increase by 464 million mt in just the next year. This illustrates the futility of efforts by the US government to reduce CO2 emissions in the US as long as there are no constraints on emissions in developing countries.

MONDAY September 16, 2013

OEB and SCV Life Members


Thermal Management at the Extremes

Speaker: Ken Goodson, Professor & Department

Chair, Stanford Mechanical Engineering Time: Networking and light lunch at 11:30 AM;

Presentation at 12:00 Noon Cost: IEEE Members: $5; Non-members: $10 Place: TI Auditorium E-1, 2900 Semiconductor

Drive. Santa Clara RSVP: from website Web: sites.ieee.org/sfbanano

Ken Goodson is Professor and Department Chair of Mechanical Engineering at Stanford. His lab (nanoheat.stanford.edu) has graduated 40 PhDs including twelve professors from MIT and Stanford to UC Berkeley and numerous engineering staff at high-tech companies. Goodson studied at MIT (BS89, PhD93) and has co-authored 32 US patents, 170 archival journal articles, and 210 conference papers. Goodson is a Fellow with ASME and IEEE. Recognition includes the ASME Kraus Medal, the 2013 THERMI Award, plenary lectures at INTERPACK, ITHERM, PHONONS, SEMITHERM, and THERMINIC, and best/outstanding paper awards at SEMITHERM, ITHERM, and the IEDM. Goodson co-founded Cooligy, which built microfluidic cooling systems for computers (including the Apple G5) and was acquired by Emerson in 2006.

The semiconductor industry is pushing many

technological boundaries, and this motivates thermal management research at extreme lengthscales, timescales, and power densities. At Stanford we are grappling with several related questions: Are there thermal scaling limits for nanotransistors below 10 nm? What exotic cooling methods are needed for highly integrated 3D chips and power electronics? Can we convert waste heat to electrical power for appliances, sensor arrays, and efficient vehicles?

This talk covers these challenges and describes the rapidly evolving thermal management toolset from picosecond lasers and submicron infrared imaging to Monte Carlo simulations that is helping to sort them out. The talk also highlights the enormous help we receive from semiconductor companies, in particular here in Silicon Valley


SCV Nanotechnology


Advanced Spintronic Materials for Generation and Control

of Spin Current Speaker: Dr. Koki Takanashi, IEEE Distinguished

Lecturer, Institute for Materials Research (IMR), Tohoku University

Time: Networking and pizza at 6:45 PM; Presentation at 7:30 PM

Cost: none Place: Western Digital, 1710 Automation Parkway,

San Jose RSVP: not required Web: ewh.ieee.org/r6/scv/mag

Dr. Koki Takanashi received his BS, MS, and Ph.D. degrees in Physics from the University of Tokyo. After postdoctoral research at Tohoku University, he joined the faculty there and is now a Professor and Deputy Director of the Institute for Materials Research at Tohoku University. In 1994-1995 he was an Alexander von Humboldt Research Fellow at the Forschunszentrum Jülich in Germany. He has published over 300 papers and has received numerous awards, including the Outstanding Research Award (2004, Magnetic Society of Japan), Outstanding Paper Award (2009, Japan Society of Applied Physics), Masumoto Hakaru Award (2011, Japan Institute of Metals). Professor Takanashi was the leader of a national project in Japan: “Creation and Control of Spin Current” (2007-2011). His research interests include magnetism and magneto-transport in nanostructures, magnetic materials for spintronics, and spin current phenomena.

“Spin current” -- i.e., the flow of spin angular momentum -- in magnetic nanostructures has emerged as a fascinating physical concept during the recent development of spintronics. In magnetic nanostructures, magnetism correlates strongly with electronic transport and also other physical properties, leading to the mutual control of magnetic, transport, and other physical properties. Spin current is the most basic concept relevant to the mutual control, and efficient generation and precise control of spin current in magnetic nanostructures are key technologies for the further development of spintronics. There are two kinds of spin current: one is accompanied by an electric current, and the other is not. Spin current without an electric current is called pure spin current, which is actually generated by several experimental methods such as non-local spin injection, spin Hall effect, spin pumping, spin Seebeck effect, and so on. In recent years spin current has been extensively investigated, and particularly the understanding of pure spin current has dramatically developed.

In this lecture the concept, historical background, and recent progress in research of spin current will be reviewed, and then some topics on advanced materials for the generation and control of spin current will be introduced, with a focus on magnetic ordered alloys: half-metallic Heusler alloys as a highly efficient spin injector/detector and L10-ordered alloys with high magnetic anisotropy as a perpendicularly polarized spin injector/detector.


SCV Magnetics


Confessions of a Serial Entrepreneur: 30 Years of Photonic Start-ups in Academia and Industry

Speaker: Dr. Simon Poole, New Business Ventures,

Finisar, Australia Time: Networking and Pizza Dinner at 6:00 PM,

Presentation at 7:00 PM Cost: none Place: Intel Auditorium, Building SC-12, 3600 Juliette

Lane, Santa Clara RSVP: from website Web: ewh.ieee.org/r6/scv/leos

Dr. Simon Poole is an engineer/entrepreneur with over 30 years experience in photonics in research, academia and industry. He obtained his PhD from Southampton University in 1987 and was a member of the team that invented the Erbium-Doped Fiber Amplifier (EDFA) in 1985. In 1988 he moved to Australia and founded the Optical Fiber Technology Centre (OFTC) and subsequently Australian Photonics Cooperative Research Centre (APCRC) at the University of Sydney where he was director of the Sydney Node from 1991 to 1995. The APCRC grew to over 150 researchers and led to 15 start-ups which raised a total of over $250m in Venture Capital funding.

In 1995, Dr. Poole led the first spin-off company from the APCRC, Indx Pty Ltd which manufactured Fiber Bragg Gratings (FBGs) for optical communications. Indx was acquired by Uniphase Corporation (now JDS Uniphase) for $6m and subsequently grew to over 300 people with exports of over $100m pa. After leaving JDSUniphase in late 2000 he worked as a venture partner with KPLJ Ventures before co-founding Engana Pty Ltd in September 2001.

As Engana’s CEO Dr. Poole raised $13m in VC funding and oversaw the development and launch of Engana’s market-leading Dynamic Wavelength Processor line of Wavelength Selective Switches in early 2005. The company, now Finisar Australia, employs 280 people in Sydney and a similar number in China, with annual sales of Wavelength Selective Switches of >$100m pa.

Every company – even the largest household

names such as Google or Apple or even IBM – begins life as a start-up. Drawing on experience gained from Dr. Poole’s extensive start-up history, this presentation will look at how some of the companies and research groups in which Dr. Poole has been involved got started, what they did and how they subsequently developed and thrived. The presentation aims to inspire researchers who are considering how to commercialize their research to take the next steps and move out of the research lab and into the brave new world of commercialization.

Dr. Simon Poole is an engineer/entrepreneur with over 30 years experience in photonics in research, academia and industry. He has been involved in numerous successful start-ups in both Academia and industry and is renowned for both his contribution to the technology of photonics as well as the companies he has founded.

In 2008, Dr. Poole started a new group within

Finisar, the New Business Ventures Group, to generate new, high value added businesses using the principles of Open Innovation. The first business within this group was the highly successful WaveShaper range of Programmable Optical Processors which already has sales of over $6m pa.

Dr. Poole is a Fellow of the IEEE in 2001 and is also a Fellow of the Institute of Engineers Australia (FIEAust), a Senior Member of the Institute of Engineering and Technology (SMIET) and a Chartered Engineer (CEng). He has published over 150 refereed papers in journals and international conferences as well as filing 7 patents, including the initial patent on the EDFA.


SCV Photonics


The Supreme Court Weighs in On Gene Patents: and

Implications for Software and Business Methods

Speaker: Jim Fox, Patent Attorney Time: Optional dinner at 6:15 PM at Hospital

Cafeteria; Presentation at 7:30 PM Cost: none Place: Room M-114, Stanford University Medical

School, Stanford RSVP: not required Web: www.ewh.ieee.org/r6/scv/embs

Jim Fox is a patent attorney, and has practiced patent law for a dozen years, focussing on the biotechnology and medical device industries. Prior to practicing law, he worked as a Product Line Manager in a scientific instrumentation company (producing hardware and software for electrophysiological and pharmaceutical research); worked as an electro-physiologist at a biotech company developing pharmaceuticals to treat stroke); and did postdoctoral research on retinal physiology after receiving a Ph.D. in Neuroscience from UCLA.

The recent Supreme Court decisions defining what

sorts of things or actions are patentable -- and what are not patentable -- will be discussed. These decisions were based on biotech and pharmacological inventions, and discussed not only what materials may be patentable, but also discussed requirements for patentable methods. These decisions may affect software and business method patents as well.

The Supreme Court's recent decision in the Myriad Genetics case makes clear that natural products -- here, gene sequences -- are not patentable. However, man-made products -- such as cDNA copies of gene sequences -- may be patentable. Similarly, novel, useful methods using natural products may be patentable if the method includes steps that are more than merely routine and well-known.

In addition, the Supreme Court has also recently decided a case invalidating claims that required only a "mental step" -- recognizing whether more or less drug should be administered to a patient based on comparing measured drug levels to upper and lower values; importantly, the claim did not require administering any drugs based on that recognition.

Possible implications of these decisions on patents and intellectual property strategies will be discussed.


SCV Engineering in Medicine and Biology

Patent Agent Jay Chesavage, PE

MSEE Stanford 3833 Middlefield Road, Palo Alto 94303

[email protected]

www.File-EE-Patents.com

TEL: 650-619-5270 FAX: 650-494-3835


Methods for Testing Medium Voltage Cables

Speaker: Steve Metzger, Region Sales Manager,

Emerson Network Power Time: Hors d'Oeuvres and networking at 6:00 PM;

Presentation at 6:30 PM Cost: $ 20 for IEEE Members, $25 for non-

members, $10 for Students Place: Sinbad’s Pier 2 Restaurant, 141 The

Embarcadero, S.F. RSVP: by September 16 to Charles Mee,

[email protected], 415-703-1147 Web: www.e-grid.net/docs/1309-sf-pes.pdf

Steve Metzger received his BS from the University of Cincinnati and is a product of the Westinghouse Graduate Program, Class of 82. He recently received his MBA, Technology Management, from the University of Phoenix. Over his 32 year career in the power industry Steve has supported projects from sewage treatment plants to space launch complexes, at voltages from utilization through 345kV.

This presentation will explain various methods for

testing medium voltage cables, and the advantages and disadvantages of using these methods. These testing methods include DC-HI Pot, Verylow frequency, tan-delta, and online partial discharge cable testing. Strategies will also be discussed on how to determine which testing method will provide the best condition assessment information for various situations.

Electrical Reliability Services (ERS), Inc. (formerly Electro-Test, Inc.) was established in 1971 in response to a need for an unbiased evaluation of 480 volt through 500 KV electrical systems. ERS serves major power users including industrial, refining, chemical, power, oil & gas, water/wastewater, food & beverage, life sciences, data centers, education, and healthcare industries, and major power producers from traditional through alternatives.


SF Power & Energy


High Speed and High Power Connector Design

Speaker: Richard Sjiariel, CST Time: 8:00 AM (PDT) Cost: none Place: on the Internet RSVP: from website Web: spectrum.ieee.org/webinars

Richard Sjiariel received his B.Sc. and M.Sc. degrees in electrical engineering from the University of Wuppertal, Germany. He joined CST in 2006 as an application engineer, where his main area of work involves signal/power integrity and EMC/EMI simulation and other high-frequency applications.

As data transfer rates increase and complexity grows, designing high-speed connectors is becoming increasingly challenging, especially with multiple compliance regulations to meet. A precise analysis of the connector in isolation as well as the connector and PCB interface is essential, and can be only achieved by extensive use of 3D EM simulation during the development cycle. In this webinar we will present the benefits of CST STUDIO SUITE® 2013 for the simulation of high-speed connectors.

Multiple examples, including display connectors and USB 3.0 connectors, will be used to demonstrate features such as online TDR and cross-probing, with the aim of identifying impedance mismatches and discontinuities. A low-speed high-power connector analysis using multidisciplinary approaches (including electrical and thermal effects) will also be presented.

THURSDAY September 19, 2013

SPECTRUM Magazine


Quantified Self: The Next Frontier in Mobile Healthcare

Speakers: Rachel Kalmar, Data Scientist, Misfit

Wearables; George Chapman, CTO, Digifit; Nancy Dougherty, Proteus Biomedical; Monisha Perkash, Co-Founder & CEO, Lumoback; Anmol Madan, Co-Founder, CEO & Data Scientist, Ginger.io; Abe Carter, Co-Founder, Amiigo; and others

Time: 4:00 PM to 9:00 PM Cost: $30 for IEEE members, $40 for others ($10

more onsite0; includes dinner Place: TiE SV Conference Center, 2903 Bunker Hill

Lane Suite 150, Santa Clara RSVP: from website Web: www.comsocscv.org/showevent.php?id=1378163789

Session I – Technology Panel This session will focus on the newest QS

technologies and products in the market, and those in development stage and their applications. The technical challenges product developers encounter when creating the technologies into products and deploying the products in the field, their solutions and future directions for wearable healthcare device technology will be covered. Session I Keynote Rachel Kalmar, Data Scientist, Misfit Wearables Session I Moderator Amelia Greenhall, Data Scientist, FutureAdvisor

Speaker 1: George Chapman, CTO, Digifit Speaker 2: Nancy Dougherty, Proteus Biomedical Session II – Business and Opportunities Panel The current and future business opportunities in

the QS field, how large is the market for the wearable healthcare devices, and the challenges before entrepreneurs who seek to enter the wearable healthcare devices market will be some of the issues discussed during this panel session.

Session II Keynote & Moderator: Rajiv Mehta, President, Bhageera Consulting

Speaker 1: Monisha Perkash, Co-Founder & CEO, Lumoback

Speaker 2: Anmol Madan, Co-Founder, CEO & Data Scientist, Ginger.io

Speaker 3: Abe Carter, Co-Founder, Amiigo

This Workshop on Quantified Self emphasizes the

emerging nuances in technology, opportunities and business models in mobile/personal healthcare. Innovations in MEMS/bioMEMS devices and their integration in somatic sensory and monitoring devices enabled by advances in mobile communication has begun to usher in a new era in technology/personal health monitoring startups, cloud-based analytics solutions, investment opportunities, user communities and business paradigms such as WYOD (wear your own device). Silicon Valley leads the world in R&D, technology leadership, software solutions and investment activity when it comes to QS in mobile/ personal healthcare. The industry's leading experts are expected to participate at this workshop which will explore and disseminate the current state-of-the-art, latest developments, products and investment opportunities in QS to the participating audience.

Two sessions each with separate keynotes have been organized in the workshop. The first panel explores the progress in technology for various somatic & health-centric self-quantification. The second panel provides exposure on current and emerging investment activities in QS for personal/ mobile healthcare.

Program: 3:30 p.m- 4:00 p.m. Registration and Networking 4:00 p.m.-4:10 p.m. Introductory remarks by

organizers 4:15 p.m.-4:40 p.m. Keynote for Session I 4:45 p.m.-6:00 p.m. Session I Presentations, Panel

Discussion, Q&A 6:00 p.m.-7:00 p.m. Dinner and Networking 7:00 p.m.-7:25 p.m. Keynote for Session II 7:30 p.m.-8:45 p.m. Session II Presentations, Panel

Discussion, Q&A 8:45 p.m.-9:00 p.m. Closing comments and

Networking


SCV Communications


Beacon Satellite Scintillation from Sputnik to Cubesat

Speaker: Charles L. Rino, Visiting Scholar, Boston

College Institute for Scientific Research Time: Networking and food at 6:30 PM;

Presentation at 7:00 PM Cost: none Place: National Instruments, 4600 Patrick Henry

Drive, Santa Clara RSVP: from website Web: www.eventbrite.com/event/8173879293

Charles L. Rino received his BS and MS in Electrical Engineering from UC Berkeley in 1965 and 1966. He received his PhD in information and computer science from UC San Diego in 1970. He conducted research in radio propagation and ionospheric physics at SRI International from 1970 until 1986, when he joined the Mission Research Corporation as a Chief Scientist. In October 1987, he joined Vista Research as Staff Scientist, and later served as Vice President until he retired in 2009. In 1989 he was elected an IEEE Fellow for contributions in wave propagation and ionospheric physics. He is the principal author on over 50 papers on ionospheric physics, radio propagation, and surface scattering. His IEEE Press book, The Theory of Scintillation with Applications in Remote Sensing, was published in 2011. He currently works part-time as and engineering consultant. He is also a docent volunteer at the Computer History Museum in Mountain View.

Starlight scintillation has been observed for as long

as humans pondered the nighttime sky. Like its invisible radio and acoustic counterparts scintillation is a nuisance and a scientific curiosity that can be exploited for remote sensing of propagation media. Since the launch of Sputnik, artificial earth satellites have provided multiple frequency radio sources that propagate through the earth’s ionosphere and atmosphere. Because these radio transmissions carry critical information the potential degradation imposed by scintillation is a serious problem. On the other hand, the same radio transmissions have provided a means of measuring the near-earth environment. For example, the refraction of radio transmissions during an occultation can be used to measure the atmospheric refractivity profile and extract its vapor content, with is critical to global weather forecasting.

This talk will trace the history of beacon satellite scintillation from its inception with the launch of Sputnik to modern times. Our ability to exploit propagation phenomena has progressed apace with the development of modern computation resources. The scintillation phenomenon as it affects system performance is well understood. The current challenge is to understand the onset of severe ionospheric disturbances triggered by solar storms. Examples of the extreme disturbance that occur will be presented to illustrate computation capabilities and the challenges that remain.


SCV Antennas and Propagation


Secrets of the Mobile World - Linux and HTML5

Speakers: Wey-Yi W Guy, Principal Engineer, Intel

Corp; Heidi Pan, Staff Engineer, Software and Services Group, Intel

Time: Food and networking at 6:00 PM; Presentations at 6:45 PM

Cost: none Place: Intel Corp. SC9 - Auditorium (Santa Clara

9), 3601 Juliette Lane, Santa Clara RSVP: from the website Web: www.ewh.ieee.org/r6/scv/wie/upcoming.htm

Wey-Yi W Guy is Principal Engineer at Intel Corp. She started her career as an embedded software engineer for a small company in Connecticut. Wey-Yi joined Intel in 2000, and has since assumed a variety of positions including senior lead architect for Intel’s wireless products. Her knowledge and expertise includes ADSL, WiMAX, and WiFi technologies, as well as Linux, Android, Windows and Chrome OS.

Heidi Pan is a member of the Technology

Pathfinding and Innovation team in Intel’s Software and Services Group where she has been investigating and prototyping mobile and web developer technologies since September 2010. She currently leads an HTML5 runtime performance pathfinding project. She received her PhD in Computer Science from MIT for her research on parallel programming models.

What do Android, Chrome OS and Apple’s Darwin

have in common? This first presentation will reveal how Google and Apple leveraged Linux and Unix to create the world’s three most popular mobile operating systems: Android, Chrome OS and Darwin (the core of Mac OS and iOS). The paths of these operating systems from the Linux open source community and Unix to where we are today is a fascinating story.

2nd Presentation: We are at an inflection point

today, where the performance and feature advances in HTML5 technologies combined with increasing device and OS fragmentation are fueling the adoption of the web as a platform of choice across the compute continuum. HTML5 is emerging as a compelling programming platform with its rich OS-like features, high developer productivity and cross-platform reach. This talk provides a high-level technical overview of client-side web technologies that serve as the foundation for HTML5.


SCV Women in Engineering


Generator Paralleling Switchgear and New Innovations

Speaker: Doug Kristensen, Chief Operating Officer,

IEM Time: Networking at 5:30 PM, Presentation at

6:00 PM, dinner at 7:00 PM Cost: $25 for members (at the door); $10 for first

5 reserved IEEE Student Members Place: Sinbad's Restaurant, Pier 2 The

Embarcadero, San Francisco RSVP: by email to Brandon Yee,

[email protected], 510-220-4486 Web: www.e-grid.net/docs/1309-sf-ias.pdf

Doug Kristensen is Chief Operating Officer of IEM overseeing operations in Fremont, and in Vancouver, BC. Kristensen has over 25 years’ experience in power systems switchgear and control experience in various senior roles in operations, sales, marketing and product development. He is actively strengthening the IEM operation to reflect the Company’s growing design expertise and its ability to deliver custom equipment for larger projects. He looks forward to bringing both his experience and passion for power system solutions to IEM and assist with process/product integration of all IEM business units and establishing IEM as the premier power systems/quality provider in the industry. Kristensen graduated from SAIT Polytechnic in Calgary, AB with diplomas in both Power and Chemical Engineering Technology.

Optimizing today’s technology for increased reliability and functionality. We will investigate leveraging the increased sophistication of digital synchronizing and loadsharing controls (onboard generator or located in paralleling switchgear) and integration with Power System Controls and Load Management.


SF Industry Applications


Chapter Planning Meeting: Product Safety Engineering

Time: Optional dinner at Honba Sushi, 2587 North 1st St, San Jose at 5:15 PM; Planning meeting at 7:00 PM

Cost: none Place: Underwriters Laboratories, 455 E. Trimble

Rd., San Jose RSVP: not required Web: www.ewh.ieee.org/r6/scv/pses

Preliminary Agenda:

Welcome/Introductions Election Planning

(Note: Election to be held at October Meeting) Introduction of current candidates: Mark Maynard Aziz Orumbaev Jean Zhou Azim Karimi We also encourage others interested to step

forward – please feel free to volunteer prior to or at the meeting!

2014 Symposium Planning and SCV Chapter Involvement

General Volunteer Support Committee Leads Special SCV Sponsored Activities Keynote Speakers

2013 – 2014 SCV Chapter Activities Planning Please Note – we need additional candidates for

Officer Positions for 2014/2015, since two of our previous candidates have had to withdraw. Please consider this way of getting more involved with the Chapter and strengthening your professional network! Please feel free to contact Ken, Jon or myself via email if you have questions or would like to get more involved.


SCV Product Safety Engineering


Low-CTE Organic Interposer Technology for 2.5D Packaging

Speaker: Tomoyuki Yamada, Kyocera America Inc. Time: Buffet lunch at 11:30 AM; Presentation at



Clara RSVP: from website Web: www.cpmt.org/scv/meetings/cpmt1309l.html

Tomoyuki Yamada graduated from Osaka University in Japan in 1997 and holds a masters degree in materials science. In 1997 he joined IBM Japan as process engineer for organic substrates. In 2003 he became an engineering manager at Kyocera SLC technologies. In 2007 he transferred to Kyocera America as a field applications engineer to provide technical support to North American customers. Currently he is working as a development engineer to qualify next-generation organic substrate technology in Fishkill, NY with multiple partners.

In recent years, a 2.5D package has been

developed to accommodate high-speed data processing and miniaturization in microelectronics. In the industry, most of the development work has been implemented with silicon interposer technology, which was fabricated with legacy wafer manufacturing equipment. This is because of the excellent ground rules available for silicon and the lower Coefficient of Thermal Expansion (CTE) when compared to organic substrate technology.

The body size for 2.5D packages has been increasing, which is driven by the number of logic and memory chips per interposer as well as their footprints. Due to the body size limitation of silicon interposers, there is a significant industry need for a large organic interposer to support high-performance 2.5D packages, and potentially 3D packages.

This presentation describes the development of a low-CTE organic Chip Scale Package (CSP) for 2.5D packaging. The new material set, identified as "Advanced SLC Package", combines a low-CTE core with build-up dielectric materials to achieve a composite laminate CTE of 9-12 ppm/oC, which is between that of silicon devices and conventional PCBs. The composite CTE reduces the dimensional mismatch between chip and laminate during Bond and Assembly (BA) to mitigate Chip-Package Interactions (CPI). The low CTE significantly reduces the strain in the solder joints during the reflow process and ensures solder joint reliability. In addition, the CTE mismatch of device solder interconnect pads between the silicon chip and laminate during device attach is less pronounced during the C4 joint cooling-down period. In this presentation, the design rules will be examined based upon the new low-CTE organic material parameters as well as the CSP form factor. Mechanical and electrical characterizations were conducted and models were developed and verified. This presentation will also highlight potential CSP applications for 2.5D packages including next generation high-performance memory technologies, such as Wide I/O Memory and High Bandwidth Memory. Lastly, the technology roadmap for organic interposers will be discussed in order to support future 2.5D packaging.




Intel's Transition to Success: From Memory to

the Microprocessor

Speakers: Ted Hoff, Ph.D., employee #12 at Intel; and Dave House, Intel (retired)

Time: 7:00 PM Cost: none Place: Agilent Technologies, 5301 Stevens Creek

Blvd., Santa Clara RSVP: not required Web: www.CaliforniaConsultants.org/events.cfm/item/200

Ted Hoff, Ph.D., was employee #12 at Intel. From 1968-1983, he worked on semiconductor memory, the 4004 and 8008 microprocessors, and telecom LSIs. He received the National Medal of Technology and Innovation from President Obama in 2010, the Stuart Ballantine Medal in 1979, the Franklin Institute’s Certificate of Merit in 1996, the Kyoto Prize in 1997 and the James Clerk Maxwell Award of the IEEE in 2011. Ted was inducted into the Inventors Hall of Fame in 1996. He is an Eminent Member of the IEEE’s Eta Kappa Nu, and an IEEE Life Fellow.

Dave House joined Intel as Semiconductor

Memory Applications Manager in 1974, and became general manager of the company's Microcomputer Components Division in 1978. Over the next 13 years he led the organization that developed Intel's leading microprocessor product line, including the 386, 486, Pentium and Pentium II. Dave helped grow that business from $40M to $4B in annual revenue. He managed the team that developed the highly successful marketing program around the words "Intel Inside," a term that he coined. Dave launched Intel's Server Products Division in 1996, a move critical to Intel's entry into the server business where it now has over 85% market share. He is currently Chairman of Brocade's Board of Directors, and a proprietor of the House Family Winery.

Almost everyone in Silicon Valley recognizes Intel

as the world's leading semiconductor company, a position that's based on their multi-decade dominance of microprocessors and the "Intel Inside" marketing campaign. However, few know the history of Intel's early years as a semiconductor memory company, and that its development of the first commercially available microprocessors was a huge departure from its original roadmap.

By 1976, Intel had become a microprocessor company, competing with Motorola, Zilog, National Semiconductor and other major firms. Since no one had envisioned that MOS semiconductors could advance to compete with bipolar, microprocessors were targeted at embedded controller applications. When an Intel team convinced IBM to include its microprocessors in their first PCs, that game changer opened up a whole new market previously thought impossible.

A story almost hidden from history will also be told: the invention of the first combo Codec-Filter LSI chip, which facilitated time slot interchange within a T1 carrier (DS1). This created the market for digital switching in PBXs, central office switches and later T1 multiplexers.

This panel discussion, featuring semiconductor industry luminaries Ted Hoff and Dave House, will examine how Intel was able to succeed and dominate the semiconductor memory and microprocessor markets. The panelists will discuss Intel's history from 1968 to the mid-1980s, including Intel's response to many obstacles and competitive challenges. Many interesting inside stories will be included, several of which have never been publicly told.

Panel moderator Alan J. Weissberger is an IEEE

Senior Life Member who has organized IEEE conferences, seminars, technical meetings and workshops for 40 years. He is the content manager for the global IEEE ComSoc Community website, manager and moderator of the IEEE Member Discussion list, N.A. Correspondent for the IEEE Global Communications Newsletter, and Chairman Emeritus and Advisor to the IEEE ComSocSCV chapter. Alan also volunteers at the Computer History Museum and ITHistory.org, where he writes technical summaries of lectures and exhibits.

TUESDAY October 1, 2013

SCV Consultants' Network of Silicon Valley


Electromagnetic Compatibility (EMC) Design and Verification

for Embedded Systems Speakers: Daryl Gerke, PE, and Bill Kimmel, Kimmel

Gerke Associates, Ltd. Time: 11:00 AM (PDT) Cost: none Place: on the Internet RSVP: from website Web: spectrum.ieee.org/webinars

Daryl Gerke received his BSEE from the University of Nebraska, and has worked in the electronics industry for over 40 years. His experience ranges from product and systems design to sales/application engineering and technical marketing with industry leaders such as Collins Radio, Sperry, Tektronix, and Intel. Since 1987, he has been involved exclusively with EMC engineering as a founding partner of Kimmel Gerke Associates, Ltd.

Daryl's formal EMC experience dates back to 1970, and includes design, test, and qualification of military systems to MIL-STD-461 and TEMPEST; commercial and industrial systems to FCC and CE requirements; medical devices to FDA and IEC 60601-1-2; vehicular electronics to SAE requirements and derivatives; avionics systems to DO-160 and derivatives; telecomm systems to GR1089; and more.

Daryl also has EMP experience, and conducted an in-depth one year classified EMP research project for the US Navy. He is a Registered Professional Engineer, holds FCC Commercial and Amateur Radio Licenses, and is an active member of the IEEE EMC Society. He is also a NARTE Certified EMC and ESD Engineer.

Bill Kimmel received his BSEE with distinction from the University of Minnesota, and has worked in the electronics field for over 45 years. His experience ranges from electronic design and systems engineering to technical management with industry leaders like Control Data Corporation and Sperry Defense Systems. He has been involved exclusively with EMC since 1987 as a founding partner of Kimmel Gerke Associates, Ltd.

Embedded systems are often placed in the most

demanding and harsh environments, leaving them susceptible to electromagnetic interference (EMI) as well as interference from other devices. Even if you have managed to design your embedded system with all the latest capabilities, it may have all been for naught if it is left useless due to EMI.

This webinar will examine how EMC can be designed into your embedded system and how you can test and verify its resistance to EMI before it’s too late.

Bill's formal EMC experience dates back to the late 1960s, and includes the design, test, and qualification of military systems to MIL-STD-461 and TEMPEST; commercial and industrial systems to FCC and CE requirements; medical devices to FDA and IEC 60601-1-2; vehicular electronics to SAE requirements and derivatives; avionics systems to DO-160 and derivatives; telecomm systems to GR1089; and more. Bill also has several years experience with the design/test of radiation hardened circuits for military systems. He is a Registered Professional Engineer, an active member of the IEEE, and a NARTE certified EMC and ESD Engineer.

WEDNESDAY October 9, 2013

SPECTRUM Magazine


Advanced Package Migration to System-Level Integration

Speaker: Curtis Zwenger, Sr. Director, Package

Development, Amkor Technology, Inc. Time: Optional dinner at 6:00 PM; Presentation at



Clara RSVP: from website Web: www.cpmt.org/scv/meetings/cpmt1310.html

Curtis Zwenger joined Amkor in 1999 and has held leadership roles in developing Amkor's Fine Pitch Copper Pillar, Through-Mold Via, and MEMS packaging technologies. Currently he is responsible for the development and commercialization of Amkor's panel level fan-out and embedded die product lines. He previously worked at Motorola. Curtis holds a degree in mechanical engineering from Colorado State University and an MBA from the University of Phoenix.

The tremendous growth in the smartphone, tablet,

consumer electronics, and networking markets has been fueled by the end users' demand for increased mobility, functionality, connectivity, and ease of use. This, in turn, has been driving an increase in functional convergence and 3D integration of IC devices, resulting in the need for more complex and integrated packaging techniques. A variety of innovative packaging technologies are addressing this growing need, such as advanced substrates, 2.5D interposers, embedded active die, and package-on-package. This presentation explores how these technologies are enabling the migration from advanced packaging solutions to system-level integration techniques, to meet the current and future needs of the semiconductor packaging industry.




Simulating Beyond a Billion Degrees of Freedom

Speaker: Dr. Elliot English, Lawrence Berkeley

National Laboratory Time: Presentation at 6:30 PM Cost: none Place: International Technological University, 355

W. San Fernando St., San Jose RSVP: not required Web: sites.ieee.org/scv-css

Over the last few years, the computational power

available to both researchers and industry has increased at a rapid pace with the introduction of supercomputer type clusters with more than a million cores and a petabyte of memory. However, this increase has not been met with an equal increase in ability to run large simulations due to issues with the architecture of these systems. Traditional algorithms have difficult dealing with the low memory bandwidth to floating point performance ratios of modern cpus, as well as the high communication costs of distributed systems. I will be presenting recent work on a variety of algorithms and approaches that address these issues in the context of solving fluid dynamics dynamics problems and the hyperbolic (material transport), parabolic (viscosity and heat diffusion) and elliptic (incompressible fluid pressure forces) equations that arise. I will talk generally about block-structured discretizations such as Adaptive Mesh Refinement (AMR) and overlapping grid (Chimera) approaches. They allow for greatly simplified domain decomposition, simplified numerical schemes, and improved solution accuracy when compared to unstructured approaches. I will also talk about applications within visual effects, aero/astronautics, and climate modelling.


SCV Control Systems


Distributed Generation Interconnection Workshop

Time: 8:00 AM - 5:00 PM Cost: $250 per attendee (discounted to $225 per

attendee if three or more attending from one company)

Place: Hilton, 7050 Johnson Drive, Pleasanton RSVP: from website Web: ewh.ieee.org/r6/oeb/ias/workshop.html

As distributed generation (DG) applications

continue to grow, so does the importance of knowing how to navigate the interconnection process with the local electric utility. The interconnection process applies across all industries including PV, Wind, Biomass (wastewater), Hydro, Geothermal, Industrial Cogeneration (petrochemical). This Workshop will include an impressive list of speakers from PG&E, California Public Utilities Commission, and CSU Sacramento. Workshop topics will include:

- Discussion of Rule 21 - DG Interconnection Design Guidelines - DG Interconnection Standards Development - Interconnection Protective Relay

Requirements - CPUC Latest Regulatory Trends --- Future of

Rule 21 - Navigating the Generation Interconnection

Process

THURSDAY October 17, 2013OEB Industry Applications


Mini-Symposium: Ferrites for EMI Reduction; Bad PCB Application

Notes on EMC; Power Distribution Network Design in Multi-layer PCBs

Speakers: Lee Hill, SILENT; Prof. James Drewniak,

Missouri University of Science and Technology

Time: Registration, Breakfast at 7:30 AM, Presentations from 8:30 AM - 5:00 PM, Reception at 5:00 PM

Cost: $250 for members; $275 for non-members; $100 for Students/unemployed

Place: Biltmore Hotel, 2151 Laurelwood Road, Santa Clara

RSVP: from website Web: www.scvemc.org/2013Mini-Symposium.html

Lee Hill is Founding Partner of SILENT, an independent electromagnetic compatibility (EMC) and RF design firm established in 1992 that specializes in EMC and RF design, troubleshooting, and training services. Lee received the Master of Science Degree in Electrical Engineering & Electromagnetics with highest honors from the University of Missouri-Rolla, (now Missouri University of Science and Technology). He is a returning instructor for the IEEE EMC Society¹s annual Global University program and he has over twenty-five years of experience in the EMC design and retrofit of complex electronic systems. Lee has been teaching short courses on EMC design and troubleshooting for twenty years. Lee is the named inventor of three US patents for EMI control in electronic systems, and provides expert witness services for patent litigation. He serves as an officer on the board of directors of two non-profits and a past member of the Society¹s Board of Directors (2004-2007). In 1994, Lee was appointed to serve a two year term as an IEEE EMC Society Distinguished Lecturer (DL).

(continued, nex page)

Registration, Breakfast & Exhibits: 7:30 AM Morning Session: 8:30 AM - 12:00 PM

Top Ten Features of Ferrites for EMI Reduction Presenter: Lee Hill, SILENT

High frequency ferrites seem simple but are actually widely misunderstood. In new electronic designs the best ferrite for a specific application is often not chosen, resulting in unnecessary cost or ineffective noise filtering. This interactive session will review the key attributes of ferrites intended for use on printed circuit boards and cable assemblies, and how to choose the right one for your design. Lee will present data sheets and actual applications for the control of emissions and immunity, and demonstrate the performance of different ferrite devices using digital noise sources and a spectrum analyzer/test receiver.

Bad PCB Applications Notes on EMC and What They Did or Can Do to Your Design

Presenter: Lee Hill, SILENT When the EMI design notes you receive from the

component vendor are faulty, a noise problem will almost always be created in your product design. In fact, SILENT often discovers that bad EMI design guidelines are the root cause of many noise problems that we find while working with clients on design reviews and hardware troubleshooting assignments. In this presentation, Lee will review real-life examples of defects in schematics and PCB layouts that created noise problems in physical hardware.

Lunch & Exhibits: 12:00 PM - 1:30 PM Afternoon Session: 1:30 PM - 5:00 PM

Power Distribution Network Design in Multi-layer PCBs.

Presenter: Prof. James Drewniak, Missouri University of Science and Technology

Fundamental concepts and physics that characterize and describe the design, performance, and limits, as well as the inductance physics and calculations that dominate the PDN performance will be presented. The outcome will be the reduction of a real production board with in excess of 20 layers used as an example, to a straight-forward physics-based equivalent circuit model where the model elements are directly related to the geometry. Then the design performance through the frequency domain PDN impedance and its accompanying time-domain voltage ripple can be related directly to the circuit (continued, next page)

THURSDAY October 17, 2013

SCV Electromagnetic Compatibility


Dr. James Drewniak (S¹85-M¹90-SM¹01-F¹07)

received the B.S., M.S., and Ph.D. degrees in electrical engineering from the University of Illinois, Urbana-Champaign, in 1985, 1987, and 1991, respectively. In 1991, he joined the Department of Electrical Engineering, Missouri University of Science and Technology (MS&T; formerly known as the University of Missouri-Rolla), Rolla, where he is currently a Faculty Member in the EMC Laboratory. His research and teaching interests include electromagnetic compatibility in high-speed digital and mixed-signal designs, signal and power integrity, electronic packaging, electromagnetic compatibility in power electronic based systems, electronics, and antenna design

elements in the model. Through this paradigm of relating the geometry features to the model topology and elements, and relating the time-domain and frequency-domain responses to the elements, both steps in a 1-to-1 fashion, a PDN design approach and trade-offs becomes clear.

Target impedance and its time-domain manifestation in voltage ripple on the PDN will be reviewed and specified for the production board example of Part 1. Then, specifying the PWR net and its adjacent GND return layer, as well as decoupling capacitor number, value(s), and location will be detailed. Trade-offs and limitations will be discussed and quantified.

Reception & Exhibits: 5:00 PM - 6:00 PM

There will be an exhibition by vendors of EMC design, test and measurement products and services. During the reception in the exhibit area, heavy appetizers and beverages will be served. You are welcome to attend the reception only at NO CHARGE, provided a registration form is submitted in advance. Thus, if you can't join us for the entire day, drop by for the reception and exhibition to network with the speakers and attendees as well as vendors. You might even win a raffle prize! Anyone who ONLY wishes to attend the Reception & Exhibits must register here.


Title 24 2014 Changes with Lighting Control Developments

Speaker: Brian Friedel, LEED AP, National Sales

Manager, Wattstopper Time: Networking at 5:30 PM, Presentation at

6:00 PM, dinner at 7:00 PM Cost: $25 for members (at the door); $10 for first

5 reserved IEEE Student Members Place: Sinbad’s Restaurant, Pier 2 The

Embarcadero, San Francisco RSVP: by email to Brandon Yee,

[email protected], 510-220-4486 Web: www.e-grid.net/docs/1310-sf-ias.pdf

Brian Friedel LEED AP is the National Sales Manager for Wattstopper. He currently supports both Strategic Accounts and Healthcare initiatives for WattStopper. Brian has been in the lighting controls industry for 18 years. He had worked as a project manager both in the office and out in the field before moving into local and national sales positions. Current responsibilities include working directly with electrical engineers and contractors to ensure the lighting control designs provide the most energy efficient, code compliant and cost effective control strategy available as well as presenting solutions for complete integration to the building automation system.

Review of the new Title 24 requirements for

lighting controls in commercial buildings. Presentation will include changes in the code regarding dimming, daylighting, plug load controls and commissioning of lighting controls.

TUESDAY October 22, 2013

SF Industry Applications


Volunteer Information Evening

Speakers: from various organizations (Second Harvest Foodbank, Science Fairs, more)

Time: 6:00 PM - 8:00 PM Cost: none Place: LinkedIn, 2027 Stierlin Ct, Mountain View RSVP: from website Web: ieee-gold-vie.eventbrite.com

Come out and join the IEEE SCV GOLD in our

annual Volunteer Information Evening to learn about a number of volunteering opportunities in the Bay area. Our goal is to arrange a diverse range of speakers for you from a number of organizations in the area. Some roles will allow for you to use your technical skills to improve the world, while others will be less technical in nature. It is our goal to find a number of volunteering roles with varying commitment levels from 1 hour one time to a few hours per month so that you can find a way to give back regardless of your schedule and commitment level. Current confirmed organizations for this evening include Second Harvest Foodbank and the local Science Fairs.

Dinner will be provided by the IEEE SCV GOLD, but donations will be requested with all proceeds going to an IEEE SCV GOLD scholarship for a student studying in one of the fields related to the IEEE.

What is GOLD?

For those of you that don't know, GOLD is the Graduates of the Last Decade affinity group of the IEEE. We primarily focus on helping recent graduates be productive in their jobs and to achieve success through networking (social), technical and professional development events.

MONDAY November 4, 2013

SCV GOLD (Grads of the Last Decade)

Download - GRID.pdf GRID.pdf September 2013 · And Implications for Software and Business Methods biotech [more] SF-PES - 9/18 | Methods for Testing Medium Voltage Cables - DC- HI-pot, very

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