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Alternative educational activity a.a. 2014/2015
Hardware Implementation of Tactile Data Processing Methods for the Reconstruction
of Contact Force Distributions
by Davide Cimino
February 3rd 2016
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The system
Transducers
Interface
electronics
Digital
filtering
Data processin
g
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Data processing
Contact Force Reconstruction
From the measured normal stress component in the sensors, the goal is to reconstruct complete contact force vectors, at discrete points on the upper surface layer.
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Algorythm
Boussinesq’s equation allows the resolution of direct problem:
=
𝑏=𝐶𝑥
=
𝑥=𝐶−1𝑏Inverse: ?𝑚=𝑛 𝑚=3𝑛
𝑠𝑖𝑧𝑒 (𝑥 )=𝑚𝑠𝑖𝑧𝑒 (𝑏 )=𝑛
Maximization of a Global Efficiency Functional
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A few HW issues
Main target:
Translate Matlab code into VHDL designMatlab minimization
• Minimization is performed by a too complex Matlab algotythm for HW design. It has to be translated into HW friendly procedure.
Precision
• All operations involve fractional values, whose order of magnitude varies widely. A smart fixed point arithmetic is required.
Vector calculus
• Most of the operations involve vector calculus. A smart vectorial architecture has to be developed to manage vectors.
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Main blocks
Start from basic blocks:
• Matrix – Vector multiplier• Vectors Adder and Subtracter• Elements accumulator• Vector and scalar product
Five main structures:1. Double loop operations2. Elements accumulators3. Element by element operations4. Vector – Scalar operations5. Scalar product
1.
2.
3.
4.
5.
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General BehaviorThe block itself generates addresses to: Read from memory Write on memory
READ address
WRITE address
DATA out
DATA in
Read memory Write memory
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Main components
FSM•Generates control signals for datapath•Manages write and read addresses
Datapath•Implements fixed-point operations•Contains registers to be used as accumulators
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Fixed point operationsAccording to a statistical analysis a 16 bits fixed-point arithmetic has to be considered. Most of the device will be based on a one integer part bit fixed-point arithmetic:
Integer part Fractional part
Datapath will handle fixed-point operations
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Software
VHDL code development, circuit design and simulations have been performed using
Which allows deployment on most of Xilinx’s FPGA families .
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Results
In the following slides a few Xilinx simulations outputs will be presented.
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Adder
Vector-Vector Adder
clk
resetstart
begin_read1begin_read2begin_write
din1din2
addRead1addRead2addWrite
we
dout
is_inactive
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Adder
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Conclusions
The following blocks have been successfully designed and properly tested:
Matrix-Vector product
Scalar Product
Vector Product
Vector Addition
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ISICT
Economics and Management
Technical and Scientific Subjects
Alumni network
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Thank you!