![Page 1: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/1.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22
Lecture 22:Multistage Amps
Prof. Niknejad
![Page 2: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/2.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
Lecture Outline
� Finish Current Mirrors
� An Example Using Cascodes
� Multistage Amps
� Cascode Amplifier: Magic!
![Page 3: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/3.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
The Integrated “Current Mirror”� M1 and M2 have the same
VGS
� If we neglect CLM (λ=0), then the drain currents are equal
� Since λ is small, the currents will nearly mirror one another even if Vout is not equal to VGS1
� We say that the current IREF is mirrored into iOUT
� Notice that the mirror works for small and large signals!
High Res
Low Resis
![Page 4: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/4.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
Current Mirror as Current Source
� The output current of M2 is only weakly dependent on vOUT due to high output resistance of FET
� M2 acts like a current source to the rest of the circuit
![Page 5: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/5.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
Small-Signal Resistance of I-Source
![Page 6: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/6.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
Improved Current Sources
Goal: increase roc
Approach: look at amplifier output resistance results … to see topologies that boost resistance
Looks like the output impedance of a common-source amplifier with source degeneration
out oR r>>
![Page 7: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/7.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
Effect of Source Degeneration
� Equivalent resistance loading gate is dominated by the diode resistance … assume this is a small impedance
� Output impedance is boosted by factor
( )St t m gs o Rv i g v r v= − +
1eq
m
Rg
≈
Sgs Rv v≈ −
SR t Sv i R=
( )t t m S t o t Sv i g R i r i R= + +
( )1to m S o
t
vR g R r
i= ≈ +
( )1 m Sg R+
![Page 8: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/8.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
Cascode (or Stacked) Current Source
Insight: VGS2 = constant ANDVDS2 = constant
Small-Signal Resistance roc:
( )1o m S oR g R r≈ +
( )1o m o oR g r r≈ +
20o m oR g r r≈ >>
![Page 9: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/9.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
Drawback of Cascode I-Source
Minimum output voltage to keep both transistors in saturation:
, 4, 2,OUT MIN DS MIN DS MINV V V= +
vOUT
iOUT
2, 2 0 2DS MIN GS T DSATV V V V> − =
4 2 4 2 4 0D DSAT GS GS GS TV V V V V V> + = + −
, 2 4 0OUT MIN GS GS TV V V V= + −
![Page 10: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/10.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
Current Sinks and Sources
Sink: output current goesto ground
Source: output current comesfrom voltage supply
![Page 11: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/11.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
Current Mirrors
Idea: we only need one reference current to set up all the current sources and sinks needed for a multistage amplifier.
![Page 12: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/12.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
Multistage Amplifiers
Necessary to meet typical specifications for any of the 4 types
We have 2 flavors (NMOS, PMOS) of CS, CG, and CD and the npn versions of CE, CB, and CC (for a BiCMOS process)
What are the constraints?
1. Input/output resistance matching
2. DC coupling (no passive elements to block the signal)
![Page 13: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/13.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
Summary of Cascaded Amplifiers
General goals:
1. Boost the gain parameter (except for buffers)2. Optimize the input and output resistances
RoutRin
Transresistance:
Transconductance:
Current:
Voltage: ∞∞
∞
00
∞
0 0
![Page 14: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/14.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
Start: Two-Stage Voltage Amplifier
• Use two-port models to explore whether the combination “works”
CE1CE2
Results of new 2-port: Rin = Rin1, Rout = Rout2
( ) ( )1 2 1 2 2||v m in out m outA G R R G R= − × −
( )( )1 2 2 1 2||v m m in out outA G G R R R=
CE1,2
![Page 15: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/15.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
Add a Third Stage: CC
Goal: reduce the output resistance(important spec. for a voltage amp)
CE1CE2 CC3
Output resistance:
2 2
3 3
||1 1S o ocout
m m
R r rR
g gβ β= + = +
![Page 16: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/16.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
Using CMOS Stages
CS1CS2 CD3
Output resistance:
Voltage gain (2-port parameter):
Input resistance: ∞
( ) ( )1 1 1 2 2 2|| ||v m o oc m o ocA g r r g r r= − × −
1out
m mb
Rg g
=+
![Page 17: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/17.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
Multistage Current Buffers
CB1 CB2
Are two cascaded common-base stages better than one?
Input resistance: Rin = Rin1
![Page 18: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/18.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
Two-Port Models
( ) 2222022 ||||1 ocSmoutout rRrgrRR π+≅=
Output impedance of stage #1 (large)
( ) ( )02 2 2 2 2 2|| ||out m oc o o ocR r g r r r rπ β≅ =
![Page 19: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/19.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
Common-Gate 2nd Stage
( ) 222022 ||1 ocSmoutout rRgrRR +≅=
( )2 02 2 1 1 21 || ||out out m o oc ocR R r g r r r= ≅ +
![Page 20: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/20.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
Second Design Issue: DC Coupling
Constraint: large inductors and capacitors are not available Output of one stage is directly connected to the input of the next stage � must consider DC levels … why?
3.2V
![Page 21: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/21.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
Alternative CG-CC Cascade
Use a PMOS CD Stage: DC level shifts upward
3.2V
![Page 22: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/22.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
CG Cascade: DC Biasing
Two stages can have different supply currents
Extreme case:IBIAS2 = 0 A
![Page 23: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/23.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
CG Cascade: Sharing a Supply
First stage has no currentsupply of its own � its outputresistance is modified
![Page 24: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/24.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
The Cascode Configuration
DC bias:
Two-port model: first stage has no current supply of its own
Common source / common gatecascade is one version of a cascode(all have shared supplies)
![Page 25: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/25.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
Cascode Two-Port Model
CS1* CG2
Output resistance of first stage = 1,, * oCSdownCSoutrRR ==
Why is the cascode such an important configuration?
2 1 2|| (1 )out oc m o oR r g r r+�
1m mG g=
inR = ∞
![Page 26: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/26.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
Miller Capacitance of Input StageFind the Miller capacitance for Cgd1
Input resistance to common-gatesecond stage is low �gain acrossCgd1 is small.
![Page 27: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/27.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
Two-Port Model with Capacitors
Miller capacitance: 1)1(1 gdvCM CAC
gd−=
1
11 1
2 2
1( || ) 1
gd
mvC m o
m m
gA g r
g g= − ≈ − = −
12M gdC C=
![Page 28: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/28.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
Generating Multiple DC Voltages
Stack-up diode-connected MOSFETs or BJTs and run a reference current through them � pick off voltages from gates or bases as references
![Page 29: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/29.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
Multistage Amplifier Design Examples
Start with basic two-stage transconductance amplifier:
Why do this combination?
![Page 30: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/30.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
Two-Stage Amplifier Topology
Direct DC connection: use NMOS then PMOS
![Page 31: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/31.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
Current Supply Design
Assume that the reference is a “sink” set by a resistor
Must mirror the reference current and generate a sink for iSUP 2
![Page 32: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/32.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
Use Basic Current Supplies
![Page 33: Lecture 22: Multistage Amps - University of …EECS 105Fall 2003, Lecture 22 Prof. A. Niknejad Lecture Outline Finish Current Mirrors An Example Using Cascodes Multistage Amps Cascode](https://reader034.vdocuments.net/reader034/viewer/2022042312/5edab814272674784f04f40e/html5/thumbnails/33.jpg)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 22 Prof. A. Niknejad
Complete Amplifier Topology
What’s missing? The device dimensions and the biasvoltage and reference resistor