Download - Lg 42pg20 Training Manual
Advanced Single Scan Troubleshooting
Training Manual
42PG20 Plasma Display42PG20 Plasma Display
720p720p
Published Fall 2008Updated March 2009
PLASMA Fall 2008 42PG202
Overview of Topics to be Discussed
• UNIFIED Y and Z-SUS Board (Z-SUS Drive signals developed)
• Z-SUS Output Board (Receives Z-SUS signals from Y-SUS Board)• Y-Drive Boards (Receives Y-Drive signals from Y-SUS Board)
• Control Board (Outputs Y and Z control signals to Y-SUS Board)• X Drive Boards (2)
Circuit Board Operation, Troubleshooting and Alignment of :• Switch mode Power Supply
• Main Board
Section 1
Section 2
Contact Information, Preliminary Matters, Specifications,Plasma Overview, General Troubleshooting Steps, Disassembly Instructions, Voltage and Signal Distribution
OUTLINEOUTLINE
NEW
NEW
NEW
PLASMA Fall 2008 42PG203
42PG20 Plasma Display
Section 1
This Section will cover Contact Information and remind the Technician of Important Safety Precautions for the Customers Safety as well as the Technician and the Equipment.
Basic Troubleshooting Techniques which can save time and money sometimes can be overlooked. These techniques will also be presented.
This Section will get the Technician familiar with the Disassembly, Identification and Layout of the Plasma Display Panel.
At the end of this Section the Technician should be able to Identify the Circuit Boards and have the ability and knowledge necessary to safely remove and replace any Circuit Board or Assembly.
Overview of Topics to be DiscussedOverview of Topics to be Discussed
PLASMA Fall 2008 42PG204
IMPORTANT SAFETY NOTICEIMPORTANT SAFETY NOTICE
The information in this training manual is intended for use by persons possessing an adequate background in electrical equipment, electronic devices, and mechanical systems. In any attempt to repair a major Product, personal injury and property damage can result. The manufacturer or seller maintains no liability for the interpretation of this information, nor can it assume any liability in conjunction with its use. When servicing this product, under no circumstances should the original design be modified or altered without permission from LG Electronics. Unauthorized modifications will not only void the warranty, but may lead to property damage or user injury. If wires, screws, clips, straps, nuts, or washers used to complete a ground path are removed for service, they must be returned to their original positions and properly fastened.
CAUTIONCAUTION
To avoid personal injury, disconnect the power before servicing this product. If electrical power is required for diagnosis or test purposes, disconnect the power immediately after performing the necessary checks. Also be aware that many household products present a weight hazard. At least two people should be involved in the installation or servicing of such devices. Failure to consider the weight of an product could result in physical injury.
Preliminary Matters (The Fine Print)Preliminary Matters (The Fine Print)
PLASMA Fall 2008 42PG205
Today’s sophisticated electronics are electrostatic discharge (ESD) sensitive. ESD can weaken or damage the electronics in a manner that renders them inoperative or reduces the time until their next failure. Connect an ESD wrist strap to a ground connection point or unpainted metal in the product. Alternatively, you can touch your finger repeatedly to a ground connection point or unpainted metal in the product. Before removing a replacement part from its package, touch the anti-static bag to a ground connection point or unpainted metal in the product. Handle the electronic control assembly by its edges only. When repackaging a failed electronic control assembly in an anti-static bag, observe these same precautions.
Regulatory InformationRegulatory Information
This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a residential installation. This equipment generates, uses, and can radiate radio frequency energy, and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures: Reorient or relocate the receiving antenna; Increase the separation between the equipment and the receiver; Connect the equipment to an outlet on a different circuit than that to which the receiver is connected; or consult the dealer or an experienced radio/TV technician for help.
ESD NoticeESD Notice (Electrostatic Static Discharge)(Electrostatic Static Discharge)
PLASMA Fall 2008 42PG206
Contact InformationContact Information
Also available on the Also available on the Plasma pagePlasma page
New Training Materials on New Training Materials on the Learning Academy sitethe Learning Academy site
Customer Service (and Part Sales) (800) 243-0000
Technical Support (and Part Sales) (800) 847-7597
USA Website (GSFS) http://gsfs-america.lge.com
Customer Service Website us.lgservice.com
LG Web Training lge.webex.com
LG CS Academy lgcsacademy.com
LG Electronics Alabama, Inc. 201 James Record Road, Huntsville,
AL, 35813.
http://136.166.4.200
Published Fall 2008 by LG Technical Support and Training
32LG40, 32LH30, 37LH55, 42LG60, 42LG70, 42LH20, 42LH40, 42LH50, 42LH90, 42SL80, 47LG90, 47LH85 42PG20, 42PQ20, 42PQ30, 50PG20, 50PS80, 50PS60, 60PS11
LCD-DV:
PLASMA:
Plasma PanelAlignment Handbook
Presentations with Audio/Video and Screen Marks
PLASMA Fall 2008 42PG207
Safety & Handling Regulations
1. Check the appearance of the Replacement Panel and Circuit Boards for both physical damage and part number accuracy.
2. Check the model label. Verify model names and board model matches.
3. Check details of defective condition and history. Example: Y Board Failure, Mal-discharge on screen, etc.
1. Approximately 10 minute pre-run time is required before any adjustments are performed.
2. Refer to the Voltage Sticker inside the Panel when making adjustments on the Power Supply, Y-SUS and Z-SUS Boards.
Always adjust to the specified voltage level (+/- ½ volt).
3. Be cautious of electric shock from the PDP module since the PDP module uses high voltage, check that the Power Supply
and Drive Circuits are completely discharged because of residual current stored before Circuit Board removal.
4. C-MOS circuits are used extensively for processing the Drive Signals and should be protected from static electricity.
5. The PDP Module must be carried by two people. Always carry vertical NOT horizontal.
6. The Plasma television should be transported vertical NOT horizontal.
7. Exercise care when making voltage and waveform checks to prevent costly short circuits from damaging the unit.
8. Be cautious of lost screws and other metal objects to prevent a possible short in the circuitry.
9. New Panels and Frames are much thinner than previous models. Be Careful with flexing these panels. Be careful with lifting Panels from a horizontal position. Damage to the Frame mounts or panel can occur.
Checking Points to be Considered
Plasma OverviewPlasma OverviewPrevious models glass thickness was 2.8mm
This unit 1.8mm thickness
PLASMA Fall 2008 42PG208
Basic Troubleshooting StepsBasic Troubleshooting Steps
Define, Localize, Isolate and Correct
•Define Look at the symptom carefully and determine what circuits could be causing the failure. Use your senses Sight, Smell, Touch and Hearing. Look for burned parts and check for possible overheated components. Capacitors will sometimes leak dielectric material and give off a distinct odor. Frequency of power supplies will change with the load, or listen for relay closing etc. Observation of the front Power LED may give some clues.
•Localize After carefully checking the symptom and determining the circuits to be checked and after giving a thorough examination using your senses the first check should always be the DC Supply Voltages to those circuits under test. Always confirm the supplies are not only the proper level but be sure they are noise free. If the supplies are missing check the resistance for possible short circuits.
•Isolate To further isolate the failure, check for the proper waveforms with the Oscilloscope to make a final determination of the failure. Look for correct Amplitude Phasing and Timing of the signals also check for the proper Duty Cycle of the signals. Sometimes “glitches” or “road bumps” will be an indication of an imminent failure.
•Correct The final step is to correct the problem. Be careful of ESD and make sure to check the DC Supplies for proper levels. Make all necessary adjustments and lastly always perform a Safety AC Leakage Test before returning the product back to the Customer.
PLASMA Fall 2008 42PG209
This section of the manual will discuss the specifications of the 42PG20 Advanced Single Scan Plasma Display Panel.
42PG20 PRODUCT INFORMATION SECTION42PG20 PRODUCT INFORMATION SECTION
PLASMA Fall 2008 42PG2010
42PG20 Specifications42PG20 Specifications
• 720p HD Resolution • Dual XD Engine™• 20,000:1 Contrast Ratio • Fluid Motion • 3x HDMI™ V.1.3 with Deep Color • AV Mode (Cinema, Sports, Game) • Clear Voice • LG SimpLink™ Connectivity • Invisible Speaker System • 100,000 Hours to Half Brightness (Typical) • PC Input
720P PLASMA HDTV42” Class (41.5” diagonal)
PLASMA Fall 2008 42PG2011
Grid to Pixel to Resolution RelationshipGrid to Pixel to Resolution Relationship
Y-Drive“Buffers”
Horizontal Grids
Z-SUS
Horizontal Grids are on “Front” of the Cells as viewed from the front.
Layout below as viewed from the rear.
Where the 3 Grids Intersect is a single Colored Cell
Red, Green and BlueCells make a “Pixel”
Green
Blue
Vertical Grids are in “Back” of the Cells as viewed from the front.
X-BoardsSame as (A-BUS)Initialize the Cell
Deliver Color information
Y-SUSCell Clean up (Y-Drive Edge)
Deliver Luminance Fire Firing the Cell via Wall Charge
Line by Line
Z-SUSFiring the Cell via Wall Charge
All Lines fire at once
Horizontal GridsDetermine Vertical Resolution
Vertical GridsDetermine Horizontal
ResolutionR
edX-Boards“TCPs”
Vertical Grids
PLASMA Fall 2008 42PG2012
HD RESOLUTION 720p HD Resolution Pixels: 1024 (H) × 768 (V)High definition television is the highest performance segment of the DTV system used in the US. It’s a wide screen, high-resolution video image, coupled with multi-channel, compact-disc quality sound.
Logo Familiarization (1 of 4)Logo Familiarization (1 of 4)
FORMATS480I480P1080I720P1080P
InterlacedProgressiveInterlacedProgressiveProgressive
Interlaced2 Fields to make a Frame
ProgressiveEach Field is a Frame
Think of sync as the Panels “Refresh Rate”
240 Lines480 Lines540 Lines720 Lines1080 Lines
NTSCSDHDHDHD
BASICPIXEL COUNTS
PLASMA1365 (H) × 768 (V)
LCD DV1920 (H) x 1080 (V)
Possible FrameRates:24FPS30FPS60FPS
768720P Panel720P Logo
PLASMA Fall 2008 42PG2013
Logo Familiarization (2 of 4)Logo Familiarization (2 of 4)
HD RESOLUTION 720p HD Resolution Pixels: 1024 (H) × 768 (V)High definition television is the highest performance segment of the DTV system used in the US. It’s a wide screen, high-resolution video image, coupled with multi-channel, compact-disc quality sound.
HDMI (1.3 Deep Color) Digital multi-connectivity HDMI (1.3 Deep color) provides a wider bandwidth (340MHz, 10.2Gbps) than that of HDMI 1.2, delivering a broader range of colors, and also drastically improves the data-transmission speed.
Dual XD EngineRealizing optimal quality for all imagesOne XD Engine optimizes the images from RF signals as another XDEngine optimizes them from External inputs. Dual XD Engine presents images with optimal quality two times higher than those of previous models.
LG SIMPLINK™ MULTI-DEVICE CONTROL Allows for convenient control of other LG SimpLink products using the existing HDMI connection.
PLASMA Fall 2008 42PG2014
Logo Familiarization (3 of 4)Logo Familiarization (3 of 4)
AV Mode "One click" - Cinema, Sports, Game mode.TAKE IT TO THE EDGE is a true multimedia TV with an AV Mode which allows you to choose from 3 different modes of Movies, Video Games and Sports by a single click of a remote control.
Clear Voice Clearer dialogue sound Automatically enhances and amplifies the sound of the human voice frequency range to provide high-quality dialogue when background noise swells.
Save Energy, Save MoneyHome electronic products use energy when they're off to powerfeatures like clock displays and remote controls. Those that haveearned the ENERGY STAR use as much as 60% less energy toperform these functions, while providing the same performance at thesame price as less-efficient models. Less energy means you pay lesson your energy bill. Draws less than 1 Watt in stand by.
PLASMA Fall 2008 42PG2015
Logo Familiarization (4 of 4)Logo Familiarization (4 of 4)
Tru-Surround is a sound-scheme that has the ability to take multi-channel encoded sources, such as Dolby Digital, and reproduce the multi-channel surround effect by just using two-speakers. The result is not as impressive as true Dolby Digital 5.1 (the front and side surround effects are impressive, but the rear surround effects fall a little short, with the sense they are coming from just to rear of your head rather than from the back of the room).
Dolby® DigitalIn thousands of cinemas and millions of homes worldwide, Dolby Digital is the reigning standard for surround sound technology in general and 5.1-channel surround sound in particular.
FluidMotion (180 Hz Effect)
Invisible SpeakerPersonally tuned by Mr. Mark Levinson for LG TAKE IT TO THE EDGE newly introduces ‘Invisible Speaker’ system, guaranteeing first class audio quality personally tuned by Mr. Mark Levinson, world renowned as an audio authority. It provides Full Sweet Spot and realistic sound equal to that of theaters with its Invisible Speaker.
Enjoy smoother, clearer motion with all types of programming such as sports and action movies. The moving picture resolution give the impression of performance of up to 3x the panels actual refresh rate.
PLASMA Fall 2008 42PG2016
PDP180Hz
LCD60Hz
Moving Picture Response Time is 16.5 milliseconds
(120Hz takes MPRT to 8.25ms)
Panel Response Time is 4 to 8 milliseconds
Moving Picture Response Time is 5.44 milliseconds
Panel Response Time is less than 1 millisecond
FluidMotion (180 Hz Effect)Enjoy smoother, clearer motion with all types of programming such as sports and action movies. The moving picture resolution give the impression of performance of up to 3x the panels actual refresh rate.
42PG20 Specifications FluidMotion Familiarization42PG20 Specifications FluidMotion Familiarization
PLASMA Fall 2008 42PG2017
42PG20 Remote Control42PG20 Remote Control
TOP PORTION
BOTTOM PORTION
PLASMA Fall 2008 42PG2018
Rear Input JacksRear Input Jacks
15.8"400mm
26.7"678.2mm
6.2"158mm
40.9"1038.9mm
28.8"731.5mm
28.8"731.5mm
3.4"86.4mm
12.1"307.3mm
Center
15.8"400mm
6.6"168.78mm
1.93"49mm
Remove 4 screws to remove stand for
wall mount
Model No.Serial No.
Label
15.55"394.95mm
12.4"315mm
4.72"120mm
17.48"443.95mm
Weight without Stand: 53.7 lbWeight with Stand: 60.2 lb
19
42PG20 Product Dimensions42PG20 Product Dimensions
PLASMA Fall 2008 42PG2020
This section of the manual will discuss Disassembly, Layout and Circuit Board Identification, of the 42PG20 Advanced Single Scan Plasma Display Panel.
Upon completion of this section the Technician will have a betterunderstanding of the disassembly procedures, the layout of the printedcircuit boards and be able to identify each board.
DISASSEMBLY SECTIONDISASSEMBLY SECTION
PLASMA Fall 2008 42PG2021
Removing the Back CoverRemoving the Back Cover
To remove the back cover, remove the 26 screws(The Stand does not need to be removed).
Indicated by the arrows.
PAY CLOSE ATTENTION TO THE TYPE, SIZE AND LENGTHOf the screws when replacing the back cover. Improper type can
damage the front.
PLASMA Fall 2008 42PG2022
Circuit Board LayoutCircuit Board Layout
Y-SUS & Z-SUS DriveZ-SUS
Right “X”Left “X”
Main “Digital”
FPC
Control “Logic”
Power Supply
FPC
FPC
FPC
FPC
FPC
Panel ID LabelPanel Voltage Label
SideInput(part
ofmain)
Y-Drive
Control Keys
PowerButton
Invisible Speakers
TCPHeat Sink
Z drive from Y-SUS
PLASMA Fall 2008 42PG2023
Switch Mode Power Supply Board Removal
Disconnect the following Connectors: P812, P813, CN101Remove the 8 screws holding the Board in placeRemove the BoardWhen replacing, be sure to readjust the Va/Vs voltages in accordance with the Panel Label.Confirm VSC, -Vy and Zbias as well.
Y-SUS Board Removal
Y-Drive Board Removal
Notes: 1) All Plugs listed are from left to right Pin 1,2, 3, ETC.2) Remember to be cautious of ESD as some semiconductors are CMOS and prone to static failure
Disassembly Procedure for Circuit Board RemovalDisassembly Procedure for Circuit Board Removal
Disconnect the following Connectors: P201, P801, P101, P202Remove the 8 screws holding the Board in placeRemove the BoardWhen replacing, be sure to readjust the Va/Vs voltages in accordance with the Panel Label.Confirm VSC, -Vy and Zbias as well.
Disconnect the following Flexible Ribbon Connectors: P1, P2, P3, P4, P5, P6, P7 and P8Disconnect the following Connectors: P201, P801, P101, P202Remove the 3 screws holding the Board in placeRemove the Board by lifting slightly and sliding the Board to the left unseating P204 and P200 from the Y-SUS Board
PLASMA Fall 2008 42PG2024
Z-SUS Board Removal
Main Board Removal
Control Board Removal
Disassembly Procedure for Circuit Board Removal (2)Disassembly Procedure for Circuit Board Removal (2)
Remove the support frame holding the Main BoardDisconnect the following Connector: P1Remove the 3 screws holding the Board in place and Disconnect the following Connectors: P2 and P3Remove the Board.When replacing, be sure to readjust the Va/Vs voltages in accordance with the Panel Label.Confirm VS, -Vy and Zbias as well.
Disconnect the following Connectors: P701, P302, P303 and JK501Remove the 2 screws holding on the decorative plastic piece on the right sideRemove the 4 screws holding the Board in place and Remove the Board.
Disconnect the following Connectors: P121, P160, P161 and P162Remove the 4 screws holding the Board in place Remove the Board.
X-Drive Boards RemovalDisconnect the following Connectors: P232, P211, P311 and P331Remove the 13 screws holding the Heat Sink in placeDisconnect the following Connectors: P201 through P206 and P301 through P306Remove the 4 screws holding each of the X Drive Boards in place (8 total)Remove the Boards.
Disconnect the single Connector P101. Remove the 2 screws holding the Board in place Remove the Board. (Note: Power Board is behind the Control Board. Remove it’s 2 screws and remove.
Control Button Board Removal
PLASMA Fall 2008 42PG2025
X Board Removal (continued)
Lay the Plasma down carefully on a padded surface.Make sure AC is removed and remove the Back Cover and the Stand.Carefully remove the LVDS Cable P121 from the Control Board by pressing the Locking Tabs together and Pull the Connector straight back to remove the cable see illustration below. (This prevents damage).
(A) Remove the Stand mounting support plastic piece. (B) Remove the Stand Metal Support Bracket, unplug AC ground lug. (C) Remove the 2 screws from the decorative black plastic piece around side input jacks (Marked B) and remove. (D) Remove the 2 screws at the top of the Main Board Mounting Bracket and peel the tape from the bottom. Remove
Connector P303 and JK501. Carefully reposition the Main Board and Mounting Bracket up and off to the right side. (E) Remove the metal support Brackets marked “E”.(F) Remove the 13 screws holding the Heat Sink and carefully lift it straight up and off (remember that the TCP IC’s are
located under the HEAT SINK ).
X-DRIVE Boards REMOVAL:Disconnect all TCP ribbon cables from the defective X-Drive Board. Remove the 5 screws holding the Board in place.Remove the Board. Reassemble in reverse order. Recheck Va/Vs/VScan/-VY/Z-Drive.
X Circuit Board Removal ContinuedX Circuit Board Removal Continued
Press Inward
Press Inward
LVDS Cable Connector
PLASMA Fall 2008 42PG2026
X Board Removal
X Board Removal will require the most disassembly of all the boards. All the Brackets and Assemblies marked with “A~F” will need to be removed this includes the Stand. Before an X Board can be removed the Heat Sink Assembly “F” must be removed.
X Circuit Board RemovalX Circuit Board Removal
Y and Z-SUS DriveZ-SUS
E
Right “X”Left “X”
Main “Digital”
Control “Logic”
Power Supply
Y-Drive
E
B
F
D
C
A
PLASMA Fall 2008 42PG2027
Left and Right X Drive RemovalLeft and Right X Drive Removal
Showing the tape on the Connectors P232 or P331
Peel the tape off the Connectors
Gently pry the locking mechanism upward
Gently lift the locking mechanism upward on all TCP Connectors P201~206 or P301~306
Carefully lift the TCP ribbon up and off the cushion and out of the way.
TCPFlexible ribbon
cable
After removing the back cover, Main Board is lifted out of the way, 15 screws removed from heat sink covering TCPs and heat sink removed, the X-Drive Boards can be removed.
Cushion
PLASMA Fall 2008 42PG2028
TCP (Tape Carrier Package) PrecautionsTCP (Tape Carrier Package) Precautions
TCP Connector Removal
Lift up the lock as shown by arrows.(The Lock can be easily broken.It needs to be handled carefully.)
Pull TCP apart as shown by arrow.(TCP Film can be easily damaged.Handle with care.)
PLASMA Fall 2008 42PG2029
Left and Right X Drive RemovalLeft and Right X Drive Removal
Remove the 5 screws for either Board or 9 total for both. (The Center screw secures both Boards)
Right X Board drive the left side of the screen
Left X Board drives the right side of the screen
Display PanelHorizontal Address
P100
5V
FloatingGround
NEW
Y-SUSPWB
With Z-DriveP204
P201
P801
P211
P101
P202
Drive DataClock (i2c)
P200
M5V, Va, Vs
P812
P813CN101
STB +5V, 16V
SMPSTurn On
Commands
SMPSPWB
ACInputFilter
NEW
P1
SMPS OUTPUT VOLTAGES
Set Off: STB +5V, 16V
Z-SUSDrive Signals
Logic SignalsP160
AC Voltage Det
P701
P302
P303JK501
MAINPWB
Speakers
ControlKeys
PowerKeys
X-PWB-RightX-PWB-Left
P201 P202 P203 P204 P205 P206 P301 P302 P303 P304 P305 P306
RGB Logic Signals
15V, Va
RGB Logic Signals
3.3V
CONTROLPWB
P162
LVDS
Y Drive PW
B
Z SU
S PW
B
P161
P121
P1P2
P3
P4P
5P6
P7P
8
P2P
3
Out
puts
Onl
y
P232 P211 P311 P331
Display Panel Vertical Address
IR
Vs
Display PanelHorizontal Address
5V Relay OnM5 OnVS On
Set On: 16V
30
42PG20 Voltage and Signal Distribution Block Diagram42PG20 Voltage and Signal Distribution Block Diagram
PLASMA Fall 2008 42PG2031
42PG20 Plasma Display
This Section will cover Circuit Operation, Troubleshooting and Alignment of the Power Supply, Y-SUS Board, Y-Drive Boards, Z-SUS Board, Control Board, Main Board and the X Drive Boards.
At the end of this Section the technician should understand the operation of each circuit board and how to adjust the controls. The technician should be able with confidence to troubleshoot a circuit board failure, replace the defective circuit and perform all necessary adjustments.
CIRCUIT OPERATION, TROUBLESHOOTING AND CIRCUIT CIRCUIT OPERATION, TROUBLESHOOTING AND CIRCUIT ALIGNMENT SECTIONALIGNMENT SECTION
Remember, the Z-SUS Drive section is now located on the Y-SUS Board.But it will be described separately.
PLASMA Fall 2008 42PG2032
(1) Model Name(2) Bar Code(3) Manufacture No.(4) Adjusting Voltage DC, Va, Vs(5) Adjusting Voltage (Set Up / -Vy / Vsc / Ve / Vzb)(6) Trade name of LG Electronics(7) Manufactured date (Year & Month)(8) Warning
Panel Label ExplanationPanel Label Explanation
(9) TUV Approval Mark(10) UL Approval Mark(11) UL Approval No.(12) Model Name(13) Max. Watt (Full White)(14) Max. Volts(15) Max. Amps
PLASMA Fall 2008 42PG2033
ADJUSTMENT ORDER “IMPORTANT”DC VOLTAGE ADJUSTMENTS1) SMPS Board: Vs Va (Always do SMPS first)2) Y-SUS Board: Adjust –Vy, Vscan, 3) Z-SUS Board: Adjust ZbiasWAVEFORM ADJUSTMENTS1) Y-SUS Board: Ramp Up, Ramp Down
Adjustment NoticeAdjustment Notice
It is critical that the DC Voltage adjustments be checked when ever;1) SMPS, Y-SUS or Z-SUS Board is replaced.2) Panel is replaced, since the SMPS does not come with new panel3) A Picture issue is encountered4) As a general rule of thumb when ever the back is removed
Remember, the Voltage Label MUST be followed, it is specific to the panel’s needs.
All label references are from a specific panel. They are not the same for every panel encountered.
-VY Z_BIAS
Panel“Rear View”
ManufacturerBar Code
Set-Up
VeVscanThe Waveform adjustment is only necessary1) When the Y-SUS Board is replaced2) When a “Mal-Discharge” problem is encountered3) When an abnormal picture issues is encountered
When ever a new Board is received from parts,CENTER ALL ADJUSTMENT POTS before installing the Board.
Example: If Ramp Up on the Y-SUS is too high, the set will shut down.
PLASMA Fall 2008 42PG2034
• DC Voltages developed on the SMPS• Adjustments VA and VS.
• Always refer to the Voltage Sticker located on the back of the panel, in the upper Left Hand side for the correct voltage levels for the VA, VS, -VY, Vscan, and Z Bias as these voltages will vary from Panel to Panel even in the same size category.
• Set-Up and Ve are just for Label location identification and are not used with this panel.
-VY Vscan Z_BIAS
42PG20
SWITCH MODE POWER SUPPLY SECTIONSWITCH MODE POWER SUPPLY SECTION
This Section of the Presentation will cover troubleshooting the Switch Mode Power Supply for the Single Scan Plasma. Upon completion of the section the technician will have a better understanding of the operation of the Power Supply Circuit and will be able to locate voltage and test points needed for troubleshooting and alignments.
Panel“Rear View”
ManufacturerBar Code
Set-Up
Ve
PLASMA Fall 2008 42PG2035
42PG20
SMPS P/N EAY43533901
Check the sticker on the upper left side to confirm origin of the Panel or the White Label on the Power Supply itself to identify the Board P/N.
We will examine the Operation of the EAY43533901.
Switch Mode Power Supply Part NumberSwitch Mode Power Supply Part Number
PLASMA Fall 2008 42PG2036
3
5
7
9
11
13
15
17
19
21
Gnd
0V
Gnd
5V
5V
Gnd
Gnd
5_V Det
RL_ON
M5V_ON
2
4
6
8
10
12
14
16
18
20
22
16.5V
Gnd
0V
Gnd
5V
5V
Gnd
Gnd
AC Det
VS_ON
Gnd
1 16.5V
Power Supply Board LayoutPower Supply Board Layout1
2
3
4
5
67
8
9
10
Vs
Vs
n/c
GND
GND
Va
Va
GND
M5V
M5V
P812
P813
Hot Ground Symbol represents a SHOCK Hazard
PLASMA Fall 2008 42PG2037
The Switch Mode Power Supply Board Outputs to the :
VAY-SUS Board
Main Board
VS
M5V VCC
Primarily responsible for Display Panel Vertical Grid
Drives the Display Panel Horizontal Grid
Used to develop Bias Voltages on the Y-SUS,X Drive, and Control Boards
16V Audio B+ Supply
5V Signal Processing Circuits
Adjustments
There are 2 adjustments located on the Power Supply Board VA and VS. The 5V VCC is pre-adjusted and fixed. All adjustments are made with relation to Chassis Ground. Use “Full White Raster” 100 IRE
VA
VS
RV901
RV951
Switch Mode Power Supply OverviewSwitch Mode Power Supply Overview
PLASMA Fall 2008 42PG2038
Main FuseF101
VS VR951
AC InputCN 101
P812
380VSource
AC Input
VS Source
VA SourceStandbySource
16v, 5vSource
IC701Sub Micon
VA VR901
P813
10Amp/230V
Switch Mode Power Supply Circuit LayoutSwitch Mode Power Supply Circuit Layout
PFCCircuit
340V FuseF801
10Amp/230V
To Y-Z-SUS
To MAIN
PLASMA Fall 2008 42PG2039
Power Supply Operation and Troubleshooting
AC Voltage is supplied to the SMPS Board at Connector CN101 from the AC Input Filter. Standby 5V is developedfrom 340V source supply (which during standby measures 159V hot ground). This supply is also used to generate all other voltages on the SMPS.
The 5V (standby) voltage is routed to the Sub Micon circuit (IC701) on the SMPS and through P813 to the Main Board for Micon (IC100) operation. LD703 will glow green to indicate STBY 5V has arrived.AC detect Pin 18, P813 is generated on the SMPS by monitoring the AC input and rectifying a small sample voltage. This AC Detect Voltage is routed to (IC701) the Sub Micon on the SMPS and the Micon (IC100) located on the Main Board and is used as a basic “SMPS OK” signal.
When the Micon (IC100) on the Main Board receives an “ ON “ Command from either the Keyboard or the Remote IR Signal it outputs a high to RL-ON. This signal first turns on a DC level shifter Q706 which creates 5V General. LD703 now glows amber indicating 5V General has been generated. This 5V General now provides the pull up voltages when supply the output circuits to the SMPS. The RL-ON enters the SMPS Board at Pin 19 of P813. The RL-ON Voltage is sensed by the Sub Micon (IC701) circuit which causes the Relay Y-Drive Circuit to close Relay RL101 bringing the PFC source up to full power by increasing the 159V standby to 340V. At this time the 16V source becomes active and sent to the Main Board via P813.
The next step is for the Micon (IC105) on the Main Board to output a high on M5V_ON Line to the SMPS at P813 Pin 21which is sensed by the Sub Micon IC (IC701) on the SMPS turning on the 5V VCC line.
The last step to bring the supply to “Full Power” occurs when the Micon (IC100) on the Main Board brings the VS-ON line high at Pin 20 of P813 on the SMPS Board which when sensed by the Sub Micon IC (IC701) turns on the VA and VS Supplies (VA is brought high before VS).
Power Supply Basic OperationPower Supply Basic Operation
PLASMA Fall 2008 42PG2040
Understanding the Power On Sequence when Troubleshooting a possible Power Supply Failure will simplify the process of isolating which circuit board failed to operate properly. In this Section we will investigate the Power on Sequence and examine ways to locate quickly where the failure occurred.
Check the Power On LED for Operation. A Red LED indicates a presence of 5V STB and AC-ON/DETECT.Failure of the Power ON LED to light is an indication of loss of 5V STB or AC ON/ Detect remember the 5V STBand AC-ON/DETECT are developed on the SMPS and sent to the Main Board. Check LD703 for Green glow.
When Power is pressed, look for LD703 to change to Amber. Listen for Relay Click, the click of the Relay is an indication of RL-ON going high. RL-ON is sent from the Main Board to the SMPS and when present the IC701 controls the Relay Operation. RL-ON going High and no Relay is a failure of the SMPS, RL-ON staying low is a failure of the Main Board.
Relay Operation means that the SMPS if working properly will output the 16V Supply to the Main Board.This voltage will allow the Tuner, Audio and Video Circuits on the Main Board to function, and if connected to anAntenna Input, Audio would be present. If the Relays closed and these supplies failed suspect a problem with the SMPS.
The next step of operation calls for the M5V_ON line from the Main Board to the SMPS to go high on P813 pin 21. A high on the M5V_ON Line activates the 5V VCC line. Loss of 5V VCC results in no “Raster”, no Display Panel Reset, no Y, Z, Control or X Board operation. Loss of 5V VCC and M5V_ON going high could be caused by any of these boards or failure of the SMPS. M5V_ON staying low indicates a problem on the Main Board.
Remember if a voltage is missing check for proper resistance before proceeding
VS-ON is the last step of the Power Sequence and is responsible for bringing the VS and VA Voltages up. The VS-ON signal pin 20 P813 is sent from the Main Board to the SMPS as a high, VS and VA and full operation of theDisplay Panel are now enabled. Loss of VS-ON results in loss of VA and VS and no Raster, no Panel Display Reset but Audio would be present. If VS-ON went high and VS and VA where missing the problem could be causedby a failure on the SMPS or a circuit using these voltages. A Resistance check should narrow the possiblefailures quickly.
Power Supply Generic Troubleshooting TipsPower Supply Generic Troubleshooting Tips
M5V (DC Voltage)To Y-SUS, then to
Control PWB.
Vs/Va (DC Voltage)
To Y-SUS, Z-SUSVa routed to X-PWBs
AC In
Stand By 5V
Power Button
RemoteOr Key
AC Det.
ResetsMain Board
Turns on Green LED
Relay On
Relay On
SignalProcessing
M5V On
Vs On
Microprocessor or
BCM
M5V Reg
Vs Reg
Va Reg
12V/16V Regulators
5V Det.
5V Reg
StandBy 5V Reg
1
23 55 6 7 9
8
10
2
5
4
Both LEDs OnLooks Amber
At point TV is in Stand-By state. Energy Star compliant.Less than 1 Watt
5
5 9
7In Stand-By
Primary side is 90V
In Run (Relay On) Primary side is
370V
3
Turns on Red LED
3
12V
AC Det.
7
9
41
42PG20 Start Up Sequence Block Diagram42PG20 Start Up Sequence Block Diagram
42PG20 Power Supply Controls from Micro Side
R1045
R184
AC-DET
IO11A
2 1Y
143.3V
128
P701
R727
R717
R723R718
R715
R763
RL-ON
R1265V-MNT 17 5V-DET
R722R720
R142 R141
C142C143
68010K
SW100
Vcc
R135
+5V-General
C713
Q703
C701
IC101
D100
IC104
254
255
X10012Mhz
Vcc
9 10 11 12+5V-ST
Level Shifter
LD703Set Off +5VST Red
Set On 5VGen Amber
22
Gnd
Q706+5V-General 46
5RL-ON
LD7031.8V1.6V
IC100
RedGreen
32
R137 R6070
0Ω33Ω
R764VS-On
R13620167
33Ω
M5V-On21
RL-On19
AC-Det18
80
115
VS-On
M5V-On 166
RL-On 76
42
42PG20 Power Supply Controls (Microprocessor Side) 42PG20 Power Supply Controls (Microprocessor Side)
AC-Det
Reset
42PG20 Power Supply Controls from Micro Side 1st STEP
115INT
R184AC-DET
AC-DET
IO11A2 1Y
143.3V
128HW-RESET
P701
18R727
AC-DET
R142 R141
C142C143
68010K
SW100
Vcc
R135
C713
IC101
D100
IC104
254
255
X10012Mhz
Vcc
9 10 11 12
Gnd
22
IC100
+5V-ST
RL-ON
LD703
1.8V
Red
5V-SBY Arrives from SMPS
AC-DET Arrives from SMPSMicro Receives Vcc
AC-DET createsMicro Reset
Oscillator starts
LED703 receives 5VST and glows Red
AB
B
A
A
D
A
CSW 100 Manual Micro. Reset
AC-DET isMonitored
by uP
43
42PG20 Power Supply Controls (Microprocessor Side) Stand-By42PG20 Power Supply Controls (Microprocessor Side) Stand-By
ReceivesPower On CommandFrom Side Keys or
Remote
42PG20 Power Supply Controls from Micro Side 2nd STEP
P701
118
9 10 11 12+5V-STQ706Level Shifter
46
LD7031.8V1.6V
Red
5
119
KEY CONTROLS
IC100Micro
114 REMOTEIR In
R764VS-On
76Pull-Up
R1265V-MNT 17 5V-DET
R722R720
R13620
+5V-General
C701
Green
Appears Amber
R137M5V-On
R607021
0ΩM5V-On
76R1045
RL-ONR717
R718
R715
+5V-ST
19R763
RL-ON
RL-ON
Q703
22
RL-ON
To other circuts
Turns on Q706Creates 5V General
LD703 Lights Red and Green
Outputs M5V On command which turns on the M5V regulator on SMPS
5V General allows 5V DetectTo be Generated
Outputs VS-On which turns on Va and Vs in the Power Supply
A
C
B
B
D
B
B
32
Outputs Relay On (RL-ON) commandTurns on Power Supply RelayTurns on 16V Power Supply
B
+5V-General
116V 2B
44
42PG20 Power Supply Controls (Microprocessor Side) Run42PG20 Power Supply Controls (Microprocessor Side) Run
16633Ω
33Ω
VS_VA-ON 16733Ω
PLASMA Fall 2008 42PG2045
This test can confirm the proper operation of the SMPS without the need to exchange the board.This Power Supply can operate in a No Load State. This means that by applying AC power to CN101 and all other plugs disconnected, this power supply will function. Simply removing P813 (Lower Right Hand Side of the Board), will cause the “AUTO” Pin 22 to go high from its normal low state allowing the Power Supply to go to full power on mode whenAC Power is Supplied. Be careful after this test and make sure the VA and VS lines have discharged before reconnecting the supply cables.
Switch Mode Power Supply Static TestSwitch Mode Power Supply Static Test
If the Y-SUS, Z-SUS and X Boards are working normal, when the SMPS comes up to full power on,
“Display Panel Reset” will be visible. Shorting the Auto Pattern Gen. test points at this time shouldresult with test patterns on the screen.
If either Y-SUS or Z-SUS is causing the power supply to shutdown, unplug the Z-SUS.(Remember, Vs is routed to the small vertical Z-SUS Board [P1 pin 11] for the output FETs.)This will allow the Y-SUS to function. Also, if you unplug the Y-SUS from the SMPS andjump the 5V VCC line to any 5V location on the Control Board the Control Board will function.
For a “Stand-Alone” static test for the Power Supply, apply the usual 2 100Watt light Bulbs test on the Vs output line for a simulated load. If the Power Supply operates in this condition, it is assured it can maintain its output power under load.
PLASMA Fall 2008 42PG2046
SMPS Static (Light Bulb) Load TestSMPS Static (Light Bulb) Load Test
PLASMA Fall 2008 42PG2047
2
4
6
8
10
12
14
16
18
22
16V
Gnd
NC
Gnd
5VSTB
5VSTB
Gnd
Gnd
AC Det
VS_ON
Auto Gnd
20
3
5
7
9
11
13
15
17
19
21
Gnd
NC
Gnd
5VSTB
5VSTB
Gnd
Gnd
5_V Det
RL_ON
M5V_ON
1 15V
P813
AC Power Applied AC Det (Pin 18) and 5V STB (Pins 9 ~ 12) are 5V.
100Ω ¼ watt resistor added from 5V STB (Pins 9 ~ 12) to RL ON (Pin 19) closes relay RL101 turning on the 16V Supply
100Ω ¼ watt resistor added from 5V STB (Pins 9 ~ 12) to VS _ON (Pin 20) brings the VA and VS Lines high
100Ω ¼ watt resistor added from 5V STB (Pins 9 ~ 12) to M5V_ ON (Pin 21) brings the 5V VCC line high
Ground the Auto Ground (Pin 22) on P813 Remove AC between each test step
Switch Mode Power Supply Static Test (Forcing on the SMPS in staSwitch Mode Power Supply Static Test (Forcing on the SMPS in stages)ges)
PLASMA Fall 2008 42PG2048
Va and Vs AdjustmentsVa and Vs AdjustmentsPanel Voltage Label Pull P813
Apply AC PowerPower Supply Starts.
This Power Supply will come up and run with
“NO” load.P812 pulled.
Use Full White Raster
Y-Z-SUS Runs “Yes”Both Y and Z waveforms
Generated “Yes”
Vs TPP812
Pin 1 or 2
Va TPP812
Pin 5 or 6
PLASMA Fall 2008 42PG2049
Standby Run ResistanceConnector Pin Number
CN101 120VAC 120VAC 480K
CN101 and P812 Pin ID and VoltagesCN101 and P812 Pin ID and Voltages
1 and 3
Voltage and Diode Mode Measurements for the SMPS.All voltages from a working unit. All resistance from disconnected Board.
1.37V5VM5V10
1.47V5VM5V9
Gnd0VGnd8
Open*65VVa7
Open*65VVa6
Gnd0VGnd5
n/cn/cn/c4
Gnd0VGnd3
Open*195VVs2
Open*195VVs1
Diode ModeRun LabelPinP812 Connector "Power Supply Board“ to Y-SUS
There are No Stand-By Voltages
* Note: This voltage will vary in accordance with Panel Label
Diode Mode Readings with all Connectors Disconnected using the Diode mode on the DVM using the Diode mode on the DVM
PLASMA Fall 2008 42PG2050
Voltage and Diode Mode Measurements for the SMPS
Diode Mode Readings with all Connectors Disconnected using the Diode mode on the DVM
P803 Odd Pins ID and VoltagesP803 Odd Pins ID and Voltages
Open5V0V0VAUTO22
Open0V3.24V0VM5V_ON21
Open0V3.2V0VVs_On20
Open0V3.73V0VRL_On19
2.3V5V5V5VAC Det18
1.92V5V5V0V5_V Det17
GndGndGndGndGnd13-16
1.43V5V5V5V5V9-12
GndGndGndGndGnd7-8
OpenNCNCNCNC5-6
GndGndGndGndGnd3-4
1.5V16.5V16.5V0V15V1-2
Diode ModeNo LoadRun STBYLabelPin
P813 Connector "SMPS" to P701 "Main Board"
PLASMA Fall 2008 42PG2051
(2) Va or Vs Short: Power LED is lit Red in stand by. At Power On, goes to Blue. Relay closes. Power LED Blinks twice and 3rd blink stays blue. Relay opens. Power Supply outputs STBY 5V. 16V goes to 0V. 5Vcc drops to 1.7V. No Va or Vs. With Relay closed, 330V OK, then when relay opens, it drops to 155V.
Using the Front Power LED for visual cluesUsing the Front Power LED for visual clues
(3) 16V Short: Power LED is lit Red in stand by. At Power On, Power LED cycles Red and Blue. Relay clicks rapidly on and off. STBY 5V line toggles with relay from 2.2V to 5V.
(4) 5Vcc Short: Power LED is lit Red in stand by. At Power On, goes to flashing Blue. 5Vcc line toggles rapidly between 0V to 0.7V.
(1) STBY 5V Short: Power LED does not light in stand by. No Power button function.
PLASMA Fall 2008 42PG2052
This Model “Combines” the Y and Z-SUS Drive Board together.
This Section of the Presentation will cover troubleshooting the Y-SUS Board for the SingleScan Plasma. Upon completion of the Section the technician will have a betterunderstanding of the operation of the circuit and will be able to locate voltage andresistance test points needed for troubleshooting and alignments.
OperatingOperating VoltagesVoltages
SMPS Supplied VA VS VCC M5V
Y-Z-SUS Developed -VY V SET UP VR602V SET DN VR601VSC16V
VA supplies the Panel Vertical Grid VS Supplies the Panel Horizontal Grid5V Supplies Bias to Y-Z-SUS, Control via the Y-SUS
-VY Sets the Negative excursion of the Y-SUS Drive WaveformRamp UP sets Pitch of the Top Ramp of the Drive Waveform V Set Down sets the Pitch of the Bottom Ramp of the Drive WaveformVSC Set the amplitude of the complex waveform.To the X-Drives Board and the TCP IC’s
YY--SUS BOARD SECTIONSUS BOARD SECTION
• Adjustments• DC Voltage and Waveform Checks• Resistance Measurements
Overview
PLASMA Fall 2008 42PG2053
Diagram of Y-Sustain Board
YY--SUS Block DiagramSUS Block Diagram
Generates Vsc and -Vyfrom Vs by DC/DC Converters Also controls Ramp Up/Down
Control Board
Circuits generate Y-SUStain Waveform
Distributes 5V VS Distributes 5V
Logic signals needed to
generate drive waveform
Distributes 16V and VA
Receive 5V VCC, Va, Vsfrom SMPS
Transfer Waveformto Y-Drive Board
Z-SUS Section on theSame Board
Right X Board
Display Panel
Power Supply Board - SMPS
FETs amplifY-SUStainWaveform
Left X Board
PLASMA Fall 2008 42PG2054
P204
VS and VA Input from the SMPS
-VY ADJ VR502
P201
VSC ADJ VR501
RAMPVR 602
P200
FS202 (Vs)4A 250V VSC-VY
To Y-Drive
To Y-Drive
V SET DN VR 601
YY--SUS Board LayoutSUS Board Layout
P801
Logic Signals from the Control Board
P202
16V and Va to Left and Right X Boards
Logic (Drive) Signals to the Y-Drive Boards
Use Y-Drive Waveform TP
VSC TPR211
-VY TPR210
Z Drive to Z Output Board
P101
Z-Bias ADJ VR905
FS701 (Va)10A
FS2015A
ZBias TP R946
PLASMA Fall 2008 42PG2055
Y-SUSTAIN ADJUSTMENT DETAILS
VSC and VSC and --VY AdjustmentsVY Adjustments
LowerLeft SideOf Board
These are DC levelVoltage Adjustments
VSC-VY
LowerLeft Sideof Board
VSC TPR211
MiddleLeft Sideof Board
-Vy TPR210
Voltage Reads Positive
VR501
Vsc TP
VR502 -Vy TP
Set should run for 15 minutes, this is the “Heat Run” mode.Set screen to “White Wash” mode or 100 IRE White input.
Adjust –Vy to 190V (+/- 1V)Adjust VSC to 140 (+/- 1V)
+-
+-
Heat Run, Vs, Va adjustments should have been completed.
PLASMA Fall 2008 42PG2056
YY--Drive (SCAN) Signal OverviewDrive (SCAN) Signal Overview
Y-Drive Board Test Point
Overall signal observed 2mS/div
Highlighted signal from figure above observed 200uS/div
Highlighted signal from figure above observed
100uS/div NOTE: If Vset DN too high, this set will go to excessive bright, then shutdown.To correct, remove the LVDS from control Board and make necessary adjustments.
PLASMA Fall 2008 42PG2057
Observing (Capturing) the YObserving (Capturing) the Y--Drive Signal for Drive Signal for VsetupVsetup RampRamp--Up (RAMP)Up (RAMP)
Fig 1 Top: As an example of how to lock in to theY-Drive Waveform. Fig 1 top shows the signal locked in at 4ms per/div. The signal for Vsetup is outlined within the Waveform
Fig 2 Top: At 2ms per/div. the signal for Vsetup is now easier to recognize. It is outlined within the Waveform
Fig 3 Top: At 1ms per/div. the signal for Vsetup is now clearly visible. It is outlined within the Waveform
Fig 3 Lower: At 40uSec per/division, the adjustment for Vsetup can be made.
Fig 2 Lower: At 100uSec per/division, the waveform to use for Vsetup Is now isolated.
Fig 1 Lower: At 400uSec per/division, the waveform to use for Vsetup Is now isolated.
FIG1
FIG2
FIG3
Area tobe adjusted
Area to be adjustedZoomed out
Area tobe adjusted
Outlined Area
PLASMA Fall 2008 42PG2058
Observing (Capturing) the YObserving (Capturing) the Y--Drive Signal for Drive Signal for VsetdnVsetdn (Ramp(Ramp--Down)Down)
Fig 1 Top: As an example of how to lock in to the Y-Drive Waveform. Figure 1 top shows the signal locked in at 4ms per/div.The outlined signal for Vsetdn is outlined within the Waveform
Fig 1 Top: At 2ms per/div. the outlined signal for Vsetdn is now easier to recognize. It is outlined within the Waveform
Fig 1 Top: At 1ms per/div. the outlined signal for Vsetdn is now clearly visible. It is outlined within the Waveform
Fig 1 Lower: At 40uSec per/division, the adjustment for Vsetdn can be made.
Fig 1 Lower: At 100uSec per/division, the waveform to use for Vsetdn Is now isolated.
Fig 1 Lower: At 400uSec per/division, the waveform to use for Vsetdn Is now isolated.
FIG1
FIG2
FIG3
Area tobe adjusted
Area tobe adjusted
Area to be adjustedZoomed out
Outlined Area
PLASMA Fall 2008 42PG2059
Y-SUSTAIN ADJUSTMENT DETAILS(Vs, Va, VSC, VSC, -Vy and Z-Bias Must have already been completed).
Observe the Picture while making these adjustments.
Normally, they do not have to be
done.
VV--Set Up (RAMP) and VSet Up (RAMP) and V--Set Down AdjustmentsSet Down Adjustments
Y-Drive Board Test Point
PLASMA Fall 2008 42PG2060
Very little alteration to the picture, the wave form indicates adistorted Vset UP. The peek widens due to the Vset UPpeeking too quickly.
The center begins to wash out and arc due to Vset UPPeeking too late and alters the start of the Vset DN phase.
Panel Waveform Adjustment
Ramp (Vset UP) too high
Ramp (Vset UP) too low
V Set Up Too High or LowV Set Up Too High or LowVset UP swing is Minimum 150vP/P Max 220vP/P
PLASMA Fall 2008 42PG2061
All of the center washes out due to increased Vset_DN time.
The center begins to wash out and arc due to decreased Vset DN time.
Panel Waveform Adjustment
Vset DN too low
Vset DN too high
V Set V Set DnDn Too High or LowToo High or LowVset Dn swing is Minimum 60uS Max 123uS
NOTE: If Vset DN too high, this set will go to excessive bright, then shutdown.To correct, remove the LVDS from control Board and make necessary adjustments.
PLASMA Fall 2008 42PG2062
V Set V Set DnDn Too High Causing ShutdownToo High Causing Shutdown
The above image is the Set Down signal set for Normal operation at 110uSec
The above image is the Set Down signal set to High (Approx. 120uSec) This is the Shutdown Threshold level. Any higher, the set will shut down.
Notice that the amplitude of the Set Down (Bottom portion) peak begins to decrease.
TimeTime
Peak
GOOD NO GOOD
NOTE: If Vset DN too high, this set will go to excessive bright, then shutdown.To correct, remove the LVDS from Control Board and make necessary adjustments.
50V per Division
5V per Division
50V per Division
5V per Division
Peak
PLASMA Fall 2008 42PG2063
Voltage and Diode Mode Measurements
Diode Mode Readings with all Connectors Disconnected using the Diode mode on the DVM using the Diode mode on the DVM
YY––SUS P201 to SMPS P812 Plug InformationSUS P201 to SMPS P812 Plug Information
* Note: This voltage will vary in accordance with Panel Label
.83V5VM5V10
.83V5VM5V9
Gnd0VGnd8
Open*65VVa7
Open*65VVa6
Gnd0VGnd5
Gnd0VGnd4
NCNCNC3
Open*194VVs2
Open*194VVs1
Diode ModeRun LabelPin
P201 Connector "Y-SUS" to "Power Supply Board" P812
There are No Stand-By Voltages
PLASMA Fall 2008 42PG2064
Voltage and Diode Mode Measurements for the Y-SUS Board
Diode Mode Readings with all Connectors Disconnected using the Diode mode on the DVM using the Diode mode on the DVM
YY--SUS P202 to X Drive P211 and P311 Plug InformationSUS P202 to X Drive P211 and P311 Plug Information
* Note: This voltage will vary in accordance with Panel Label
Open*64.9VVa12
Open61.5VER111
Open61.5VER110
1V15.8V15V9
GndGndGnd8
GndGndGnd7
Open64.9VVa6
Open61.5VER25
Open61.5VER24
1V15.8V15V3
GndGndGnd2
GndGndGnd1
Diode ModeRun LabelPin
P202 Connector "Y-SUS Board" to "X-Drive” Left P211 and Right P311
There are No Stand-By Voltages
PLASMA Fall 2008 42PG2065
Voltage and Diode Mode Measurements for the Y-SUS Board
Diode Mode Readings with all Connectors Disconnected using the Diode mode on the DVM using the Diode mode on the DVM
YY--SUS P801 to Z Drive P1 Plug InformationSUS P801 to Z Drive P1 Plug Information
* Note: This voltage will vary in accordance with Panel Label
Open70.46VZSUS11
GndGndGnd10
Open70.46VZSUS9
GndGndGnd8
Open70.46VZSUS7
GndGndGnd6
Open70.46VZSUS5
GndGndGnd4
Open70.46VZSUS3
GndGndGnd2
Open*194V+Vs1
Diode ModeRun LabelPin
P801 Connector Y-SUS to Z Drive P1 Plug Information
There are No Stand-By Voltages
PLASMA Fall 2008 42PG2066
Voltage and Diode Mode Measurements for the Y-SUS Board
P101 YP101 Y--SUS to Control Board P160 Plug InformationSUS to Control Board P160 Plug Information
These Connector pins are too close to read without possible damage to the Board
Actually a 60 Pin Connector "Only Labels for 1-19" on the Control Board
Looking closely, these test points are “every other pin”. The bottom TP represents “19”label on the Control Board.
PLASMA Fall 2008 42PG2067
Diode Mode Readings with all Connectors Disconnected using the Diode mode on the DVM using the Diode mode on the DVM
YY--SUS P101 to Control P160 Plug InformationSUS P101 to Control P160 Plug Information
2.87V0.26VSET_UP20
GndGndGnd19
2.87V2VER_UP18
GndGndGnd17
2.87V1.2VER_DN16
GndGndGnd15
2.87V2VSUS_UP14
GndGndGnd13
2.87V0VSUS_DN12
GndGndGnd11
2.87V0.6VDATA10
GndGndGnd9
2.87V3VOSC28
GndGndGnd7
2.87V0VOSC16
GndGndGnd5
2.87V0.76VSTB4
GndGndGnd3
2.87V3.2VCLK2
GndGndGnd1
DiodeModeRun LabelPin
0.76V4.75V5V40
n/cn/cn/c39
2.87V0.6VY-Enable38
GndGndGnd37
2.87V2.9VX_ER36
GndGndGnd35
2.87V1.4VSet_DN_234
GndGndGnd33
2.87V1.9VSET_UP32
GndGndGnd31
2.87V0VSLOPE_RETE30
GndGndGnd29
2.87V0VDET_LEVEL28
GndGndGnd27
2.87V0.16VDELTA_Vy26
GndGndGnd25
2.87V0.2VPASS_TOP24
GndGndGnd23
2.87V0.2VSet_DN222
GndGndGnd21
Diode ModeRun LabelPin
GndGndGnd60
1.1V1.15VZ-SUS_DN59
GndGndGnd58
1.1V0.35VZ-SUS_UP57
GndGndGnd56
1.1V1.35VZ-ER_DN55
GndGndGnd54
1.1V1.25VZ-ER_UP53
GndGndGnd52
1.1V0VVZB-SEL51
GndGndGnd50
1.1V1.71VZ-BIAS49
GndGndGnd48
1.25V0VZ-ENABLE47
n/cn/cn/c46
n/cn/cn/c45
0.76V4.75V5V44
0.76V4.75V5V43
0.76V4.75V5V42
0.76V4.75V5V41
Diode ModeRun LabelPin
(All 5V Lines 17~21 Resistance readings are 1.7K) Pin 1 on Y-SUS is Pin 60 on Control
There are No Stand-By Voltages
PLASMA Fall 2008 42PG2068
YY--SUS How to Check the Output FETsSUS How to Check the Output FETs
Name is printed on the components.
30F122
Forward 0.5V ~ 0.7VReverse: OL
30F122
Forward 0.4V ~ 0.5VReverse: OL
RF2001
Forward 0.3V ~ 0.5VReverse: OL
RF2001
Forward 0.3V ~ 0.5VReverse: OL
45F123
Forward 0.3V ~ 0.5VReverse: OL
45F123
Forward 0.9V ~ 1.0VReverse: OL
PLASMA Fall 2008 42PG2069
Y-Drive Board works as a path supplying the Sustain and Reset waveforms which are made in the Y-SUSTAIN Board and sent to the Panel through SCAN DRIVER IC’s.
The Y-Drive Boards supply a waveform which selects the horizontal electrodes sequentially.
* 42PG20 uses 8 DRIVER ICs on 1 Y-Drive Board
YY--DRIVE SECTIONDRIVE SECTION
Y-Drive WAVEFORM
To facilitate scope attachment, solder a small wire (Stand Off) at this point.
PLASMA Fall 2008 42PG2070
5 Volts, Y-Drive and Logic Signals from Y-SUS Board are supplied to the Drive Board on Connectors P200.Logic Signals from P100.
YY--Drive Board IDDrive Board ID
P100
+5V
P200
Y-Drive and Logic Signals (Clock and Data) from the
Y-SUS Board
TOP BOTTOM
Check 5V supply using FL1 or C18.Measured from Floating Ground
Floating Ground from the Y-SUS Board
PANEL SIDE
Y-SUS SIDE
Floating Ground from the Y-SUS Board
Y-Drive Sig(Scan)
PLASMA Fall 2008 42PG2071
YY--Drive P200 Drive P200 Voltage ReadingsVoltage Readings
Back and Front of Back and Front of Connector Identical. Connector Identical. All voltages taken All voltages taken from Floating from Floating Ground. Ground.
Warning: Do not Warning: Do not hook scope ground hook scope ground up unless set up unless set plugged into an plugged into an isolation isolation transformer.transformer.
SCANSCAN
5V Floating Ground5V Floating Ground
PLASMA Fall 2008 42PG2072
To remove the Ribbon Cable from the Connector first carefully lift the Locking Tab fromthe back and tilt it forward ( lift from under the tab as shown in Fig 1). The locking tab must be standing straight up as shown in Fig 2.Lift up the entire Ribbon Cable gently to release the Tabs on each end. (See Fig 2)Gently slide the Ribbon Cable free from the Connector.
To reinstall the Ribbon Cable, carefully slide it back into the slot see ( Fig 3 ), be sure the Tab is seated securely and press the Locking Tab back to the locked position see ( Fig 2 then Fig 1).
Removing (Panel) Flexible Ribbon from YRemoving (Panel) Flexible Ribbon from Y--DriveDrive
Flexible Ribbon Cables shown are from a different model, but proFlexible Ribbon Cables shown are from a different model, but process is the same.cess is the same.
Fig 1 Fig 3Fig 2
Gently Pry Up Here
Locking tab in upright position
Be sure ribbon tab is releasedBy lifting the ribbon up slightlyBefore removing ribbon.
PLASMA Fall 2008 42PG2073
The Ribbon Cable is clearly improperly seated into the Connector. You can tell by observing the linearity.
The Locking Tab will offer a greater resistance to closing in the case.
Note the cable is crooked. In this case the Tab on the Ribbon cable was improperly seated at the bottom. This can cause bars, lines, intermittent lines abnormalities in the picture.
Remove the ribbon cable and re-seat it correctly.
YY--Drive Flexible Ribbon Incorrectly SeatedDrive Flexible Ribbon Incorrectly Seated
PLASMA Fall 2008 42PG2074
Using the “Diode Test” on the DVM, check the pins for shorts or abnormal loads.
YY--Drive Buffer Troubleshooting (Input Side)Drive Buffer Troubleshooting (Input Side)YOU CAN CHECK YYOU CAN CHECK Y--DRIVE USING THIS PROCEDURE.DRIVE USING THIS PROCEDURE.
RED LEAD ON “B”BLACK LEAD ON “A”
FORWARD READING 0.73V
REVERSE READING “OPEN”OL
+-
+
-
BACK or FRONT SIDE OF
Y-DRIVE Board
Any
where
A
B
VSC
n/c
FLOA
TING
GN
D
n/cOsc2 InOsc1 In
LE InCLK In
DATA Inn/cn/c
+5V
BLACK LEAD ON “B”RED LEAD ON “A”
Additional Readings
RED LEAD ON “B”
0.57V Black on Osc20.59V Black on Osc10.58V Black on LE0.60V Black on CLK0.78V Black on DATA0.50V Black on +5V
BLACK LEAD ON “B”
OL Red on Osc2OL Red on Osc1OL Red on LEOL Red on CLKOL Red on DATAOL Red on +5V
VSCAN CHECK
PLASMA Fall 2008 42PG2075
Using the “Diode Test” on the DVM, check the pins for shorts or abnormal loads.
YY--Drive Buffer Troubleshooting (Output Side)Drive Buffer Troubleshooting (Output Side)
RED LEAD ON Buffer IC
BLACK LEAD ON “ANY”OUTPUT LUG.
READING 0.73 V
OUTPUT LUGS
BLACK LEAD ON Buffer IC
RED LEAD ON “ANY”OUTPUT LUG.
READING “OPEN”
YOU CAN CHECK ALL 8 Buffer ICs USING THIS PROCEDUREYOU CAN CHECK ALL 8 Buffer ICs USING THIS PROCEDURE
• Any of these output lugs can be tested.
• Look for shorts indicating a defective Buffer IC
Indicated by white outline
BACK SIDE OF Y-DRIVE Board
Indicated by white outline
+-
+ -
FloatingGround
96 Output Pins
96 Output Pins per/Buffer
8 Ribbon cables (Horizontal Grids)
768 Total Horizontal Grids controlling Vertical resolution48 48
PLASMA Fall 2008 42PG2076
• DC Voltage and Waveform Test Points• Z BIAS Alignment• Resistance Test Points
Operating Voltages Operating Voltages Y-SUS Supplied VA VS 5V Vcc
Developed on Y-SUS Z Bias
This Section of the Presentation will cover troubleshooting the Z-Drive section of the Y-Z-SUS Board Assembly. Upon completion of this section the Technician will have a better understanding of the circuit and be able to locate voltage and resistance test points needed for troubleshooting and alignment.
ZZ--SUS BOARD SECTION OF THE YSUS BOARD SECTION OF THE Y--SUS BOARDSUS BOARD
Locations Locations
PLASMA Fall 2008 42PG2077
VS and VA Input from the SMPS
P201
FS202 (Vs) 4A 250V
ZZ--SUS Section Layout on the YSUS Section Layout on the Y--SUS BoardSUS Board
P801
Logic Signals from the Control Board
P202 16V and Va to Left and Right X Boards
VZ (Z-Bias)
Z Drive to Z-SUS Output Board
P101FS701 (Va)
10A
FS201 (5V)5A
VZ (Z-Bias) TP R946
ZBias TP R946
Read the Label on the back of the upper left hand side of the panel.
Adjust R946 to that voltage.
Z-SUSSection
Y-SUSSection
Y-SUSOutput
ICs
Z-Bias ADJ VR905
No IPMs
+ -
PLASMA Fall 2008 42PG2078
Provides the SUSTAIN PULSE and ERASE PULSE for generating SUSTAIN discharge in the panel by receiving Drive signals from the Y-Z-SUS Board.
This waveform is supplied to the panel through FPC (Flexible Printed Circuit).
Scope Probe connect point bottom leg of R1 to check Z
Output waveform
ZZ--SUS WaveformSUS Waveform
Z-Bias is a “DC” adjustment.The effects of this adjustment can beobserved on the scope looking at theZ-SUS output.
Z-SUS Board
This Waveform is just for reference to observe the effects of Zbz adjustment
Vzb voltage+- 1V100V
Z Drive Waveform
(Vzb) Z Bias VR905
2 mS/div
Note: The VzbAdjustment is aDC level adjustment
100uS/div
PLASMA Fall 2008 42PG2079
ZBias TP R946+ -
VZ (ZVZ (Z--Bias) AdjustmentBias) Adjustment
P801ToZ-SUS
VZ (Z-Bias)
VZ (Z-Bias) TP R946
Read the Label on the back of the upper left hand side of the panel.
Adjust R946 to that voltage.
Set should run for 15 minutes, this is the “Heat Run” mode.Set screen to “White Wash” mode or 100 IRE White input.
Adjust VZ (Z-Bias) to 100V (+/- 1V
PLASMA Fall 2008 42PG2080
VS VS is input at P1 pin 1 and supplied to the FETs.
Input Voltages from the YInput Voltages from the Y--SUS BoardSUS Board
ZZ--SUS Board UnderstandingSUS Board Understanding
The ZThe Z--SUS Board in this model is only a small vertical board with outpSUS Board in this model is only a small vertical board with output FETs.ut FETs.Drive waveforms are generated on the YDrive waveforms are generated on the Y--SUS Board.SUS Board.
Z Drive Signals to Power FET’s
Input Signals from the YInput Signals from the Y--SUS BoardSUS Board
PLASMA Fall 2008 42PG2081
Diagram of Z-SUSTAIN Section on the Board
ZZ--SUS Section (On YSUS Section (On Y--SUS Board) Block DiagramSUS Board) Block Diagram
Circuits generate erase,sustain waveforms
Generates Z Bias 100V
Distributes Logic Signals
M5V, VA, VS
FET Makes Drive waveform Display Panel
Via FPC
(flexible printed circuit )
Control Board
Y-SUS Board
Z-SUS FETs
Via P801 to P1
NO IPMs
Z-SUS Board
Z-SUS Section of the Y-SUS Board Receives
VS, VA, M5V
PLASMA Fall 2008 42PG2082
Diode Mode Readings with all Connectors Disconnected using the Diode mode on the DVM
YY--SUS P801 Connector to ZSUS P801 Connector to Z--SUS P1 Voltage and Diode Mode CheckSUS P1 Voltage and Diode Mode CheckVoltage and Diode Mode Measurements
* Note: This voltage will vary in accordance with Panel Label
Open70.46VZSUS11
GndGndGnd10
Open70.46VZSUS9
GndGndGnd8
Open70.46VZSUS7
GndGndGnd6
Open70.46VZSUS5
GndGndGnd4
Open70.46VZSUS3
GndGndGnd2Open*194V+Vs1
Diode ModeRun LabelPin
P801 Connector "Y-SUS Board" to "Z-SUS Out" P1
There are No Stand-By Voltages
PLASMA Fall 2008 42PG2083
CONTROL BOARD SECTIONCONTROL BOARD SECTION
• DC Voltage and Waveform Test Points• Resistance Test Points
Signals Signals
Y-SUS Supplied 5V VCC
Developed on the 1.8VControl board (2) 3.3V
This Section of the Presentation will cover troubleshooting the Control Board Assembly. Upon completion of this section the Technician will have a better understanding of the circuit and be able to locate voltage and resistance test points needed for troubleshooting.
Main Board Supplied LVDS Signal
Operating Voltages Operating Voltages
PLASMA Fall 2008 42PG2084
Control Board IdentifiedControl Board Identified X001Crystal
TempLEDs
P162P161
P160
LVDS
ToY-Z-SUS
To X Drive Left To X Drive Right
P164 P131
IC201MCM
P121
IC212
IC213
IC121
IC101
IC211
IC171IC122
IC133
AUTO GEN TESTPATTERN
Download Connection
To P101Y-SUS
5V
Part NumberLabel
3.3V0V
n/c
5V
3.3V
0V
IC171 Pin 1 ---- 3.29VPin2 ---- 1.20v Pin 3 ---- 0V
3.3V
VS_DA3V ~3.3V
PLASMA Fall 2008 42PG2085
Control Board PictorialControl Board Pictorial
IC121Pin 1 – 4.75VPin 2 – 3.3VPin 3 – 0V
Note: P812 on SMPS P201 on Y-SUS
IC122Pin 1 – 4.75VPin 2 – 3.3VPin 3 – 0V
PLASMA Fall 2008 42PG2086
Control Board TestingControl Board Testing
For quick Board test.(All Board ConnectorsDisconnected).
Jump 5V from PowerSupply to IC121 Pin 1.If the Temp LED lights,Pretty much guaranteed, Board is OK.
Quick observationOf Temp. LEDsTell if the ControlBoard is running.
When the Television has a problem related to;1) Shutdown caused by Main Board2) No PictureThis can be checked by the following. (1) Disconnect the Main Board from all Connectors. Apply AC power. Since P813 is not connected, the set will come on. Short the two pins on the Auto Test Pattern lands. If there is a picture of cycling colors, the Y-SUS, Y-Drive, Z-SUS, Power Supply, Control Boards and Panel are all OK. Same test for (2) to tell if the No Video is caused by the Main Board.
Confirm B+ to Control BoardVS_DAControl Board Check3V ~ 3.3V
PLASMA Fall 2008 42PG2087
Check the output of the Oscillator package. The frequency of the sine wave is 50 MHZ.Missing this clock signal can halt operation of the unit
Osc. Check: 50Mhz
Checking the Crystal Checking the Crystal ““ClockClock””
DC Voltage Check1.5V ~ 1.8V
PLASMA Fall 2008 42PG2088
LVDSVideo Signals from the Main Board to the Control Board are referred to as Low Voltage Differential Signals or LVDS. Their presence can be confirmed with the Oscilloscope by monitoring the LVDS signals with no input signal selected while pressing the Menu Button “on” and “off” with the Remote Control or Keypad. Loss of these Signals would confirm the failure is on the Main Board!
Example of Normal Signals measured at 200mv/cm at 5µs/cm.
Menu Off Menu ON
LVDS CableP121 on Control Board shown.Press two outside tabs inward to release.
Control LVDS SignalsControl LVDS Signals
1
3
5
7
9
11
13
15
17
19
21
2
4
6
8
10
12
14
16
18
20
22
Connector P302 Configuration - indicates signal pins.
P302 on Main Board
PLASMA Fall 2008 42PG2089
This Picture shows Signal Flow Distribution to help determine the failure depending on where the it shows on the screen.
The Control Board supplies Video Signals to the TCP (Tape Carrier Package) ICs.
If there is a bar defect on the screen, it could be a Control Board problem.
MCM
16 line
Resistor Array
256 Lines output Total
Basic Diagram of Control Board Control Board to X Board Address Signal Flow
IC201
Control Board Signal BlockControl Board Signal Block
MCM
DRAM
DRAMDRAM
EEPROM
2 Buffer Outputs per TCP
CONTROL Board
X-DRIVE Board
PANEL
128 Lines per Buffer
PLASMA Fall 2008 42PG2090
The LVDS Cable has two “Interlocks” that must be disengaged to remove the LVDS Cable.
To Disengage, press the two Locking Tabs Inward and pull the plug out.
Removing the LVDS Cable from the Control BoardRemoving the LVDS Cable from the Control Board
Press Inward
Press Inward
PLASMA Fall 2008 42PG2091
Voltage and Diode Mode Measurements for the Control Board
Diode Mode Readings with all Connectors Disconnected using the Diode mode on the DVM
Control Connector P121 (LVDS) to Main Board P302Control Connector P121 (LVDS) to Main Board P302
GndGnd31
Open3.29V29
1.3V3.29V27
1V1.2V25
2.4V5.29V23
1V0V21
GndGnd19
1V0V17
1V0V15
GndGnd13
1V1.15V11
1V0V9
1V1.26V7
1V1.19V5
1V0V3
GndGnd1
Diode ModeRunPin
P121 Connector Odd Pins "Control" to P302 “Main”
Open0V30
Open3.29V28
GndGnd26
1V1.26V24
2.5V0.56V22
1V0.21V20
1V0V18
1V0V16
Gnd0V14
1V1.26V12
1V0V10
1V1.19V8
Gnd0V6
1V1.26V4
1V0V2
Diode ModeRunPin
P121 Connector Even Pins "Control” to P302“Main”
There are No Stand-By Voltages
PLASMA Fall 2008 42PG2092
Control Board Connector P160 to YControl Board Connector P160 to Y--SUS P101 Voltage and Diode Mode CheckSUS P101 Voltage and Diode Mode Check
P160 These pins are very close together. When taking Voltage measurements use Caution.
In other words, there is a ground between each pin except the +5V area.
Actual Pin 1 (ground) 2 (Z-SUS-DN) 3 (ground) 4 (Z-SUS-UP) 5 (ground), etc….
Remember, this Connector has many more pins than the labels indicate.
This shows the Pin Labeling that is shown on the silk screening.
This Connector is a little confusing in its labeling.It is actually a 60 pin Connector.
This labeling refers to P160 pin ID. This too has ground between each pin. These are responsible for Z Drive signals.
14 Pins related to Z-SUS
39 Pins related to Y-SUS
Pins 17, 18, 19, 20 and 21 Deliver +5V to the Control Board from the Y-SUS. Easy to check using 20th hash mark.
20th hash mark.
FL111 and FL112 5V Fuse
PLASMA Fall 2008 42PG2093
1.06V4.75V5V20
1.06V4.75V5V19
1.06V4.75V5V18
1.06V4.75V5V17
n/cn/cn/c16
n/cn/cn/c15
1.31V0VZ-ENABLE14
GndGndGnd13
1.31V1.71VZ-BIAS12
GndGndGnd11
1.31V0VVZB-SEL10
GndGndGnd9
1.31V1.25VZ-ER_UP8
GndGndGnd7
1.31V1.35VZ-ER_DN6
GndGndGnd5
1.31V0.35VZ-SUS_UP4
GndGndGnd3
1.31V1.15VZ-SUS_DN2
GndGndGnd1
Diode ModeRun LabelPin
GndGndGnd40
1.34V0.2VSet_DN239
GndGndGnd38
1.34V0.2VPASS_TOP37
GndGndGnd36
1.34V0.16VDELTA_Vy35
GndGndGnd34
1.34V0VDET_LEVEL33
GndGndGnd32
1.34V0VSLOPE_RETE31
GndGndGnd30
1.34V1.9VSET_UP29
GndGndGnd28
1.34V1.4VSet_DN_227
GndGndGnd26
1.33V2.9VX_ER25
GndGndGnd24
1.33V0.6VY-Enable23
n/cn/cn/c22
1.06V4.75V5V21
Diode ModeRun LabelPin
GndGndGnd60
1.34V3.2VCLK59
GndGndGnd58
1.34V0.76VSTB57
GndGndGnd56
1.34V0VOSC155
GndGndGnd54
1.34V3VOSC253
GndGndGnd52
1.34V0.6VDATA51
GndGndGnd50
1.34V0VSUS_DN49
GndGndGnd48
1.34V2VSUS_UP47
GndGndGnd46
1.34V1.2VER_DN45
GndGndGnd44
1.34V2VER_UP43
GndGndGnd42
1.34V0.26VSET_UP41
Diode ModeRun LabelPin
Diode Mode Readings with all Connectors Disconnected using the Diode mode on the DVM using the Diode mode on the DVM
Control P160 to YControl P160 to Y--SUS P101 Plug InformationSUS P101 Plug Information
(All 5V Lines 17~21 Resistance in Ohms readings are 1.7K) Pin 1 on Control is Pin 60 on Y-SUS
There are No Stand-By Voltages
PLASMA Fall 2008 42PG2094
Voltage and Diode Mode Measurements can’t be made.
P161 Connector "Control Board" to "X Drive Left" P232
These pins are covered in silicon
P162 Connector "Control Board" to "X Drive Right" P331
These pins are covered in silicon
Control Board Connector P161 and P162 to XControl Board Connector P161 and P162 to X--Drive BoardsDrive Boards
PLASMA Fall 2008 42PG2095
Control Board Connectors to X Drive BoardControl Board Connectors to X Drive Board
Power Cables
(Va, 15V)
Signal cable
Between Ctrl. B/D and XBetween Ctrl. B/D and X--B/D measurements canB/D measurements can’’t be made.t be made.
P161 P161 P162 P162
P331P331P232P232
P211P211 P311P311
PLASMA Fall 2008 42PG2096
LEFT AND RIGHT XLEFT AND RIGHT X--BOARD SECTIONBOARD SECTION
RECEIVED:Va: (Voltage for Address) received from the Y-SUS board15V: received from the Y-SUS boardDrive signals (Color): Received from the Control Board for the Vertical Grids to the TCPs.
DEVELOPED:Developed on the X-Drive boards: VPP to help with over all current draw during “No Video” times when the panel is being driven. VPP shuts off the TCPs during this time. VPP is generated using Va and a drive signal from the Control board.
X-BOARDS CONTROL THE VERTICAL GRIDS WHICH DETERMINE THE HORIZONTAL PIXEL COUNT.TOTAL HORIZONTAL GRIDS 2304. TOTAL HORIZONTAL PIXELS 768
Total Buffer Count = 24(TCPs = 12 @ 2 Buffers per/TCP)
Total Output Pins = 3072 (128 per Buffer X 24 total)
Total Pixels (Horizontal) 1024(3072 / 3) Three cells per pixel (Red, Green and Blue)
PLASMA Fall 2008 42PG2097
Left and Right X Drive (ALeft and Right X Drive (A--BUS)BUS)
TCP IC’s shown are part of the Ribbon CableTCP IC
TCP IC
Warning: DO NOT attempt to run the set with the Heat Sink over the TCPs removed. After a very short time, these ICs will begin to self destruct due to overheating.
PLASMA Fall 2008 42PG2098
TCP (Tape Carrier Package)TCP (Tape Carrier Package)
PLASMA Fall 2008 42PG2099
TCP ICs receive RGB 16 bit signal to the PDP by connecting the PAD Electrode of the PANEL with the X Board.
TCP
Connector
Fram
e
X_B/D
Front panel H
orizontal A
dd
ressRear pa
nel Vertical A
dd
ress
TCP (Tape Carrier Package)TCP (Tape Carrier Package)
Control Board
Back side of Ribbon
Connector into X-Drive
To PanelY-SUS Board
Va and 16V
PLASMA Fall 2008 42PG20100
TCP TestingTCP Testing
Typical Reading 0.65VOpposite reads open
5 10 15 20 25 30 35 40 45 501
On any Gnd
On any Va4,5,6,7,44,45,46,47
10,11,12,13,14,27,28,29,30,37,38,39,40,41
Look for any TCPs being discolored.Ribbon Damage. Cracks, folds Pinches, scratches, etc…
Va VaGnd Gnd-
+
PLASMA Fall 2008 42PG20101
TCP Visual Observation. Damaged TCPTCP Visual Observation. Damaged TCP
This damaged TCP can,a) Cause the Power Supply to shutdownb) Generate abnormal vertical barsc) Cause the entire area driven by the TCP to be “All White”d) Cause the entire area driven by the TCP to be “All Black”e) Cause a “Single Line” defect
Warning: DO NOT attempt to run the set with the Heat Sink over the TCPs removed. After a very short time, these ICs will begin to self destruct due to overheating.
PLASMA Fall 2008 42PG20102
Voltage and Diode Mode Measurements for the X Drive Board
Diode Mode Readings with all Connectors Disconnected using the Diode mode on the DVM
X Drive Left Connector P211 Voltage and Diode Mode CheckX Drive Left Connector P211 Voltage and Diode Mode Check
* Note: This voltage will vary in accordance with Panel Label
Open*64.9VVA8
Open*61.4VVPP/ER17
Open*61.4VVPP/ER16
n/an/an/c5
n/an/an/c4
Open15.4V15V3
GndGndGnd2
GndGndGnd1
Diode ModeRun LabelPin
P211 Connector "X Drive Left" to "Y-SUS" P202
There are No Stand-By Voltages
PLASMA Fall 2008 42PG20103
Voltage and Diode Mode Measurements for the X Drive Board
Diode Mode Readings with all Connectors Disconnected using the Diode mode on the DVM
X Drive Right Connector P311 Voltage and Diode Mode CheckX Drive Right Connector P311 Voltage and Diode Mode Check
* Note: This voltage will vary in accordance with Panel Label
Open*64.9VVA8
Open*61.4VVPP/ER27
Open*61.4VVPP/ER26
n/an/an/c5
n/an/an/c4
Open15V15V3
GndGndGnd2
GndGndGnd1
Diode ModeRun LabelPin
P311 Connector "X Drive Right" to "Y-SUS" P202
There are No Stand-By Voltages
PLASMA Fall 2008 42PG20104
Voltage and Diode Mode Measurements for the X Drive Board
X Drive Left and Right Connector P232 and P331X Drive Left and Right Connector P232 and P331
Voltage and Diode Mode Measurements for these Connectors are difficult to read.They are too close together for safe test.
The pins are also protected by a layer of tape to prevent the tab from being released causingseparation from the Cable and the Connector.
PLASMA Fall 2008 42PG20105
OperatingOperating VoltagesVoltages SMPS Supplied
This Section of the Presentation will cover troubleshooting the Main Board. Upon completion of this Section the technician will have a better understanding of the operation of the circuit and will be able to locate voltage and resistance test points needed for troubleshooting and alignments.
5V3.3V (2)2.5V1.8V
5V12V16V
Developed on the Main Board
• DC Voltage and Waveform Checks• Resistance Measurements
MAIN BOARD SECTIONMAIN BOARD SECTION
PLASMA Fall 2008 42PG20106
Main Board Layout and IdentificationMain Board Layout and Identification
TunerIC100
Microprocessor
Component inputs
LVDSTo Control
RGB/PC
P701
P302
P303 AVIn3
To Power Supply
HDMI inputs
RS232
SPK Out
To Front
Controls
JK501
X40025 Mhz
X10012 Mhz
Audio
Audio RGB/DVI
ResetSW100
IC702
OpticalAudio
USB
HDMI 3
Remote
A/V Composite inputs
LD400
LD703
Pin 1
Pin 16
PLASMA Fall 2008 42PG20107
Main Board Back Side (Regulator Checks)Main Board Back Side (Regulator Checks)
MAIN Board
BACK SIDE
VIEW
IC705IC709
IC706
IC101
IC708
while the Board is turned over.
Location
IC501
Bottom Leg Pin 1
IC805
Be sure to prevent the Board from touching the frame
Use a piece of cardboard or towel to insulate.
IC7051) 5V2) 3.29V3) 0V
IC5011) 3.3V2) 1.8V3) 0V
IC7061) 5V2) 2.6V3) 1.37V
IC8051) 5V2) 3.3V3) 0V
IC7081) 5V2) 3.31V3) 0V
IC1011) 5V2) 0V3) 5V
IC7091) 3.29V2) 1.26V3) 0V
PLASMA Fall 2008 42PG20108
Main Board Tuner Check (Shield Off) Pins ExposedMain Board Tuner Check (Shield Off) Pins Exposed
LD400Tuner Osc.
LockOn UnlockedOff Locked
X400Tuner
ControllerOsc.
IC400Tuner
Controller
VIF Pin 16 Video Test Point
SIF Pin 14 Audio Test Point
Pin 3 Tuner B+ (5V)
PLASMA Fall 2008 42PG20109
MAIN Board
Main Board Tuner Video and SIF Output CheckMain Board Tuner Video and SIF Output Check
Tuner Location1Vp/p 20uSec rate
Pin 16 “Video”Signal
Pin 14 “SIF”Signal
850mVp/p 20nSec rate
USING COLOR BAR SIGNAL INPUTSDA/SCL (5V p/p)
only when changing channels.
PLASMA Fall 2008 42PG20110
Voltage and Diode Mode Measurements for the Main Board
Diode Mode Readings with the Board Disconnected. DVM in the Diode mode.
Main Board Plug P302 Main Board Plug P302 ““LVDSLVDS”” Voltage and Diode CheckVoltage and Diode Check
Open3.29V25
1.01V0.58V23
0.83V1.24V21
1.17V1.24V19
1.17V1.22V17
1.17V1.27V15
1.17V1.25V13
1.17V1.25V11
1.97V3.29V9
GndGnd7
GndGnd5
Open0V3
Open0V1
Diode ModeRunPin
P302 Connector "Main" Odd Pins to P121 "Control"
GndGnd26
1.5V3.29V24
1.17V1.18V22
1.17V1.21V20
1.17V1.25V18
1.17V1.21V16
1.17V1.21V14
1.17V1.21V12
1.97V3.29V10
GndGnd8
GndGnd6
Open0V4
Open0V2
Diode ModeRunPin
P302 Connector "Main" Even Pins to P121 "Control"
There are No Stand-By Voltages
PLASMA Fall 2008 42PG20111
Voltage and Diode Mode Measurements for the Main Board
Diode Mode Readings with all Connectors Disconnected using the Diode mode on the DVM. DVM in the Diode mode.
Main Board Plug P303 VoltagesMain Board Plug P303 Voltages
121110987654321
Pin
GndGndGndGnd1.03V3.84V0VRed_GGndGndGndGnd
1.12V0V0VRed_RGndGndGndGnd
0.75V5V5VSTBY-5VGndGndGndGnd
1.18V3.29V0VKey 1GndGndGndGnd
1.18V3.29V0VKey 2GndGndGndGnd
2.99V5V5VIRDiode ModeRun STBY
P303 Connector "MAIN Board" to "Front Keys"
PLASMA Fall 2008 42PG20112
Voltage and Diode Mode Measurements for the Main Board P701
Main Board Plug P701 Voltage and Diode CheckMain Board Plug P701 Voltage and Diode Check
Resistance Readings with the Board Disconnected. DVM in the Diode mode.
P701
Gnd0V0VAUTO22
Open3.24V0VM5V_ON21
1.22V3.2V0VVs_On20
Open3.73V0VRL_On19
Open5V5VAC Det18
3.25V5V0V5_V Det17
GndGndGndGnd13-16
0.75V5V5V5V9-12
GndGndGndGnd7-8
OpenNCNCNC5-6
GndGndGndGnd3-4
3.8V16.5V0V15V1-2
Diode ModeRun STBYLabelPin
P701 Connector "Main Board" to "SMPS" P813
PLASMA Fall 2008 42PG20113
Voltage and Diode Mode Measurements for the Main Board Speaker Plug
Main Board Speaker Plug JK501 Voltage and Diode Mode CheckMain Board Speaker Plug JK501 Voltage and Diode Mode Check
JK501
Resistance Readings with the Board Disconnected. DVM in the Diode mode.
2.58V8V0V42.58V8V0V32.58V8V0V22.58V8V0V1
Diode ModeRunSBYPinCN701 Connector "Main" to "Speakers"
PLASMA Fall 2008 42PG20114
The Control Switch Board and Power Switch Board are located (as viewed from the rear) in the lower left hand section.
To remove, unplug the Connector P101 and remove the 2 screws. Under each screw there is a black tab. Release these tabs to lift the Board upward. Then remove the Connector from the Power Switch Board and remove it’s two screws.
Ft Control Board and Power Switch Board RemovalFt Control Board and Power Switch Board Removal
PLASMA Fall 2008 42PG20115
INTERCONNECT DIAGRAM (11 X 17 FOLDOUT SECTION)INTERCONNECT DIAGRAM (11 X 17 FOLDOUT SECTION)
This section shows the 11X17 foldout thatThis section shows the 11X17 foldout that’’s available in the Paper s available in the Paper and Adobe version of the Training Manual.and Adobe version of the Training Manual.
The Adobe version of this Training Manual allows the viewer to The Adobe version of this Training Manual allows the viewer to zoom in and out making reading of the small text easier.zoom in and out making reading of the small text easier.This Power Point shows a graphical representation of the 11 X 17This Power Point shows a graphical representation of the 11 X 17foldout page so clarity is limited.foldout page so clarity is limited.
PLASMA Fall 2008 42PG20117
Circuit Interconnect DiagramCircuit Interconnect Diagram
00
02
03
Pin 22 - Menu on
04
06
07
05
08
10
11
09
12
14
15
13
16
18
19
1701
Pin 22 - Menu off Pin 16 - Menu off
Pin 16 - Menu on
Pin 20 - Menu off
Pin 20 - Menu on
Pin 14 - Menu off
Pin 14 - Menu on
Pin 12 - Menu off
Pin 12 - Menu on
Pin 11 - Menu off
Pin 11 - Menu on
Pin 13 - Menu off
Pin 13 - Menu on
Pin 15 - Menu off
Pin 15 - Menu on Pin 21 - Menu on
Pin 21 - Menu off
Pin 19 - Menu on
Pin 19 - Menu off
01Menu On
00Menu Off22
19Menu On
18Menu Off21
03Menu On
02Menu Off20
17Menu On
16Menu Off19
05Menu On
04Menu Off16
15Menu On
14Menu Off15
07Menu On
06Menu Off14
13Menu On
12Menu Off13
09Menu On
08Menu Off12
11Menu On
10Menu Off11
Ref #StatePin
P302
01Menu On
00Menu Off22
19Menu On
18Menu Off21
03Menu On
02Menu Off20
17Menu On
16Menu Off19
05Menu On
04Menu Off16
15Menu On
14Menu Off15
07Menu On
06Menu Off14
13Menu On
12Menu Off13
09Menu On
08Menu Off12
11Menu On
10Menu Off11
Ref #StatePin
P302
1
3
5
7
9
11
13
15
17
19
21
2
4
6
8
10
12
14
16
18
20
22
Connector P302 Configuration - indicates signal pins.
Volts per division Time per division Trigger offset
42PG2042PG20PLASMA TELEVISIONPLASMA TELEVISION
This concludes the 42PG20 training
session.