Download - opamp Vos and Ib - Slides
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Input Offset Voltage (VOS) & Input Bias Current (IB) TIPL 1100 TI Precision Labs – Op Amps
Presented by Ian Williams Prepared by Art Kay and Ian Williams
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Input Offset Voltage - VOS
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VOUT
VOS = 50!V
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Input Offset Voltage - VOS
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VOUT
Input offset from mismatch of input
transistors
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Offset Voltage Specs and Distribution
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OPA827
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Simulate Input Offset Voltage
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+
-
+
U1 OPA350
R1
1k
Vcm 2.5
Vload 2.5
V+
VM1
VEE 5V+
VM2 -150uV
-150uV
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Drift Slope – Positive and Negative
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OPA835 OPA835
For this example VOS drift is defined as:
!Vos!T
Vos T1( ) Vos 25C( )"
T1 25C"
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Drift Slope – Common Definition
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Vosi at Temp
0
20
40
60
80
100
120
140
160
-40 -20 0 20 40 60 80 100
Temp (degC)
Vosi
(uV)
! Vos! T
Vos T1( ) Vos 25C( )! Vos T1( ) Vos 25C( )!+
T1 T2!=
(-40C, 100uV)
(85C, 150uV)
(25C, 30uV)
! Vos! T
100"V 30"V! 150"V 30"V!+
85C 40! C( )!= 1.52
"VC
=°
T2
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Application Example
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-
++
Vosi 0.1mV
R1 1k R2 99k
R3
1k
Vout = (1mV+ 0.1mV)*(100)= 110mV
Vin 1m
VOS introduces 10% error!
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Input Offset Drift Calculations
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Temp (°C) VOS Initial + Drift +1.5uV/C
VOS Initial + Drift -1.5uV/C
-25 °C 25uV 175uV 0 °C 62.5uV 137.5uV 25 °C 100uV 100uV 50 °C 137.5uV 62.5uV 85 °C 190uV 10uV 125 °C 250uV -50uV
Vosi Vosi_room Vosi_drift T 25C!( )"+=
Example calculations:
Vosi 100!V 1.5!VC
25C( ) 25C![ ]"+= 100!V=
At 25C
Vosi 100!V 1.5!VC
125C( ) 25C![ ]"+= 250!V=
At 125C
-
++
R1 1k R2 99k
R3
1k
Vout
Vin 1m
+
Vosi 0.1mVVosi drift
1.5uV/C x (T – 25C)
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Range of Offset - !V to mV
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Op Amp VOS (max)
(high grade) VOS Drift (max)
(high grade) Technology
OPA333 10 !V 0.05 !V/°C Zero Drift CMOS
OPA277 20 !V 0.15 !V/°C Precision Bipolar
OPA188 25 !V 0.085 !V/°C Auto-Zero CMOS
OPA192 25 !V 0.5 !V/°C CMOS
OPA211 50 !V 1.5 !V/°C Precision Bipolar
OPA827 150 !V 1.5 !V/°C (typ.) JFET input, Bipolar, Precision
OPA350 500 !V 4 !V/°C (typ.) CMOS
OPA835 1.85 mV 13.5 !V/°C High Speed Bipolar
LM741 3.00 mV 15 !V/°C Bipolar commodity (lower cost)
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Input Bias Current - IB
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Input bias offset current: IB_OS = IB1 – IB2 = 210 nA – 150 nA = 60 nA
VOUT
150 nA
210 nA
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Simple Bipolar, No IB Cancellation
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Bias current in bipolar amplifiers is from input transistor base current. It is typically larger than in FET-input amplifiers and it flows into the input terminals.
Vcc
IS1
Q1 Q2
R1 R2
Vin2Vin1
Ib1
Ib2
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Bipolar with IB Cancellation
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Vcc
IS1
Q1 Q2
R1 R2
Vin2Vin1
Ib1
Ib2
Ib Cancel Circuit
!
Ib Cancel Circuit
!
The input bias currents are mirrored and summed back in to cancel the bias current. This has the effect of significantly reducing input IB. Note that when this is done, IB can flow in both directions. Also, IB_OS is no longer smaller then IB.
IB_OS = IB1 – IB2
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Bias Current for CMOS
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Bias current in FET-input amplifiers is mainly from leakage into ESD protection diodes.
Vcc
IS1
Q1 Q2
R1 R2
Vin2
Vin1
Ib2
Vcc
Vcc
Ib1
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IB over Temperature
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OPA350
CMOS amplifier: In this case you see a dramatic increase in bias current at 25 °C. Note the logarithmic graph, which doubles every 10 °C.
OPA277
Bipolar amplifier: In this case you see a dramatic increase in bias current at 75 °C.
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IB Calculation – OPA211 at High Temp.
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-
+
R1 1k R2 99k
R3
1kVin 1m
Ib 200nA
Ib 150nA Ib 200nA
Using nodal analysis
VinR1
Vin Vout!
Rf+ Ib+ 0=
Vout Rf IbVinR1
+VinRf
+"#$
%&'
(=
Using superposition set Vin=0V
Vout Rf Ib0R1
+0Rf
+"#$
%&'
(= Ib Rf(=
In this example
Vout_Ib 200nA( ) 99k!( )(= 20mV=
Vout_vin 1mV991
1+"#$
%&'
(= 100mV=
Vout_total 20mV_100mV= 120mV=
Point for nodal analysis
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Range of Bias Current – fA to nA
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Op Amp IB (max)
(high grade) IB at max
temp. Technology
OPA129 100 fA 20 pA (typ.) Difet – Ultra Low Bias Current
OPA627 5 pA 1nA Difet – Precision High Speed
OPA350 10 pA 500 pA (typ.) CMOS
OPA827 50 pA 50 nA max JFET input, Bipolar, Precision
OPA333 70 pA 150 pA (typ) Zero Drift CMOS
OPA277 1 nA 2 nA (max) Precision Bipolar
OPA211 125 nA 200 nA Precision Bipolar
OPA835 400 nA 530 nA High Speed Bipolar
LM741 80 nA 0.2 !A (max) Bipolar commodity (lower cost)
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