Download - Unidade_6 Sistemas Digitais
-
Circuitos Sequencias
-
2
CIRCUITOS SEQUENCIAIS
Introduo
Armazenando informaes
-
3
Q
Q
-
4
Q
Flip Flop RS Bsico
Q
Q Q
-
5
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
-
6
QQ
-
7
S R Q Q
0 0 Q Q Hold
0 1 0 1 Reset
1 0 1 0 Set
1 1 0 0 Proibido
-
8
S R Q Q
0 0 Q Q
0 1 0 1
1 0 1 0
1 1 0 0
Flip Flop RS Sncrono
Flip Flop RS Sncrono NOR
-
9
CK S R Q Q
0 X X Q Q Hold
1 0 0 Q Q Hold
1 0 1 0 1 Reset
1 1 0 1 0 Set
1 1 1 0 0 Proibido
Flip Flop RS Sncrono NAND
-
10
CK S R Q Q
0 X X Q Q Hold
1 0 0 Q Q Hold
1 0 1 0 1 Reset
1 1 0 1 0 Set
1 1 1 1 1 Proibido
Observao
Diagrama de Tempo
Q
-
11
Flip Flop D
CK S R Q Q
0 X X Q Q Hold
1 0 0 Q Q Hold
1 0 1 0 1 Reset
1 1 0 1 0 Set
1 1 1 0 0 Proibido
-
12
CK D R Q Q
0 X X Q Q Hold
1 0 0 Q Q Hold
1 0 1 0 1 Reset
1 1 0 1 0 Set
1 1 1 0 0 Proibido
Q
CK D Q
0 X Q Hold
1 0 0 Reset
1 1 1 Set
CK D Q
0 X Q Hold
0 0 0 Reset
0 1 1 Set
Q
-
13
Flip Flop's Sensveis Borda do Clock
.
.
-
14
Flip Flop D Sensvel Borda do Clock
CK D Q
X X Q Hold
0 0 Reset
1 1 Set
CK D Q
X X Q Hold
0 0 Reset
1 1 Set
Q
-
15
Flip Flop JK Sensvel Borda do Clock
CK J K Q
X X X Q Hold
0 0 Q Hold
0 0 Reset
1 0 1 Set
1 1 Q Toggle
CK J K Q
X X X Q Hold
0 0 Q Hold
0 1 0 Reset
1 0 1 Set
1 1 Q Toggle
-
16
Q
-
17
Entradas assncronas
Flip Flop D
PR CLR CK D Q
0 1 X X 1 Preset
1 0 X X 0 Clear
1 1 X X Q Hold
1 1 0 0 Reset
1 1 1 1 Set
-
18
Flip Flop JK
.
PR CLR CK J K Q
0 1 X X X Q Preset
1 0 X X X Q Clear
1 1 X X X Q Hold
1 1 0 0 Q Hold
1 1 0 1 0 Reset
1 1 1 0 1 Set
1 1 1 1 Q Toggle
-
19
Problemas Propostos
Q
-
20
Q
-
21
BIBLIOGRAFIA BSICA
BIBLIOGRAFIA COMPLEMENTAR
SITES CONSULTADOS