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SRI GANESH COLLEGE OF ENGINEERING AND TECHNOLOGY DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
MICROPROCESSOR LAB MANUAL
SEMESTER-IV DEPARTMENT: IT DEPT.
LAB CODE: IT P42
LIST OF EXPERIMENTS
SL.NO NAME OF THE EXPERIMENT
CYCLE I
1 STUDY OF MICROPROCESSOR KIT 8085
2 PROGRAM FOR 8 BIT ARITHMETIC OPERATIONS WITH 8085 MICROPROCESSOR
3 PROGRAM FOR 16 BIT ARITHMETIC OPERATIONS WITH 8085 MICROPROCESSOR
4 PROGRAM FOR 8 & 16 BIT BCD ARITHMETIC OPERATIONS WITH 8085 MICROPROCESSOR
5 PROGRAM FOR BLOCK OPERATIONS WITH 8085 MICROPROCESSOR
6 PROGRAM FOR CODE CONVERSIONS WITH 8085 MICROPROCESSOR
7 PROGRAM FOR ARRAY OPERATIONS WITH 8085 MICROPROCESSOR
8 PROGRAM FOR ARITHMETIC OPERATION USING 8086 MICROPROCESSOR
CYCLEII
9 PROGRAM FOR STEPPER MOTOR INTERFACE USING 8085 MICROPROCESSOR
10 PROGRAM FOR SERIAL COMMUNICATION USING 8085 MICROPROCESSOR
11 PROGRAM FOR ELEVATOR SIMULATION USING 8085 MICROPROCESSOR
12 PROGRAM FOR ADC INTERFACE USING 8085 MICROPROCESSOR
13 PROGRAM FOR DAC INTERFACE USING 8085 MICROPROCESSOR
14 PROGRAM FOR DC MOTOR INTERFACE USING 8085 MICROPROCESSOR
15 PROGRAM FOR TRAFFIC LIGHTCONTROL INTERFACE 8085 MICROPROCESSOR
H.O.D LAB INCHARGE
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SYLLABUS
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PICTORIAL REPRESENTATION OF 8085 MICROPROCESSOR
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EXPT. NO.1 STUDY OF 8085 MICROPROCESSOR KIT
INTRODUCTION
INTEL 8085 is one of the most popular 8-bit microprocessor capable of addressing
64 KB of memory and its architecture is simple. The device has 40 pins, requires +5 V
power supply and can operate with 3MHz single phase clock.
ALU (Arithmetic Logic Unit):
The 8085A has a simple 8-bit ALU and it works in coordination with the
accumulator, temporary registers, 5 flags and arithmetic and logic circuits. ALU has
the capability of performing several mathematical and logical operations. The
temporary registers are used to hold the data during an arithmetic and logic operation.
The result is stored in the accumulator and the flags are set or reset according to the
result of the operation. The flags are affected by the arithmetic and logic operation.
They are as follows:
Sign flag
After the execution of the arithmetic - logic operation if the bit D7 of the
result is 1, the sign flag is set. This flag is used with signed numbers. If it is 1, it is a
negative number and if it is 0, it is a positive number.
Zero flag
The zero flag is set if the ALU operation results in zero. This flag is
modified by the result in the accumulator as well as in other registers.
Auxillary carry flag
In an arithmetic operation when a carry is generated by digit D3 and passed
on to D4, the auxillary flag is set.
Parity flag
After arithmetic logic operation, if the result has an even number of 1s
the flag is set. If it has odd number of 1s it is reset.
Carry flag
If an arithmetic operation results in a carry, the carry flag is set. The carry
flag also serves as a borrow flag for subtraction.
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Timing and control unit
This unit synchronizes all the microprocessor operation with a clock and
generates the control signals necessary for communication between the microprocessor and
peripherals. The control signals RD (read) and WR (write) indicate the availability of data
on the data bus.
Instruction register and decoder
The instruction register and decoder are part of the ALU. When an instruction is
fetched from memory it is loaded in the instruction register. The decoder decodes the
instruction and establishes the sequence of events to follow.
Register array
The 8085 has six general purpose registers to store 8-bit data during program
execution. These registers are identified as B, C, D, E, H and L. they can be combined as
BC, DE and HL to perform 16-bit operation.
Accumulator
Accumulator is an 8-bit register that is part of the ALU. This register is used to store 8-
bit data and to perform arithmetic and logic operation. The result of an operation is stored
in the accumulator.
Program counter
The program counter is a 16-bit register used to point to the memory address of the
next instruction to be executed.
Stack pointer
It is a 16-bit register which points to the memory location in R/W memory, called the
Stack.
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Communication lines
8085 microprocessor performs data transfer operations using three
communication lines called buses. They are address bus, data bus and control bus.
Address busit is a group of 16-bit lines generally identified as A0A15. The
address bus is unidirectional i.e., the bits flow in one direction frommicroprocessor to the peripheral devices. It is capable of addressing 2
16
memory locations.
Data busit is a group of 8 lines used for data flow and it is bidirectional. The
data ranges from 00FF.
Control busit consist of various single lines that carry synchronizing signals.
The microprocessor uses such signals for timing purpose.
Result
Thus the 8085 Microprocessor concepts were studied
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FLOW CHART FOR 8-BIT ADDITION
START
LOAD ADDRESS OF
DATA IN HL PAIR
CHECKWHETHER
CY=0
CLEAR C-
REGISTER
GET THE FIRST
DATA IN A-REG
INCREMENT HL
PAIR
ADD CONTENT OF
MEMORY TO A-REGISTER
ADD CONTENT OFMEMORY TO A-
REGISTER
ADD CONTENT OF
MEMORY TO A-REGISTER
STOP
INCREMENT
C-REGISTER
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EXPT. NO.2- PROGRAM FOR 8 BIT ARITHMETIC
OPERATIONS WITH 8085 MICROPROCESSOR
AIM:
To Perform 8-bit arithmetic operations using 8085 Microprocessor
i) 8 bit addition ii) 8 bit subtraction iii) 8 bit Multiplication
iv) 8 bit division
APPARATUS REQUIRED:
1. Microprocessor kit2. Power supply (+5V)
3. Op-code sheet.
i)8- BIT ADDITIONALGORITHM:
1. Load the address of the data memory in HL pair2. Clear C-Register3. Move the first data from memory to accumulator4. Increment the pointer (HL pair)5. Add the content of memory addressed by HL with accumulator6. Check for carry if carry=1, go to step7 or if carry=0 , go to step87. Increment the C-Register8. Increment the pointer and Store the sum9. Increment the pointer and store the carry10.Stop the process.
ADDRESS LABEL MNEMONIC OPERAND OPCODE COMMENTS
4000 LXI H, 4900
4001
4002
4003 MVI C, 00H
4004
4005 MOV A,M
4006 INX H
4007 ADD M
4008 JNC LOOP1
4009
400A
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FLOW CHART FOR 8-BIT SUBTRACTION
START
GET THE SUBTRAHEND IN
A-REGISTER
SAVE CONENT OF A-REGIN B-REGISTER
GET THE MINUEND IN
A-REGISTER
SUBTRACT THE CONTENT
OF B-REGISTER FROM A-REGISTER
STOP
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ii) 8- BIT SUBTRACTIONALGORITHM:
1. Load the subtrahend (the data to be subtracted) from memory to accumulatorand move it to B-register
2. Load the minuend from memory to accumulator3. Subtract the content of B-register (subtrahend) from the content of
accumulator(minuend)
4. Store the difference (accumulator) in memory5. Stop the process.
ADDRESS LABEL MNEMONIC OPERAND OPCODE COMMENT
4000 LDA 4201
4001
4002
4003 MOV B,A
4004 LDA 4202
4005
4006
4007 SUB B
4008 STA 4203
4009
400A
400B HLT
400B INR C
400C LOOP1 INX H
400D MOV M,A
400E INX H
400F MOV M,C M,C
4010 HLT
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FLOW CHART FOR 8-BIT MULTIPLICATION
START
LOAD ADDRESS OF
DATA IN HL PAIR
CHECKWHETHER
ZF=0
INCREMENT THE
POINTER
USING HL AS ADDRESS POINTER GET I-DATA IN B-REGISTER AND II-DATA IN
C-REGISTER
ADD THE CONTENT OF C-
REGISTER TO A-REGISTER
DECREMENT
B-REGISTER
STORE THE RESULT
IN MEMORY
STOP
YESNO
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iii) 8- BIT MULTIPLICATIONALGORITHM:1. Load the address of the first data in HL pair(pointer)2. Move the first data to B-register (count)3. Increment the pointer4. Move the record data to D-register (multiplicand)5. Add the content of D-register to accumulator6. Decrement B-register (count)7. Check whether count has reached zero, if ZF=0 repeat step5 through 7, or if
ZF=1 go to next step.8. Store the result in memory9. Stop the process.
ADDRESS LABEL MNEMONIC OPCODE OPCODE COMMENTS
4000 LXI H,4900
4001
4002
4003 MOV B,M
4004 INX H
4005 MOV C,M
4006 XRA A
4007 LOOP1 ADD C
4008 DCR B
4009 JNZ LOOP1
400A400B
400C STA 4902
400D
400E
400F HLT
iv)8- BIT DIVISIONALGORITHM:
1. Load the divisor in accumulator and move it B-register2. Load the dividend in accumulator3. Clear C-register to account for quotient4. Check whether divisor is less than dividend. If divisor is less than dividend, go
to step-8. Otherwise go to next step
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FLOW CHART FOR 8-BIT DIVISION
START
GET THE DIVISOR IN A-REGISTER
AND MOVE TO B-REGISTER
CHECK
WHETHER
CY=0
GET THE DIVIDEND IN A-REGISTER
CLEAR C-REGISTER (QUOTIENT)
COMPARE B-REGISTER AND
A-REGISTER
MOVE THE CONTENT OF C-REGISTER
TO A-REGISTER AND STOREQUOTIENT IN MEMORY
STOP
YES
NO
SUBTRACT CONTENT OF B-REG FROM A-REG
INCREMENT QUOTIENTC-REGISTER
STORE THE REMAINDER
(A-REGISTER) IN MEMORY
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5. Subtract the content of B-register from accumulator6. Increment the content of C-register (quotient)7. Go to step48. Store the content of accumulator (reminder) in memory9. Move the content of C-register (quotient) to accumulator and store in memory10.Stop the process.
ADDRESS LABEL MNEMONIC OPERAND OPCODE COMMENTS4000 LDA 4201H
4001
4002
4003 MOV B,A
4004 LDA 4200H
4005
4006
4007 MVI C,00H
4008
4009 AGAIN CMP B
400A JC STORE
400B
400C
400D SUB B
400E INR C
400F JMP AGAIN
4010
4011
4012 STORE STA 4203H
4013
4014
4015 MOV A,C
4016 STA 4202H
4017
4018
4019 HLT
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OBSERVATION - 8 BIT ADDITION
INPUT OUTPUT
ADDRESS DATA 1 DATA 2 ADDRESS DATA 1 DATA 2
OBSERVATION - 8 BIT SUBTRACTION
INPUT OUTPUT
ADDRESS DATA 1 DATA 2 ADDRESS DATA 1 DATA 2
OBSERVATION - 8 BIT MULTIPLICATION
INPUT OUTPUT
ADDRESS DATA 1 DATA 2 ADDRESS DATA 1 DATA 2
OBSERVATION - 8 BIT DIVISION
INPUT OUTPUT
ADDRESS DATA 1 DATA 2 ADDRESS DATA 1 DATA 2
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RESULT:
Thus the 8-Bit ALP programs were executed and the results also verified by
using 8085 Microprocessor
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FLOW CHART FOR 16-BIT ADDITION
START
[L][4050H]
[H]
[4051H]
IS THERE A
CARRY
[DE][HL]
[L][4052H]
[H][4053H]
[A]00H
[HL][HL]+ [DE]
[A][A]+1
[4054][L]
STOP
[4055][H]
[4056][A]
YES
NO
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EXPT.NO. 3 - 16-BIT ARITHMETIC OPERATIONS 8085
MICROPROCESSOR
AIM:
To perform a 16 bit arithmetic operation using 8085 such as
i) 16 bit addition ii) 16 bit subtraction iii) 16 bit Multiplication
iv) 16 bit division
APPARATUS REQUIRED:
1. Microprocessor kit
2. Power supply (+5V)
3. Op-code sheet
i)
16- BIT ADDITIONALGORITHM:
1. Load the address of data memory in HL pair2. Move the first data to DE register pair3. Load the second data in HL register pair4. Clear A-register for carry5. Add content of DE pair to HL pair6. Check for carry if carry=1, go to step7 or if carry=0 go to step87. Increment A-register to account for carry.8. Store the sum and carry in memory9. Stop the process
i) 16- BIT ADDITIONADDRESS LABEL MNEMONIC OPERAND OPCODE COMMENTS
4100 LHLD 4200H
4101
4102
4103 XCHG
4104 LHLD 4202H
4105
4106
4107 XRA A
4108 DAD D
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FLOW CHART FOR 16-BIT SUBTRACTION
START
[L][4050H]
[H]
[4051H]
IS THERE A
BORROW
[DE][HL]
[L][4052H]
[H][4053H]
[HL][HL]- [DE]
[C][C]+1
[4054][L]
STOP
[4055][H]
[4056][L]
YES
NO
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4109 JNC AHEAD
410A
410B
410C INR A
410D AHEAD SHLD 4202H
410E
410F
4110 STA 4206H
4111
4112
4113 HLT
ii)16- BIT SUBTRACTIONALGORITHM:1. Initialize memory pointer to data location2. Get the subtrahend from memory and transfer it to register pair.3. Get the minuend from memory and store it in another register pair.4. Subtract the subtrahend from minuend.5. Store the difference and borrow in different memory location.
PROGRAM FOR 16- BIT SUBTRACTION
ADDRESS LABEL MNEMONIC OPERAND OPCODE COMMENTS4100 LDA 4202H
4101
4102
4103 MOV B,A
4104 LDA 4200H
4105
41064107 SUB B
4108 STA 4204H
4109
410A
410B LDA 4203H
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FLOW CHART FOR 16-BIT MULTIPLICATION
START
[L][4200H]
[H]
[4201H]
IS CARRY
FLAG SET
SPHL
[L][4202H]
[H][4203H]
[DE][HL]
[HL][HL]+ [SP]
[BC][BC]+1
STOP
[4204][L]
[4205][H]
NO
[HL][0000][BC][0000]
[DE][DE]+1
IS ZERO
FLAG SET
[4204][L]
[4205][H]
NO
YES
YES
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410C
410D
410E MOV B,A
410F LDA 4201H4110
4111
4112 SUB B
4113 STA 4205H
4114
4115
4116 HLT
iii)16- BIT MULTIPLICATIONALGORITHM:
1. Get the multiplier and multiplicand2. Initialize a register to store partial product3. Add multiplicand, multiplier times4. Store the result in consecutive memory location.5. Stop the process
PROGRAM FOR16- BIT MULTIPLICATION
ADDRESS LABEL MNEMONIC OPERAND OPCODE COMMENTS
4100 LHLD 4200H
4101
4102
4103 SPHL
4104 LHLD 4202
4105
4106
4107 XCHG
4108 LXI H,0000H
4109
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FLOW CHART FOR 16-BIT DIVISION
START
[L][4200H]
[H]
[4201H]
HL[DE]
[L][4050H]
[H][4051H]
BC0000H
[BC][BC]-1
HLHL+DE
[BC][BC]+1
STOP
NO
[L][4054][H][4055]
AC
IS CARRY
FLAG SET
YES
AL:
AAE:
LA
AH:
AA-H-Br:
H
A
A
A
[4056]A
AB
[4057]A
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410A
410B LXI B,0000H
410C
410D
410E NEXT DAD SP
410F JNC AHEAD
4110
4111
4112 INX B
4113 AHEAD DCX D
4114 MOV A,E
4115 ORA D
4116 JNZ NEXT
4117
4118
4119 SHLD 4204H
411A
411B
411C MOV L,C411D MOV H,B
411E SHLD 4206H
411F
4120
4121 HLT
iv)16- BIT DIVISIONALGORITHM:
1. Get the multiplier and multiplicand2. Initialize the register for quotient3. Repeatedly subtract divisor from dividend, till dividend becomes less than dividend.4. Count the numbers of subtraction which equals the quotient5. Store the result in memory6. Stop the process
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OBSERVATION - 16 BIT ADDITION
INPUT OUTPUT
ADDRESS DATA 1 DATA 2 ADDRESS DATA 1 DATA 2
OBSERVATION - 16 BIT SUBTRACTION
INPUT OUTPUT
ADDRESS DATA 1 DATA 2 ADDRESS DATA 1 DATA 2
OBSERVATION - 16 BIT MULTIPLICATION
INPUT OUTPUT
ADDRESS DATA 1 DATA 2 ADDRESS DATA 1 DATA 2
OBSERVATION - 16 BIT DIVISION
INPUT OUTPUT
ADDRESS DATA 1 DATA 2 ADDRESS DATA 1 DATA 2
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PROGRAM FOR16- BIT DIVISION
ADDRESS LABEL MNEMONIC OPERAND OPCODE COMMENTS
4100 START LHLD 4052
4101
4102
4103 XCHG4104 LHLD 4050
4105
4106
4107 LXI B,0000H
4108
4109
410A LOOP MOV A,L
410B SUB E
410C MOV L,A
410D MOV A,H
410E SBB D
410F MOV H,A
4110 INX B
4111 JNC LOOP
4112
4113
4114 DCX B
4115 DAD D
4116 SHLD 4054
4117
4118
4119 MOV A,C
411A STA 4056
411B
411C
411D MOV A,B
411E STA 4057
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411F
4120
4121 HLT
RESULTThus the 16-Bit ALPs were performed and the outputs also verified by using
8085.
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FLOW CHART FOR 8-BIT BCD ADDITION
START
GET THE I-DATA IN A & MOVE IT
TO B REGISTER
CLEAR C-REGISTERFOR CARRY
ADD THE CONTENT OF B-REGISTER
TO A-REGISTER AND PERFORM
DECIMAL ADJUST AFTER ADDITION
STORE THE SUM IN MEMORY
GET II-DATA IN A-REGISTER
MOVE THE CONTENT OF C-
REGISTER TO A-REGISTER
AND STORE IN MEMORY
STOP
CHECKWHETHER
CY=0
INCREMENT C-REGISTER FOR
CARRY
NO
YES
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EXPT.NO 4- BCD ARITHMETIC OPERATION USING 8085
MICROPROCESSOR
AIM:
To perform BCD Arithmetic operations using 8085 microprocessor
APPARATUS REQUIRED:
1. Microprocessor kit
2. Power supply (+5V)
3. Op-code sheet
(i) 8-bit BCD Addition
ALGORITHM
1. Load the first data in accumulator and move it to B-register2. Load the second data in accumulator3. Clear C-register for storing carry4.
Add the content of B-register to accumulator
5. Execute DAA instruction6. Check for carry, if carry=1, go to step 7 or if carry=0, go to step 87. Increment C-register to account for carry8. Store for sum C, content of accumulator in memory9. Move the carry (content of C-register) to accumulator and store in memory10.Stop
PROGRAM: 8-BIT BCD ADDITION
ADDRESS LABEL MNEMONIC OPERAND OPCODE COMMENTS
4100 LDA 4200H4101
4102
4103 MOV B,A
4104 LDA 4201H
4105
4106
4107 MVI C,00H
4108
4109 ADD B
410A DAA
410B JNC AHEAD
410C
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FLOW CHART FOR 16-BIT BCD ADDITION
START
GET THE LOW ORDER 2DIGITS OF
I-DATA IN A & MOVE IT TO B
CLEAR C-REGISTERFOR CARRY
ADD THE CONTENT OF B TO A
AND PERFORM DAA STORE THE
RESULT IN MEMORY
A
STORE THE SUM IN MEMORY
GET THE LOW ORDER 2 DIGITS OF
II-DATA IN A-REGISTER
GET THE HIGH ORDER 2DIGITS OF
I-DATA IN A & MOVE IT TO B
GET THE LOW ORDER 2 DIGITS OF
II-DATA IN A-REGISTER
IS CARRY
FLAG SET
ADD THE CONTENT OF B AND
A
INCREMENT C-REGISTERYES
NO
MOVE THE CONTENT OF C-
REGISTER TO A-REGISTER
AND STORE IN MEMORY
STOP
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410D
410E INR C
410F AHEAD STA 4202H
4110
4111
4112 MOV A,C4113 STA 4203H
4114
4115
4116 HLT
(ii) 16-bit BCD Addition
ALGORITHM
1. Load the low order two digits of first data in accumulator and move it to B-register
2. Load the low order two digits of second data in accumulator3. Clear C-register for storing carry4. Add the content of B-register to accumulator5. Execute DAA register6. Store the low order two digits of the result in memory7. Load the high order two digits of first data in accumulator and move it to B-
register
8. Load the high order two digits of second data in accumulator9. Add the content of B-register and carry to accumulator10.Execute DAA instruction11.Check for carry, if carry=1, go to step 12 or if carry =0 go to step 1312.Increment C-register to account for final carry13.Store the high order two digits of the result in memory14.Move the carry (contents of C-register) to accumulator and store in memory15.Stop
PROGRAM: 16-BIT BCD ADDITION
ADDRESS LABEL MNEMONIC OPERAND OPCODE COMMENTS
4100 LDA 4200H
4101
4102
4103 MOV B,A
4104 LDA 4202H
4105
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FLOW CHART FOR 8-BIT BCD SUBTRACTION
START
GET THE LOW BYTE OF SUBTRAHEND
IN A AND MOVE TO B
GET THE LOW BYTE OF MINUEND IN A
GET THE HIGH BYTE OF SUBTRAHEND
IN A AND MOVE TO B
PERFORM THE SUBTRACTION OF LOW
BYTE AND STORE THE RESULT INMEMORY
GET THE HIGH BYTE OF MINUEND IN A
SUBTRACT THE CONTENT OF B-REGISTER AND CARRY FROM A-
REGISTER
STORE THE RESULT IN
STOP
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4106
4107 MVI C,00H
4108
4109 ADD B
410A DAA
410B STA 4204H410C
410D
410E LDA 4201H
410F
4110
4111 MOV B,A
4112 LDA 4203H
4113
4114
4115 ADC B
4116 DAA
4117 STA 4205H
4118
4119
411A JNC AHEAD
411B
411C
411D INR C
411E AHEAD MOV A,C
411F STA 4206H
4120
4121
4122 HLT
(iii) 8-bit BCD subtraction
ALGORITHM
1. Load the Subtrahend in accumulator and move it to B-register2. Move 99 to accumulator and subtract the content of B-register from
accumulator
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OBSERVATION
(i) 8-BIT BCD ADDITION
(ii) 16-BIT BCD ADDITION
(iii) 8-BIT BCD SUBTRACTION
INPUT OUTPUT
ADDRESS DATA ADDRESS DATA
INPUT OUTPUT
ADDRESS DATA ADDRESS DATA
INPUT OUTPUT
ADDRESS DATA ADDRESS DATA
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3. Increment the accumulator4. Move the content of accumulator to B-register5. Load the minuend in accumulator6. Add the content of B-register to accumulator7. Execute DAA instruction8. Store the result in memory9. Stop
PROGRAM: 8-BIT BCD SUBTRACTION
ADDRESS LABEL MNEMONIC OPERAND OPCODE COMMENTS
4100 LDA 4201H
4101
4102
4103 MOV B,A
4104 MVI A,99H
4105
4106 SUB B
4107 INR A
4108 MOV B,A
4109 LDA 4200H
410A
410B
410C ADD B
410D DAA
410E STA 4202H
410F
4110
4111 HLT
Result
Thus the BCD ALPs were performed and the outputs also verified by using
8085.
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FLOW CHART FOR TRANSFER CONTENTS TO OVERLAPPING MEMORYBLOCKS
START
MOVE THE IMMEDIATE DATA OF
06H IN C-REGISTER
LOAD THE CONTENT OF MEMORY
LOCATION IN HL REGISTER PAIR
LOAD THE CONTENT OF MEMORY
LOCATION IN DE REGISTER PAIR
MOVE THE CONTENT INM-REG. TO A-REG.
STORE THE RESULT IN DE REG. PAIR
DECREMENT HL REGISTER PAIR
DECREMENT DE REGISTER PAIR
DECREMENT C-REGISTER
IF ZEROFLAG IS
SET
STOP
YES
NO
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EXPT.NO 5- BLOCK OPERATION USING 8085
MICROPROCESSOR
AIM:
To perform block operations using 8085 microprocessor
APPARATUS REQUIRED:
1. Microprocessor kit
2. Power supply (+5V)
3. Op-code sheet
(i) Transfer contents to overlapping memory blocks
ALGORITHM
1. Move the immediate data in 06H in C-register2. Load the content of memory location in HL register pair3. Load the content of memory location in DE register pair4. Move the content in M-register to A-register5. Store the result in DE register pair6. Decrement HL register pair7. Decrement DE register pair8. Decrement C-register9. If CY=0 go to next step else go to step-410.Stop
PROGRAM:
ADDRESS LABEL MNEMONIC OPERAND OPCODE COMMENTS
4100 MVI C,064101
4102 LXI H,4005
4103
4104
4105 LXI D,4007
4106
4107
4108 L1 MOV A,M
4109 STAX D
410A DCX H
410B DCX D
410C DCX C
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FLOW CHART FOR TRANSFER CONTENTS TO NON-OVERLAPPINGMEMORY BLOCKS
START
MOVE THE IMMEDIATE DATA OF06H IN C-REGISTER
LOAD THE CONTENT OF MEMORYLOCATION IN HL REGISTER PAIR
LOAD THE CONTENT OF MEMORYLOCATION IN DE REGISTER PAIR
MOVE THE CONTENT IN
M-REG. TO A-REG.
STORE THE RESULT IN DE REG. PAIR
INCREMENT HL REGISTER PAIR
INCREMENT DE REGISTER PAIR
DECREMENT C-REGISTER
IF ZERO
FLAG IS
SET
STOP
NO
YES
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410D JNZ L1
410E
410F
4110 HLT
(ii) Transfer contents to Non-overlapping memory blocks
ALGORITHM
1. Move the immediate data in 06H in C-register2. Load the content of memory location in HL register pair3. Load the content of memory location in DE register pair4. Move the content of B-register to A-register5. Store the result in DE register pair6. Increment HL register pair7. Increment DE register pair8. Decrement C-register9. If Zero flag is set then go to next step else go to step-410.stop
PROGRAM:
ADDRESS LABEL MNEMONIC OPERAND OPCODE COMMENTS
4100 MVI C,06
4101
4102 LXI H,4005
4103
4104
4105 LXI D,4007
4106
4107
4108 L1 MOV A,M
4109 STAX D
410A INX H
410B INX D
410C DCR C
410D JNZ L1
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OBSERVATION
(i) TRANSFER CONTENTS TO OVERLAPPING MEMORY BLOCKS
(ii) TRANSFER CONTENTS TO NON- OVERLAPPING MEMORY BLOCKS
INPUT OUTPUT
ADDRESS DATA ADDRESS DATA
INPUT OUTPUT
ADDRESS DATA ADDRESS DATA
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RESULT
Thus the block operation (overlapping & non-overlapping) by using 8085
microprocessor were verified and the output also verified.
410E
410F
4110 HLT
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EXPT.NO 6- PROGRAM FOR CODE CONVERSIONS WITH 8085
MICROPROCESSOR
AIM:
To perform code conversions using 8085 microprocessori) HEXA DECIMAL TO ASCII
ii) ASCII to HEXA DECIMALiii) BINARY TO BCD CODE CONVERSION
iv) BCD TO BINARY CODE CONVERSION
APPARATUS REQUIRED:
1. Microprocessor kit2. Power supply (+5V)
3. Op-code sheet
ALGORITHM (HEXA DECIMAL TO ASCII)
1. Load the given data in A-register and move to B-register2. Mark the upper nibble of the binary(hexa)data in A-register3. Call subroutine SUB1 to get ASCII code of the lower nibble and store in
memory
4. Move B-register to A-register and mask the lower nibble5. Rotate the upper nibble to lower nibble position6. Call subroutine SUB1 to get the ASCII code of upper nibble and store in
memory
7. Stop8. Compare the content of A-register with 0A9. If CY=1, go to step11. If CY=0, go to next step.10.Add 07H to A-register11.Add 30H to A-register12.Return to main program
ADDRESS LABEL MNEMONIC OPERAND OPCODE COMMENTS
4100 LDA 4200
4101
4102
4103 MOV B,A
4104 ANI 0F
4105
4106 CALL SUB
4107
4108
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FLOW CHART FOR HEXA TO ASCII CONVERSION
START
GET THE HEXA DATA IN A-REGISTER
AND STORE IT IN B-REGISTER
MASK THE UPPER NIBBLE OF THE DATA
STORE ASCII CODE (A-REGISTER) IN
MEMORY
MOVE HEXA DATA FROM B-REGISTER TO A-
REGISTER AND MASK THE LOWER NIBBLE
ROTATE THE CONTENT OFA-REGISTER; 4-TIMES LEFT
STOP
STORE THE ASCII CODE
A-REGISTER IN MEMORY
CALL SUBROUTINE SUB 1
TO GET THE ASCII COE FORUPPER NIBBLE IN A-
CALL SUBROUTINE SUB1
TO GET THE ASCII CODEFOR LOWER NIBBLE IN A-
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ALGORITHM (ASCII to HEXA DECIMAL)
1. Start the process.2. Get the ASCII code number in the accumulator through memory.
4109 STA 4201
410A
410B
410C MOV A,B
410D ANI F0
410E
410F RLC
4110 RLC
4111 RLC
4112 RLC
4113 CALL SUB1
4114
4115
4116 STA 4202
4117
4118
4119 HLT
411A SUB 1 CPI 0A
411B
411C JC SKIP
411D
411E
411F ADI 07
4120
4121 SKIP ADI 30
4122
4123 RET
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FLOW CHART FOR SUBROUTINE SUB1 (HEXA TO ASCII CODE)
START
COMPARE THE CONTENT OF
A-REGISTER WITH 0AH
CHECK
WHETHER
CY=1
ADD 07H TO
A-REGISTER
ADD 30H TO A-REGISTER
RETURN TOMAIN PROGRAM
NO
YES
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3. Subtract 30 from the ASCII code number.4. If the different is less than 0A go to step 65. If not, subtract 07 from first difference value.6. Store the difference in the specified memory location.7. Stop the process.
ALGORITHM (BINARY TO BCD CODE CONVERSION)
1. Load the given data in A-register2. Move the immediate data of 64H in B-register3. Move the immediate data of 0AH in C-register4. Move the immediate data of 00H in D-register5. Move the immediate data of 00H in E-register6. Compare B-register with accumulator7.
If CY=0 go to next step else go to step118. Subtract the content of B-register with A-register
9. Increment the E-register10.Jump to the step611.Compare C with A-register12.If CY=0 then go to next step else store the result in memory13.Increment D-register14.Then jump to step1115.Store the result in memory16.Move the content of d-register to A-register
ADDRESS LABEL MNEMONIC OPERAND OPCODE COMMENTS
4100LDA
4500
4101
4102
4103 SUI 30
4104
4105 CPI 0A
4106
4107 JC
4108
4109
410A SUI 07
410B
410C STA 4501
410D
410E
410F HLT
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FLOW CHART FOR ASCII TO HEXA CODE CONVERSION
CHECK
WHETHER
CY=1
START
LOAD THE GIVEN DATA IN
A-REGISTER
SUBTRACT 30H FROM A-REGISTER
COMPARE THE CONTENT OF
A-REGISTER WITH 0AH
STORE THE RESULT
STOP
SUBTRACT 07H
FROM A-REGISTERYES
NO
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17.Store the result in memory18.Move the content of E-register to A-register19.Store the result in memory20.Stop the process
ADDRESS LABEL MNEMONIC OPERAND OPCODE COMMENTS
4100 LDA 4200
4101
4102
4103 MVI B,64H
4104
4105 MVI C,0AH
4106
4107 MVI D,00H
4108
4109 MVI E,00H
410A
410B L1 CMP B
410C JC L2
410D
410E
410F SUB B
4110 INR E
4111 JMP L1
4112
4113
4114 L2 CMP C
4115 JC L3
4116
4117
4118 SUB C
4119 INR D
411A JMP L2
411B
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FLOW CHART FOR BINARY TO BCD CONVERSION
START
GET THE I-DATA IN A-REGISTER
MOVE 64H IN B-REGISTER
MOVE 0AH IN C-REGISTER
MOVE 00H IN D-REGISTER
MOVE 00H IN E-REGISTER
COMPARE B-REGISTER
WITH A-REGISTER
IF
CHECK=
MOVE 0AH IN C-REGISTER
INCREMENT E-REGISTER
JUMP
B
A
NO
YES
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i) BCD TO BINARY CONVERSION1. Load the given data in A-register2. Move the content of A-register to B-register3. Mask the upper nibble of the binary data in A-register4. Move the content of A-register to C-register5.
Move the content of B-register to A-register6. Mask the lower nibble of the binary data in A-register
7. Rotate the upper nibble to lower nibble position8. Move the content of A-register to B-register9. Move the immediate data of 00H to A-register10. Move the immediate data of 00H to D-register11. Add the content of D-register with A-register12. Decrement the B-register13. If zero flag is set then proceed to next step else go to step 1114. Add the content of C-register with A-register15. Store the result in memory16.
Stop
411C
411D L3 STA 4201
411E
411F
4120 MOV A,D
4121 STA 4202
4122
4123
4124 MOV A,E
4125 STA 4203
4126
4127
4128 HLT
ADDRESS LABEL MNEMONIC OPERAND OPCODE COMMENTS
4100 LDA 4200
4101
4102
4103 MOV B,A
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AB
COMPARE C-REGISTER WITH
A-REGISTER
CHECK
IF, CY=1
SUBTRACT C-REGISTER WITHA-REGISTER
INCREMENT D-REGISTER
JUMP
STORE THE RESULT IN
MEMORY
MOVE D-REGISTER TO
A-REGISTER
STORE THE RESULT IN
MEMORY
MOVE E-REGISTER WITH
A-REGISTER
STORE THE RESULT IN
MEMORY
STOP
YES
NO
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ResultThus the code conversion was executed by using8085 microprocessor
4104 ANI OF
4105
4106 MOV C,A
4107 MOV A,B
4108 ANI OF
4109
410A RRC
410B RRC
410C RRC
410D RRC
410E MOV B,A
410F MVI A,00H
4110
4111 MVI D,0A
4112
4113 L1 ADD D
4114 DCR B
4115 JNZ L1
4116
4117
4118 ADD C
4119 STA 4102
411A
411B
411C HLT
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OBSERVATION - CODE CONVERSION
HEXA DECIMAL to ASCII ASCII to HEXA DECIMAL
INPUT OUTPUT INPUT OUTPUT
ADDRESS DATA ADDRESS DATA ADDRESS DATA ADDRESS DATA
OBSERVATION - BINARY TO BCD CODE CONVERSION
INPUT OUTPUT
ADDRESS DATA 1 DATA 2 ADDRESS DATA 1 DATA 2
OBSERVATION - BCD TO BINARY CODE CONVERSION
INPUT OUTPUT
ADDRESS DATA 1 DATA 2 ADDRESS DATA 1 DATA 2
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EXPT.NO 7(a)SORTING (ASCENDING) 8085
MICROPROCESSOR
AIM:
To write a program to arrange an array of data in ascending order using 8085microprocessor
APPARATUS REQUIRED:
1. Microprocessor kit
2. Power supply (+5V)3. Op-code sheet
ALGORITHM
1. Initialize HL pair as memory pointer2. Get the count at 4200 into C-register3. Copy it in D-register4. Get the first value in A-register5. Compare it with the value at next location6. If they are out of order, exchange the contents of A-register and memory7. Decrement D-register content by 18. Repeat step 5&7 until the value of D-register becomes zero9.
Decrement C-register content by 1
10.Repeat steps 3 to 9 till the value in C-register becomes zero11.Stop the process
PROGRAM
ADDRESS LABEL MNEMONIC OPERAND OPCODE COMMENTS
4100 LXI H,4200
4101 MOV C,M
4102 DCR C
4103 REPEAT MOV D,C
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OBSERVATIONSorting (Ascending order)
INPUT (Array size-5) OUTPUT (Array size-5)
ADDRESS DATA ADDRESS DATA
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RESULT
Thus the sorting (Ascending) was and executed and output also verified byusing 8085 microprocessor.
4104 LXI H,4201
4105 LOOP MOV A,M
4106 INX H
4107 CMP M
4108 JC SKIP
4109 MOV B,M
410A MOV M,A
410B DCX H
410C MOV M,B
410D INX H
410E SKIP DCR D
410F JNZ LOOP
4110 DCR C
4111 JNZ REPEAT
4112 HLT
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OBSERVATIONSorting (Descending order)
INPUT (Array size-5) OUTPUT (Array size-5)
ADDRESS DATA ADDRESS DATA
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EXPT.NO 7 (b)SORTING (DESCENDING) 8085
MICROPROCESSOR
AIM:
To write a program to arrange an array of data in descending order
using 8085 microprocessor
APPARATUS REQUIRED:
1. Microprocessor kit
2. Power supply (+5V)
3. Op-code sheet
ALGORITHM
1. Initialize HL pair as memory pointer2. Get the count at 4200 into C-register3. Copy it in D-register4. Get the first value in A-register5. Compare it with the value at next location6. If they are out of order, exchange the contents of A-register and memory7. Decrement D-register content by 18. Repeat step 5&7 until the value of D-register becomes zero9. Decrement C-register content by 110.Repeat steps 3 to 9 till the value in C-register becomes zero11.Stop the process
PROGRAM
ADDRESS LABEL MNEMONIC OPERAND OPCODE COMMENTS
4100 LXI H,4200
4101 MOV C,M
4102 DCR C
4103 REPEAT MOV D,C
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RESULT
Thus the sorting (Descending) was and executed and output also verified by
using 8085 microprocessor.
4104 LXI H,4201
4105 LOOP MOV A,M
4106 INX H
4107 CMP M
4108 JNC SKIP
4109 MOV B,M
410A MOV M,A
410B DCX H
410C MOV M,B
410D INX H
410E SKIP DCR D
410F JNZ LOOP
4110 DCR C
4111 JNZ REPEAT
4112 HLT
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OBSERVATION - LARGEST NUMBER
INPUT OUTPUT
ADDRESS DATA 1 DATA 2 ADDRESS DATA 1 DATA 2
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EXPT.NO 7 (c) ARRAY OPERATION USING 8085
MICROPROCESSORAIM:
To write a program to do Array operation such as i) Find the Largest Element in an
Array ii) find the smallest element in an array
APPARATUS REQUIRED:
1. Microprocessor kit
2. Power supply (+5V)
(i) ALGORITHM - LARGEST ELEMENT IN AN ARRAY1. Start the process.2. Initialize memory for getting array of element(data)3. Get the block size in any register through accumulator from memory.4. Initialize accumulator to zero.5. Compare accumulator content with array element.6. Check for carry. If there is carry, copy the memory content (Largest number) to
accumulator.7. Increment the memory pointer & Decrement the count.8. Check for zero. If zero is not there means go to step5.9. Store accumulator content (largest no) in the specified memory location.10.Stop the process.
PROGRAM
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
4300 LXI H 42004301
4302
4303 MOV B , M
4304 MVI A , 00
4305
4306 XXX INX H
4307 CMP M
4308 JNC YYY
4309
430A
430B MOV A , M430C YYY DCR B
430D JNZ XXX
430E
430F
4310 STA 4500
4311
4312
4313 HLT
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OBSERVATION - SMALLEST NUMBER
INPUT OUTPUT
ADDRESS DATA 1 DATA 2 ADDRESS DATA 1 DATA 2
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(ii) ALGORTITHM - SMALLEST ELEMENT IN AN ARRAY1. Start the process.2. Initialize memory for getting array of element(data)3. Get the block size in any register through accumulator from memory.4. Initialize accumulator to FF.5. Compare accumulator content with array element.6. Check for carry. If there is no carry, copy the memory content (smallest
number) to accumulator.7. Increment the memory pointer & Decrement the count.8. Check for zero. If there is no zero go to step5.9. Store accumulator content (smallest t no) in the specified memory location.10.Stop the process.
PROGRAM
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
4400 LXI H , 42004401
4402
4403 MOV B , M
4404 MVI A , FF
4405
4406 XYZ INX H
4407 CMP M
4408 JC CCC
4409
440A
440B MOV A , M
440C CCC DCR B
440D JNZ XYZ
440E
440F
4410 STA 4201
4411
4412
4413 HLT
RESULT
Thus the array operation was and executed and output also verified by using
8085 microprocessor.
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EXPT.NO 8- ARITHMETIC OPERATION USING 8086
MICROPROCESSOR
AIM:
To perform 16-bit arithmetic operations using 8086 microprocessor
APPARATUS REQUIRED:
1. Microprocessor kit
2. Power supply (+5V)
3. Op-code sheet
(i) 16-bit additionALGORITHM
1.Move the content of memory location to AX register2.Move the content of memory location to BX register3.Add the content of AX with BX4.Move the content of AX register to memory location 12045.stop
PROGRAM
MOV AX, [1200]
MOV BX, [1202]
ADD AX, BX
MOV [1204], AXHLT
(ii) 16-bit subtractionALGORITHM
1.Move the content of memory location to AX register2.Move the content of memory location to BX register3.Subtract the content of BX with AX4.Move the result in memory5.stop
PROGRAM
MOV AX, [1200]
MOV BX, [1202]
SUB AX, BX
MOV [1204], AX
HLT
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FLOW CHART FOR 16-BIT ADDITION USING 8086
OBSERVATION (16-Bit addition)
INPUT OUTPUT
ADDRESS DATA ADDRESS DATA
MOVE THE CONTENT OF MEMORYLOCATION TO AX REGISTER
MOVE THE CONTENT OF MEMORY
LOCATION TO BX REGISTER
START
ADD THE CONTENT OF AX WITH BX
MOVE THE RESULT IN MEMORY
STOP
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(iii) 16-bit subtractionALGORITHM
6.Move the content of memory location to AX register7.Move the content of memory location to BX register8.Subtract the content of BX with AX9.Move the result in memory10. stop
PROGRAM
MOV AX, [1200]MOV BX, [1202]
SUB AX, BX
MOV [1204], AX
HLT
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FLOW CHART FOR 16-BIT SUBTRACTION USING 8086
OBSERVATION (16-Bit Subtraction)
INPUT OUTPUT
ADDRESS DATA ADDRESS DATA
MOVE THE CONTENT OF MEMORYLOCATION TO AX REGISTER
MOVE THE CONTENT OF MEMORY
LOCATION TO BX REGISTER
START
SUBTRACT THE CONTENT OF AXWITH BX
MOVE THE RESULT IN MEMORY
STOP
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(iv) 16-bit MultiplicationALGORITHM
1.Move the content of memory location to AX register2.Move the content of memory location to BX register3.Multiply BX with Accumulator4.Move the result in memory5.stop
PROGRAM
MOV AX, [1200]MOV BX, [1202]
SUB AX, BX
MOV [1204], AX
HLT
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FLOW CHART FOR 16-BIT MULTIPLICATION USING 8086
OBSERVATION (16-Bit Multiplication)
INPUT OUTPUT
ADDRESS DATA ADDRESS DATA
MOVE THE CONTENT OF MEMORYLOCATION TO AX REGISTER
MOVE THE CONTENT OF MEMORYLOCATION TO BX REGISTER
START
MULTIPLY THE CONTENT OFAX WITH BX
MOVE THE RESULT IN MEMORY
STOP
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(v) 16-bit DivisionALGORITHM
1.Move the content of memory location to AX register2.
Move the content of memory location to BX register3.Divide the content of BX with AX
4.Move the content of AX register to memory5.stop
PROGRAM
MOV AX, [1200]
MOV BX, [1202]
DIV BX
MOV [1204], AX
HLT
Result
Thus the 16-but arithmetic operations was executed using 8086 microprocessor
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FLOW CHART FOR 16-BIT DIVISION USING 8086
OBSERVATION (16-Bit Division)
INPUT OUTPUT
ADDRESS DATA ADDRESS DATA
MOVE THE CONTENT OF MEMORY
LOCATION TO AX REGISTER
MOVE THE CONTENT OF MEMORY
LOCATION TO BX REGISTER
START
DIVIDE THE CONTENT OFBX WITH AX
MOVE THE RESULT IN MEMORY
STOP
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EXPT.NO 9- STEPPER MOTOR INTERFACE USING 8085
MICROPROCESSOR
AIM:
To run a stepper motor in two directions using 8085 microprocessor
APPARATUS REQUIRED:
1. Microprocessor kit
2. Power supply (+5V)
3. Stepper motor
4. Op-code sheet
Program
ADDRESS LABEL MNEMONIC OPERAND OPCODE COMMENTS
4100 START LXI H, LOOK UP
4101
4102
4103 MVI B,04,H4104
4105 REPEAT MOV A,M
4106 OUT 0C0H
4107
4108 LXI D,0303H
4109
410A
410B DELAY NOP
410C DCX D
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RESULT
Thus the serial communication was performed by using 8085 microprocessor.
410D MOV A,E
410E ORA D
410F JNZ DELAY
4110
41114112 INX H
4113 DCR B
4114 JNZ REPEAT
4115
4116
4117 JMP START
4118
4119
411A LOOK UP DB 09
411B 05
411C 06
411D 0A
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EXPT.NO 10- SERIAL COMMUNICATION USING 8085
MICROPROCESSOR
AIM:
To perform serial communication using 8085 microprocessor
APPARATUS REQUIRED:
1. Microprocessor kit
2. Power supply (+5V)
3. Op-code sheet
PROGRAM:
ADDRESS LABEL MNEMONIC OPERAND OPCODE COMMENTS
4100 START MVI A,36
4101
4102 OUT 0CEH
4103
4104 MVI A,0A
4105
4106 OUT 0C8H
4107
4108 MVI A,4E
4109
410A OUT 0C8H
410B
410C MVI A,4E
410D
410E OUT 0C2H
410F
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Result
Thus the serial communication was performed by using 8085 microprocessor.
4110 MVI A,37
4111
4112 OUT 0C2H
4113
4114 MVI A,41
4115
4116 OUT 0C0H
4117
4118 RST 1
ADDRESS LABEL MNEMONIC OPERAND OPCODE COMMENTS
4200 IN 0C0H DB
4201 C0
4202 STA 4150 32
4203 50
4204 41
4205 RST 1 CF
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OBSERVATIONSerial Communication
INPUT OUTPUT
ADDRESS DATA ADDRESS DATA
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EXPT.NO. 11- ELEVATOR SIMULATION USING 8085
MICROPROCESSOR
AIM:
To find the nearest lift for a request from any floor and service the request
APPARATUS REQUIRED:
1. Microprocessor kit
2. Power supply (+5V)
3. Op-code sheet
4. Interface UBMB-022
Program
ADDRESS LABEL MNEMONIC OPERAND OPCODE COMMENTS
4100 START MVI A,03
4101
4102 OUT STAT_OU
4103
4104 CALL DELAY
4105
4106
4107 MVI A,02
4108
4109 OUT STAT_OU
410A
410B MVI A,80H
410C
410D OUT LIFT 1
410E
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411F MVI A,01
4110
4111 OUT LIFT 2
4112
4113 CALL DELAY
4114
4115
4116 MVI A,40H
4117
4118 OUT LIFT 1
4119
411A CALL DELAY
411B
411C
411D MVI A,20H
411E
411F OUT LIFT1
4120
4121 CALL DELAY
4122
4123
4124 MVI A,10H
4125
4126 OUT LIFT1
4127
4128 CALL DELAY
4129
412A
412B MVI A,08H
412C
412D OUT LIFT1
412E
412F MVI A,0BH
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Result
Thus the output for elevator simulation is obtained and it was verified
4130
4131 OUT STAT_OU
4132
4133 CALL DELAY
4134
4135
4136 MVI A,03H
4137
4138 OUT STAT_OU
4139
413A HLT
413B DELAY MVI
413C
413D LOOP1 LXI
413E
413F
4140 LOOP2 DCX
4141 MOV
4142 ORA
4143 JNZ
4144
4145
4146 DCR
4147 JNC
4148
4149
414A RET
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LIFT 1 C0
LIFT 2 C4
STAT_IN C8
STAT_OUT CC
DATA LIFT POSITION
80 GROUND FLOOR
40 I-FLOOR
20 II-FLOOR
10 III-FLOOR
08 IV-FLOOR
04 V-FLOOR
02 VI-FLOOR
01 VII-FLOOR
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EXPT.NO 12- ADC INTERFACING USING 8085
MICROPROCESSOR
AIM:
To verify the digital data from the given analog signal using 8085Microprocessor
APPARATUS REQUIRED:
1. Microprocessor kit
2. Power supply (+5V)
3. Op-code sheet
ADDRESS LABEL MNEMONIC OPERAND OPCODE COMMENTS
4100 START MVI A,10
41014102 OUT 0C8H
4103
4104 MVI A,18
4105
4106 OUT 0C8H
4107
4108 MVI A,01
4109
410A OUT 0D0H
410B
410C XRA A
410D XRA A
410E XRA A
410F MVI A,00
4110
4111 OUT 0D0H
4112
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Procedure
1. Place the jumper J2 in A Position2. Place the jumper J5 in A position3. Enter and execute the program4. Vary the analog input(using trim pot) and verify the digital data displayed with
that data stored in memory location 4150h
ResultThus the digital data obtained from the given analog signal was verified using
8085
4113 LOP IN 0D8H
4114
4115 ANI 01
4116
4117 CPI 01
4118
4119 JNZ LOP
411A
411B
411C IN 0C0H
411D
411E STA 4150H
411F
4120
4121 HLT
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OBSERVATIONADC Interfacing using 8085
INPUT OUTPUT
MSB LSB ADDRESS DATA
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EXPT.NO 13- DAC INTERFACING USING 8085
MICROPROCESSOR
AIM:
To generate square wave at the DAC2 output using 8085 Microprocessor
APPARATUS REQUIRED:
1. Microprocessor kit2. Power supply (+5V)3. Op-code sheet
ADDRESS LABEL MNEMONIC OPERAND OPCODE COMMENTS
4100 START MVI A,00
4101
4102 OUT 0C8H
4103
4104 CALL DELAY
4105
4106
4107 MVI A,0FF
4108
4109 OUT 0C9H
410A
410B CALL DELAY
410C
410D
410E JMP START
410F
4110
4111 DELAY MVI B,05
4112
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RESULT
Thus the square wave at the DAC2 out put was generated using 8085
4113 L1 MVI C,0FF
4114
4115 L2 DCR C
4116 JNZ L2
4117
4118
4119 DCR B
411A JNZ L1
411B
411C
411D RET
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OBSERVATIONADC Interfacing using 8085
INPUT OUTPUT
MSB LSB ADDRESS DATA
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EXPT.NO 14- DC MOTOR INTERFACING USING 8085
MICROPROCESSOR
AIM:
To run the DC motor using 8085 Microprocessor
APPARATUS REQUIRED:
1. Microprocessor kit
2. Power supply (+5V)
3. Op-code sheet
PROGRAM
ADDRESS LABEL MNEMONIC OPERAND OPCODE COMMENTS
4100 MVI A,0FFH
4101
4102 OUT 0C0H
4103
4104 MVI A,00
4105
4106 OUT 0D8H
4107
4108 CALL DELAY
4109
410A
410B MVI A,30H
410C
410D OUT 0CEH
410E
410F MVI A,0FFH
4110
4111 OUT 0C8H
4112
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4113 OUT 0C8H
4114
4115 MVI A,00
4116
4117 OUT 0D0H
4118
4119 CALL DELAY
411A
411B
411C MVI A,00
411D
411E OUT 0D8H
411F
4120 IN 0C8H
4121
4122 STA 4500
4123
4124
4125 MVI A,00
4126
4127 STA 45H
4128
4129
412A HLT
412B DELAY MVI C,03
412C
412D LO2 LXI H,0A3C3H
412E
412F
4130 LOOP DCX H
4131 MOV A,L
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RESULT
Thus the DC motor was ran using 8085 microprocessor.
4132 ORA H
4133 JNZ LOOP
4134
4135
4136 DCR C
4137 JNZ LO2
4138
4139
413A RET
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EXPT.NO 15- TRAFFIC LIGHT CONTROLLER USING 8085
MICROPROCESSOR
AIM:
To perform traffic light controller operation using 8085 Microprocessor
APPARATUS REQUIRED:
1. Microprocessor kit
2. Power supply (+5V)
3. Op-code sheet
4. Traffic Light controller interface
Program:
ADDRESS LABEL MNEMONIC OPERAND OPCODE COMMENTS
4100 START MVI A,80H
4102 OUT CONTRL
4104 REPEAT LXI H,DATA_SQ
4107 LXI D,DATA_E
410A CALL OUT
410D XCHG
410E MOV A,M
410F OUT PORT A
4111 CALL DELAY 1
4114 XCHG
4115 INX D
4116 INX H
4117 CALL OUT
411A XCHG
411B MOV A,M
411C OUT PORT B
411E CALL DELAY 1
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4121 XCHG
4122 INX D
4123 INX H
4124 CALL OUT
4127 XCHG
4128 MOV A,M
4129 OUT PORT C
412B CALL DELAY 1
412E XCHG
412F INX D
4130 INX H
4131 CALL OUT
4134 XCHG
4135 MOV A,M
4136 OUT PORT C
4138 INX H
4139 MOV A,M
413A OUT PORT A
413C CALL DELAY 1
413F JMP REPEAT
4142 OUT MOV A,M
4143 OUT PORT B
4145 INX H
4146 MOV A,M
4147 OUT PORT B
4149 INX H
414A MOV
414B OUT
414D CALL
4150 RET
4151 DELAY PUSH
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RESULT
Thus the traffic light controller was performed using 8085 microprocessor andthe output was verified.
4152 LXI H,0001FFH
4155 L1 LXI B,FFFFH
4158 LOOP DCX B
4159 MOV A,B
415A ORA C
415B JNZ LOOP
415E DCX H
415F MOV A,L
4160 ORA H
4161 JNZ L1
4164 POP H
4165 RET
4166 DELAY1 PUSH H4167 LXI H,001FH
416A L2 LXI B,FFFFH
416D LOOP2 DCX B
416E MOV A,B
416F ORA C
4170 JNZ LOOP2
4173 DCX H
4174 MOV A,L
4175 ORA H
4176 JNZ L2
4179 POP H
417A RET DATA_SQDB
417B
4180
4185
4187 DATA_EDB
418C END
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