dram design by arlen cox dec 9, 2002 ecpe 131. sense amplifier
Post on 19-Dec-2015
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TRANSCRIPT
Write Continued
Storage Capacitor Precharge
Write “1”
Final Value
Storage Capacitor Precharge
Write “0”
Final Value
Read Operation
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1. Precharge Amp2. Set Read Line High3. Set Word Line High4. Balance Charges5. Begin Amplification6. Force to High or Low7. Read to Output
*Simplified DRAM simulation
*Input bufferM19 9 IN0 VDD VDD pmos W=30u L=1.5uM20 9 IN0 0 0 nmos W=30u L=1.5uM21 1 9 VDD VDD pmos W=30u L=1.5uM22 1 9 0 0 nmos W=30u L=1.5u
*WR tristateM1 1 WR 2 0 nmos W=30u L=1.5u
*DRAM CellM2 2 W0 3 0 nmos W=30u L=1.5uC1 3 0 100p
*RD tristateM8 2 RD 8 0 nmos W=30u L=1.5u
*Sense AmplifierM3 5 4 VDD VDD pmos W=30u L=1.5uM6 7 8 5 VDD pmos W=30u L=1.5uM7 8 7 5 VDD pmos W=30u L=1.5uM11 7 8 6 0 nmos W=30u L=1.5uM12 8 7 6 0 nmos W=30u L=1.5uM13 6 S 0 0 nmos W=30u L=1.5uC2 7 0 200pC3 8 0 100p
*S inverterM4 4 S VDD VDD pmos W=30u L=1.5uM5 4 S 0 0 nmos W=30u L=1.5u
*Precharge CircuitM14 7 P 8 0 nmos W=30u L=1.5uM15 7 P VDD2 0 nmos W=30u L=1.5uM16 8 P VDD2 0 nmos W=30u L=1.5u
*Output TristateM23 8 OE 11 0 nmos W=30u L=1.5u
*Output BufferM9 10 11 VDD VDD pmos W=30u L=1.5uM10 10 11 0 0 pmos W=30u L=1.5uM17 Out0 10 VDD VDD nmos W=30u L=1.5uM18 Out0 10 0 0 nmos W=30u L=1.5u
*Constant Voltage sourcesVCC VDD 0 DC 5VVCC2 VDD2 0 DC 2.5V
*Transistor Models.MODEL nmos NMOS(VTO=1 LAMBDA=0.067 KP=50E-6).MODEL pmos PMOS(VTO=1 LAMBDA=0.067 KP=50E-6)
*initial conditions for capacitors to 0.IC v(7)=0V v(8)=0V
*Input Signals*write from 0 to 500ns*read from 500ns to 1000nsVIn0 IN0 0 PWL(0V 0V 1ns 0V)VS S 0 PWL(0V 0V 700ns 0V 701ns 5V)VP P 0 PWL(0V 0V 1ns 5V 200ns 5V 201ns 0V 500ns 0V 501ns 5V 700ns 5V 701ns 0V)VRD RD 0 PWL(0V 0V 1ns 5V 200ns 5V 201ns 0V 500ns 0V 501ns 5V 800ns 5V 801ns 0V)VWR WR 0 PWL(0V 0V 200ns 0V 201ns 5V 300ns 5V 301ns 0V)VOE OE 0 PWL(0V 0V 900ns 0V 901ns 5V)VW0 W0 0 PWL(0V 0V 1ns 5V 300ns 5V 301ns 0V 700ns 0V 701ns 5V 800ns 5V 801ns 0V)
*Close.END
SPICE Code
Input BufferDRAM Cell
Amplifier
Precharge Circuit
Output Buffer
MOSFET Model
Input Signals
References
● Howe, Sodini Microelectronics an Integrated Approach 1997 Prentice Hall
● Keith, Baker, DRAM Circuit Design a Tutorial 2000 IEEE Press
● http://www.eng.abdn.ac.uk/~eng186/spice/ SPICE Manual