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Dry Etching Based Silicon Micromachining Ivo W. Rangelow

The aim of this work is to demonstrate the “dry” etching based micro-fabrication technologies in the

manufacturing of Single Crystal Silicon (SCS) for Micro-Electro/(Optical)-Mechanical-Systems (ME(O)MS).

The ME(O)MS technology is very fast growing industry branch based often on the same silicon technology as integrated circuits. The process of plasma-dry etching is quite simple straightforward and can be consid-

ered as the key technology in the micromachining of silicon. The most important motivation for this work is

advancement of the micromachining industry. The basic aspects of pattern transfer of the prepared resist-

patterns by plasma etching into the substrate, considering plasma chemistry, gas flow or gas chopping, and

substrate temperature will be presented. Special attention will be given to discuss the physical and chemical

phenomena which are involved in the generation of features with high aspect ratios.

Introduction

Today in an attempt to save energy, space and resources, down-sizing of electronic devices,

tools and machines is a strategic goal of many industrial nations. Extensive research is focused on

new design methods for micro- and nano-technologies and industrial equipment for silicon micro-

machining (based on the very familiar technology used for fabrication of integrated circuits),

materials, measurement and evaluation of micro-systems usually called Micro Electro Mechanical

Systems (MEMS) or Micro Optical Electromechanical Systems (MOEMS) which often produce

devices with multiple physical functions. MEMS and MOEMS device designs perform well how-

ever the potential producers find the production processes incompatible or bewildering and the

equipment supply industry is too inflexible and fragmented to deal with this problem easily.

The term “microfabrication” is used to characterise the technology developed for manufac-

turing of integrated circuits (IC) and (M(O)EMS). This technology has been around for the better

part of 30 years and it is essentially responsible for continually advancing the state of the art of

microelectronics. Hence, the challenge of sustained progress in microelectronics cannot be met

without commensurate advances in microfabrication technology.

The most critical technologies for the future of advanced ME(O)MS relate to bulk micro-

machining or the so called “high aspect ratio microstructure (system) technology” (HARMST).

The aspect ratio is defined as the ratio of depth to width for a trench (or depth to diameter for a

circular hole) and has been shown to be the most important geometrical parameter for etching of

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ICs and ME(O)MS. Bulk-crystalline Si has physical and chemical properties that have made it a

promising material for the ME(O)MS devices. Such a material is very strong, similar to steel in

modulus of elasticity, without mechanical hysteresis, possesses a good thermal conductivity and a

low thermal expansion coefficient. However, the standard IC wet and dry etching techniques

cannot meet the high-aspect ratio of future demands. This warrants the continual development and

application of new, more advanced, dry etching techniques.

The knowledge on dry etching technology seems to be of a great potential enabling us to

revolutionise the state-of-the-art of MEMS devices by achieving high vertical aspect ratios and

extending the limits of deep etching down to the 40 – 300 µm range. In this article attention is given

to some promising applications and technological processes for the manufacturing of future MEMS

and micro-sensors. Given the many (and sometimes conflicting) demands on high aspect ratio

plasma etch process performance, is one needs to know if it even possible to develop an etch

process and overcome the limits in anisotropy and selectivity. This paper will examine that ques-

tion.

1. Basic terminology in plasma etching

Today the reasons for using the dry etching instead of wet etching are simple: weakly ion-

ised, high density plasmas allow the semiconductors, insulators and metals to be etched or removed

anisotropically (i.e., with high directionality so that, when required, the material is removed in

vertical direction only). Anisotropy A can be defined in terms of the vertical (Vv) and lateral (Vl)

etching rates as:

A = 1 – Vl / Vv (1) The material to be etched is chemically converted to a volatile product which is then removed by

the vacuum system. For A=1 the etching process has led to vertical sidewalls aligned with the resist

mask, i.e., the resist mask pattern has been faithfully transferred into the substrate. The horizontal

etching rate is zero.

The etching processes applied to etch one film should not affect the mask, photoresist, or the

substrate. Pattern transfer requires that a substrate material should be preferentially etched with respect

to the masking layer. This parameter is called the etch selectivity. This is particularly important in

the case where a significant overetching is required to remove all material from all features (such as

in contact etch where contacts can have different depths).

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The variation in the etching rate across the area of the wafer indicates that the etching cannot

be stopped at the right moment equally everywhere. It depends on the process uniformity. Uni-

formity is also important from wafer to wafer and from machine to machine. Uniformity problems

are present in high-aspect ratio features, also known as “micro-loading” or aspect-ratio dependent

etching.

Plasma etching has long been known to be potentially viable for silicon micromachining.

The preferential dry etching technology allows today silicon features to be created with unique

characteristics which were never before possible. The large potential market is not flooded by new

products because of the difficulties in fabricating the MEMS devices economically. The main

hindrance to fast growth in the microsystems fabrication is the lack of manufacturing know-how.

Today, the requirements for pattern transfer applications in very large scale integration (VLSI)

fabrication are getting stringent. Furthermore, the requirements of the etching process for microme-

chanical applications to be integrated with ICs are ever more stringent, demanding high-aspect/ratio

structures (> 1:20), high etching selectivity (>100), controlled side-wall slope and an IC-

technology-compatible masking technique.

2. Strategies of plasma based micromachining of silicon

Highly anisotropic etching in fluorine is driven primarily, as explained above, by ion-assisted

reactions on the bombarded surface (the bottom of the trench), but the anisotropy is limited by

fluorine radical sidewall reactions which cause undercutting [39, 40]. The probability of the reac-

tion of fluorine (with energies of 0.05 eV) with silicon is very high (10%) therefore such plasmas

stimulate isotropic processes.

Because the probabilities of the reaction η of chlorine and bromine radicals (with energies of

0.05 eV) are very small (10 – 5 – 10 – 6 %) such plasma can be used to provide highly anisotropic

etching [19 – 21]. The ion bombardment-induced reaction on the impacted surface can be driven by

ions with energies down to even as low as 25 eV. Here, the sidewalls are beneficially “protected”

against reactions with radicals by absorbed atoms of non-fluorine halogens (Cl, Br, I), not removed

by the bombardment process. For chlorine, bromine, and iodine radicals, with typical plasma

etching energies of 0.05 eV, it is estimated that the probability of reactions of these radicals with

silicon is of the order of 10 – 4 to 10 – 5. These fundamental interactions have been considered to be

the criterion that divides plasma chemical activity to silicon into two types: fluorine isotropic

etching and chlorine / bromine / iodine anisotropic etching.

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In order to obtain high aspect ratio 3D-structures in silicon with reactive ion etching several process

conditions should be controllable and properly chosen. They are [1]:

(a) control the ratio of ion flux to radical flux and of their density and energy,

(b) choice of plasma chemistry,

(c) mechanisms for forming sidewall passivants (sidewall passivation engineering) and good

knowledge about the surface kinetics,

(d) control of the substrate temperature in a wide range (+100 ° –150 °C).

In the discussion that follows, all these "constituents" will be the common denominator for

describing various types of plasma-based etching technology. Highly anisotropic etching is driven

by ion assisted reactions at the bottom surface, but is hindered by undercutting caused by reactive

radical induced sidewall reactions. When aiming for high aspect ratio structures, various phenom-

ena occur which are not commonly observed when etching low aspect ratio (<3:1) features. The

most significant of these are aspect ratio-dependent effects such as RIE-lag, bowing (barrelling),

facetting, micro-trenching and profile shape dependence. These effects are caused by several

mechanisms:

(a) angular dispersion of ions and (etchant) neutrals caused by collisions within the plasma sheath,

(b) ion and etchant transport within the feature onto the sidewalls,

(c) depletion of the reactant (microscopic loading) under conditions of high reaction probability at

the surface

(d) charging of feature sidewalls, as local charging of substrate surface or micro structure sidewalls

can deflect ions and thus may prevent them from reaching the bottom surface to be etched,

(e) etching yield dependencies upon the angle of incidence,

(f) deposition of material produced in the discharge within the feature,

(g) redeposition of material released by ion-induced etching (reaction of the neutrals on the side-

walls to form passivation layers).

2.1 Ratio of ion flux to radical flux

In the last 25 years many studies have been carried out which have contributed to an under-

standing of the chemical and physical processes taking place on surfaces undergoing plasma-

assisted etching. One of the most important and least understood topics in ion-bombardment-

assisted etching is the area of plasma-surface interactions with respect to ion flux to radical flux

ratio.

In Reactive Ion Etching (RIE), high etching rates are accomplished using ion bombardment.

Due to the combinations of reactive neutrals and an ion bombardment the etch rate may be ten times

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greater than that obtained by considering these contributions separately [2]. Despite the fact that ion

densities are orders of magnitude smaller than the neutrals, the contribution of ions to the etching

process is significant. For a plasma density of 2.1011 ion/cm3 their contribution is about factor of

two to three in increasing the etching rate. The etching by reactive neutrals created in the plasma is

enhanced in the direction perpendicular to the surface as a result of the directed, energetic ion flux.

Unlike the situation prevailing on the bottom of the etched features undergoing plasma etching,

there is no volatile product formed in side-wall interactions.

The particles of interest arriving at the side-walls are low energy (5-10 eV) positive ions and

thermal energy reactive atoms or radicals. It is thought that the ion flux is relatively unimportant in

this situation because the ion energy is not high enough to cause sputtering of the wall material but

it is large enough to make it difficult for the ion (after neutralization) to form chemical bonds with

the surface species. High ion bombardment leads thus to low selectivity. A simple model for the

etching rate ERSi may be developed using three components:

Etch rate

Isotropic component

Anisotropic component

Polymer deposition

ERSi = ηF-Si Φ F + kenhΦ i - DR polymer

where ηF-Si is the reaction rate coefficient of fluorine and silicon (F atoms are known to sponta-

neously attack silicon and silicon compounds in the absence of ion bombardment), kenh is the

reaction rate enhancement coefficient; DR polymer is the deposition rate of polymer; Φ i is the ion flux;

Φ F is the fluorine flux (reactant) as average thermal flux:

ηF = NF /4 (8 kTg / pMF)1/2 (at low pressure) (2)

NF is the density of fluorine atoms near the surface and M F is the fluorine atom mass.

The rate of thermal reaction is taken from the data of Flamm et al. [3]:

ηF-Si =ko ΦF exp( —— ) (3)

where – Ea is the activation energy (reported as 0.108 eV), and ko is a constant. The etching rates

have been found to have roughly an Arrhenius form over a wide range of temperatures and depend

linearly on the gas phase fluorine atom density near the surface up to the densities as high as 5 x

– Ea

kB T

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1015 cm – 3. Φ i is derived from ion-current density Ji and maximum voltage reached by the plasma

Vmax together with the angular ion-distribution function ϕi (θ)

Φi = Ji ϕi(θ) Vmax (4)

where

Φ io

qV

qVdN E

Nd

o

= ∫∫1

1

2

max

( , )θθ

θ

θ

dE

This can be determined using Monte Carlo simulations codes (MCSOID [4, 5] ) The enhancement of

the anisotropic etching rate component is achieved by the reactive ions (ion driven etching). As

previously mentioned, in the reactive ion etching, a high etching rate is attained using ion bombard-

ment. This provides the necessary activation energy for surface reactions which thus enhances the

etching rate. The etching mechanism described by Coburn and Winters [2] is explained as a chemical

amplification of sputtering. XeF2 will be adsorbed at the silicon surface, forming precursors of the

etch product SiF2 and lowering the binding energy of the surface atoms. The ions then deliver energy

and form the volatile SiF4 molecules and thus are capable of removing silicon with a higher yield,

providing the reduction of the binding energy. The etching by reactive neutrals created in the plasma

is enhanced by the directed energetic ion flux, thus contributing to the etching in the bombardment

direction – usually perpendicular to the surface. But too much ion bombardment can lead, in turn, to

low selectivity due to the physical sputtering of the mask material. The interpretation proposed by

Coburn and Winters could be applied to many situations, but it does not present an adequate quantita-

tive and qualitative model for this etching phenomenon, and therefore still does not provide us with a

complete explanation or process result prediction. Even by using advanced high density plasmas, in

cases of high aspect ratio etching is a compromise between anisotropy and selectivity.

2.2 Choice of plasma chemistry

Highly anisotropic etching in fluorine is driven primarily, as explained above, by ion-

assisted reactions on the bombarded surface (the bottom of the trench) but the anisotropy is limited

by fluorine radical sidewall reactions which cause undercutting. The probability of the reaction of

fluorine (with energies of 0.05 eV) with silicon is very high (10%) therefore such plasmas create an

does isotropic processes.

Because the probabilities of the reaction η of chlorine and bromine radicals (with energies of

0.05 eV) are very small (10 – 5 – 10 – 6 %) such plasma can be used to provide highly anisotropic

(5)

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processes [19 – 21]. The ion bombardment-induced reaction on the impacted surface can be driven

by ions with energies down to even as low as 25 eV. Here, the sidewalls are beneficially “pro-

tected” against reactions with radicals by absorbed atoms of non-fluorine halogens (Cl, Br, I), not

removed by the bombardment process. For chlorine, bromine, and iodine radicals, with typical

plasma etching energies of 0.05 eV, it is estimated that the probability of reactions of these radicals

with silicon is of the order of 10 – 4 to 10 – 5.

The choice of gas phase chemistry, pressure conditions (ion bowing in the sheath), reactant

transport to the surface, and product transport away from the surface have been identified as the key

factors for controlling microscopic etch uniformity in high aspect ratio etching. In order to reduce

the above listed detrimental effects, we have concentrated our efforts on two main etching strate-

gies: (i) controlled formation of side-wall-inhibitor films utilising perfluorocompounds and (ii)

reactive ion etching at low substrate temperatures. However the use of perfluorocompounds for the

etching of silicon is today considered problematic from an environmental point of view. The

perfluorocompounds are extremely long-lived species and accumulate heat very efficiently in the

atmosphere thereby contributing to global warming. Reactive ion etching based on Cl and Br

plasma chemistries may achieve highly anisotropic structures because of the low reaction probabili-

ties of chlorine or bromine radicals with Si at room temperature. The etching is driven by ion

bombardment induced chemistry at the etched surface, even an ion energy as low as 25 eV is

sufficient. The side-walls are covered and thus protected by radicals of absorbed atoms/molecules

of non-fluorine halogens.

2.3 S ide-wall Passivation Techniques and Gas Chopping Etching Techniques One phenomenon of importance in the etching process is that some of the plasma generated

radicals (-CF2- ) are not capable of reacting directly with the silicon substrate to produce volatile

products; rather, they produce polymers which stick to the surface. The primary process of removal

of such polymers is ion bombardment, which is effective only on the bombarded surfaces (the

trench bottom). On the remaining surfaces, such as the vertical or steeply sloped side-walls of the

etched features, these polymers will not be removed if, as is often the case, the ion flux is strongly

directional with minimal scattering of ions by collisions with neutrals. Since these surfaces receive

little ion flux, they begin to be covered with polymer-based films, which are known as sidewall

passivation layers. These layers slow down and can completely stop the lateral attack of the

surrounding etchant species, thus reducing the undercutting of the mask. A reactive ion etching with

a Gas Chopping Etching Technique (GCET) was developed in 1988 and first published in 1990 [7-

8] has been implemented in many plasma etching processes. This technique is based on the

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chopping of the gas flow of sidewall passivation species and substrate etch chemistries. The effect

was first demonstrated by the etching of polyimid films with a chopped gas flow in oxygen and

CH4/CHF3 plasma. For silicon etching usually SF6 (for etching) and CH4/CHF3 or C4F8 (for

sidewall passivation) is used. Etching with gas chopping provides in the first place higher etch rates

and selectivitys. However, the sidewalls of the etched structures still bear the ripples resulting from

individual isotropic etch and deposition steps(see Figure 1). The 50 to 100 nm size of the ripples is

acceptable for the purpose of micromechanical devices where the features sizes is in the range of

tens of microns. The balance between etching and deposition steps controls the anisotropy. At the

same time the selectivity can be also improved by the selective high deposition rate of the

passivating layer on the resist mask surface caused due to the high sticking coefficient. These

techniques can be also applied to conventional RIE equipment with Cl, F and Br based plasma

chemistry for etching of semiconductors, dielectric materials, or, metals. With these techniques

Open Stencil Masks for the Charged Particle Lithography with 100 nm openings have been realised

[9-10]. The masks for ion beam lithography are stencils, where integrated circuit patterns are

represented by physical holes in a thin membrane. An SiON/Si selectivity as high as 7:1 has been

achieved. Supported by RIE profile simulation studies, the etching parameters based on the GCET

have been developed which achieve openings without the usual ripples and sidewall films, typical

for the gas chopping techniques [11](Figure 2). With the GCET process applied to a simple

commercial RIE system, the features were transferred from the resist directly into silicon without a

hard mask where the etching selectivity was better than 10. This can greatly reduce pattern

distortions and makes the mask-handling process more reliable.

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Figure 1. Formation of “ripples” onto the side- walls during the etching of Si with gas-chopping

technique.

Figure 2. Details of a high-resolution Open-Stencil Masks for Ion-Projection Lithography with

retrograde openings etched in the 3 µm thick Si-membrane using the GCET.

High-density plasmas generated at low pressure combined with gas chopping allows etching

of structures with aspect ratio high than 30. However the effect of side-wall charging can cause

development of non vertical side-walls. The main problem experienced with plasma processing on

SOI (silicon on isolator) is the notching at the oxide interface which results from deflection of the

incident ions by charging of the insulating oxide surface. A native mechanism used for overcoming

this based on plasma-off time during the switching from etching to deposition cycles. In this time

the electron temperature decreases and negative ions are generated due to high halogen attachment.

These negative ions are movedin the direction of the substrate by the 200 kHz RF bias and reduce

the main part of positive charges that accumulate during the etching cycle.

2.4. Anisotropy driven by Low Wafer Temperature (Cryogenic Etching)

An Inductively Coupled Plasma Source (DPS) Oxford deep trench etcher with hardware for

cryogenic substrate temperatures using a conventional SF6/O based process shows capability for

etching sub-0.5µm feature size deep trenches with high etch rate. Along with high etch rate the ICP

deep trench etcher demonstrates superior process performance with minimum mask oxide facet,

excellent uniformity and good profile and critical dimension (CD) control. This conventional

100 nm

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SF6/O2 based process results in minimum side-wall deposition during etching leading to the elimi-

nation of a dry clean with enhanced MEMS productivity due to increased throughput. Also the

further use of the ICP deep trench process was demonstrated for electrostatic driven comb actuator

devises.

Anisotropy in the reactive ion etching of silicon essentially results from the probability of

halogen reaction at the side-wall and the surface coverage (sticking coefficient) of passivation films.

High anisotropy is achieved by keeping the substrate temperature in range of –40° to –150°C,

where the reaction probability (halogen reactivity) of fluorine radicals decreases and the sticking

coefficient of the passivation precursor increases. Under “Cryogenic” conditions, the high aspect

ratio etching, ion bombardment dominated regime (dominated by ion enhancement) may often be

implemented and produces high quality features (Figure 3). By reducing the ion energy, formation

of crystal facets at the trench bottom during the etching of Si(100) is observed (Figure 4). This can

be explained due to the fact, that Si(111) is less reactive to fluorine plasma exposure and has a

lower etching rate than Si(100).

3. Applications

The basic technology which makes it possible to actually fabricate freely moving components

on chip is termed silicon micromachining. Micromachined structures for pressure sensors, accelera-

tion sensors, cantilevers and tips for AFM, flow meters, heat exchangers, micro-motors, micro-

turbines, open stencil masks and valves require development of technology compatible with the

existing IC manufacturing for microelectronic devices. This will offer the possibility of the forma-

tion of a silicon microsystem consisting of many different microstructures, including movable parts,

all onto a single silicon micro-chip.

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Figure 3. Cryo-etching example: 145 µm deep structures etched into Si with SF6/O2 plasma chemis-

try using a 2.0 µm thick oxide masking layer and keeping the substrate at – 140°C.

Figure 4. By reducing of the ion energy (< 20 eV) and keeping the substrate temperature at –

140°C, formation of crystal facets at the trench bottom during the etching of Si(100) is observed.

3.1 Reactive Ion Etching for Surface Micromachining

In 1967 Nathason et al. [12] demonstrated the first surface-micromachined device which was

a resonant gate transistor with a free standing metal gate. This was the birth of microelectrome-

chanical systems surface technology (MEMS-ST). Due to this technology the three-dimensional

microstructures are fabricated by the deposition, lithography and selective etching of thin films on a

silicon wafer surface, as are IC devices. In this method, a “sacrificial” film is used for definition of

free-standing silicon or metal film elements. The manufacture of micromechanical devices directly

on the silicon IC chip has proceeded to a level of maturity that makes possible the integration of

sensing and actuating devices together with circuits to form fully integrated MEMS. The key to the

design of MEMS is the ability to build with a polycrystalline silicon surface a micromachine.

Rotating micromotors and linear resonators, powered by electrostatic drives have already been built

[13].

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Figure 5. Surface micromachined device based on the "tip-above-a-tip" principle proposed by MacDonald

[14].

Surface micromachining, in which material is added to a substrate, utilizes a number of thin-film,

lithography and etching technologies in order to realise functional mechanical structures. In a

typical surface-micromachining process, a Si-wafer is oxidised and after a lithographic step, RIE in

FHF3/CF4/Ar-plasma is used to etch away parts of the SiO2 and to define the required shape. The

structure is formed through a 2-5µm thick poly-Si-LPCVD step in which a silicon film grows on

top of the SiO2 and adheres to the wafer in the areas that have been etched away. In subsequent

lithography and poly-Si etching (in SF6/C2F6-Plasma) steps the shape of the poly-Si film is defined

and the SiO2 layer (known as a sacrificial layer) is dissolved. Figure 5 illustrates a suspended mass

in the form of a miniature electrostatically driven comb x,y table which combines "tip-above-a-tip"

tunnelling structure consisting of two vertically self-aligned conical tips. A commentary on the

emerging use of STM's for reliable monitoring of a change in the relative separation between a pair

of components or atoms at preferred locations on surfaces has been provided by MacDonald [14].

3.2 Plasma based high aspect ratio plasma enhanced micromachining

Monolithically integrated Reactive Ion Etching based silicon micromachining process makes

possible the fabrication of stiff, high-aspect-ratio structures. Owing to high directionality (inde-

pendent of the crystal orientation) and selectivity, advanced plasma etching makes it possible to

realise special shapes of silicon structures using specialised processes with backside micromachin-

ing. The main advantage of this method is the possibility of using RIE with photoresist as a masking

layer instead of silicon oxide or silicon nitride used in the previous wet etching process.

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Often one would like to have a high-force (at least 1 µN), large-displacement (at least 10 mi-

crometers) linear actuation mechanism available (Figure 6 a and b).We solved the dilemma by

using mechanical comb-frames to magnify the forces for high-displacement actuation. The original-

ity of the developed process developed lies in secondary effects, such as reactive ion etching-lag or

shadowing, which are used to achieve different depths of etching of different structures on the same

wafer. Based on this technology a new class of MEMS found potential for signal-processing

applications for filters which require narrow band-with and good signal-to-noise ratio.

Advances in the micromachining of silicon have led to the development of tunnelling dis-

placement transducers which offer advantages in sensitivity and size over conventional transducers.

Figure 7 presents a micro- machined tunnelling sensor based on a comb driven actuator. These

sensors are used for measurement of physical quantities (position, pressure, acceleration, force ...)

and rely on sensing a change in the relative separation between a pair of components.

a)

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b)

Figure 6. SEM micrographs of a) Single Crystal Silicon electrostatic driven comb resonator and b)

actual x-y nano-stage.

The scanning electron micrographs (SEM) (Figure 8) shows detail of 5mm2 sharp Si (tips are

with curvature < 10 nm) emitter array of 25000 tips formed by dry etching with ICP system using

gas chopping of SF6 (as etching precursor) with N2/O2 gas (as sidewall passivation precursor) and

low temperature of the etched substrate. The etch mask consisted of 1µm thick thermal SiO2 which

was mostly eroded during the etching. The final shape of emitters was obtained by thermal

oxidation and removing the grown oxide.

tunnelling tip

Tunnelling current reference

V actuator V feedback

Vt

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Figure 7. Tunnelling based acceleration sensor with electrostatic driven comb actuator for tip distance approach.

The energy density in the case of silicon MEMS will be the common denominator for

describing various types of electrostatic micro-motors, such as variable-capacitance micro-motors

and wobble motors. These electrostatic micro-motors differ from each other in the manner in which

they convert electrical energy in the gap to mechanical energy. The energy density in an common

magneto-static motor is described by: ½B2/µ0, where µ0 is the permeability of free space in the gap

and B is the magnetic flux density. Typically, magneto-static motors use highly permeable

materials such as iron to create large magnetic fields. These magnetic fields are generated by

pumping current though windings which are wrapped around the highly permeable material. The

saturation limits of these materials limit the magnetic fields and consequently the energy storage in

the gap. In an electrostatic motor on the other hand, the energy density in the gap is ½ε0E2 where ε0

is the permittivity of free space in the gap and E is the electric field. Normally electrostatic motors

create force through the application of electric fields between the two plates of a capacitor which

Figure 8. Detail of etched 45µm high silicon field emitters with tip curvature < 10 nm.

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are offset from one another. In the electrostatic motors at very small scale, such as in the case of a

one micron gap, it is possible to apply much larger electric fields before breakdown that at larger

scales, and so at small scale electrostatic motors have energy densities compatible to the energy

densities of small magneto-static motors. The variable capacitance electrostatic motor is based on a

radial air gap capacitor. Figure 9 shows a scanning electron microscope photograph of one such a

motor which we have fabricated. The rotor is roughly 50 microns in diameter and the entire

structure was built without hand assembly using lithography and cryogenic dry etching onto a SOI

substrate. The rotor freely rotates parallel to the substrate around a pin bearing. If we model rotor to

stator side-to-side overlap of this radial air gap actuator as an infinite parallel-plate capacitor, the

total energy stored in the gap (Ψ) is ½ CV2. If the two poles don't overlap at all, the energy in the

gap is thus zero (from V=0) and the energy increases linearly as the two poles move across one

another (to a first order). Consequently, for constant voltage V, physically moving the poles over

one another increases the energy storage in the gap (a generator), or, conversely, application of a

voltage across two misaligned poles creates a force which acts to align them (a motor).

Mathematically, there is then a force equal to the change in energy per change in volume F = dE/dS

and this force is used to move the rotor. On a variable capacitance motor, once the poles have

become aligned, a voltage is then phase shifted to the next set of poles which are not aligned to give

the rotor stepped circular motion.

High aspect ratio etching is used successfully for forming advanced piezoresistive sensors for

Atomic Force Microscopy with deflection sensitivity of the cantilever better than 6.10-5 ∆R/R per

nanometer. Figure 10a presents a microprobe device for Scanning Friction Force Microscopy, based

on a new design, capable of differentiation of forces acting in x- , y-, and z-directions. The novelty

of this device involves both, a new shape of the silicon structure and a specific location of the

piezoresistors, enabling better separation of the forces and measurement of forces acting in three

dimensions. Figure 10b shows a array of piezoresistive AFM sensors for high speed parallel

measurements. Both AFM cantilever devices were defined in the silicon membrane by

photolithography step at the top side of the wafer and silicon dry GCET etching in a SF6/CHF3/Ar

plasma. Thick 20µm photoresist AZ4562 was used to mask the circuit and to protect the tip.

ϕ2

+V

ϕ1

ϕ2

gap

ϕ1

ϕ1

ϕ2

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a)

Figure 9. SEM micrograph of a silicon single crystal variable capacitance micromotor fabricated by

using the cryo-etching technique in SF6/O2 plasma.

a) b) Figure 10. SEM micrographs of a) piezoresistive AFM-tribology sensor [15]; b) Array of

piezoresistive AFM sensors for high speed metrology.

Figure 11 shows single-crystalline silicon micro-mirrors based on sacrificial layers and deep

dry etching as well as electrochemically stopped wet etching (fully compatible steps with IC

technology) [16]. In the first step the 3.5 µm thick silicon membrane was prepared by using the

electrochemical etch stop at the p-n junction. The micro-mirror was defined by high-resolution EBL

and etched by a high anisotropic bromine/chlorine RIE-process. The mirrors are separated from the

control electrodes by a sacrificial PECVD oxide layer. The fabricated 10µm x 10µm micro-mirrors

are held by two 0.3 µm width and 3.5 µm thick Si-membrane bridges. The developed construction

allows for example the use of the micro-mirror-surface as a laser light deflector.

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Conclusions

The benefits of research on micro-machines and micro robots are expected in such areas as

information technology, industrial equipment, medical and many scientific fields. For advance of

single crystal silicon (SCS) micro-machine technology, the establishment of methods to evaluate

the properties of various materials, micro-sensors micro actuators and components is required.

Advanced etching process development should include, as a goal, improving our understand-

ing of the physical and chemical processes taking place on surfaces in plasma etching reactors. The

immediate need for more knowledge in this particular area is however in the areas of side-wall

passivation interactions and the etching of very high aspect ratio features.

The feasibility of producing MEMS and MOEMS from single crystalline silicon using a reactive

ion etching technology is useful in many different applications. Etching rates ranging from 50 to

7000 nm/min are possible depending on plasma reactivity and plasma sources.

19

Figure 11. (a) Micrographs of one moving sequence of micromirror held by 0.3µm width torsional Si-beams. (b) Construction of a movable micro-mirror [16].

Acknowledgements

I would like to address special thanks to my friends Dr. Tzvetan Ivanov, Dr. Burkhard

Volland, Dr. Hans Löschner, Dr. Piotr Grabiec, Dr. Ivan Kostic, Dr. Peter Hudek, Dr. Teodor

Gotszalk, Dr. Robert Pedrak, Thomas Schenkel, Dr. Deirdre Olynik, Dr. Jan Mejer and Dr. Feng

0.3 µm

10 x 10 µm

20

Shi, for their contribution in many MEMS projects.

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