Dheeraj Sharma

CONTACTINFORMATION

PhD Research Scholar Mobile: +91-9826809038School of Engineering, E-mails: dheerajs@iiti.ac.inIndian Institute of Technology, Indore dheeraj24482@gmail.comIndore, India WWW:dheerajsharma.yolasite.com

OBJECTIVE To utilize my knowledge, skills, and attitude towards growth of the organization.

RESEARCHINTERESTS

Circuit Design and Nanotechnology, Low-power MOSFET, Tunnel FET, MultigateMOSFET, Solid-State Devices, Semiconductor Devices: Physics, Simulation andModeling.

JOURNALPUBLICATIONSDURING Ph.D

Dheeraj Sharma and Santosh Kumar Vishvakarma: Precise analytical modelfor short channel quadraple gate gate-all-around MOSFET, IEEE TransactionsNanotechnology, In press 2013.

Dheeraj Sharma and Santosh Kumar Vishvakarma: Precise analytical model forshort channel cylindrical gate (CylG) gate-all-around (GAA) MOSFET, SolidState Electronics, Elsevier, In press 2012.

Dheeraj Sharma and Santosh Kumar Vishvakarma: Analitical modeling of 3Dpotential distribution of a rectangular gate (RecG) gate-all-around MOSFET inSubthreshold and Strong Inversion regions, Microelectronics Journal, Elsevier,volume 43, issue 6, pp. 358-363, June 2012.

Dheeraj Sharma and Santosh Kumar Vishvakarma: Analyses of scaling effectson DC characteristics and analog/RF performance of nanowire quadruple GateGate-ALL-Around MOSFET, IEEE Transactions on Electron Devices, UnderReview.

CONFERENCEPUBLICATIONSDURING Ph.D

Dheeraj Sharma and Santosh Kumar Vishvakarma: Analysis of Crossover Pointand Threshold Voltage for Triple Gate MOSFET, 9th IEEE Spanish Conferenceon Electron Devices, February, 12th-14th Feb. 2013, Valladolid, Spain.

Dheeraj Sharma and Santosh Kumar Vishvakarma: Analytical modeling of thesubthreshold potential of nanoscale GAA rectangular gate MOSFET, Interna-tional Workshop on Physics of Semiconductor Devices (IWPSD), Dec. 19-22,2011, IIT Kanpur, India

Dheeraj Sharma and Santosh Kumar Vishvakarma: Isomorphic polynomialbased precise analytical modeling of 3D potential distribution for surroundinggate gate-all-around MOSFET, IEEE International Conference on EmergingElectronics (ICEE), Dec. 15-17, 2012, IIT Bombay, India, Accepted.

Dheeraj Sharma, Santosh Kumar Vishvakarma and Devesh Dwivedi: Analy-ses of scaling effects on analog?RF performance of nanowire gate-aLL-aroundMOSFET, IEEE Asian Solid-State Circuits Conference A-SSCC 2013, UnderReview.

JOURNALPUBLICATIONSDURING M.Tech.

Dheeraj. Sharma, Varun. Bajaj, and Aftab Beig: New Approach for design ofsinusoidal oscillator, International Journal of Electronics and Computers, Vol.II, pp. 121-129, 2010.

Varun Bajaj, Dheeraj Sharma and Aftab Beig: A 6.227 GHz CMOS voltage-controlled oscillator, International Journal of Electronics and Computers, Vol.II, pp. 91-98, 2010.

CONFERENCEPUBLICATIONSDURING M.Tech.

Dheeraj Sharma, Aftab Beig, and Dinesh Kumar Mishra: A New Current ModeDesign Approach for Differential Input Analog Signal Multiplier, InternationalConference on Control, Automation, Communication and Energy Conservation(INCACEC-2009), June 4-6, 2009, Vol. II, pp. 587-590, 2009.

Dheeraj Sharma and Devendra Singh Ajnar: Design of CMOS based CurrentConveyor, National level conference on Emerging Trend in Power and EnergySystems (ETPES-09), FEB 26-28 PP. ET 1-6, 2009.

Dheeraj Sharma and Prof. Devendra Singh Ajnar: Design of Sinusoidal Oscil-lator Using Second Generation currenr conveyor, Emerging Trend In Engg andTechnology (ETET-09), March 24-25,pp. EC 1-5, 2009.

Dheeraj Sharma and Devendra Singh Ajnar: Design Of Instrumentation Ampli-fier Using Current Conveyor, National level conference (ATHENA-09), APRIL24-25 PP. ET 1-6, 2009.

Dheeraj Sharma, Aftab Beig and Devendra Singh Ajnar: Larger BandwidthWider Dynamic Range, Differential Difference Current Mode Circuit, NationalLevel Conference AICON-09, FEB 06-08, CSIT Durg (CG), 2009.

Dheeraj Sharma and Aftab Beig: A Comparative Study of Current Convey-ors and their application, National Conference on Applied Engg. and Science(TECHNOSGA-08), 0CT 24, 2009, PP 86-91.

Dheeraj Sharma and Aftab Beig: Larger Bandwidth Wider Dynamic Range,Differential Difference Current Conveyor (DDCC), National Level ConferenceAAYAAM -09, Jan 17-18.

EDUCATION Ph.D (pursuing), School of Engineering Jan 2011-Till now

Institute: Indian Institute of Technology, Indore, India Thesis Topic: Unified and compact multigate gate-all-around MOSFETs mod-

eling and its implementation in Circuit Design. Advisor: Dr. Santosh Kumar Vishvakarma Area of study: Nanoscale devices modeling and circuit design

M. Tec., Department of Electronics and Instrumentation July 2007-June 2009 Institute: SGSITS, Indore, India Thesis Topic: Design of CMOS based current conveyor and its applications as

a oscillator. Advisor: D. S. Ajnar Area of Study: Microelectronics and VLSI Design

B. E. Department of Electrical Engineering 2000-2004 University: Rajiv Gandhi Proudyogiki Vishwavidyalaya, Bhopal, India Electrical Engineering

EXPERIENCE Assistant Professor, Department of Electrical Engineering Mar. 2005-Dec. 2010 Institute: Shri Vaishnav Institute of Tecchnology and Science, Indore Responsible for lecture and supervision of electronics laboratory.

Teaching Assistant, Department of Electrical Engineering 2011-Till now Lab Instructor for EE-351: Microprocessors Lab

Autumn 2012 (2 sections), Autumn 2011 (2 sections), Responsible for supervision of laboratory and tutorials

Lab Instructor for ME-304: Microprocessor and Automatic Control Spring 2012 (2 sections),

Responsible for supervision of laboratory and tutorials

Lab Instructor for EE-154: Basic electrical and electronics laboratory Spring 2011 (2 sections), Responsible for supervision of laboratory and tutorials

WORKSHOP Participated in international workshop on the physics of semiconductor devicesat Indian Institute of Technology, Kanpur from December 19-22, 2011

Participated in workshop on MATLAB Application in Modeling and Simulationof Engineering systems held under the department EC at S.V.C.E. Indore from19/02/10 to 21/02/10.

Participated in workshop on Introduction to MATLAB and Simulink held underthe department EEE at L.N.C.T. Indore from 7/10/09 to 10/10/09.

Participated in workshop on MATLAB ATHENA held at SIRT Bhopal (M.P)on 24 and 25 APRIL 2009.

Advances in Energy Engineering and Environment at BANSAL EngineeringCollege Indore 2010.

Recent Trends and Developments in Design, Operation and Testing of EHVClass Equipments and Switch Gears at V.N.S.Engineering college Bhopal 2009.

SOFTWARESKILLS

HDL Language: VHDL, Verilog. Programming Language: C, MATLAB. EDA front end Tool: Xilinx ISE, Quartus, Modelsim. EDA backend Tool:

TANNER Tool(S-Edit, T-spice, W-Edit). Synopsys (EDA). Synopsys (TCAD). Cadence (icfb and virtuoso, spectreRF).

For device modeling Silvaco Deck Build (Athena, Atlas) Dev Edit Tonyplot (2D, 3D)

AWARDS IBM Ph.D. Fellowship-2013 award, Doctoral scholarship, Ministry of Human Resource Development, India (2011-

2014) First prize in student conference vellum at SGSITS Indore (2009) Scholarship from 6th to 12th by Government of India (1993-1999) Founded by Department of Science and Technology (DST) to present a research

paper in 9th IEEE Spanish Conference on Electron Devices, February, 12th-14thFeb. 2013, Valladolid, Spain.

PERSONALPROFILE

Date of Birth: 20-09-1981 Category: General Nationality: India Languages known: English, Hindi Hobbies: Making Friends Permanent Address: 26-Sarvodaya colony

Bhandariya RoadKhandwa (M.P) 450001

MOREINFORMATION

More information and auxiliary documents can be found athttp://dheerajsharma.yolasite.com