ds rslic r101 d2 id080280 - icdevice · two on-chip relay drivers and snubber circuits ... vtx rsn...

Document ID# 080280 Date: May 07, 2002Rev: E Version: 1Distribution: Public Document

Document ID# 080280 Date: Nov 25, 2002Rev: D Version: 2Distribution: Public Document

Le79R101Ringing Subscriber Line Interface Circuit

VoiceChip Family 79R SeriesAPPLICATIONS Integrated Access Device (IAD) Smart Residential Gateway (SRG) Set Top/House Side Box Network Interface Unit (NIU) Cable Modem Cable PC Fiber in the Loop (FITL) Fiber to the Home (FTTH) Wireless Local Loop (WLL) Intelligent PBX ISDN TA/NT1

FEATURES Meets UL1950 safety requirements Through sinusoidal ringing with DC offset On-chip ring-trip detector Low standby state power Battery operation:

VBAT1: 15 V to 99 V

VBAT2: 15 V to VBAT1 On-chip battery switching and feed selection On-hook transmission Two-wire impedance set by single external impedance Programmable constant-current feed Programmable Open Circuit voltage Programmable loop-detect threshold Current gain = 1000 Ground-key detector Polarity reversal option available Internal VEE regulator (no external 5 V power supply

required) Two on-chip relay drivers and snubber circuits

RELATED LITERATURE 080255 Le79R79/R100/R101 SLIC Evaluation Board

Users Guide 080149 Le79R79 Ringing SLIC Users Guide 080158 Le79R70/79/100/101 Ringing SLIC Technical

Overview 080458 Le79R100/101 Vs. Le79R79 Device

Comparison Brief 080753 Le58QL02/021/031 QLSLAC Data Sheet 080754 Le58QL061/063 QLSLAC Data Sheet

ORDERING INFORMATION

Notes:-1: 52 dB Longitudinal Balance, Polarity Reversal-2: 63 dB Longitudinal Balance, Polarity Reversal-3: 52 dB Longitudinal Balance, No Polarity Reversal-4: 63 dB Longitudinal Balance, No Polarity Reversal

* Legerity reserves the right to fulfill all orders for this device with parts marked with the "Am" part number prefix, until such time as all inven-tory bearing this mark has been depleted. It should be noted that parts marked with either the "Am" or the "Le" part number prefix are equiva-lent devices in terms of form, fit, and function. The only difference be-tween the two is in the part number prefix appearing on the topside mark.

Devices* PackageLe79R1011JC

32-pin PLCCLe79R1012JCLe79R1013JCLe79R1014JC

DESCRIPTIONThe Le79R101 device is a bipolar monolithic Ringing SLICdevice that offers on-chip sinusoidal ringing. The sinusoidalringing waveform generated through the Le79R101 device hasan advantageously low distortion, and satisfies the traditionalringing waveform requirements of small PBX, WLL, andPairgain applications. The Le79R101 device also offers offsetringing and satisfies most phones that require an offset fromring to tip during ringing.

BLOCK DIAGRAM

Two-WireInterface

RTRIP1

RTRIP2

A(TIP)

HPA

HPB

B(RING)

VBAT2

VBAT1

Ring-TripDetector

Ground-KeyDetector

Off-HookDetector

SignalTransmission

SwitchDriver

Power-FeedController

RelayDriver

RelayDriver

Input Decoderand Control

RYOUT2

RYE

RYOUT1

D1

D2

C1

C2

C3

E1

DET

RD

VTXRSN

VRINGRDCRDCR

RSGL

RSGH

VCC VNEG BGND AGND/DGND

RREF

2 Le79R101 VoiceChip 79R Series Data Sheet

TABLE OF CONTENTSApplications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1Related Literature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1Product Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3Connection Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6

Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6Thermal Resistance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6Electrical Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6

Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7Transmission Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7Longitudinal Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7Idle Channel Noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8Insertion Loss and Four-to-Four-Wire Balance Return Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8Line Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8Power Supply Rejection Ratio, Active Normal State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9Supply Currents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9Logic Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9Ring Trip Detector Input. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9Ring Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10Ground-Key Detector Thresholds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10Loop Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10Relay Driver Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10

Relay driver schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10SLIC Decoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11User-Programmable Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12DC Feed Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13Ring-Trip Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14Test Circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15Le79R101 Test Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18Application Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19Line card Parts List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20Physical Dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21

32-Pin PLCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22

Revision B1 to C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22Revision C to D1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22Revision D1 to D2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22

Le79R101 VoiceChip 79R Series Data Sheet 3

PRODUCT DESCRIPTIONThe Legerity family of subscriber line interface circuit (SLIC) products provide the telephone interface functions requiredthroughout the worldwide market. Legerity SLIC devices address all major telephony markets including central office (CO),private branch exchange (PBX), digital loop carrier (DLC), fiber-in-the-loop (FITL), radio-in-the-loop (RITL), hybrid fiber coax(HFC), and cable telephony applications.The Legerity SLIC devices offer support of BORSHT (battery feed, overvoltage protection, ringing, supervision, hybrid, and test)functions with features including current limiting, on-hook transmission, polarity reversal, Tip Open, and loop-current detection.These features allow reduction of linecard cost by minimizing component count, conserving board space, and supportingautomated manufacturing.The Legerity SLIC devices provide the two- to four-wire hybrid function, DC-loop feed, and two-wire supervision. Two-wiretermination is programmed by a scaled impedance network. Transhybrid balance can be achieved with an external balancecircuit or simply programmed using a companion Legerity codec, the Le58QL02/021/031/061/063 (QLSLAC) device.The Le79R101 device is a bipolar monolithic Ringing SLIC device that offers on-chip sinusoidal ringing. Now designers canachieve significant cost reductions at the system level for reduced-loop applications by integrating the ringing function on chip.Examples of such applications would be ISDN terminal adaptors, fiber-in-the-loop, radio-in-the-loop, hybrid fiber/coax and cabletelephony (home-side) boxes. The Le79R101 device can provide sufficient voltage to meet the stringent LSSGR five-ringerequivalent specification. Using an appropriate input signal, the Le79R101 device provides a sinusoidal ringing waveform with DCoffset.In order to further enhance the suitability of this device in short-loop, distributed switching applications, Legerity has maximizedpower savings by incorporating battery switching on chip. The Le79R101 device switches between two battery supplies such thatin the off-hook (active) state, a low battery is used to save power. In order to meet the Open Circuit voltage requirements of faxmachines and maintenance termination units (MTU), the SLIC automatically switches to a higher voltage in the on-hook (standby)state.Like all of the Legerity SLIC devices, the Le79R101 device supports on-hook transmission, ring-trip detection, programmableloop-detect threshold, and is available with on-chip polarity reversal. The Le79R101 device is a programmable constant-currentfeed device with two on-chip relay drivers to operate external relays. Several performance grades are available to meet bothCCITT and LSSGR requirements, including various longitudinal balance options. This unique device is available in a 100-Vbipolar process in a 32-pin PLCC package.


CONNECTION DIAGRAM

Note:1. Pin 1 is marked for orientation.

2. NC = No connect.

RY

OU

T2

VC

C

VB

AT

2

BG

ND

B(R

ING

)

A(T

IP)

RD

4 3 2 1 32 31 30

29

28

27

26

25

24

23

22

21

5

6

7

8

9

10

11

12

13

14 15 16 17 18 19 20C

1

D2

RR

EF

RS

GH

RS

GL

RD

C

AG

ND

/DG

ND

RTRIP1

RTRIP2

HPB

HPA

RINGIN

RDCR

VTX

VNEG

RSNDET

VBAT1

RYE

RYOUT1

32-Pin PLCC

NC

D1

E1

C3

C2


PIN DESCRIPTIONS

Pin Names Type Description

AGND/DGND Gnd Analog and digital ground

A(TIP) Output Output of A (TIP) power amplifier

BGND Gnd Battery (power) ground

B(RING) Output Output of B(RING) power amplifier

C3C1 Input Decoder. SLIC control pins. C3 is MSB and C1 is LSB. TTL compatible.

D1 Input Relay1 Control. TTL compatible. Logic Low activates the Relay1 relay driver.

D2 Input Relay2 Control. (Option) TTL compatible. Logic Low activates the Relay2 relay driver.

DET OutputSwitchhook Detector. When enabled, a logic Low indicates that a selected condition is detected. The detect condition is selected by the logic inputs (C3C1 and E1). The output is open collector with a built-in 15 kΩ pull-up resistor.

E1 Input Ground-Key Enable. (Option) A logic High selects the off-hook detector. A logic Low selects the ground-key detector. TTL compatible.

HPA Capacitor High-Pass Filter. A(TIP) side of high-pass filter capacitor.

HPB Capacitor High-Pass Filter. B(RING) side of high-pass filter capacitor.

RD Resistor Detect Resistor. Detector threshold set and filter pin.

RDC OutputDC Feed Resistor. Connection point for the DC-feed current programming network. The other end of the network connects to the receiver summing node (RSN). The sign of VRDC is negative for normal polarity and positive for reverse polarity.

RDCR Connection point for feedback during ringing.

RREF Ringing Reference. Reference voltage for Vring pin.

RSGH Input Saturation Guard High. Pin for resistor to adjust Open Circuit voltage when operating from VBAT1.

RSGL InputSaturation Guard Low. Pin for resistor to adjust the anti-saturation cut-in voltage when operating from both VBAT1 and VBAT2.

RSN InputReceive Summing Node. The metallic current (both AC and DC) between A(TIP) and B(RING) is equal to 1000 x the current into this pin. The networks that program receive gain, two-wire impedance, and feed resistance all connect to this node.

RTRIP1 Input Ring-Trip Detector. Ring-trip detector threshold set and filter pin.

RTRIP2 InputRing-Trip Detector. Ring-trip detector threshold offset (switch to VBAT1). For power conservation in any nonringing state, this switch is open.

RYE Output Common Emitter of RYOUT1/RYOUT2. Emitter output of RYOUT1 and RYOUT2. Normally connected to relay ground.

RYOUT1 Output Relay/Switch Driver. Open collector driver with emitter internally connected to RYE.

RYOUT2 Output Relay/Switch Driver. (Option) Open collector driver with emitter internally connected to RYE.

VBAT1 Battery Battery supply and connection to substrate.

VBAT2 Battery Power supply to output amplifiers. Connect to off-hook battery through a diode.

VCC Power Positive analog power supply

VNEG Power Negative analog power supply. This pin is the return for the internal VEE regulator.

VRING Input Ring Signal. Ring signal input with respect RREF. 1 V maximum level 10 kΩ input impedance to RREF.

VTX Output Transmit Audio. This output is proportional to the A (TIP) and B (RING) metallic AC voltage. VTX also sources the two-wire input impedance programming network. (See two-to-four-wire gain accuracy.)


ELECTRICAL CHARACTERISTICS

Absolute Maximum RatingsStresses greater than those listed under Absolute Maximum Ratings can cause permanent device failure. Functionality at orabove these limits is not implied. Exposure to absolute maximum ratings for extended periods can affect device reliability.

Note:Thermal limiting circuitry on chip will shut down the circuit at a junction temperature of about 165° C. Operation above 145° C junction temperature may degrade device reliability.

Thermal ResistanceThe junction to air thermal resistance of the Le79R101 device in a 32-pin PLCC package is 45° C/W. The typical junction to casethermal resistance is 14° C/W. Measured under free air convection conditions and without external heat-sinking.

Electrical Operating RangesLegerity guarantees the performance of this device over commercial (0° to 70°C) and industrial (−40° to 85°C) temperatureranges by conducting electrical characterization over each range, and by conducting a production test with single insertioncoupled to periodic sampling. These characterization and test procedures comply with section 4.6.2 of Bellcore TR-TSY-000357Component Reliability Assurance Requirements for Telecommunications Equipment.

Environmental Ranges

Storage Temperature 55 to +150ºCVCC with respect to AGND/DGND 0.4 to +7 VVNEG with respect to AGND/DGND 0.4 V to VBAT2VBAT2 VBAT1 to GNDVBAT1 with respect to AGND/DGND:Continuous10 ms

+0.4 to 104 V+0.4 to 109 V

BGND with respect to AGND/DGND: +3 to 3 VA(TIP) or B(RING) to BGND:Continuous VBAT1 5 to +1 V10 ms (F = 0.1 Hz) VBAT1 10 to +5 V1 µs (F = 0.1 Hz) VBAT1 15 to +8 V250 ns (F = 0.1 Hz) VBAT1 20 to +12 VCurrent from A (TIP) or B (RING) ±150 mARYOUT1, RYOUT2 current 75 mARYOUT1, RYOUT2 voltage RYE to +7 VRYOUT1, RYOUT2 transient RYE to +10 VRYE voltage (relays off) BGND to VBAT1RYE voltage (relays on) BGND to 90 VC3C1, D2D1, E1:Input voltage 0.4 V to VCC + 0.4 VESD Immunity (Human Body Model) 1500 V minMaximum power dissipation, continuous,TA = 85º C, No heat sink (see note)In 32-pin PLCC package 1.33 WThermal data:In 32-pin PLCC package

θJA

45º C/W typ

Ambient Temperature0° to 70°C Commercial40° to +85 °C extended temperature

Ambient Relative Humidity 15 to 85%


Electrical Ranges

SPECIFICATIONS

Transmission Performance

Longitudinal Performance(See Figure 7.)

Note:* Performance Grade

VCC 4.75 to 5.25 V

VNEG 4.75 V to VBAT2

VBAT1 15 to 99 V

VBAT2 15 V to VBAT1

AGND/DGND 0 VBGND with respect to AGND/DGND 100 to +100 mV Load resistance on VTX to ground 20 kΩ minimumRREF 0 to VCC/2

VRING RREF ± 1 V pk

Description Test Conditions (See Note 1.) Min Typ Max Unit Note

2-wire return loss 200 Hz to 3.4 kHz (See Figure 9.) 26 dB 1., 4., 6.

ZVTX, analog output impedance 3 20 Ω 1.

VVTX, analog output offset voltage0° to +70° C 35 +35

mV40° to +85° C 40 +40

ZRSN, analog input impedance 1 20 Ω

Overload level, 2-wire and 4-wire, off hook Active state 2.5 Vpk 2.a

Overload level, 2-wire On hook, RLAC = 600 Ω, OHT state 0.88 Vrms 2.b

THD (Total Harmonic Distortion) +3 dBm 64 50dB 5.

THD, on hook, OHT state 0dBm, RLAC = 600 Ω 40


Longitudinal to metallicL-T, L-4 balance

200 Hz to 1 kHz 1, 3* 52

dB

normal polarity 2, 4 63reverse polarity 2 54normal polarity,40° to +85° C 2, 4 58 4.

1 kHz to 3.4 kHz 1, 3* 52normal polarity 2, 4 58reverse polarity 2 54normal polarity,40° to +85° C 2, 4 54 4.

Longitudinal signal generation 4-L 200 Hz to 800 Hz normal polarity 42Longitudinal current per pin (A or B) Active or OHT state 8.5 17 mArms 4.

Longitudinal impedance at A or B 0 to 100 Hz, TA = +25° C 25 Ω/pin


Idle Channel Noise

Insertion Loss and Four-to-Four-Wire Balance Return Signal(See Figure 5 and Figure 6.)

Line Characteristics


C-message weighted noise 0° to +70° C +7 +11

dBrnC 40° to +85° C +12

4.Phosphometric weighted noise

0° to +70° C 83 79dBmp

40° to +85° C 78

Description Test Conditions (See Note 1.) Min Typ Max Unit NoteGain accuracy, 4- to 2-wire 0 dBm, 1 kHz 0.20 0 +0.20

dBµs

3.4- to 4- wire4- to 4-wire

relative to 1 kHz 40° to +85° C 0.15 +0.15 3., 4.relative to 0 dBm 40° to +85° C 0.15 +0.15

40° to +85° C 0.15 +0.15+3 to 0 dBm 0.35 +0.35 3.

Group delay 0 dBm, 1kHz 3 1., 4., 6.

Description Test Conditions (See Note 1.) Min Typ Max Unit NoteIL, Loop-current accuracy, Active state

IL in constant-current region 0.915 IL IL 1.085IL

mAmA

RLDC = 1250 Ω, RSGL = short,Bat2 = −35 V 20

OHT, A and B to ground 43 4.IA, Pin A leakage, Tip Open state RL = 0 200IB, Pin B current, Tip Open state B to ground 26

VA, Standby, ground-start signaling A to −48 V = 7 kΩ,B to ground = 100 Ω −7.5 −5 V 4.

VB, Open Circuit, Standby state −60 10.

IL, Accuracy, Standby state

IL = Resistive feed region

0.8IL IL 1.2IL mA

IL = constant-current regionTA = 25° C 18 27 39

TA = 40° to +85° C 16 27 4.

IL54

RL 400+----------------------- Vbat 62–<,=


Power Supply Rejection Ratio, Active Normal State(VRIPPLE = 100 mVrms)

Power Dissipation

Supply Currents

Logic Inputs(Applies to C3C1, D2D1, and E1).

Logic Output (DET)

Ring Trip Detector Input

Description Test Conditions (See Note 1.) Min Typ Max Unit NoteVCC 50 to 3400 Hz 33 50

dB 5.VNEG 50 to 3400 Hz 30 40

VBAT1 50 to 3400 Hz 30 50

Description Test Conditions (See Note 1.) Min Typ Max Unit NoteOn hook, Open Circuit state 30

mWOn hook, Standby state 50On hook, OHT state 180On hook, Active state 110Off hook, Active state RL = 300 Ω 470 680


ICC,On-hook VCC supply current

Open Circuit state 3.0 4.5

mA

Standby state 2.5 5.5OHT state 5.0 8.0Active state-normal 5.5 9.0Standby state 0.15 0.2OHT state 0.85 1.1Active state-normal 0.85 1.1

IBAT1,On-hook VBAT1 supply current

Open Circuit state 0.8 1.0Standby state 0.4 1.5OHT state 2.0 4.0Active state-normal 0.5 1.5

IBAT2,On-hook VBAT2 supply current Active state-normal 1.75 5.0

Description Test Conditions Min Typ Max Unit NoteVIH, Input High voltage 2.0

VVIL, Input Low voltage 0.8IIH, Input High current 75 40

µAIIL, Input Low current 400

Description Test Conditions (See Note 1.) Min Typ Max Unit NoteVOL, Output Low voltage IOUT = 0.8 mA, 15 kΩ to VCC 0.40

VVOH, Output High voltage IOUT = 0.1 mA, 15 kΩ to VCC 2.4

Description Test Conditions (See Note 1.) Min Typ Max Unit NoteRing detect accuracy See ring trip detection equation. 10 +10 %


Ring Signal

Ground-Key Detector Thresholds

Loop Detector

Relay Driver Output(Relay 1 and 2)

RELAY DRIVER SCHEMATIC

Note:1. Unless otherwise noted, test conditions are BAT1 = 99 V, BAT2 = 21 V, VCC = +5 V, VNEG = 5 V, RL = 600 Ω,

RDC1 = 50 kΩ, RDC2 = 50 kΩ, RD = 75 kΩ, no fuse resistors, CHP = 0.018 µF, CDC = 1.2 µF, D1 = D2 = 1N400x,two-wire AC input impedance (ZSL) is a 600-Ω resistance synthesized by the programming network shown below.RSGL = open, RSGH = short to GND, RDCR1 = 15 kΩ, RDCR2 = 15 kΩ, CDCR = 10 nF, RRT1 = 833 kΩ, RRT2 = 42 kΩ, CRT = 1.0 µF,VREF = 0 V.

Description Test Conditions (See Note 1.) Min Typ Max Unit NoteVAB, Ringing Ringload = 1570 Ω 90 93 Vpk 7.

VAB, Ringing offset VRINGIN = 2.5 V −5 0 5 V

(VRINGIN gain) RL = Open circuit 95 100 105 V/V

Ring input impedance to RREF 10 k Ω

Harmonic distortion VRING = 0.65 Vrms, RL = 1570 Ω 3 5 %

Off-hook current limit RL = 300 Ω 73 83 93 mA 4.

Ringing source impedance 100 Ω 4.

Description Test Conditions (See Note 1.) Min Typ Max Unit NoteGround-key current threshold B to ground 11 mA

Description Test Conditions (See Note 1.) Min Typ Max Unit NoteRLTH, Loop-resistance detect threshold

Active −20 20

% 9.OHT −20 20ILTH, Loop-current detect threshold Standby −12 12

Description Test Conditions (See Note 1.) Min Typ Max Unit NoteVOL, On voltage (each output) IOL = 30 mA +0.25 +0.4

VVOL, On voltage (each output) IOL = 40 mA +0.30 +0.8 4.

IOH, Off leakage (each output) VOH = +5 V 100 µA

Zener breakover (each output) IZ = 100 µA 6.6 7.9V

Zener on voltage (each output) IZ = 30 mA 11

∆VAB ∆VRINGIN⁄

RYOUT1

BGND BGND

RYE

RYOUT2


Figure 1. AC Input Impedance Programming Network

2. a. Overload level is defined when THD = 1%.b. Overload level is defined when THD = 1.5%.

3. Balance return signal is the signal generated at VTX by VRX. This specification assumes that the two-wire AC load impedance matches the programmed impedance.

4. Not tested in production. This parameter is guaranteed by characterization or correlation to other tests.

5. This parameter is tested at 1 kHz in production. Performance at other frequencies is guaranteed by characterization.

6. Group delay can be greatly reduced by using a ZT network such as that shown in Note 1 above. The network reduces the group delay to less than 2 µs and increases Two-Wire Return Loss. The effect of group delay on linecard performance may also be compensated for by synthesizing complex impedance with the QSLAC or DSLAC device.

7. 90 Vpk provides 57 Vrms with a crest factor of 1.4 to a load of 1400 Ω with 2 RF = 100, and RLINE = 70 Ω (1570 Ω).

8. Open Circuit VAB can be modified using RSGH. Longitudinal voltage in OHT state is 30 V limiting VAB to 60 V.

9. RD must be greater than 52 kΩ. See User-Programmable Components, on page 12. for typical value of RLTH.

10. Conforms to UL1950.

SLIC DECODING

Note:* Only 1 and 2 performance grade devices support polarity reversal.

(DET) OutputState C3 C2 C1 Two-Wire Status E1 = 1 E1 = 0 Battery

0 0 0 0 Open Circuit Ring trip Ring trip VBAT21 0 0 1 Ringing Ring trip Ring trip VBAT12 0 1 0 Active Loop detector Ground key VBAT23 0 1 1 On-hook TX (OHT) Loop detector Ground key VBAT14 1 0 0 Reserved Loop detector Ground key VBAT15 1 0 1 Standby Loop detector Ground key VBAT16* 1 1 0 Active Polarity Reversal Loop detector Ground key VBAT27* 1 1 1 OHT Polarity Reversal Loop detector Ground key VBAT1

VTX

RSN

RT1 = 150 k Ω

RT2 = 150 k ΩCT1 = 60 pF

VRXRRX = 300 k Ω


USER-PROGRAMMABLE COMPONENTSZT is connected between the VTX and RSN pins. The fuse resistors are RF, and Z2WIN is the desired 2-wire AC input impedance. When computing ZT, the internal current amplifier pole and any external stray capacitance between VTX and RSN must be taken into account.

ZRX is connected from VRX to RSN. ZT is defined above, and G42L is the desired receive gain.

RDC1, RDC2, and CDC form the network connected to the RDC pin. ILOOP is the desired loop current in the constant-current region.RDCR1, RDCR2, and CDCR form the network connected to the RDCR pin.See Applications Circuit for these components.

CDCR sets the ringing time constant, which can be between 15 µs and 150 µs.

Loop-Threshold Detect Equations

Active and OHT state

RD is the resistor connected from the RD pin to GND and RLTH is the loop-resistance threshold between on-hook and off-hook detection. RD should be greater than 52 kΩ to guarantee detection occurs in the Standby state. Choose the value of RD for high battery state; then use the equation for RLTH to find where the threshold is for low battery.

Standby stateThis equation shows at what resistance the standby threshold is; it is actually a current threshold rather than a resistance threshold, which is shown by the Vbat dependency.

Ring-Trip Detection Equation

IOFFSET = 8 µA for ON transitionIOFFSET = 20 µA for OFF transition

ZT 500 Z2WIN 2RF–( )=

ZRXZL

G42L

-------------1000 ZT•

ZT 500 ZL 2RF+( )+----------------------------------------------------•=

RDC1 RDC22500ILOOP

--------------- =+

RDCR1 RDCR2 + 2250IRINGLIM-----------------------=

CDC 19 msRDC1 RDC2+

RDC1RDC2

-----------------------------------•=

CDCRRDCR1 RDCR2+

RDCR1RDCR2

------------------------------------------- • 150 µs=

RLTHRD

18-------=

RLTHVBAT1 8–

915-------------------------- RD• 400 2RF––= VBAT1 62 V–>

RLTH54

875---------- RD– 400– 2RF–= VBAT1 62 V–>

IRTDVBAT1 1–

RRT1----------------------------- IOFFSET+ 325•=


DC FEED CHARACTERISTICS (See note 1)

IL (mA)0 30

50

VAB(Volts)

2) VASL

3) VAPPL

40

30

20

10

5) VAPPH

4) VASH

Figure 2. Typical VAB vs. IL DC Feed CharacteristicsNote:

1. Constant-current region: where

2. Active state

Anti-sat region:

3. OHT state

Anti-sat region:

VAB ILRL2500

RDC-------------RL ;= = RL RL= 2RF+

VASL61.44 125 103• RSGL+( )

308 103• 4.92 RSGL+

------------------------------------------------------------------ ;=

VAPPL 4.17 VASL+=

ILOOPLVAPPL

RDC1 RDC2+( )

600---------------------------------------- 2RF RLOOP+ +

-----------------------------------------------------------------------------------=

VASH VASHH VASL+=

VASH61.44 101 10• 3 RSGH+( )•

223 103• 4 RSGH+

------------------------------------------------------------------------ ;=

VAPPH 4.17 VASH+=

ILOOPHVAPPH

RDC1 RDC2+( )

600---------------------------------------- 2RF RLOOP+ +

-----------------------------------------------------------------------------------=

OHT State Anti-Sat

Active State Anti-Sat

1) Constant-Current Region

where RSGL = open is default settingwhere RSGL = resistor to GND. VASL increase.

where RSGH = resistor to GND,RSGH = 0 is default setting.where RSGH = open, VASH decrease.


RING-TRIP COMPONENTS

where RLRT = Loop-detection threshold resistance for ring trip and CF = Crest factor of ringing signal (≈ 1.414)

Figure 3. Input via Output of Sinusoidal with DC Offset

Figure 4. Feed Programming

RRT2 42 kΩ=

CRT 1.0 µF=

RRT1 300 CFVBAT1

VBAT1 3.5– 15 µA 300 CF RLRT 150 2RF+ +( )•••( )–---------------------------------------------------------------------------------------------------------------------------------------------------•• RLRT 150 2RF+ +( )•=

VRINGRRef

Vbat/2

RL

A (TIP)

B (RING) RDC

SLICIL

RSN

RDC1

CDCRDC2

a

b

Feed current programmed by R DC1 and R DC2


TEST CIRCUITSFigure 5. Two-to-Four-Wire Insertion Loss

Figure 6. Four-to-Two-Wire Insertion Loss and Four-to-Four-Wire Balance Return Signal

Figure 7. Longitudinal Balance

SLIC

ATIP VTX

AGND

RSN

VAB RT

RRX

IL2-4 = 20 log(VTX / V AB)

RL

2

RL

2

VL

B(RING)

SLIC

ATIP VTX

AGND

RSN

VAB RT

RRX

IL4-2 = 20 log(V AB / VRX)

B(RING)

BRS = 20 log(V TX / VRX)

VRX

RL

SLIC

ATIP VTX

AGND

RSN

VAB

RT

RRX

L-T Long. Bal. = -20 log(V AB / V L)

B(RING)

V

RL

2

RL

2

VL

VL

S1

1

ωCRL<<

S2

S2 Open, S1 Closed S2 Closed, S1Open

4-L Long. Sig. Gen. = 20 log(V L / V RX)

C


Figure 8. Two-Wire Return Loss Test Circuit

Figure 9. Loop-Detector Switching

Figure 10. Ground-Key Switching

Return loss = –20 log (2V M / VS)

ZD: The desired impedance;eg., the characteristic impedance of the line

SLIC

ATIP VTX

AGND

RSN

RRX

B(RING)

CT1

RT1

RT2

VM

ZIN

ZD

VS

R

R

A(TIP)

B(RING) E1

RL = 600 Ω

15 pF

VCC

6.2 kΩ

DET

A(TIP)

B(RING)

RG


Figure 11. RFI Test Circuit

1.5 Vrms80% Amplitude

Modulated100 kHz to 30 MHz

HFGEN

50Ω

L1

L2

200Ω

200Ω

C1

C2

50Ω

50Ω

RF1

RF2

A

B

VTX

CAX33nF

CBX33nF

SLICunder test


LE79R101 TEST CIRCUIT

Note:The input should be sinusoidal with less than ± 1 V peak amplitude.

RTRIP1

CHP

RYOUT1

RYOUT2

BAT1

RYOUT1

RYOUT2

VBAT2

VCC

RD

VTX

+5 V

RD

RT

RDCR

Le79R101

VTX

VRXRSN

RRX

RDC1

RDC2

CDCR

RTRIP2

RRT1

833 kΩ

RRT2

42 kΩ

CRT

1.0 µF

RYERYE

D1

0.1 µF

BAT2D2

0.1 µF

VBAT1

BGND

-5 V

VNEG

75 kΩ RSGH

RSGLshort

open

300 kΩ 300 kΩ

A(TIP)

CAX

2.2 nFA(TIP)

18 nF

HPA

HPBB(RING)

CBX2.2 nF

B(RING)

50 kΩ 50 kΩ RDCR2

15 kΩ

RDCR1

15 kΩ 10 nF

D2D1C3C2C1

D2D1C3C2C1

DETDETE1 E1

BATTERYGROUND

ANALOGGROUND

DIGITALGROUND

See note below.

RREF

AGND/DGND

RDC CDC

RSGHRSGL

VRING


APPLICATION CIRCUIT

Note:The input should be sinusoidal with less than ± 1 V peak amplitude.U2, U3 - TECCOR BATTRAX P1001SC protector or TISP61089AD from Power Innovation. For battery voltages below 80 V, see Le79R79 for alternate protection.D3, D4: 1A, 100 V

RTRIP1

CHP

RYOUT1

RYOUT2

BAT1

RYOUT1

RYOUT2

VBAT2

VCC

RD

VTX

+5 V

RD

RDCR

U1Le79R101

VTX

VRXRSN

RRX

RDC1

RDC2

CDCR

RTRIP2

RRT1

715 kΩ

RRT2

42 kΩ

CRT

1.0 µF

RYERYE

D1

0.1 µF

BAT2D2

0.1 µF

VBAT1

BGND

-5 V

VNEG

66 kΩ RSGH

RSGLshort

open

250 kΩ

A(TIP)

CAX = 2.2 nF

HPA

HPBRING

CBX = 2.2 nFB(RING)

50 kΩ 50 kΩ

RDCR215 kΩ

RDCR1

15 kΩ 10 nF

D2D1C3C2C1

D2D1C3C2C1

DETDETE1 E1

BATTERYGROUND

ANALOGGROUND

DIGITALGROUND

See note below.

AGND/DGND

RDC CDC820 nF

RSGHRSGL

U2

U3

TIP

18 nFCT

RT1

RT2

125 kΩ

125 kΩ

RFA = 50 Ω

RFB = 50 Ω

D3

D4

BAT1

Assumptions:

1. Vring is 0.65 Vrms for 65 Vrms ringing2. 25 mA I LOOP3. 75 mA Ringing Current Limit

7. G 42L = 1

8. -95 V BAT1, -24 V BAT2

High Battery Loop ThresholdRinging Loop ThresholdTwo-wire Impedance, 600 Ω ZL

4. 5.2 KΩ 5. 1200 Ω 6. 600 Ω

VRING

RREF


LINE CARD PARTS LISTThe following list defines the parts and part values required to meet target specification limits for only one channel of theapplication circuit.

Note:The BOM above is based on balanced ringing. Additional decoupling capacitor on VCC may be required.For the reference design, please contact Legeritys applications department.

Item Quantity Type Value Tol. Rating CommentsCAX, CBX 2 Capacitor (X7R) 2200 pF 20% 100 V EMI Suppression

CDC 1 Capacitor (X7R) 820 nF 20% 16 V Application dependent

CDCR 1 Capacitor (X7R) 10 nF 20% 16 V Application dependent

CHP 1 Capacitor (X7R) 18 nF 20% 100 V DC/AC seperation

CRT 1 Capacitor (X7R) 1 µF 10% 16 V Set ring trip RC constant

CT 1 Capacitor (X7R) 68 pF 10% 16 V Application dependent

Battery Decoupling 2 Capacitor (X7R) 100 nF 20% 100 V VBAT1 dependentD3, D4 2 Diode 1N400X 1 A 100 V

D1, D2 2 Diode 100 mA 100 V 50 nS

RD 1 Resistor 66 kΩ 1% 1/10 W Set loop detect threshold

RDC1, RDC2 2 Resistor 50 kΩ 1% 1/10 W Set loop current Iimit

RDCR1, RDCR2 2 Resistor 15 kΩ 1% 1/10 W Set ringing current limit

RRX 1 Resistor 250 kΩ 1% 1/10 W Set 4W/2W gain

RT1, RT2 2 Resistor 125 kΩ 1% 1/10 W Program termination impedance

RRT1 1 Resistor 715 kΩ 1% 1/10 W Set ring trip threshold

RRT2 1 Resistor 42 kΩ 1% 1/10 W Set ring trip RC constant

RFA, RFB 1 Hybrid 50 Ω x 2 1% MMC 9935

RSLIC 1 Le79R101U2, U3 2 Sidactor P100 ISC or TISP 61089AD


PHYSICAL DIMENSIONS

32-Pin PLCC


REVISION SUMMARY

Revision B1 to C Updated Loop-Threshold Detect Equation for VBAT1 > 62 V and for VBAT1 < 62 V. Updated Physical Dimensions graphic. Updated Copyright, Sales Offices Listing pages.

Revision C to D1 Updated document to new format. Updated "Am" OPNs (Ordering Part Numbers) to "Le" throughout document. The following changes were made to the "Ordering Information" section:

Removed chip graphic Added entries for Le79R1011JC, Le79R1012JC, Le79R1013JC and Le79R1014JC Added notes

Standardized notes in "Absolute Maximum Ratings" section. In "Thermal Management Equations", IL > 5 mA, deleted the last sentence in the Description section. In the "Programmable Components" section, updated equations for RLTH. Removed VSU pin from the Le79R101 test and application circuit graphics. Added Line card Parts List. Updated 32-Pin PLCC physical dimensions graphic.

Revision D1 to D2 Made formatting and branding updates.

The contents of this document are provided in connection with Legerity, Inc. products. Legerity makes no representations or warranties with respect to the accuracyor completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. Nolicense, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this publication. Except as set forth in Legerity'sStandard Terms and Conditions of Sale, Legerity assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including,but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right.Legerity's products are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in otherapplications intended to support or sustain life, or in any other application in which the failure of Legerity's product could create a situation where personal injury,death, or severe property or environmental damage may occur. Legerity reserves the right to discontinue or make changes to its products at any time without notice.

© 2002 Legerity, Inc.All rights reserved.

Trademarks

Legerity, the Legerity logo and combinations thereof, and VoiceChip are trademarks of Legerity, Inc.Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies.

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Telephone: (512) 228-5400Fax: (512) 228-5508North America Toll Free: (800) 432-4009

To find the Legerity Sales Office nearest you, visit our website at:http://www.legerity.com/sales

or email:[email protected]

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For all other technical inquiries, please contact Legerity Tech Support at:[email protected]

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TM

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