DSP, FPGA/ -Processor/

ECU

Deserializer

DS90UB913Q

Serializer

FPD-Link III

Bidirectional Control Channel

DS90UB914Q

Bidirectional Control Bus

Bidirectional Control Bus

Parallel Data In

Parallel Data Out10 or 12

2 2

Megapixel Imager/Sensor

10 or 12

GPO GPIO

4 4

2

HSYNC,VSYNC

2

HSYNC,VSYNC

Product

Folder

Sample &Buy

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DS90UB913Q-Q1, DS90UB914Q-Q1SNLS420D JULY 2012REVISED JULY 2015

DS90UB91xQ-Q1 10- to 100-MHz, 10- and 12-Bit DC-Balanced FPD-Link III Serializer andDeserializer With Bidirectional Control Channel

1 Features 2 Applications1 10-MHz to 100-MHz Input Pixel Clock Support Front- or Rear-View Camera for Collision

Mitigation Single Differential Pair Interconnect Surround View for Parking Assistance Programmable Data Payload:

10-bit Payload up to 100 MHz 3 Description 12-bit Payload up to 75 MHz The DS90UB91xQ-Q1 chipset offers an FPD-Link III

Continuous Low Latency Bidirectional Control interface with a high-speed forward channel and aInterface Channel With I2C Support at 400 kHz bidirectional control channel for data transmission

over a single differential pair. The DS90UB91xQ-Q1 2:1 Multiplexer to Choose Between Two Inputchipsets incorporate differential signaling on both theImagershigh-speed forward channel and bidirectional control Embedded Clock With DC-Balanced Coding to channel data paths. The serializer and deserializerSupport AC-Coupled Interconnects pair is targeted for connections between imagers and

Capable of Driving up to 25 Meters Shielded video processors in an electronic control unit (ECU).Twisted-Pair This chipset is ideally suited for driving video data

that requires up to 12-bit pixel depth plus two Receive Equalizer Automatically Adapts forsynchronization signals along with bidirectionalChanges in Cable Losscontrol channel bus.

Four Dedicated General-Purpose Input/OutputThere is a multiplexer at the deserializer to choosePins (GPIO) Available on Both Serializer andbetween two input imagers. The deserializer canDeserializerhave only one active input imager. The primary video LOCK Output Reporting Pin and AT-SPEED BIST transport converts 10- and 12-bit data over a single

Diagnosis Feature to Validate Link Integrity high-speed serial stream, along with a separate low 1.8-V, 2.8-V or 3.3-V Compatible Parallel Inputs latency bidirectional control channel transport that

accepts control information from an I2C port and ison Serializerindependent of video blanking period. Single Power Supply at 1.8 V

ISO 10605 and IEC 61000-4-2 ESD Compliant Device Information(1) Automotive-Grade Product: AEC-Q100 Grade 2 PART NUMBER PACKAGE BODY SIZE (NOM)

Qualified DS90UB913Q-Q1 WQFN (32) 5.00 mm 5.00 mm Temperature Range 40C to +105C DS90UB914Q-Q1 WQFN (48) 7.00 mm 7.00 mm Small Serializer Footprint (5 mm 5 mm) (1) For all available packages, see the orderable addendum at

the end of the data sheet. EMI/EMC Mitigation on Deserializer Programmable Spread Spectrum (SSCG)

Outputs Receiver Staggered Outputs

Typical Application Circuit

1

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,intellectual property matters and other important disclaimers. PRODUCTION DATA.

http://www.ti.com/product/ds90ub913q-q1?qgpn=ds90ub913q-q1http://www.ti.com/product/ds90ub914q-q1?qgpn=ds90ub914q-q1

DS90UB913Q-Q1, DS90UB914Q-Q1SNLS420D JULY 2012REVISED JULY 2015 www.ti.com

Table of Contents9.1 AC Timing Diagrams and Test Circuits................... 201 Features .................................................................. 1

10 Detailed Description ........................................... 252 Applications ........................................................... 110.1 Overview ............................................................... 253 Description ............................................................. 110.2 Functional Block Diagram ..................................... 254 Revision History..................................................... 210.3 Feature Description............................................... 265 Description continued ........................................... 310.4 Device Functional Modes...................................... 336 Device Comparison Table ..................................... 310.5 Register Maps ....................................................... 417 Pin Configuration and Functions ......................... 4 11 Application and Implementation........................ 568 Specifications......................................................... 9 11.1 Applications Information........................................ 56

8.1 Absolute Maximum Ratings ...................................... 9 11.2 Typical Application ................................................ 568.2 ESD Ratings.............................................................. 9 12 Power Supply Recommendations ..................... 608.3 Recommended Operating Conditions....................... 9

13 Layout................................................................... 608.4 Thermal Information ................................................ 1013.1 Layout Guidelines ................................................. 608.5 Electrical Characteristics ........................................ 1013.2 Layout Example .................................................... 618.6 Timing Requirements: Recommended for Serializer

14 Device and Documentation Support ................. 63PCLK ....................................................................... 1414.1 Documentation Support ....................................... 638.7 AC Timing Specifications (SCL, SDA) - I2C

Compliant ................................................................. 15 14.2 Related Links ........................................................ 638.8 Bidirectional Control Bus DC Timing Specifications 14.3 Community Resources.......................................... 63

(SCL, SDA) - I2C Compliant..................................... 15 14.4 Trademarks ........................................................... 638.9 Switching Characteristics: Serializer....................... 16 14.5 Electrostatic Discharge Caution............................ 638.10 Switching Characteristics: Deserializer................. 17 14.6 Glossary ................................................................ 638.11 Typical Characteristics .......................................... 19 15 Mechanical, Packaging, and Orderable

9 Parameter Measurement Information ................ 20 Information ........................................................... 63

4 Revision HistoryNOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision C (January 2014) to Revision D Page

Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device FunctionalModes, Application and Implementation section, Power Supply Recommendations section, Layout section, Deviceand Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1

Updated datasheet to new TI layout....................................................................................................................................... 1 Added text and graphic to Power Up Requirements ........................................................................................................... 39

Changes from Revision B (April 2013) to Revision C Page

Changed "PCLK from imager mode" value in DS90UB913Q Serializer MODE Resistor Value table from 0 k to 100k ......................................................................................................................................................................................... 35

Changed Falling to Rising in RRFB...................................................................................................................................... 47 Changed Rising to Falling in RRFB...................................................................................................................................... 47

Changes from Revision A (April 2013) to Revision B Page

Changed layout of National Data Sheet to TI format ........................................................................................................... 61

2 Submit Documentation Feedback Copyright 20122015, Texas Instruments Incorporated

Product Folder Links: DS90UB913Q-Q1 DS90UB914Q-Q1

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DS90UB913Q-Q1, DS90UB914Q-Q1www.ti.com SNLS420D JULY 2012REVISED JULY 2015

5 Description continuedUsing TIs embedded-clock technology allows transparent full-duplex communication over a single differentialpair, carrying asymmetrical bidirectional control channel information in both directions. This single serial streamsimplifies transferring a wide data bus over PCB traces and cable by eliminating the skew problems betweenparallel data and clock paths. This significantly saves system cost by narrowing paths, which reduces PCBlayers, cable width, connector size and pins. In addition, the deserializer inputs provide ada