dynamicanalog circuits (ch. 25)bandi.cbnu.ac.kr/~ysk/aana25.pdfconnecting the inputs to the bottom...
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Dynamic Analog Circuits (Ch. 25)y g
김 영 석김 영 석
충북대학교 전자정보대학
2011.3.1. .
Email: [email protected]
전자정보대학 김영석 25-1
Contents25.1 The MOSFET Switch
25.2 Fully Differential Circuits
25.3 Switched-Capacitor Circuit
전자정보대학 김영석 25-2
25.1 The MOSFET SwitchCMOS TG(transmission Gate) is best
VDDVVVVDDV
PMOSinTHP
THNNMOSin
<<
−<<
,
,0
VDDV TGin << ,0
전자정보대학 김영석 25-3
MOSFET Switch: Charge Injection(CI)ON=>OFF
Channel Charge to Vin: No effect due to low impedance of Vin
Channel Charge to Cload: lower Vout (NMOS)
B t OFF >ON N ff t d t R hBut, OFF=>ON: No effect due to Rch
THNGSoxI
VVLWC
VVLWCQ
)(
)channel in the charge total( )('
' −⋅⋅⋅=
l d
THNinDDoxload
THNGSox
CVVVLWCV
VVLWC
2/)(
)( ' −−⋅⋅⋅
=Δ
−⋅⋅⋅=
inload
FinFTHNTHN
load
VVVVVwhere
C
wrt nonlinear is)22( 0
Δ∴
−++= φφγ
Charge Injection: Signal Dependent =>Harmonic Distortion
inload
전자정보대학 김영석 25-4
MOSFET Switch: Capacitive Feedthrough(CF)Vout Change due to Capacitive Coupling
OFF=>ON: No Effect because Vout is charged to Vin
ON=>OFF: Vout Changes due to Capacitive Coupling
When MOSFET in Triode, Cgs=Cgd=Cox/2
Wh MOSFET i S t tiWhen MOSFET in Saturation,
CCC
VDDV overlapload =Δ
lengthoverlapLDLDWCCwhere
CC
oxoverlap
loadoverlapload
, ' =⋅⋅=
+
전자정보대학 김영석 25-5
Reduction of Charge Injection/Clock Feedthrough1) Adding Dummy Switch
2) Using CMOS TG2) Using CMOS TG
3) U i F ll Diff ti l Ci it3) Using a Fully Differential Circuits
전자정보대학 김영석 25-6
MOSFET Switch: kT/C NoiseMaximum RMS Output Noise from a Simple RC Circuit:
fFCVpFCVCkT
rms
rms
100@200 1@64/=≈=≈
μμ
전자정보대학 김영석 25-7
25.1.1 Sample-and-Hold (SH) Circuits1) Simple SH
Sample: S1 On (Vin=VCH)
Hold: S1 Off (VCH=Vout)
2) Closed-loop SH
Sample: S1/S3 On, S2 Off, Vin=VCH=Vout
Hold: S1/S3 Off, S2 On
전자정보대학 김영석 25-8
SH Circuits3) Closed-loop SH Using OTA
Sample: S1 On, Vcontrol=High
Hold: S1 Off, Vcontrol=Low
N S2/S3 i SH 2)No S2/S3 in SH 2)
Popular
4) Closed-loop SH Using OTA
Sample: S1 On, S2 Off, LPF
Hold: S1 Off, S2 On
CH t i t l GND: Vi i d d t N t N liCH at virtual GND: Vin independent, Not Nonlinear
전자정보대학 김영석 25-9
25.2 Fully-Differential CircuitsGain
large is
)(
OLmp
mpOLomopout
Aifvv
vvAvvv
≈
−=−=
CMFB
2/
VDDVttCMFBdS
anythingorGNDorVDDvv
vv
omop
mp
==
=
Merits
Mi i i CI/CF
2/ , VDDVsettoCMFBneedSo CM =
Minimize CI/CF
Coupled Noise Rejection
Double Output Swing, vout.max=2VDDDouble Output Swing, vout.max 2VDD
전자정보대학 김영석 25-10
25.2.1 A Fully-Differential Sample-and-HoldOperation
, ,
,),(
111
0
=+==
===
φ CMOFFCtop
CMCtopinCbot
constVVVOfftt
VVVVSamplett
, , oft Independen:)(
2122
11
++== φφ
CMOFFOFFCtop
inOFF
VVVVOffttVV
R j t dSi lCM)()()(on Dependent :)(),(
, ),(
3322
32133 +++==
φφφφφ
φ
inOFFOFF
CMOFFOFFOFFCtop
VVVVVV
VVVVVOnHoldtt
RejectedSignalCM:)(),(),( 332211 =>φφφ OFFOFFOFF VVV
전자정보대학 김영석 25-11
Fully-Differential Sample-and-HoldConnecting the Inputs to the Bottom (Poly1) Plate
Substrate Noise Sees Vin (Sample) or Vout (Hold) => No effect
But, (b) Substrate Noise is coupled to the input of Op-amp
전자정보대학 김영석 25-12
25.3 Switched-Capacitor CircuitsSwitched-capacitor resistor simulates a large value resistor (>MΩ)
)(, ,,
2121
222111
vvvvCqI
vCqhighvCqhigh−−Δ
⋅=⋅= φφ
1
)( 2121
sc
scavg
TRwhere
RTTqI
==
===
clk
sc fCC ⋅
전자정보대학 김영석 25-13
25.3.1 Switched-Capacitor IntegratorParasitic-Sensitive Integrator
Cp3@VCM, Cp4@vout: No effect
Cp1: change transfer function
Fsc
F
in
out
CsRsC
vv
11/1
−=−=
clkpI fCCs
1+
전자정보대학 김영석 25-14
Switched-Capacitor IntegratorParasitic-Insensitive Integrator
Noninverting Inverting
Cp1: vin@S1 on, VCM@S2 on, no charge transfer
Cp2,Cp3@VCM, Cp4@vout: no effect
Fout sCv 1/1++
clkI
Fsc
F
in
out
fCCsRv 1+=+=
전자정보대학 김영석 25-15
Summing Integrator(b): remove redundant switches
321 11
11
11 v
fCCs
v
fCCs
v
fCCs
vFFF
out −+=
321 fCfCfC clkclkclk
전자정보대학 김영석 25-16
Lossy Integrator
24
13
3
4
11
CsRCsR
RR
vv
in
out
++
=
전자정보대학 김영석 25-17