IEEE TRANSACTIONS ON EDUCATION, VOL. 35, NO. 3, AUGUST 1992 243

Easy State Tables for Compound Statement Sequence Detectors

Daniel C. Fielder, Life Senior Member, IEEE, and Cecil 0. Alford, Member, IEEE

Abstract- The concept of synthesis of sequential machines is an essential feature of undergraduate and lower-level graduate digital courses at many of our schools. In some instances, it ap- pears in digital design courses, and in others in switching theory or automata courses. The most important and yet sometimes the most difficult part of the synthesis procedure seems to be the conversion of the word description of the problem into a state table (or graphical equivalent). Once a correct state table is established, a variety of straightforward choices are available to complete the machine design. Much of the time students do very well at converting word descriptions into state tables. However, there are cases where the word description is so involved or contains so many logic connectives that even the best students (and very often their instructors) cannot cope with the error- prone path to a desired state table. In this paper, we present a very simple “divide-and-conquer” method for a class of word statements which breaks down a statement to obtain several simple state tables. By following rules for combining the tables, one can construct a correct final state table. The method has additional bonuses in that “what if?” changes can be explored, and logically impossible word statements can be detected. After enduring a period of frustration with the conventional proce- dures, our students’ acceptance of the method was extremely enthusiastic, to say the least. Now, any careful student can obtain a final state table. In fact, it was at one class’ insistence that we decided to upgrade a successful, but informal, classroom experience into a possible publication.

I . INTRODUCTION N automata switching theory classes, a student is often I asked to synthesize a state machine which behaves accord-

ing to a given word statement. Frequently, the word statement can be interpreted as a succession of input signals which produces a 1 output with all other successions of input signals producing no, or perhaps 0 output. In the simple terms most suited for this paper, one or more input sequences of 1’s and 0’s produce a “1” output upon completion. The output is 0 otherwise. The machine is a transducer which converts inputs into outputs according to conditions of the word statement. Such transducers can be classified as sequence detectors. To find a state table from which a logical and hardware design can evolve, it is convenient to first construct a directed graph, i.e., a state diagram, which records the succession of inputs, outputs, and states of the machine. Once the state diagram has been carefully checked against the word statement, the construction of a matching state table is simple.

Manuscript received September 1990; revised December 1990. The authors are with the School of Electrical Engineering, Georgia Institute

IEEE Log Number 9200996. of Technology, Atlanta, GA 30332-0250.

Many systems can be broadly classified as sequence detectors and can be described by simple implication statements of the type “if (input sequence condition) then (output condition)”. When only one or possibly two statements describe a machine’s intended behavior, students find it relatively easy to concoct a state diagram from the word description and to obtain a valid state table from the state diagram. However, when the “if” condition is a compound statement having several binary connectives, possibly of different types, it takes more than ingenuity to construct correct state tables. The following illustrates a word description of a rather nasty compound statement sequence detector:

If [{(input sequence a) or (input sequence b)] and [input sequencec]} xor <input sequence dz] appears at any point in the unput stream then the output is to be at the end of the sequences which satisfy the compound logic.

To avoid the potential ambiguities in ordinary speech, punc- tuation delimiters as used above are a practical necessity for describing compound sequences. Add to this the complications imposed by arbitrary use of binary connectives, and mere mortals have almost no chance of finding an error-free state diagram by inspection.

This paper describes a method for building state tables for compound sequence detectors through controlled combinations of state successions and output specifications taken from the state tables of the individual component statements. As our senior and lower-level graduate students can attest, the method is easy to apply and it provides them with a way of solving difficult problems correctly. Although the theory behind the method is well known, we have not seen this specific applica- tion in the literature. After a background review, the method is developed and illustrated by an example.

11. BACKGROUND MATERIAL The method applies proven results from that broad area of

computer science which includes language theory, context- free languages, finite state recognizers, transition systems, regular expressions, and computation theory. The interested reader is referred to Bobrow and Arbib [l, Ch. 41 for a detailed mathematical proof coverage of the above topics. Engeler [ 2 ] also discusses topics in this area and elaborates on the connections between regular sets and finite transducers. Harrison [3] devotes Chapter 12 to transition systems and

0018-9359/92/080~$03.00 0 1992 IEEE

244 IEEE TRANSACTIONS ON EDUCATION, VOL. 35, NO. 3, AUGUST 1992

regular expressions. References [ 11-13] are all high-level presentations which require serious study. For a first encounter with the properties of finite state recognizers which are used in this paper, the switching theory texts by Kohavi [4], Torng 151, and Friedman and Menon 161 are recommended. Although these texts are not dated as recently as some of us might desire, it appears that the more recent crop of automata and digital design texts defer the above material to more specialized computer science offerings. Torng 1.51 and Kohavi [4] both give easily understood accounts of finite state recognizers, transition graphs, transition tables, nondeterministic machines, and methods of conversion to physically realizable deterministic machines. While only a small part of the theory of finite state recognizers is needed here, it is helpful to consider in some detail those features which are directly applicable.

A transition system is defined by Harrison 13, p. 3171 as

S = (S, M , A . F, P )

where S is the nonempty set of internal states, A C_ S is the set of initial (or starting) states, F & S is the set of final (or terminating) states, M is a prescribed transition function which can map the states of S simultaneously into some or all of the 2’ subsets of S, and P is a binary relation which holds for spontaneous (and instantaneous) transition from one state to another. (Kohavi 14, p. 6131 calls P a X transition, and Torng 15, p. 2421 includes an input set 1 to define M as a mapping from s x I to a’.)

Transition graphs and their equivalent transition tables doc- ument the progression of states in response to acceptable input strings in much the same way as do conventional state diagrams or conventional state tables. In fact, the references prove that a conventional state table is a transition table. The converse is not necessarily true. Because an input to the system can cause a simultaneous transfer to several states, the system is often described as nondeterministic. That the machine is nonphysical is further reinforced by the possibility of several initial states and several final states. Moreover, the P property permits a state to be both an initial and final state, and that property can also allow an output even before the first input is applied. While it almost seems that the prospect of salvaging a physically useful operation from the above is bleak, a feature called subset construction included with the M property does just that. It is that feature which justifies the validity and consistency of our method.

For our purposes, an input string is a valid time sequence of 1’s and 0’s. In order to visualize the processes involved, we can imagine a string’s values to be encoded along a tape much like punched hole data on paper tapes so popular for feeding information to early digital machines. Without going into unnecessary detail, it suffices to note that an algebra of tapes and string manipulation exists in which a blank tape is the unity element X and the cut tape is the null element 4. The placing of tapes in parallel is equivalent to using logical “+”, and concatenation (splicing) is equivalent to logical “0”.

Together with a “closure” operation “t” and very specific rules of combination, mathematically precise sets of consecutive 0’s and 1’s known as regular expressions can be formed. One of

the necessary conditions on a valid input string is that it be a regular expression.

A finite state recognizer is a transition system conveniently represented by a transition graph. Specifically, a transition graph is an edge-weighted directed graph which consists of one or more nodes (states), at least one of which must be a starting node (initial state) and at least one of which must be a terminal node (final state). The possibility of multiplicity and coincidence of these nodes was mentioned earlier. The edge weights and direction arrows specify which kind of string value (1 or 0) takes the recognizer from one node to the next. Unlike conventional state diagrams, all types of inputs do not have to be accounted for at each node (state).

A finite state recognizer is said to accept a string if it is a regular expression and if input of that string to any initial state leaves the recognizer in a final state which is associated with a specified output condition. Conventionally, the specified output is taken as a “1.” Be aware that the “1” output is considered an output of the machine, nondeterministic though it might be, and not an output of the state. The set of all such strings is the accepted string set for that recognizer. Correspondingly, the accepted set is said to be recognized For an accepted string, there are no outputs associated with any states intermediate to the initial state and the final state for that string. The properties of regular expressions and acceptance of strings assures us that, unlike conventional realizable machines, no accepted string fails to produce an output of “1”. However, the output of “1” occurs just once for that accepted string and then only when the final node for that string is encountered. Thus, a finite state recognizer has the distinct constructional advantage of only needing to deal with success and never with failure.

Although accepted input strings are time functions, conve- nient visualization of acceptance is provided by a space picture of a tape of an accepted string. If in any fashion a tape can be laid out along the edges of a transition graph so that the 1’s and 0’s match the graph weights and the beginning and end of the tape coincide with any starting node and any terminal node, respectively, the string for that tape is accepted.

The proofs behind the theory underlying finite state recog- nizers imply that a state table for a realizable deterministic machine can be derived from the transition table of a valid finite state recognizer. Whenever the input to the deterministic machine is the same as an accepted string for the nondeter- ministic machine, the output of the deterministic machine will be “1.” This means that any input string which equals an acceptable string or is a substring of a longer acceptable string will produce “1” outputs in the derived deterministic machine at the conclusion of each acceptable string section. Recall that the nondeterministic machine cannot do this. When the input to the deterministic machine is not an “accepted” string for the nondeterministic machine, as will be the case many times, the deterministic machine must produce an output of “0” for each input bit.

The key to converting a nondeterministic transition table to a deterministic conventional-state table is in the progressive combination of single states from the transition table into new states on a new table which logically

FltLDER AND ALFORD: EASY STATE TABLES 245

AB A B

x=

0 1

Start- A

( b)

Fig. 1. Transition graph (a) and transition table (b) of a nondeterministic machine.

>= x= x=

U I 0 I 0 1

Star,+ B

Fig. 2. Transition table to state table development. (a) Transition table of nondeterministic machine. (b) Preliminary state table with subset construction. (c) State table of an equivalent deterministic machine.

assume the combined properties of the originating states. If the set S were { A , B, C } the states for the derived deterministic machine would be a subset of 2’ = { ( - ) . ( A ) . ( B ) , ( C ) . ( A B ) , (AC). (BC) , (ABC)} , the set of all subsets of A, B, C including the null set (-). The property M assures us that the succession of new states is that of a matching deterministic machine. Not surprisingly, this method is called subset construction. The question of deterministic machine output at each state is determined by the union of the transition table outputs of the original single letter states. For example, if C were a designated terminal state on the transition graph or table, any appearance of a deterministic new state combination including C (i.e., (C), (AC), ( B C ) , or (ABC) would be associated with a “1” output. The formal verifications found in Torng [5] and Kohavi [4] are recommended. The process is illustrated in Figs. 1 and 2 using a slightly modified example from Kohavi [4, pp. 615-6161.

The input A’s in Fig. 1 are Torng’s representation of the P property and tapewise may be considered as sections of blank tape to indicate string entrance to the transition graph at the two starting nodes, A and B. Node C is ringed to indicate that it is a terminal node. Typical action on the graph might be described as “we can go from A to C on a 0 input” or “we can go from C to A on a 0 or 1 input.” Notice that we cannot go anywhere from A on a one input and that we can go from C to either -4 or B on a zero input. The strings 1 0 1 0 and 1 0 0 0 starting at B are both accepted since they both have node progression BACAC and terminate in C. Even though node C is visited within the last progression, there is no “1” output at that visit. The transition table in Fig. l(b) shows the same graph information in a more convenient tabular form and is repeated in Fig. 2(a) for clarity. Fig. 2(b) shows the

deterministic state progression results of subset construction and Fig. 2(c) shows a cosmeticized state table from which a real-world machine can be built. The algorithm of subset construction is described by an example “walk through” using Figs. 1 and 2.

Since A and B are both starting states of the nondeterminis- tic machine, the subset construction method obviously dictates that the deterministic machine start in the subset state AB. While in A and B of Fig. 2(a), a 0 input results in next state C and next state -. The union of C and - is C which is recorded as the next state in Fig. 2(b). On a 1 input while in A and B of Fig. 2(a), the next state is the union of A C and -, which results in subset state AC for the deterministic machine. Because of the presence of a terminating state (state C) in the subset states C and .4C of Fig. 2(b), the states are ringed to indicate that a 1 output will appear in the deterministic machine. To avoid unnecessary subsets in the construction, new subset states are introduced only as they are generated. We have just generated new subset states C and AC. These are recorded as present states in Fig. 2(b) and processed in order. A 0 and 1 input to C in Fig. 2(a) generates the next- state subsets AB and A, respectively, in Fig. 2(b). AB has already been introduced, but subset set A is newly generated and is added to the states to be processed. The construction of Fig. 2(b) continues in this manner until no new subset states are generated. When not in union with a nonempty subset, - is considered a generated subset state to be recorded and processed. The cosmeticized version of the state table for the deterministic machine is shown in Fig. 2(c). It is generally wise to examine the possibilities of reducing the state table of Fig. 2(c). It should be noted that the state table of Fig. 2(c) is of a Mealy type (see Kohavi [4, p. 3231) only for personal preference.

111. COMPOUND STATEMENT REDUCTION

In any compound statement, there is a fixed order of com- ponent statements, a fixed order of logical connectives, and a fixed arrangement of enclosure symbols. Even a minor pertubation in the order changes the meaning of the statement. Our constructions must exactly follow the order of the original statement. A recommended procedure which leads to a single state table for the compound statement follows.

1) Form individual state tables for each of the component parts of the compound statement. Keep the state tables in the same order with respect to the logical connectives as their corresponding statements.

2 ) Indicate the starting state for each table with an arrow or some other prominent marker. Although not absolutely necessary for the construction, it is wise to reduce each table and thereby avoid needless computations.

3) Stack the tables in order as a matrix “direct sum” aligned by input columns (see Kohavi [4, p. 3511). The direct sum is now a transition table and defines a nondeterministic machine because it has several starting states. The rules for converting transition tables into state tables apply.

4) Use the subset construction described earlier to form a deterministic state table of subset states one subset state at a

246 IEEE TRANSACTIONS ON EDUCATION, VOL. 35, NO. 3, AUGUST 1992

I= x= X’ x=

Fig. 3. Conversion of individual state tables to a final state table. (a) Direct sum of tables. (b) Preliminary state table. (c) Unreduced state table. (d) Reduced state table.

time. It is important that the order of symbols in a subset state follows the earlier order in which the individual state tables were created and stacked. As each subset state is recorded on the state table, follow it with the output values in exactly the order of the statement. Continue the subset construction until all generated subset states are exhausted and no new subsets are generated.

5 ) Although Step 4 produces a table in which the state succession is that of the desired deterministic machine, the unique output value at each next state of the deterministic machine needs to be found. In each string of individual outputs, insert the binary connectives and delineators exactly as they appear in the original statement. The Boolean reduction of the expression is the single 1 or 0 output associated with the subset state. This is simply the extension of the subset construction beyond the simple “or” noted in the early example of subset construction. For example, a derived output for the rather outrageous example compound statement in the early part of this paper might have a value [{[(l) + (O)] . [l]} @

To illustrate the above steps, consider an elementary com- pound sequence detector described as follows: [The output is to be one on the third one of an input sequence which starts while the machine is in the starting state] or [The output is to be one on the second one of two consecutive one inputs whenever they appear].

It is very easy to find a state diagram and the corresponding state table for each of the individual statements. The resultant direct sum is shown in Fig. 3(a). Obviously, we have a nondeterministic machine on our hands.

Through application of the subset construction steps, the preliminary deterministic state table of Fig. 3(b) is formed. The correct succession of subset states for the deterministic machine is apparent at this stage, but the output is not. By applying the simple “or” for this example to the output strings, the output for this (Mealy) machine is shown in Fig. 3(c). The states are renamed in Fig. 3(c) for cosmetic reasons. While the deterministic state table of Fig. 3(c) will yield the desired operation, the reduced table of Fig. 3(d) does not have the possibly undesirable redundancies of Fig. 3(c).

(I)] = 0.

IV. CONCLUDING REMARKS

Based on properties of possibly nondeterministic sequence recognizers, it is possible to construct the state table for a compound sequence detector statement from the state tables for the individual simpler component statements.

Suppose that a long and complicated compound sequence detector statement was proposed which, unwittingly, was impossible to implement. The above method would reveal this very definitely by producing no 1 outputs. The state succession such as shown in Fig. 3(b) is independent of the connectives and delimiters, This is a bonus because “what if?” questions about other connectives and delimiter arrangements can be explored with a minimum of effort.

REFERENCES

[ l ] L. S. Bobrow and M. A. Arbib, Discrete Mathematics. Washington, D.C.: Hemisphere, 1974.

[2] E. Engeler, Introduction to the Theory of Computation. New York, NY: Academic, 1973.

[3] M. A. Harrison, Introduction to Switching and Automata Theory. New York, NY: McGraw-Hill, 1965.

[4] Z. Kohavi, Switching and Finite Automata Theory (Second Ed.). New York, NY: McGraw-Hill, 1978.

[5] H. C. Torng, Switching Circuits: Theory and Logic Design. Reading, MA: Addison-Wesley, 1972.

[6] A.D. Friedman and P.E. Menon, Theory and Design of Switching Circuits. Woodland Hills, CA: Computer Science, 1975.

Daniel C. Fielder (SM’50 - LS ’85) is currently Professor Emeritus of Electrical Engineering at the Georgia Institute of Technology, Atlanta, having re- tired in 1988. However, he continues to teach gradu- ate courses in Automata and Applied Combinatorics as well as conducting research at the Electrical En- gineering School’s Computer Engineering Research Laboratory. His interests are in the application of combinatorics and discrete mathematics problems. He is currently engaged in an ongoing project of deriving counting equations for conversations on the

crossbar systems used in parallel processing.

Cecil 0. Alford (M’64) received the B.E. E. and M.S.E.E. degrees in 1957.

Upon graduation, he worked for Radiation In- corporated and Martin Marietta in simulation and control systems design. He was a member of the SPRINT missile design team, working on the design of the upper stage autopilot. Since 1968, he has taught courses im simulation, systems theory, and control systems and computer engineering at the Georgia Institute of Technology, Atlanta. His re- search is directed toward the design and construction

I

of special-purpose parallel computers for simulation. He has built four prototypes and currently directs a $21 million research program in the Computer Engineering Research Laboratory.