ece 101 an introduction to information technology digital logic
TRANSCRIPT
![Page 1: ECE 101 An Introduction to Information Technology Digital Logic](https://reader035.vdocuments.net/reader035/viewer/2022062407/56649e565503460f94b4e766/html5/thumbnails/1.jpg)
ECE 101 An Introduction to Information
Technology
Digital Logic
![Page 2: ECE 101 An Introduction to Information Technology Digital Logic](https://reader035.vdocuments.net/reader035/viewer/2022062407/56649e565503460f94b4e766/html5/thumbnails/2.jpg)
Information Path
InformationDisplay
Information Processor
& Transmitter
InformationReceiver and
Processor
Source ofInformation
DigitalSensor
TransmissionMedium
![Page 3: ECE 101 An Introduction to Information Technology Digital Logic](https://reader035.vdocuments.net/reader035/viewer/2022062407/56649e565503460f94b4e766/html5/thumbnails/3.jpg)
Combinational Logic Gates
• Fundamental Gates
• Exclusive OR
• Seven Segment Displays
• Binary Addition
• Binary Subtraction– 2’s complement notation
![Page 4: ECE 101 An Introduction to Information Technology Digital Logic](https://reader035.vdocuments.net/reader035/viewer/2022062407/56649e565503460f94b4e766/html5/thumbnails/4.jpg)
Fundamental Logic GatesAND GateUse a dot to indicate the AND operation
A NAND =
_
Y=A·B not AND = Y
B NOT =
_A B Y=A·B Y
0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0
Y_Y
![Page 5: ECE 101 An Introduction to Information Technology Digital Logic](https://reader035.vdocuments.net/reader035/viewer/2022062407/56649e565503460f94b4e766/html5/thumbnails/5.jpg)
Fundamental Logic GatesOR GateUse a plus sign to indicate the OR operation NOR gate A _
Y=A+B = not OR = Y B
_A B Y=A+B Y
0 0 0 1 0 1 1 0 1 0 1 0 1 1 1 0
A
B
_Y
![Page 6: ECE 101 An Introduction to Information Technology Digital Logic](https://reader035.vdocuments.net/reader035/viewer/2022062407/56649e565503460f94b4e766/html5/thumbnails/6.jpg)
Combinational Logic Gates• N input variables yields 2N possible inputs
– A truth table lists output for all possible combinations of input variables
– Combinational Logic Gates implement a truth table
• Given a binary pattern b3 b2 b1 b0
– Implement with AND gate, so transform all given inputs into a set of 1’s since the union will give a one.
![Page 7: ECE 101 An Introduction to Information Technology Digital Logic](https://reader035.vdocuments.net/reader035/viewer/2022062407/56649e565503460f94b4e766/html5/thumbnails/7.jpg)
Combinational Logic Gates
• Examples– Implement a circuit to produce a 6– Implement a circuit to produce a 13
• More than one pattern, use Y = pattern 1 + pattern 2 + … pattern N– Implement a circuit to implement either a 6 or
14
![Page 8: ECE 101 An Introduction to Information Technology Digital Logic](https://reader035.vdocuments.net/reader035/viewer/2022062407/56649e565503460f94b4e766/html5/thumbnails/8.jpg)
Combinational Logic Gates
• Fundamental Gates
• Exclusive OR
• Seven Segment Displays
• Binary Addition
• Binary Subtraction– 2’s complement notation
![Page 9: ECE 101 An Introduction to Information Technology Digital Logic](https://reader035.vdocuments.net/reader035/viewer/2022062407/56649e565503460f94b4e766/html5/thumbnails/9.jpg)
Seven segment displays
![Page 10: ECE 101 An Introduction to Information Technology Digital Logic](https://reader035.vdocuments.net/reader035/viewer/2022062407/56649e565503460f94b4e766/html5/thumbnails/10.jpg)
Truth Table to convert BCD codes to 7- segment display
Logic circuit for the letter “a” to be displayed
![Page 11: ECE 101 An Introduction to Information Technology Digital Logic](https://reader035.vdocuments.net/reader035/viewer/2022062407/56649e565503460f94b4e766/html5/thumbnails/11.jpg)
Binary Adder Truth Table
Binary Adder, Sum bit
![Page 12: ECE 101 An Introduction to Information Technology Digital Logic](https://reader035.vdocuments.net/reader035/viewer/2022062407/56649e565503460f94b4e766/html5/thumbnails/12.jpg)
Binary Subtraction• Subtracting a number is the same as adding
the negative of the number 14-9=14+(-9)=5• Use 2’s complement notation to get the
negative number• First complement all the bits in the number• Then add one• 1310 = 011012 find –13 by 2’s complement:• Complement each bit 10010 • And add one: +00001• To get 10011 the value of –13• Add this now to 13 to get 00000
![Page 13: ECE 101 An Introduction to Information Technology Digital Logic](https://reader035.vdocuments.net/reader035/viewer/2022062407/56649e565503460f94b4e766/html5/thumbnails/13.jpg)
Sequential Logic Circuits• Depend upon past and present input values
– Combinatorial: use truth tables– Sequential: use timing diagrams
• Most common sequential logic circuits include “flip-flops”, each is capable of storing one bit of information.
• “set-reset flip-flop”: basic computer memory cell
• “toggle flip-flop”: basic computer counting cell
![Page 14: ECE 101 An Introduction to Information Technology Digital Logic](https://reader035.vdocuments.net/reader035/viewer/2022062407/56649e565503460f94b4e766/html5/thumbnails/14.jpg)
Set-Reset Flip-Flop• Computer’s basic memory cell• Implemented by two OR gates and two Not
gates (or two NOR gates) that use feedback (connection of output to input).
• Two inputs: S, set and R, reset and two outputs, Q and not Q
• Note Q remembers whether S or R was “one” last – this is the memory capability of SRFF
![Page 15: ECE 101 An Introduction to Information Technology Digital Logic](https://reader035.vdocuments.net/reader035/viewer/2022062407/56649e565503460f94b4e766/html5/thumbnails/15.jpg)
S-R flip-flop
![Page 16: ECE 101 An Introduction to Information Technology Digital Logic](https://reader035.vdocuments.net/reader035/viewer/2022062407/56649e565503460f94b4e766/html5/thumbnails/16.jpg)
Addressable Memory• Uses both combinatorial and sequential
logic• Random access memory (RAM) stores and
retrieves binary data as needed• Each cell or memory location has a unique
address• At the S input there is an AND gate with the
address & input data• At the R input there is another AND gate
with complement of the input data and the address
![Page 17: ECE 101 An Introduction to Information Technology Digital Logic](https://reader035.vdocuments.net/reader035/viewer/2022062407/56649e565503460f94b4e766/html5/thumbnails/17.jpg)
Addressable Memory
• In order to be stored at a memory location the address signal must be 1 then the output of the memory (SRFF) is the DATA input value.
• To retrieve the contents of the memory cell the out put is connected to an AND cell again with the address signal.
• Hence the output of the AND occurs only when the address is 1
![Page 18: ECE 101 An Introduction to Information Technology Digital Logic](https://reader035.vdocuments.net/reader035/viewer/2022062407/56649e565503460f94b4e766/html5/thumbnails/18.jpg)
Toggle flip-flop
![Page 19: ECE 101 An Introduction to Information Technology Digital Logic](https://reader035.vdocuments.net/reader035/viewer/2022062407/56649e565503460f94b4e766/html5/thumbnails/19.jpg)
Toggle Flip-Flop• Basic computer counting cell
• Two inputs, a toggle (T) and clear (C), and one output Q
• The value of Q changes (or toggles) when when ever a 1 to 0 transition occurs at the input T
• When a 1 appears at the C input, the Q resets to 0 and remains at 0 as long as C=1.
![Page 20: ECE 101 An Introduction to Information Technology Digital Logic](https://reader035.vdocuments.net/reader035/viewer/2022062407/56649e565503460f94b4e766/html5/thumbnails/20.jpg)
Binary Counting with T F-F
Note the error here: “14” should be “13”.
![Page 21: ECE 101 An Introduction to Information Technology Digital Logic](https://reader035.vdocuments.net/reader035/viewer/2022062407/56649e565503460f94b4e766/html5/thumbnails/21.jpg)
Toggle Flip-Flop• As a result, Q has twice the period (or ½ the
number of pulses) as T
• By cascading a series of n, T-FF, and connecting to each output, a counter can be made up to 2n – 1.
![Page 22: ECE 101 An Introduction to Information Technology Digital Logic](https://reader035.vdocuments.net/reader035/viewer/2022062407/56649e565503460f94b4e766/html5/thumbnails/22.jpg)
Modulo-N Counter
• A counter uses a chain of T-FFs
• Recall M T-FFs count from 0 to 2M - 1
• Modulus (mod) of a counter is the number of counting states before it repeats itself
• If we wish a counter that is not 0 to 2M – 1, then we must apply a clear (C) at some point to start the counting over again.
![Page 23: ECE 101 An Introduction to Information Technology Digital Logic](https://reader035.vdocuments.net/reader035/viewer/2022062407/56649e565503460f94b4e766/html5/thumbnails/23.jpg)
Modulo-6 Counter
![Page 24: ECE 101 An Introduction to Information Technology Digital Logic](https://reader035.vdocuments.net/reader035/viewer/2022062407/56649e565503460f94b4e766/html5/thumbnails/24.jpg)
Digital Clock
• 7 segment display
• Counts 60 Hz frequency of ac power line
• Use of mod 60 to get to minutes from seconds
• Use of mod 10 to get to 10 minute digits
• Use of mod 6 to get to hours
• Use of mod 12 to reset the clock