Charles Moyes (cwm55) and Mengxiang Jiang (mj294)Week of April 11, 2012

Brain-Computer Interface using Multi-Channel

Electroencephalography

Current Progress

We designed and built an analog amplification circuit with a gain of 6,400. The first stage uses an AD620instrumentation amplifier for differential common mode signal rejection to reduce noise. The gain of theAD620 is approximately 23. A voltage divider and a 3140 opamp buffer provide a 2.5 V virtual groundfor the instrumentation amplifier. After passing through the instrumentation amplifier, the signal is filteredusing an RC high pass filter with fc = 0.13 Hz. Next, the signal undergoes a second-stage amplification.The gain of the 3140 opamp is set to approximately 278 using a trim pot. The output signal is then filteredusing an RC low-pass filter with a cut-off frequency of approximately 48 Hz. This frequency was chosen topreserve the low-frequency content of the EEG signal, while removing 50-60 Hz power line noise from thesignal. We ordered parts from Digi-Key and samples from Analog Devices, Texas Instruments, and MaximSemiconductor. We also sampled silver-plated passive EEG electrodes. We constructed this prototype circuiton a breadboard. We constructed an isolated +6 VDC power supply using 4 AA batteries and connectedit the microcontroller using the PCB target board. We cut the ground trace connecting the microcontrollerground to the USB ground using a dremel tool. We used a Fairchild Semiconductor 6N137 optoisolator toisolate the USB power from the microcontroller power. The line of isolation is between the microcontrollerUART RX and TX pins (Pin D.0 and Pin D.1) and the FTDI chip’s RX and TX pins. Firmware wasdeveloped in the C programming language that samples the ADC at 128 Hz and sends the 10-bit values overserial to the PC. A MATLAB program then plots the time-domain signal in real-time, along with its FFT.From there, we were able to amplify a 125 µV Vpp, 14 Hz square wave calibration signal and plot it on aPC in real-time. We demonstrated this functionality to Pavel during our lab section.

Challenges Faced and Future Plans

1. Our target board’s FTDI chip was damaged presumably due to ESD (it was working over spring break).We wasted several hours debugging this in lab and had to construct our own separate communicationsboard.

2. We need to scale and bias the signal to utilize the full 10-bit dynamic range of the ADC. This ischallenging because the input signal is already biased at 2.5 V and so putting a third amplifier stagewould cause the signal to clip. We propose adding an inverting summing amplifier and an inverter.

3. We still have not started working on the Brain-Computer Interface (BCI) component of this projectyet. We plan on training and using a linear classifier to detect the P300 event-related potential bymeasuring the EEG signal from the Cz electrode site (single-channel). We may use PCA to reducethe dimensionality of the 1-second input signal (currently 128 values). We were thinking of usingmultiple different-colored LEDs that blink in random order to allow the user to choose a color. Themicrocontroller will have a training mode and a test mode to train the classifier and test it on unknownsignals.

4. If we do not have time to finish the BCI, then we will develop a neurofeedback device instead thatdisplays the dominant frequency of the measured brain waves and classifies them as either alpha, beta,theta, or delta waves. FFT code will execute on the microcontroller and an LED will be lit indicatedthe type of wave that was measured.

5. We need to move our prototype analog circuits from breadboards to solder boards.

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