edp-cm-lpc1343 command module user manualedp-cm-lpc1343 command module electrocomponents plc page 6...

EDP-CM-LPC1343 Command Module

Electrocomponents plc Page 1


User Manual

Version 1.02

10th June 2010



Contents

1. Introduction 3

2. Pin Allocation 4 2.1 Allocation of MCU pins to backplane functions ............................... 4 2.2 Resources Used/Available by LPC1343 ......................................... 6 2.3 Alphabetical Listing of MCU Pins .................................................... 7 2.4 Backplane - Base Board Signals .................................................... 8 2.5 Mapping Aid .................................................................................. 11

3. Solder Link Options 12

4. Zero Ohm Links 16

5. Software Support 17 5.1 RSEDP_Test_Suite ....................................................................... 17 5.2 MC1_Test_Suite ........................................................................... 17 5.3 MC2_Test_Suite ........................................................................... 18



1. Introduction

The RS-EDP platform is a system, has been designed to utilise many different manufacturers’ microprocessors. To support NXP range or ARM/Cortex MCU’s a single Command Module (CM) has been designed to accommodate four different device types. These are LPC2368 (ARM7), LPC1768 (Cortex M3), LPC1343 (Cortex M3) and LPC1113 (Cortex M0). Each of the boards comes with its own suite of software to fully exercise the RS-EDP Application Modules and the peripherals available on the MCU device. In an RS-EDP system there is usually one Command Module / CPU Module (CM) and one or more Applications Modules (AM) plugged in to the Base Board (BB). These NXP modules have been designed as the Command Module for the system. The ‘Command Module’ in a system dictates whether the whole system is a 3.3V one or a 5.0V one. All of these modules use a 3.3V microprocessor and consequently the I/O is mostly 3.3V also. To tell the rest of the system the Command Module is a 3.3V one not a 5.0V one, the Vcc_CM line on the base board is connected to 3.3V by the tracking on the Command Module board. This Vcc_CM is used as a reference by the other modules, such as the analogue module, to limit the output voltage to 3.3V. The command voltage line is also used by the #RESET circuit, as the voltage reference to pull up to after the reset line has been asserted low. The RS-EDP-CM-NXP module maps the I/O of the MCU on the board to the backplane of the RS-EDP system. As there are quite a few dual function pins on the NXP processors and hence several link options have been made to accommodate the various options the user may wish to use. Extensive use of the I2C capability is used to communicate to the application modules in the system.



2. Pin Allocation

2.1 Allocation of MCU pins to backplane functions

The CM has been mapped to the backplane to maximise the functionality of the system and the AMs. A document called a Pin Allocation spreadsheet exists which details the mapping of the pins to the backplane. The details of this mapping are detailed below. Below are detailed the pin number of the MCU, the pin name, a comment on its usage and the signals name to which it is allocated on the backplane. As the same PCB is used for variants of LPC processor some of the mapping may appear a little strange. For example this device has no CAN but is allocated some CAN resource on the backplane. This is because other NXP variants do have a CAN controller on board and the mapping is done to accommodate this other device.

LPC1343FBD48 Comment RS-EDP-BASE BOARD

Pin Name of function used on PIC Name

34 & 28 TDO/PIO1_1/AD2/CT32B1_MAT0 & PIO0_9/MOSI/CT16B0_MAT1/SWO JTAG interface on LPC module

32 TDI/PIO0_11/ADC0/CT32B0/MAT3 JTAG interface on LPC module

33 & 39 TMS/PIO1_0/AD1/CT32B1_CAP0 & SWDIO/PIO1_3/AD4/CT32B1_MAT2 JTAG interface on LPC module

35 TRST/PIO1_2/AD3/CT32B1_MAT1 JTAG interface on LPC module

29 SWCLK/PIO0_10/SCK/CT16B0_MAT2 JTAG interface on LPC module

40 PIO1_4/AD5/CT32B1_MAT3/WAKEUP 2 link options AN0

2 link options AN8

3 #RESET/PIO0_0 #RESIN

42 PIO1_11/AD7 2 link options AN4

2 link options AN12

6 XTALIN Xtal on module

7 XTALOUT Xtal on module

15 PIO0_4/SCL CNTRL_I2C_SCL

16 PIO0_5/SDA CNTRL_I2C_SDA

1 PIO2_6 EVG1_GPIO42

4 PIO0_1/CLKOUT/CT32B0_MAT2/USB_FTOGGLE 2 link options EVG0_GPIO40

2 Link options - User LED1

8 VDDIO 3.3V

20 USB_DP USB_DEV_D+

19 USB_DM USB_DEV_D-

5 VSSIO SGND

30 PIO1_10/AD6/CT16B1_MAT1 3 link options EVG5_GPIO50

3 link options EVG8_GPIO56


36 PIO3_0 2 link options MOTORP0H


37 PIO3_1 2 link options MOTORH0_ENC0


38 PIO2_3/#RI 2 link options EMG_TRAP


43 PIO3_2 2 link options MOTORP0L


48 PIO3_3 2 link options MOTORH1_ENC1


41 VSSIO SGND

44 VDDCORE 3.3V

45 PIO1_5/#RTS/CT32B0_CAP0 EVM5_GPIO47

10 PIO0_2/SSEL/CT16B0_CAP0 2 link options MOTORP2H


27 PIO0_8/MISO/CT16B0_MAT0 2 link options MOTORP2L




2 PIO2_0/#DTR 2 link options GPIO0


31 PIO2_11/SCK 2 link options GPIO1


13 PIO2_1/#DSR 2 link options ASC1_TX_TTL_ASC0_DTR

2 link options CAN1_RX

26 PIO2_2/#DCD 2 link option EVG4_GPIO48

2 link option EVG19_GPIO67

25 PIO2_10 2 link option CPU_DAC01_GPIO19


24 PIO2_9 2 link option CPU_DACO0_GPIO17


23 PIO0_7/#CTS EVM9_GPIO55

22 PIO0_6/#USB_CONNECT/SCK 2 link options ASC1_RX_TTL

2 Link options EVM8_GPIO53

12 PIO2_8 2 link options ASC1_TX_TTL


21 PIO2_5 2 Link options EVM6_GPIO49

2 Link options GPIO2_MCIDAT0

9 PIO1_8/CT16B1_CAP0 2 Link options EVM4_GPIO45

2 Link options GPIO14_MCIPWR

18 PIO2_4 2 Link options EVM3_GPIO43

2 Link options GPIO12_MCICMD

11 PIO2_7 2 Link options EVM2_GPIO41_CAPADC

2 Link options GPIO10_MCICLK

17 PIO1_9/CT16B1_MAT0 3 link options GPIO9_I2S_RX_WS

3 link options EVM1_GPIO23

3 link options CPU_DACO0_GPIO17

14 PIO0_3/USB_VBUS 2 link option GPIO7_I2S_RX_CLK


47 PIO1_7/TXD/CT32B0_MAT1 3 Link options ASC0_TX_TTL

3 link options AN7

3 link options AN15

46 PIO1_6/RXD/CT32B0_MAT0 3 Link options ASC0_RX_TTL

3 link options AN6

3 link options AN14



2.2 Resources Used/Available by LPC1343

Resources Used/Available

3.3V

SGND

#RESIN

AN0

AN4

AN6

AN7

AN8

AN12

AN14

AN15

ASC0_TX_TTL

ASC0_RX_TTL

ASC1_TX_TTL

ASC1_RX_TTL

ASC1_TX_TTL_ASC0_DTR

CAN1_RX

CNTRL_I2C_SCL

CNTRL_I2C_SDA

CPU_DACO0_GPIO17

CPU_DAC01_GPIO19

EVG0_GPIO40

EVG1_GPIO42

EVG2_GPIO44

EVG3_GPIO46

EVG4_GPIO48

EVG5_GPIO50

EVG6_GPIO52

EVG7_GPIO54

EVG8_GPIO56

EVG9_GPIO57

EVG10_GPIO58

EVG11_GPIO59

EVG12_GPIO60

EVG13_GPIO61

EVG17_GPIO65

EVG18_GPIO66

EVG19_GPIO67

EVM0_GPIO21

EVM1_GPIO23

EVM2_GPIO41_CAPADC

EVM3_GPIO43

EVM4_GPIO45

EVM5_GPIO47

EVM6_GPIO49

EVM7_GPIO51

EVM8_GPIO53

EVM9_GPIO55

GPIO0

GPIO1

GPIO2_MCIDAT0

GPIO7_I2S_RX_CLK

GPIO9_I2S_RX_WS

GPIO10_MCICLK

GPIO12_MCICMD

GPIO14_MCIPWR

MOTORP0H

MOTORP0L



MOTORH0_ENC0

MOTORH1_ENC1

MOTORP2H

MOTORP2L

EMG_TRAP

USB_DEV_D+

USB_DEV_D-

Local User LED1

2.3 Alphabetical Listing of MCU Pins

Pin Alphabetic Listing of Available I/O

3 #RESET/PIO0_0

4 PIO0_1/CLKOUT/CT32B0_MAT2/USB_FTOGGLE

10 PIO0_2/SSEL/CT16B0_CAP0

14 PIO0_3/USB_VBUS

15 PIO0_4/SCL

16 PIO0_5/SDA

22 PIO0_6/#USB_CONNECT/SCK

23 PIO0_7/#CTS

27 PIO0_8/MISO/CT16B0_MAT0

40 PIO1_4/AD5/CT32B1_MAT3/WAKEUP

45 PIO1_5/#RTS/CT32B0_CAP0

46 PIO1_6/RXD/CT32B0_MAT0

47 PIO1_7/TXD/CT32B0_MAT1

9 PIO1_8/CT16B1_CAP0

17 PIO1_9/CT16B1_MAT0

30 PIO1_10/AD6/CT16B1_MAT1

42 PIO1_11/AD7

2 PIO2_0/#DTR

13 PIO2_1/#DSR

26 PIO2_2/#DCD

38 PIO2_3/#RI

18 PIO2_4

21 PIO2_5

1 PIO2_6

11 PIO2_7

12 PIO2_8

24 PIO2_9

25 PIO2_10

31 PIO2_11/SCK

36 PIO3_0

37 PIO3_1

43 PIO3_2

48 PIO3_3

29 SWCLK/PIO0_10/SCK/CT16B0_MAT2

32 TDI/PIO0_11/ADC0/CT32B0/MAT3

34 & 28 TDO/PIO1_1/AD2/CT32B1_MAT0 & PIO0_9/MOSI/CT16B0_MAT1/SWO

33 & 39 TMS/PIO1_0/AD1/CT32B1_CAP0 & SWDIO/PIO1_3/AD4/CT32B1_MAT2

35 TRST/PIO1_2/AD3/CT32B1_MAT1

19 USB_DM

20 USB_DP

44 VDDCORE

8 VDDIO

5 VSSIO

41 VSSIO

6 XTALIN

7 XTALOUT



2.4 Backplane - Base Board Signals

Base Board Signal Name EDPCON1 EDPCON2 Break Out Connector

#CS0 53 & 54

#CS1 55 & 56

#CS2 57 & 58

#CS3 59 & 60

#PSEN 51 & 52

#RD 45 & 46

#RESIN 1 & 2 P603 26

#RESOUT 3 & 4 P603 27

#WR 47 & 48

#WRH 49 & 50

12V 133 P603 47

12V 134 P603 47

12V 135 P603 47

12V 136 P603 47

12V GND 137 P603 48

12V GND 138 P603 48

12V GND 139 P603 48

12V GND 140 P603 48

3.3V 127 P603 44

3.3V 128 P603 44

3.3V 95 & 96 P603 44

3V BAT 124 P603 42

5.0V 129 P603 45

5.0V 130 P603 45

5.0V 97 & 98 P603 45

A0_AD0 41 & 42

A1_AD1 39 & 40

A2_AD2 37 & 38

A3_AD3 35 & 36

A4_AD4 33 & 34

A5_AD5 31 & 32

A6_AD6 29 & 30

A7_AD7 27 & 28

A8_AD8 25 & 26

A9_AD9 23 & 24

A10_AD10 21 & 22

A11_AD11 19 & 20

A12_AD12 17 & 18

A13_AD13 15 & 16

A14_AD14 13 & 14

A15_AD15 11 & 12

ALE 43 & 44

AN_REF 1 P601 6

AN0 3 P603 2

AN1 4 P603 6

AN2 5 P603 1

AN3 6 P603 5

AN4 7 P602 2

AN5 8 P602 4

AN6 9 P602 1

AN7 10 P602 3

AN8 11 P601 2

AN9 12 P601 4

AN10 13 P601 1

AN11 14 P601 3



AN12 15 P603 4

AN13 16 P602 6

AN14 17 P603 3

AN15 18 P602 5

ASC0_RX_TTL 89 P602 30

ASC0_TX_TTL 91 P602 31

ASC1_RX_TTL 93 P602 32

ASC1_RX_TTL_ASC0_DSR 99 P602 35

ASC1_TX_TTL 95 P602 33

ASC1_TX_TTL_ASC0_DTR 97 P602 34

CAN0_RX 61 & 62

CAN0_TX 63 &64

CAN1_RX 121 P602 46

CAN1_TX 123 P602 47

CANH0 89 & 90 P603 40

CANL0 91 & 92 P603 41

CNTRL_I2C_SCL 79 & 80 P603 35

CNTRL_I2C_SDA 77 & 78 P603 34

CNTRL_SPI_#CS_NSS 75 & 76 P603 33

CNTRL_SPI_CLK 69 & 70 P603 30

CNTRL_SPI_MRST 71 & 72 P603 31

CNTRL_SPI_MTSR 73 & 74 P603 32

CPU_DACO0_GPIO17 38 P603 7

CPU_DACO1_GPIO19 40 P601 7

EMG_TRAP 114 P601 44

ETH_LNK_LED 111 P602 41

ETH_RX- 109 P602 40

ETH_RX_LED 113 P602 42

ETH_RX+ 107 P602 39

ETH_SPD_LED 115 P602 43

ETH_TX- 105 P602 38

ETH_TX+ 103 P602 37

EVG0_GPIO40 61 P602 16

EVG1_GPIO42 63 P602 17

EVG2_GPIO44 65 P602 18

EVG3_GPIO46 67 P602 19

EVG4_GPIO48 69 P602 20

EVG5_GPIO50 71 P602 21

EVG6_GPIO52 73 P602 22

EVG7_GPIO54 75 P602 23

EVG8_GPIO56 77 P602 24

EVG9_GPIO57 78 P601 26

EVG10_GPIO58 79 P602 25

EVG11_GPIO59 80 P601 27

EVG12_GPIO60 81 P602 26

EVG13_GPIO61 82 P601 28

EVG14_GPIO62 83 P602 27

EVG15_GPIO63 84 P601 29

EVG16_GPIO64 85 P602 28

EVG17_GPIO65 86 P601 30

EVG18_GPIO66 87 P602 29

EVG19_GPIO67 88 P601 31

EVG20_GPIO69_ASCO_RTS 92 P601 33

EVM0_GPIO21 42 P601 8

EVM1_GPIO23 44 P601 9

EVM2_GPIO41_CAPADC 62 P601 18

EVM3_GPIO43 64 P601 19

EVM4_GPIO45 66 P601 20

EVM5_GPIO47 68 P601 21

EVM6_GPIO49 70 P601 22

EVM7_GPIO51 72 P601 23



EVM8_GPIO53 74 P601 24

EVM9_GPIO55 76 P601 25

EVM10_GPIO68_ASCO_CTS 90 P601 32

GPIO0 21 P603 13

GPIO1 22 P603 15

GPIO2_MCI_DAT0 23 P603 14

GPIO3 24 P603 16


GPIO5_I2S_TX_WS 26 P603 19


GPIO7_I2S_RX_CLK 28 P603 20


GPIO9_I2S_RX_WS 30 P603 21

GPIO10_MCI_CLK 31 P603 23

GPIO11_I2S_RX_SDA 32 P603 24

GPIO12_MCI_CMD 33

GPIO13_I2S_TX_CLK 34 P603 25

GPIO14_MCI_PWR 35 P603 12

GPIO15_I2S_TX_SDA 36 P603 8

GPIO24_AD7 45 P602 8

GPIO25_AD15 46 P601 10

GPIO26_AD6 47 P602 9

GPIO27_AD14 48 P601 11

GPIO28_AD5 49 P602 10

GPIO29_AD13 50 P601 12

GPIO30_AD4 51 P602 11

GPIO31_ADI2 52 P601 13

GPIO32_AD3 53 P602 12

GPIO33_AD11 54 P601 14

GPIO34_AD2 55 P602 13

GPIO35_AD10 56 P601 15

GPIO36_AD1 57 P602 14

GPIO37_AD9 58 P601 16

GPIO38_AD0 59 P602 15

GPIO39_AD8 60 P601 17

I2C_GEN0_SCL 7 & 8 P603 29

I2C_GEN0_SDA 5 & 6 P603 28

I2C_GEN1_SCL 119 P602 45

I2C_GEN1_SDA 117 P602 44

IRQ_GPIO16_CNTRL_I2C_INT 37 P603 11

IRQ_GPIO18_I2C_GEN0_INT 39 P603 10

IRQ_GPIO20_I2C_GEN1_INT 41 P603 9

IRQ_GPIO22_I2C_INT 43 P602 7

MOTOR_TCO_FB 122 P601 48

MOTORH0_ENC0 116 P601 45



MOTORP0H 102 P601 38

MOTORP0L 100 P601 37





MOTORPWM 112 P601 43

SGND 131 P603 46

SGND 132 P603 46

SGND 9 & 10 P603 46

SGND 99 & 100 P603 46

SPI_SSC_#CS_NSS 101 P602 36

SPI_SSC_CLK 98 P601 36

SPI_SSC_MRST_MISO 94 P601 34



SPI_SSC_MTSR_MOSI 96 P601 35

USB_DEBUG_D- 67 & 68

USB_DEBUG_D+ 65 & 66

USB_DEV_D- 87 & 88 P603 39

USB_DEV_D+ 85 & 86 P603 38

USB_HOST_D- 83 & 84 P603 37

USB_HOST_D+ 81 & 82 P603 36

VAGND 19 P601 5

VAGND 20 P601 5

Vcc_CM 125 P603 43

Vcc_CM 126 P603 43

Vcc_CM 93 & 94 P603 43

Note: This spread sheet is derived from the Pin Allocation Spreadsheet for this CPU Module. The user manual for the base board also contains details of the back plane signals and the pin outs.

2.5 Mapping Aid

AN0

AN8JP403

AN4

AN12

JP405

EVG1_GPIO42

EVG0_GPIO40

User LED D401

MOTORP0H

EVG9_GPIO57

MOTORH0_ENC0

EVG10_GPIO58

JP406

JP407

JP409

EMG_TRAP

EVG11_GPIO59

MOTORP0L

EVG12_GPIO60

MOTORH1_ENC1

EVG13_GPIO61

MOTORP2H

EVG17_GPIO65

MOTORP2L

EVG18_GPIO66

JP412

JP417

JP418

JP411

JP410

JP413

EVM5_GPIO47

GPIO0

EVG6_GPIO52

GPIO1

EVG7_GPIO54

LPC1343 Command Module

ASC0_RX_TTL

AN6

AN14

JP440

ASC0_TX_TTL

AN7

AN15

JP439

EVG4_GPIO48

EVG19_GPIO67

CPU_DAC01_GPIO19

EVG3_GPIO46

CPU_DACO0_GPIO17

EVG2_GPIO44

GPIO7_I2S_RX_CLK

EVM0_GPIO21

JP422

JP421

JP428

JP429

JP430

JP438

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

21

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

3

3

3

3

3

3

3

3

3

3

3

3

3

3

3

3

3

3

4

4

3

40 PIO1_4/AD5/CT32B1_MAT3/WAKEUP

42 PIO1_11/AD7

46 PIO1_6/RXD/CT32B0_MAT0

47 PIO1_7/TXD/CT32B0_MAT1

36 PIO3_0

43 PIO3_2

10 PIO0_2/SSEL/CT16B0_CAP0

27 PIO0_8/MISO/CT16B0_MAT0

38 PIO2_3/#RI

37 PIO3_1

48 PIO3_3

4 PIO0_1/CLKOUT/CT32B0_MAT2/USB_FTOGGLE

1 PIO2_6

24 PIO2_9

25 PIO2_10

26 PIO2_2/#DCD

30 PIO1_10/AD6/CT16B1_MAT1

2 PIO2_0/#DTR

31 PIO2_11/SCK

14 PIO0_3/USB_VBUS

17 PIO1_9/CT16B1_MAT0

45 PIO1_5/#RTS/CT32B0_CAP0

CNTRL_I2C_SCL

CNTRL_I2C_SDA

15 PIO0_4/SCL

16 PIO0_5/SDA

USB_DEV_D+

USB_DEV_D-

20 USB_DP

19 USB_DM

ASC1_TX_TTL_ASC0_DTR

CAN1_RX

JP4262

1

313 PIO2_1/#DSR

ASC1_RX_TTL

EVM8_GPIO53

ASC1_TX_TTL

EVM7_GPIO51

JP431

JP4322

2

1

1

3

322 PIO0_6/#USB_CONNECT/SCK

12 PIO2_8

#RESET

SGND

VAGND

AN_REF3.3V

R102

R101

VCC_CM3.3V

EVM9_GPIO5523 PIO0_7/#CTS

21 PIO2_52

3

23

EVM6_GPIO49

GPIO2_MCIDAT0

9 PIO1_8/CT16B1_CAP0EVM4_GPIO45

GPIO14_MCIPWR

18 PIO2_4EVM3_GPIO43

GPIO12_MCICMD2

3

11 PIO2_72

3

JP4331

1

1

1

JP434

JP435

JP436EVM2_GPIO41_CAPADC

GPIO10_MCICLK

EVG5_GPIO50

EVG8_GPIO56

EVG0_GPIO40

1

4

GPIO9_I2S_RX_WS

EVM1_GPIO23

CPU_DACO0_GPIO17

2

3

4

JP437



3. Solder Link Options

Many of the options for the Command Module board require a solder bridge to be made or a track to be cut. The CM board has been designed to be configured in the most popular setting by using a small track between the options, which will require cutting with a sharp knife before making the alternate connection options. A documents called a Mapping Aid exist to help explain the resources available on the MCU and how it can interface with the other modules within the system. The options we have are as follows: VDDA JP201 (1-2) VDDA on the MCU is connected to 3.3V JP201 (2-3) VDDA on the MCU is connected to AN_REF on

the backplane VDDA is the power supply voltage to the on board ADC circuitry. Using a lower noise AN_REF signal will yield better results. The AN_REF signal is usually provided by a stable voltage reference source present on the Analogue Module. Vref JP202 (1-2) VREF on the MCU is connected to 3.3V JP202 (2-3) VREF on the MCU is connected to AN_REF on the

backplane This is the voltage reference that is used to measure the analogue input voltages against. An AN_REF signal will provide better results than the 3.3V signal. The AN_REF signal is usually provided by a stable voltage reference source present on the Analogue Module. VBAT JP203 (1-2) VBAT on the MCU is connected to 3.3V JP203 (2-3) VREF on the MCU is connected to 3V3_BATT on

the backplane This option is irrelevant as the LPC1343 does not a VBAT terminal. This jumper is provided for the LPC1768/LPC2368 variants of the Command Module.

Port PI00 Options PIO0_1/CLKOUT/CT32B0_MAT2/USB_FTOGGLE

JP406 (2-1) EVG0_GPIO40

JP406 (2-3) (Default) User LED1 Selecting JP406 position 2-3 allows use of the on board user led LED1 (D401). Note: EVG0_GPIO40 is also available on JP407. (PIO1_10) PIO0_2/SSEL/CT16B0_CAP0

JP417 (2-1) MOTORP2H

JP417 (2-3) (Default) EVG17_GPIO65 PIO0_3/USB_VBUS

JP438 (2-3) GPIO7_I2S_RX_CLK



JP438 (2-1) (Default) EVM0_GPIO21

PIO0_6/#USB_CONNECT/SCK

JP431 (2-3) ASC1_RX_TTL

JP431 (2-1) (Default) EVM8_GPIO53 PIO0_8/MISO/CT16B0_MAT0

JP418 (2-1) MOTORP2L

JP418 (2-3) (Default) EVG18_GPIO66 Port PIO1 Options PIO1_4/AD5/CT32B1_MAT3/WAKEUP

JP403 (2-1) (Default) AN0

JP403 (2-3) AN8 PIO1_6/RXD/CT32B0_MAT0

JP440 (2-1) (Default) ASC0_RX_TTL

JP440 (2-4) AN6

JP440 (2-3) AN14 Position 2-1 is the main RS232/UART channel. Incoming logic level receive traffic is routed from the Communication Module. PIO1_7/TXD/CT32B0_MAT1

JP439 (2-1) (Default) ASC0_TX_TTL

JP439 (2-4) AN7

JP439 (2-3) AN15 Position 2-1 is the main RS232/UART channel. Outgoing logic level transmit traffic is routed to the Communication Module where it is translated into RS232/RS485 logic levels. PIO1_8/CT16B1_CAP0

JP434 (2-3) GPIO14_MCI_PWR

JP434 (2-1) (Default) EVM4_GPIO45 PIO1_9/CT16B1_MAT0

JP437 (2-3) GPIO9_I2S_RX_WS


JP437 (2-4) CPU_DACO0_GPIO17 Note: CPU_DACO0_GPIO17 is also available on JP430 (PIO2_9) PIO1_10/AD6/CT16B1_MAT1

JP407 (2-1) (Default) EVG5_GPIO50

JP407 (2-3) EVG8_GPIO56

JP407 (2-4) EVG0_GPIO40 Note: EVG0_GPIO40 is also available on JP406. (PIO0_1) PIO1_11/AD7


JP405 (2-3) AN12



Port PIO2 Options PIO2_0/#DTR

JP421 (2-1) (Default) GPIO0

JP421 (2-3) EVG6_GPIO52 PIO2_1/#DSR

JP426 (2-1) (Default) ASC1_TX_TTL_ASC0_DTR

JP426 (2-3) CAN1_RX PIO2_2/#DCD


JP428 (2-3) EVG19_GPIO67 PIO2_3/#RI

JP411 (2-1) EMG_TRAP

JP411 (2-3) (Default) EVG11_GPIO59 PIO2_4

JP435 (2-3) GPIO12_MCI_CMD


PIO2_5

JP433 (2-3) GPIO2_MCI_DAT0


PIO2_7

JP436 (2-3) GPIO10_MCI_CLK

JP436 (2-1) (Default) EVM2_GPIO41_CAPADC

PIO2_8

JP432 (2-3) ASC1_TX_TTL

JP432 (2-1) (Default) EVM7_GPIO51 PIO2_9

JP430 (2-3) CPU_DACO0_GPIO17

JP430 (2-1) (Default) EVG2_GPIO44 Note: CPU_DACO0_GPIO17 is also available on JP437 (PIO1_9) PIO2_10

JP429 (2-3) CPU_DAC01_GPIO19

JP429 (2-1) (Default) EVG3_GPIO46 PIO2_11/SCK

JP422 (2-1) (Default) GPIO1



JP422 (2-3) EVG7_GPIO54 Port PIO3 Options PIO3_0



JP410 (2-1) MOTORH0_ENC0





JP413 (2-3) (Default) EVG13_GPIO61 Not Connected Options As the circuit board for the LPC1343 is also used for higher pin count MCU such as LPC2368 and LPC1768, there are some configurations options that are not used. These are shown on the circuit schematic but do not have any relevance for this LPC1343 module as the pins are not connected. These jumper options are detailed below.


JP401 (2-3) AN10


JP402 (2-3) AN9


JP404 (2-3) AN13


JP408 (2-4) AN11

JP408 (2-3) CPU_DACO0_GPIO17









JP419 (2-1) CAN0_TX

JP419 (2-4) (Default) CAN0_TX_LOCAL

JP419 (2-3) I2C_GEN0_SDA

JP420 (2-1) CAN0_RX

JP420 (2-4) (Default) CAN0_RX_LOCAL

JP420 (2-3) I2C_GEN0_SCL

JP423 (2-1) (Default) IRQ_GPIO16_CNTRL_I2C_INT

JP423 (2-3) IRQ_GPIO18_I2C_GEN0_INT

JP424 (2-1) (Default) ASC1_RX_TTL

JP424 (2-3) EVM10_GPIO68_ASCO_CTS

JP425 (2-1) (Default) ASC1_TX_TTL

JP425 (2-3) CAN1_TX

JP427 (2-1) MOTOR_TCO_FB

JP427 (2-3) (Default) User LED0

4. Zero Ohm Links

CAN Load Resistor JP501 This link when inserted includes a 120 ohm resistor across CANH0 and CANL0. The

default is connected. This option is irrelevant as the LPC1343 does not a CAN peripheral. This jumper is provided for the LPC1768/LPC2368 variants of the Command Module, which have a CAN transceiver fitted. AN_REF R101 This zero ohm link when inserted provides a 3.3V reference for the EDP platform.

The 3.3V used is the local supply voltage derived from a local voltage regulator. This link should be used in the absence of a 3.3V voltage reference voltage provided by the Analogue Module when fitted. The default position is not connected.

AGND & VAGND R102 This link when inserted provides a way of connecting the VAGND to the SGND. This

is the default position. The two grounds alternatively can be connected to each other on the analogue module.



5. Software Support

The NXP Command Module for the RS-EDP platform is supported by all of the necessary software drivers to make driving of the platform very easy. All the low level support for the devices controlled by I2C for example have been written, as well as a test menu to exercise each of the modules independently of the others. This therefore provides working example of the code which will allow students and users to cut and paste various sections into their own applications. Each Applications Module has its own collection of header files, which provides the support for the functions that control it. Each module has its own set of high level functions that can be called to operate and control the hardware. This makes life a lot easier for the user, who can then spend most of his time working at the higher level application layer. The software has been packed up as several ZIP file which can be downloaded and unpacked. Most of the projects have been written for the Keil uVision environment. The majority of the applications written use the serial comm. channel ASC0 for outputting data to a terminal emulator. With this in mind a serial terminal emulation program should be used to read traffic outputted from the RS-EDP platform. Hyper Terminal is included in windows as part of the Windows Operating system but this does not work reliability. With this in mind it may be worth looking at other terminal emulator especially if they are to be used with USB-RS232 converters. The terminal emulator should be set up for 115,200 baud 8 data bits no stop bit no parity No flow control The default jumper options for JP439 and JP430 should be left in place to ensure serial traffic is routed to the communication module. Always check the software to see if the baud rate has been changed. Some of the provided software includes...

5.1 RSEDP_Test_Suite

This software exercises the NXP LPC1343 MCU peripherals including the on board ADC, PWM output, input capture, I2C, and I/O. The software also allows you to exercise the basic Application Modules, which are the Communication Module, the Digital I/O Module, and the Analogue Module. A suite of drivers and test menus are provided to fully exercise all the hardware on these boards.

5.2 MC1_Test_Suite

This is similar to the RSEDP_Test_Suite, but the test menus provided are for the MC1 Brushed DC Motor Drive Application Module. The motors are nominally 12V brushed DC motors running in a full H bridge configuration. The test suite allows you to accelerate the motor, change its direction, turn the brake on and off, as well as allowing the monitoring of motor current, DC link voltage and tacho feedback signals. The MC1 motor drive module also has many external inputs for limit switch detection and conditioning of motor related stimuli. The provided software library will therefore allow you to fully exercise your motor.



5.3 MC2_Test_Suite

This is similar to the MC1 test suite but for brushless DC/AC motors. The software assumes you have an MC2 motor drive module fitted, and you want to communicate to it via I2C packets. This set of software therefore allows you communicate with the MC2 motor drive module across the I2C backplane network, present in the RSEDP system. You can have up to three MC2 motor drives fitted and this suite of software allows you to communicate with all of them.

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

D D

C C

B B

A A

1 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 5051 5253 5455 5657 5859 6061 6263 6465 6667 6869 7071 7273 7475 7677 7879 8081 8283 8485 8687 8889 9091 9293 9495 9697 9899 100101 102103 104105 106107 108109 110111 112113 114115 116117 118119 120121 122123 124125 126127 128129 130131 132133 134135 136137 138139 140

P101

Tyco Amp 140 Way

1 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 5051 5253 5455 5657 5859 6061 6263 6465 6667 6869 7071 7273 7475 7677 7879 8081 8283 8485 8687 8889 9091 9293 9495 9697 9899 100

P102

Tyco Amp 100 Way

AN_REFAN0 AN1AN2 AN3AN4 AN5AN6 AN7AN8 AN9AN10 AN11AN12 AN13AN14 AN15

GPIO0 GPIO1GPIO3GPIO2_MCIDAT0

GPIO4_MCIDAT1GPIO6_MCIDAT2GPIO8_MCIDAT3GPIO10_MCICLKGPIO12_MCICMDGPIO14_MCIPWR

GPIO5_I2STX_WSGPIO7_I2SRX_CLKGPIO9_I2SRX_WS

GPIO11_I2SRX_SDAGPIO13_I2STX_CLKGPIO15_I2STX_SDA

IRQ_GPIO16_CNTRL I2C INTIRQ_GPIO18_I2C GEN0 INT CPU DACO1_GPIO19IRQ_GPIO20_I2C GEN1 INT EVM0_GPIO21IRQ_GPIO22_I2C INT

CPU DACO0_GPIO17

EVM1_GPIO23GPIO24_AD7

GPIO39_AD8GPIO37_AD9GPIO35_AD10GPIO33_AD11GPIO31_AD12GPIO29_AD13GPIO27_AD14GPIO25_AD15

GPIO38_AD0GPIO36_AD1GPIO34_AD2GPIO32_AD3GPIO30_AD4GPIO28_AD5GPIO26_AD6

EVG0_GPIO40 EVM2_GPIO41_CAPADCEVG1_GPIO42 EVM3_GPIO43EVG2_GPIO44 EVM4_GPIO45EVG3_GPIO46 EVM5_GPIO47EVG4_GPIO48 EVM6_GPIO49EVG5_GPIO50 EVM7_GPIO51EVG6_GPIO52 EVM8_GPIO53EVG7_GPIO54 EVM9_GPIO55EVG8_GPIO56 EVG9_GPIO57EVG10_GPIO58 EVG11_GPIO59EVG12_GPIO60 EVG13_GPIO61EVG14_GPIO62 EVG15_GPIO63EVG16_GPIO64 EVG17_GPIO65EVG18_GPIO66 EVG19_GPIO67

EVM10_GPIO68_ASC0 CTSEVG20_GPIO69_ASC0 RTS

ASC1 TX TTL_ASC0 DTRASC1 RX TTL_ASC0 DSR

SPI_SSC MRST_MISOSPI_SSC MTSR_MOSI

SPI_SSC CLK

SPI_SSC #CS_NSSMOTOR P0LMOTOR P0HMOTOR P1LMOTOR P1HMOTOR P2LMOTOR P2HMOTOR PWMEMG TRP

MOTOR H0_ENC0MOTOR H1_ENC1MOTOR H2_ENC2MOTOR TCO FB

ETH TX_PETH TX_NETH RX_PETH RX_NETH LNK LEDETH RX LEDETH SPD LED

I2C GEN1 SDAI2C GEN1 SCL

#RESIN#RESOUTI2C GEN0 SDAI2C GEN0 SCL

A15_AD15

A0_AD0A1_AD1A2_AD2A3_AD3A4_AD4A5_AD5A6_AD6A7_AD7A8_AD8A9_AD9A10_AD10A11_AD11A12_AD12A13_AD13A14_AD14

ALE#RD#WR#WRH#PSEN#CS0#CS1#CS2#CS3

USB DEBUG D+USB DEBUG D-CNTRL SPI CLKCNTRL SPI MRSTCNTRL SPI MTSRCNTRL SPI #CS_NSSCNTRL I2C SDACNTRL I2C SCLUSB HOST D+USB HOST D-

USB DEV D-USB DEV D+

CANH0CANL0

+5V +5V+3V3+3V3+3V3 +3V3

+5V +5V

+12V+12V

+12V+12V

SGNDSGND SGND SGND

SGNDSGND

12VGND12VGND 12VGND

12VGND

VAGNDVAGND

Module Position 1

EDPCON1 IO Connector

EDPCON2 Bus/Control Connector

+3V3BAT+3V3+3V3 +3V3 +3V3(VCC_CM)(VCC_CM) (VCC_CM)(VCC_CM)

Title:

Size: Number: Revision:

Date:File:

Module Connectors

A3 EDP-CM-LPCx B07/04/2010D:\PCB Designs\DXP\EDP-CM-LPCx\Rev B\Module Connectors.SchDoc

Hitex (UK) Ltd.Sir William Lyons RoadUniversity of Warwick Science ParkCoventry

Sheet1 of 5Author: A.Davison

Checked By:

Approved By:(c) Hitex (UK) Ltd.

CAN1 RXCAN1 TX

R102

0RVAGNDSGND

R101

0RAN_REF

+3V3

ETHERNET..

ASC0 TX TTLASC0 RX TTL

CAN0 RXCAN0 TX

ASC1 RX TTLASC1 TX TTL

PIP10101 PIP10102

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COP101

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COP102

PIR10101 PIR10102COR101

PIR10201 PIR10202COR102

POETHERNET00

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C C

B B

A A

Title:


Date:File:

LPC2368 and JTAG

A3 EDP-CM-LPCx B07/04/2010D:\PCB Designs\DXP\EDP-CM-LPCx\Rev B\LPC2368.SchDoc



Checked By:


TDO 1

P0[3]/RXD099 VD

D(3

V3)

28

P1[4]/ENET_TX_EN93

P1[10]/ENET_RXD190

P1[16]/ENET_MDC87V

DD

(DC

DC

)(3V

3)13

P0[4]/I2SRX_CLK/RD2/CAP2[0]81

P0[7]/I2STX_CLK/SCK1/MAT2[1]78

P0[9]/I2STX_SDA/MOSI1/MAT2[3]76

TMS 3

RTCK 100

VSS

15

P1[1]/ENET_TXD194

P1[9]/ENET_RXD091

P1[17]/ENET_MDIO86

VSS

31

P0[6]/I2SRX_SDA/SSEL1/MAT2[0]79

P2[0]/PWM1[1]/TXD1/TRACECLK 75

P2[1]/PWM1[2]/RXD1/PIPESTAT0 74

TCK 5

TRST 4

TDI 2

P0[2]/TXD098

P1[8]/ENET_CRS92

P1[15]/ENET_REF_CLK/ENET_RX_CLK88

P4[28]/MAT2[0]/TXD3 82

P0[8]/I2STX_WS/MISO1/MAT2[2]77

VSS

41V

DD

(3V

3)54

P0[24]/AD0[1]/I2SRX_WS/CAP3[1]8

P0[25]/AD0[2]/I2SRX_SDA/TXD37

P0[26]/AD0[3]/AOUT/RXD36

RSTOUT 14

P1[0]/ENET_TXD095

P1[14]/ENET_RX_ER89

P0[5]/I2SRX_WS/TD2/CAP2[1]80

P2[2]/PWM1[3]/CTS1/PIPESTAT1 73

P2[4]/PWM1[5]/DSR1/TRACESYNC 69

P2[5]/PWM1[6]/DTR1/TRACEPKT0 68

VSS

A11

VD

DA

10

VR

EF12

VD

D(D

CD

C)(

3V3)

42

P0[23]/AD0[0]/I2SRX_CLK/CAP3[0]9P4[29]/MAT2[1]/RXD3 85

P2[3]/PWM1[4]/DCD1/PIPESTAT2 70

P2[6]/PCAP1[0]/RI1/TRACEPKT1 67

P2[7]/RD2/RTS1/TRACEPKT2 66

P2[8]/TD2/TXD2/TRACEPKT3 65

VSS

55

RTCX1 16

RESET 17

P1[31]/SCK1/AD0[5]20

P1[21]/PWM1[3]/SSEL035

P0[18]/DCD1/MOSI0/MOSI60

P2[9]/USB_CONNECT/RXD2/EXTIN0 64

P0[16]/RXD1/SSEL0/SSEL63

P0[17]/CTS1/MISO0/MISO61

P0[15]/TXD1/SCK0/SCK62

RTCX2 18

VB

AT

19

XTAL2 23

P0[30]/USB_D-30

P1[25]/MAT1[1]39

P1[29]/PCAP1[1]/MAT0[1]45

VSS

72

P0[21]/RI1/MCIPWR/RD157P0[20]/DTR1/MCICMD/SCL158P0[19]/DSR1/MCICLK/SDA159

P1[30]/VBUS/AD0[4]21

XTAL1 22

P3[25]/MAT0[0]/PWM1[2] 27

P1[18]/USB_UP_LED/PWM1[1]/CAP1[0]32

P1[24]/PWM1[5]/MOSI038

VD

D(D

CD

C)(

3V3)

84

P0[10]/TXD2/SDA2/MAT3[0]48

P2[11]/EINT1/MCIDAT1/I2STX_CLK 52

VD

D(3

V3)

71

P0[22]/RTS1/MCIDAT0/TD156

P0[28]/SCL024P0[27]/SDA025

P0[29]/USB_D+29

P1[19]/CAP1[1]33

P1[22]/MAT1[0]36

VSS

97

P1[28]/PCAP1[0]/MAT0[0]44

P0[1]/TD1/RXD3/SCL147

P2[13]/EINT3/MCIDAT3/I2STX_SDA 50

P2[10]/EINT0 53

P3[26]/MAT0[1]/PWM1[3] 26

VD

D(3

V3)

96

VSS

83

P1[20]/PWM1[2]/SCK034

P1[23]/PWM1[4]/MISO037

P1[26]/PWM1[6]/CAP0[0]40

P1[27]/CAP0[1]43

P0[0]/RD1/TXD3/SDA146

P0[11]/RXD2/SCL2/MAT3[1]49

P2[12]/EINT2/MCIDAT2/I2STX_WS 51

U201

LPC2368FBD100 - LPC1768FBD100

SGND

P0_0P0_1

P0_4/PIO0_3P0_5/PIO1_9

P1_0P1_1P1_4P1_8P1_9P1_10P1_14P1_15P1_16P1_17P1_18/PIO1_10P1_19/PIO3_0P1_20/PIO3_1P1_21/PIO2_3P1_22/PIO3_2P1_23/PIO3_3P1_24P1_25P1_26

P1_28/PIO0_2P1_29/PIO0_8P1_30/PIO1_11P1_31

(ENET_TXD0)(ENET_TXD1)(ENET_TX_EN)

(ENET_RXD0)(ENET_RXD1)

(ENET_REF_CLK)(ENET_RX_ER)

#RESIN#RESOUT

(ENET_MDC)(ENET_MDIO)

(ENET_CRS)

1 23 45 67 89 1011 1213 1415 1617 1819 20

P201

2X10 Header

R20410K

R20310K

R20210K

R20110K

R20810K

R20710K

R20610K

R20510K

#RESIN #RESINTDO/SWO TDO/SWORTCK RTCKTCK/SWCLK TCK/SWCLK

TMS/SWDIOTMS/SWDIOTDITDI

#TRST #TRST

SGNDSGND

+3V3 +3V3

JTAG

+3V3

+3V3BAT

C203100nF

C204100nF

C205100nF

C206100nF

C207100nF

C208100nF

C209100nF

C210100nF

SGND

+3V3

P2_0/PIO2_8P2_1/PIO0_6

P2_3/PIO2_9P2_4/PIO2_10P2_5/PIO2_2P2_6P2_7/PIO2_1P2_8P2_9

P0_2/PIO1_7P0_3/PIO1_6

P0_19/PIO2_7P0_20/PIO2_4P0_21/PIO1_8P0_22/PIO2_5

P0_10/PIO2_0P0_11/PIO2_11

P0_23/PIO1_4P0_24P0_25P0_26

1

2

3JP201

Solderlink

AN_REF

+3V3

VAGND

1

2

3JP202

Solderlink

AN_REF

+3V3

12

32.768KHz

Y201CX8V-T1A 32.768kHz

C202

22pF

C201

22pF

SGND

SGND

1

2

3JP203

Solderlink

+3V3

1

2

3

12MHz

Y202CSTCE12M0G55

SGND

CNTRL I2C SDACNTRL I2C SCL

EVG1_GPIO42P3_25/PIO0_1


EVM5_GPIO47

GPIO8_MCIDAT3GPIO6_MCIDAT2GPIO4_MCIDAT1P2_10

CNTRL SPI MTSRCNTRL SPI MRST

CNTRL SPI CLKCNTRL SPI #CS_NSS

EVM9_GPIO55

XTAL1

XTAL2

/CS_SD

SPI_MOSI1

SPI_SCK1SPI_MISO1

RST1

VDD2

VSS3

U202

MCP120T-300I/TT

C211100nF

#RESIN

SGND

+3V3

USB DEBUG D+USB DEBUG D- 1 23 4

P202

Header 2X2

SGND

+3V3

R20910K

+3V3

SGND

Only Populate for LPC1768Or LPC2368Not Fitted

Only withLPC1768

R21010K_opt

+3V3

1 23 45 67 89 10

P203

Header 5X2

+3V3

SGND

#RESIN

TMS/SWDIOTCK/SWCLKTDO/SWOTDI

R21110K

+3V3

P2_10

Only populate withLPC1768 and LPC2368

LPC2368

PIC20101 PIC20102

COC201

PIC20201 PIC20202

COC202

PIC20301

PIC20302COC203

PIC20401

PIC20402COC204

PIC20501

PIC20502COC205

PIC20601

PIC20602COC206

PIC20701

PIC20702COC207

PIC20801

PIC20802COC208

PIC20901

PIC20902COC209

PIC21001

PIC21002COC210

PIC21101

PIC21102COC211

PIJP20101

PIJP20102PIJP20103

COJP201PIJP20201

PIJP20202PIJP20203

COJP202PIJP20301

PIJP20302PIJP20303

COJP203

PIP20101 PIP20102

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COP203

PIR20101

PIR20102COR201

PIR20201

PIR20202COR202

PIR20301

PIR20302COR203

PIR20401

PIR20402COR204

PIR20501

PIR20502COR205

PIR20601

PIR20602COR206

PIR20701

PIR20702COR207

PIR20801

PIR20802COR208

PIR20901

PIR20902COR209

PIR21001

PIR21002COR210

PIR21101

PIR21102COR211

PIU20101

PIU20102

PIU20103

PIU20104

PIU20105

PIU20106

PIU20107

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PIU20109

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PIU201061

PIU201062

PIU201063

PIU201064

PIU201065

PIU201066

PIU201067

PIU201068

PIU201069

PIU201070

PIU201071

PIU201072

PIU201073

PIU201074

PIU201075

PIU201076

PIU201077

PIU201078

PIU201079

PIU201080

PIU201081

PIU201082

PIU201083

PIU201084

PIU201085

PIU201086

PIU201087

PIU201088

PIU201089

PIU201090

PIU201091

PIU201092

PIU201093

PIU201094

PIU201095

PIU201096

PIU201097

PIU201098

PIU201099

PIU2010100

COU201

PIU20201

PIU20202

PIU20203

COU202

PIY20101

PIY20102COY201

PIY20201PIY20202

PIY20203COY202

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

D D

C C

B B

A A

Title:


Date:File:

LPC1343

A3 EDP-CM-LPC B07/04/2010D:\PCB Designs\DXP\EDP-CM-LPCx\Rev B\LPC1343.SchDoc



Checked By:


PIO2_6 1

PIO2_0/DTR 2RESET/PIO0_03

PIO0_1/CLKOUT/CT32B0_MAT2/USB_FTOGGLE4

VSS

IO5

XTALIN 6

XTALOUT 7

VD

DIO

8

PIO1_8/CT16B1_CAP09

PIO0_2/SSEL/CT16B0_CAP010

PIO2_7 11

PIO2_8 12

PIO2_1/DSR 13

PIO0_3/USB_VBUS14

PIO0_4/SCL15

PIO0_5/SDA16

PIO1_9/CT16B1_MAT017

PIO2_4 18

USB_DM 19

USB_DP 20

PIO2_5 21

PIO0_6/USB_CONNECT/SCK22

PIO0_7/CTS23

PIO2_9 24

PIO2_10 25

PIO2_2/DCD 26

PIO0_8/MISO/CT16B0_MAT027

PIO0_9/MOSI/CT16B0_MAT1/SWO28

SWCLK/PIO0_10/SCK/CT16B0_MAT229

PIO1_10/AD6/CT16B1_MAT130

PIO2_11/SCK 31TDI/PIO0_11/AD0/CT32B0_MAT332

TMS/PIO1_0/AD1/CT32B1_CAP033

TDO/PIO1_1/AD2/CT32B1_MAT034

TRST/PIO1_2/AD3/CT32B1_MAT135

PIO3_0 36

PIO3_1 37

PIO2_3/RI 38

SWDIO/PIO1_3/AD4/CT32B1_MAT239

PIO1_4/AD5/CT32B1_MAT3/WAKEUP40

VSS

41

PIO1_11/AD742

PIO3_2 43

VD

D(3

V3)

44

PIO1_5/RTS/CT32B0_CAP045

PIO1_6/RXD/CT32B0_MAT046

PIO1_7/TXD/CT32B0_MAT147

PIO3_3 48

U301

LPC1343FBD48

TDO/SWO

TCK/SWCLK

TMS/SWDIOTDI

#TRST

TDO/SWO

TMS/SWDIOP0_23/PIO1_4

#RESIN

P1_30/PIO1_11

XTAL1

XTAL2XTAL MUST BE POSITIONED CLOSE TO BOTH U201 AND U301

CNTRL I2C SCLCNTRL I2C SDA

EVG1_GPIO42

P3_25/PIO0_1

+3V3 +3V3


SGNDSGND

P1_18/PIO1_10

P1_19/PIO3_0P1_20/PIO3_1

P1_21/PIO2_3

P1_22/PIO3_2P1_23/PIO3_3

EVM5_GPIO47

P0_10/PIO2_0

P0_11/PIO2_11

P2_7/PIO2_1P2_5/PIO2_2

P2_4/PIO2_10P2_3/PIO2_9

EVM9_GPIO55P2_1/PIO0_6

P2_0/PIO2_8

P0_22/PIO2_5

P0_21/PIO1_8

P0_20/PIO2_4

P0_19/PIO2_7

P0_5/PIO1_9

P0_4/PIO0_3

P0_2/PIO1_7P0_3/PIO1_6

C301100nF

C302100nF

+3V3

SGND

R3020R

R304

0R

R301

0R

R303

0R

PIO1_0PIO1_1

PIO1_3

PIO0_9

P1_28/PIO0_2

P1_29/PIO0_8

R30510K

+3V3

P3_25/PIO0_1

PIC30101

PIC30102COC301

PIC30201

PIC30202COC302

PIR30101 PIR30102

COR301

PIR30201 PIR30202

COR302

PIR30301 PIR30302

COR303

PIR30401 PIR30402

COR304

PIR30501

PIR30502COR305

PIU30101

PIU30102PIU30103

PIU30104

PIU30105

PIU30106

PIU30107

PIU30108

PIU30109

PIU301010

PIU301011

PIU301012

PIU301013

PIU301014

PIU301015

PIU301016

PIU301017

PIU301018

PIU301019

PIU301020

PIU301021

PIU301022

PIU301023

PIU301024

PIU301025

PIU301026

PIU301027

PIU301028

PIU301029

PIU301030

PIU301031PIU301032

PIU301033

PIU301034

PIU301035

PIU301036

PIU301037

PIU301038

PIU301039

PIU301040

PIU301041

PIU301042

PIU301043

PIU301044

PIU301045

PIU301046

PIU301047

PIU301048

COU301

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

D D

C C

B B

A A

Title:


Date:File:

Link Options

A3 EDP-CM-LPC B07/04/2010D:\PCB Designs\DXP\EDP-CM-LPCx\Rev B\Jumpers.SchDoc



Checked By:


2

13

4

JP408Solderlink

P0_26

AN3

AN11

CPU DACO0_GPIO17

1

2

3

JP401SolderlinkP0_25

AN2

AN101

2

3


AN1

AN9

P0_23/PIO1_4

1

2

3

JP403Solderlink

AN0

AN8

1

2

3


AN5

AN13

1

2

3

JP405SolderlinkP1_30/PIO1_11

AN4

AN12

1

2

3

JP406SolderlinkP3_25/PIO0_1

EVG0_GPIO40

LED1

R40110K

23

1 Q401BC848C

D401LED YELLOW

R402330R

SGND

+3V3+3V3

P1_18/PIO1_10

EVG5_GPIO50

EVG8_GPIO56

1

2

3

JP409Solderlink

1

2

3

JP410Solderlink

1

2

3

JP411Solderlink

P1_19/PIO3_0

EVG9_GPIO57

MOTOR P0H

P1_20/PIO3_1

EVG10_GPIO58

MOTOR H0_ENC0

P1_21/PIO2_3

EVG11_GPIO59

EMG TRP

1

2

3

JP412Solderlink

12

3JP413Solderlink

1

2

3

JP414Solderlink

P1_22/PIO3_2

EVG12_GPIO60

MOTOR P0L

P1_23/PIO3_3

EVG13_GPIO61

MOTOR H1_ENC1

1

2

3

JP415Solderlink

1

2

3

JP416Solderlink

1

2

3

JP417Solderlink

1

2

3

JP418Solderlink

P1_24

EVG14_GPIO62

MOTOR H2_ENC2

P1_25

EVG15_GPIO63

MOTOR P1H

P1_26

EVG16_GPIO64

MOTOR P1L

P1_28/PIO0_2

EVG17_GPIO65

MOTOR P2H

P1_29/PIO0_8

EVG18_GPIO66

MOTOR P2L

P0_0

I2C GEN0 SDA

CAN0 TX

1

2

3

JP421Solderlink

1

2

3

JP422Solderlink

1

2

3

JP423Solderlink

1

2

3

JP424Solderlink

1

2

3

JP425Solderlink

1

2

3

JP426Solderlink

1

2

3

JP427Solderlink

1

2

3

JP428SolderlinkP0_1

I2C GEN0 SCL

CAN0 RX

P0_10/PIO2_0

GPIO0

EVG6_GPIO52

P0_11/PIO2_11

GPIO1

EVG7_GPIO54

P2_10

IRQ_GPIO16_CNTRL I2C INT

IRQ_GPIO18_I2C GEN0 INT

P2_9

EVM10_GPIO68_ASC0 CTS

ASC1 RX TTL

P2_8

CAN1 TX

ASC1 TX TTL

P2_7/PIO2_1

ASC1 TX TTL_ASC0 DTR

CAN1 RX

P2_6

MOTOR TCO FB

R40310K

23

1 Q402BC848C

D402LED YELLOW

R404330R

SGND

+3V3+3V3

LED0

P2_5/PIO2_2

EVG4_GPIO48

EVG19_GPIO67

1

2

3

JP429Solderlink

1

2

3

JP430Solderlink

1

2

3

JP431Solderlink

1

2

3

JP432Solderlink

1

2

3

JP433Solderlink

1

2

3

JP434Solderlink

1

2

3

JP435Solderlink

1

2

3

JP436Solderlink

1

2

3

JP438Solderlink

P2_4/PIO2_10

CPU DACO1_GPIO19

EVG3_GPIO46

P2_3/PIO2_9

CPU DACO0_GPIO17

EVG2_GPIO44

P2_1/PIO0_6

EVM8_GPIO53

ASC1 RX TTL

P2_0/PIO2_8

EVM7_GPIO51

ASC1 TX TTL

P0_22/PIO2_5

EVM6_GPIO49

P0_21/PIO1_8

EVM4_GPIO45

P0_20/PIO2_4

EVM3_GPIO43

P0_19/PIO2_7

EVM2_GPIO41_CAPADC

P0_5/PIO1_9

GPIO9_I2SRX_WS

EVM1_GPIO23

P0_4/PIO0_3

GPIO7_I2SRX_CLK

EVM0_GPIO21

2

13

4

JP439Solderlink

2

13

4

JP440Solderlink

P0_2/PIO1_7 AN7

AN15

ASC0 TX TTL

P0_3/PIO1_6 AN6

AN14

ASC0 RX TTL

GPIO2_MCIDAT0

GPIO10_MCICLK

GPIO12_MCICMD

GPIO14_MCIPWR

2

13

4

JP419Solderlink

2

13

4JP420Solderlink

CAN0_RX_LOCAL

CAN0_TX_LOCAL

EVG0_GPIO40

CPU DACO0_GPIO172

13

4

JP437Solderlink

2

13

4

JP407Solderlink PID40101

PID40102COD401

PID40201PID40202

COD402

PIJP40101

PIJP40102

PIJP40103

COJP401

PIJP40201

PIJP40202

PIJP40203

COJP402

PIJP40301

PIJP40302

PIJP40303

COJP403

PIJP40401

PIJP40402

PIJP40403

COJP404

PIJP40501

PIJP40502

PIJP40503

COJP405

PIJP40601

PIJP40602

PIJP40603

COJP406

PIJP40701

PIJP40702

PIJP40703

PIJP40704

COJP407

PIJP40801

PIJP40802

PIJP40803

PIJP40804

COJP408 PIJP40901

PIJP40902

PIJP40903

COJP409

PIJP41001

PIJP41002

PIJP41003

COJP410

PIJP41101

PIJP41102

PIJP41103

COJP411

PIJP41201

PIJP41202

PIJP41203

COJP412

PIJP41301

PIJP41302

PIJP41303

COJP413

PIJP41401

PIJP41402

PIJP41403

COJP414

PIJP41501

PIJP41502

PIJP41503

COJP415

PIJP41601

PIJP41602

PIJP41603

COJP416

PIJP41701

PIJP41702

PIJP41703

COJP417

PIJP41801

PIJP41802

PIJP41803

COJP418

PIJP41901

PIJP41902

PIJP41903

PIJP41904

COJP419

PIJP42001

PIJP42002

PIJP42003

PIJP42004COJP420

PIJP42101

PIJP42102

PIJP42103

COJP421

PIJP42201

PIJP42202

PIJP42203

COJP422

PIJP42301

PIJP42302

PIJP42303

COJP423

PIJP42401

PIJP42402

PIJP42403

COJP424

PIJP42501

PIJP42502

PIJP42503

COJP425

PIJP42601

PIJP42602

PIJP42603

COJP426

PIJP42701

PIJP42702

PIJP42703

COJP427

PIJP42801

PIJP42802

PIJP42803

COJP428

PIJP42901

PIJP42902

PIJP42903

COJP429

PIJP43001

PIJP43002

PIJP43003

COJP430

PIJP43101

PIJP43102

PIJP43103

COJP431

PIJP43201

PIJP43202

PIJP43203

COJP432

PIJP43301

PIJP43302

PIJP43303

COJP433

PIJP43401

PIJP43402

PIJP43403

COJP434

PIJP43501

PIJP43502

PIJP43503

COJP435

PIJP43601

PIJP43602

PIJP43603

COJP436

PIJP43701

PIJP43702

PIJP43703

PIJP43704

COJP437

PIJP43801

PIJP43802

PIJP43803

COJP438

PIJP43901

PIJP43902

PIJP43903

PIJP43904

COJP439

PIJP44001

PIJP44002

PIJP44003

PIJP44004

COJP440

PIQ40101

PIQ40102

PIQ40103COQ401

PIQ40201

PIQ40202

PIQ40203COQ402

PIR40101

PIR40102COR401

PIR40201

PIR40202COR402

PIR40301

PIR40302COR403

PIR40401

PIR40402COR404

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

D D

C C

B B

A A

Title:


Date:File:

Ethernet, CAN, SD Card

A3 EDP-CM-LPCx B07/04/2010D:\PCB Designs\DXP\EDP-CM-LPCx\Rev B\Ethernet.SchDoc



Checked By:


TX_CLK1

TX_EN2

TXD_03

TXD_14

TXD_25

TXD_36

PWR_DOWN/INT 7

NC 8

NC 9

NC 10

NC 11

NC 12

RD- 13

RD+ 14

AV

SS15

TD- 16

TD+ 17

PFBIN118

AV

SS19

RES

ERV

ED20

RES

ERV

ED21

AV

DD

3322

PFBOUT23

RBIAS24

25MHz_OUT25

LED_ACT/COL 26LED_SPEED 27

LED_LINK 28

RESET_N 29

MDIO30MDC31

IOV

DD

3332

X1 34X2 33

IOV

SS35

DV

SS36

PFBIN237

RX_CLK38RX_DV39

CRS/CRS_DV40

RX_ER41

COL42

RXD_043

RXD_144

RXD_245

RXD_346

IOV

SS47

IOV

DD

3348

U501

DP83848CVV

D1

GND2

VCC3

R4

VREF 5

CANL 6

CANH 7

RS 8

U502

SN65HVD230D

SGND

+3V3

SGND

SGND

CANH0

CANL0

C508100nF

SGND

+3V3

R512120R

R51310K

SGND

CAN0_RX_LOCAL

CAN0_TX_LOCAL

C50610uF 10V

C507100nF

C505100nF

C504100nF

SGND

P1_0P1_1

P1_4(ENET_TXD0)(ENET_TXD1)

(ENET_TX_EN)

P1_9P1_10

P1_14

P1_15

(ENET_RXD0)(ENET_RXD1)

(ENET_REF_CLK)

(ENET_RX_ER)

ETH TX_PETH TX_N

ETH RX_PETH RX_N

ETH LNK LED

ETH RX LEDETH SPD LED

R502

2K2

R501

2K2

+3V3

R503

10K

+3V3

R50849R9

R50749R9

R50649R9

R50449R9

C502100nF

C503100nF

SGND

ETH TX_PETH TX_N

ETH RX_PETH RX_N

R5094K87 1%

SGND

LEDs Active Low

#RESIN

P1_16P1_17

(ENET_MDC)(ENET_MDIO)

TriState 1

GND 2OUTPUT3

VDD4Y501

50.000MHZ XO53050UITA

+3V3

SGND

R5052K2+3V3

P1_8 (ENET_CRS)

C501100nF

SGND

+3V3

ETHERNET..

ETHERNET..

+3V3

NC1

/CS2

DI3

VDD4

CLK5

VSS6

DO7

RSV8

J501

ST2S008V1A

/CS_SDSPI_MOSI1

SPI_SCK1

SGND SPI_MISO1

R51410K

/CS_SD

+3V3

+3V3

C51010uF 10V

C509100nF

SGND

12

JP501Jumper

PIC50101

PIC50102COC501

PIC50201

PIC50202COC502

PIC50301

PIC50302COC503

PIC50401

PIC50402COC504

PIC50501

PIC50502COC505

PIC50601

PIC50602COC506

PIC50701

PIC50702COC507

PIC50801

PIC50802COC508

PIC50901

PIC50902COC509

PIC51001

PIC51002COC510

PIJ50101

PIJ50102

PIJ50103

PIJ50104

PIJ50105

PIJ50106

PIJ50107

PIJ50108

COJ501

PIJP50101

PIJP50102

COJP501

PIR50101PIR50102COR501

PIR50201PIR50202

COR502


PIR50401

PIR50402COR504


PIR50601

PIR50602COR506

PIR50701

PIR50702COR507

PIR50801

PIR50802COR508

PIR50901

PIR50902COR509

PIR51201

PIR51202COR512

PIR51301

PIR51302COR513

PIR51401

PIR51402COR514

PIU50101

PIU50102

PIU50103

PIU50104

PIU50105

PIU50106

PIU50107

PIU50108

PIU50109

PIU501010

PIU501011

PIU501012

PIU501013

PIU501014

PIU501015

PIU501016

PIU501017

PIU501018

PIU501019

PIU501020PIU501021PIU501022

PIU501023

PIU501024

PIU501025

PIU501026

PIU501027

PIU501028

PIU501029

PIU501030

PIU501031

PIU501032PIU501033

PIU501034

PIU501035 PIU501036

PIU501037

PIU501038

PIU501039

PIU501040

PIU501041

PIU501042

PIU501043

PIU501044

PIU501045

PIU501046

PIU501047

PIU501048 COU501

PIU50201

PIU50202

PIU50203

PIU50204

PIU50205

PIU50206

PIU50207

PIU50208

COU502

PIY50101

PIY50102PIY50103

PIY50104

COY501

POETHERNET00

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