[ee332][09ece][group13]report project (1)

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Group 13 | 09ECEM.A.D 13 | 09ECE_ UNIVERSITY OF SCIENCE AND TECHNOLOGY_THE UNIVERSITY OF DANANG

Design an AmplifierREPORT PROJECT EE332



Instructor: NguyenVanTuan LabAssitance: NguyenTrungKien 2

REPORT PROJECT EE332

Design an Amplifier

Abstract:

This report contains an explanation of the principles and techniques used in

implementing a three stages amplifier with differential input. It’s followed by a section that

builds up a design principle and constructs a version of the circuit to amplify signal.

Danang, 17-Mar-2013




Group 13 - Class 09ECE

Nguyen Ngoc Minh

Ngo Tran Duc Thang

Nguyen Xuan Tien




Table of Contents

I. Introduction .................................................................................................................5

II. Architecture Design: ....................................................................................................6

1. Design Specifications ................................................................................................6

1.1. Input signal specifications ...............................................................................6

1.2. Equipment available for testing ......................................................................6

1.3. Minimum Design Specification of the amplifier ............................................. 6

2. Block Diagram ....................................................................................................... 7

3. Discussion on the chosen architecture.................................................................7

4. Trade offs ................................................................................................................8

III. Circuit Design: .............................................................................................................9

1. Schematics.................................................................................................................9

2. Explanation for working of each stages ...............................................................9

2.1 The differential stage ..........................................................................................9

2.2 The middle stage ...............................................................................................10

2.3 The Darlington stage .........................................................................................10

3. Design equations and calculation ......................................................................11

3.1. For the Darlington stage ................................................................................11

3.2. For the middle stage ......................................................................................12

3.3. For the differential stage ...............................................................................14

IV. Conclusion ...................................................................................................................3

V. References ...................................................................................................................4




I. Introduction

This design project aims to utilize every single skill we have learned in EE 332 this

quarter. We will use our newly acquired knowledge to build an audio amplifier that

can take the input from a CD player or portable music player and amplify the signal to

drive a loudspeaker. Our design could utilize passive electronic components, discrete

BJT’s, and operational amplifiers.




II. Architecture Design:

1. Design Specifications

1.1.

Input signal specifications

Signal voltage: 0.5VAC.

Signal source resistance 50 Ω.

1.2. Equipment available for testing

Hardware: Oscilloscope, DMM, Generator, power supply.

Software: PSPICE.

1.3. Minimum Design Specification of the amplifier

Output power: 0.5W (minimum).

Load Impedance (speaker): 8Ω.

Unity Gain Bandwidth: 20Hz – 20 kHz (-3dB).

Idling power: < 1W.

Distortion: No distortion.




2. Block Diagram

Figure : Block Diagram

3. Discussion on the chosen architecture

After some debates, we decided to choose Power amplifier OCL to be the

architecture for our design. The reason behind is the architecture has so many

advantages over other architectures; for example, high efficiency, bandwidth gain,

power using factor, amplitude of output,…

Go deeply into the circuit:

-

Choosing BJT bases on the maximum values that match between our

calculation and database. These values must be made sure that we would

have maximum current, voltage and power.

-

Choosing diode bases on familiar ones that used in the previous lab and

pre-lab.

- Choosing resistors that must match between the calculation and available

resistors in the market. Moreover, the number of diodes and their connection




in the circuit must bring a guarantee that the transistors will work correctly as

our design in the circuit.

- At the first time, we chose class-AB output stage since it has low output

impedance, high efficiency, reducing distortion… Then, we improve it into

Darlington Amplifier with protecting circuit to increase the safety of circuit in

case unwanted problems occurring.

4. Trade offs

- Using class AB and its improvement (Darlington circuit) instead of class B at

output. The trade off in this case is lower efficiency, but minimized distortion.

- Negative feedback using in this circuit leads the circuit to be more complicated,

but it’s must be safer.




III. Circuit Design:

1. Schematics

Figure 2: Overall Circuit

2. Explanation for working of each stages

2.1 The differential stage




o Q7 is polarized to make the current, which can be adjusted by R8, stable;

and adjusted power for the middle point to be equal 0.

o Q8 and Q9 severed for differential circuit, made circuit stable.

o Q10 and Q11 made minor current.

o C2 used for short circuit in AC mode.

o R9 and R10 polarized for Q8 and Q9, and removed high frequency

signals in AC mode.

o R11 and R12 polarized for Q10 and Q11, controlled Q6, and determined

current ratio for minor part Q10 and Q11.

o

R13 and R14 determine gain. R13 polarized for Q8 in DC mode.

o

R15 polarized for Q9 in DC mode.

2.2 The middle stage

o D4 and D5 create difference voltage 2 to polarize Q5 to create current

in E of Q5. This current can be adjusted thank to R6.

o R5 makes forward bias for D4 and D5

o D1, D2, D3, and R7 used to get bias voltage for Darlington circuit (work

in AB stage).o

Q6 created output that is changed 360with input.

2.3 The Darlington stage

When input signal is in positive half:

of Q3 increases => Q3 is forward bias. Then, the current goes

into B of Q1=> Q1 is forward bias=> current goes through

+ to

Speaker and to mass.

In this case, Q4 is inverse bias=> Q2 doesn’t draw current.

When input signal is in negative half:




of Q4 decreases => Q4 is forward bias. Then, the current

withdraw from B of Q2=> Q2 is forward bias=> current goes from

mass to Speaker to −.

In this case, Q3 is inverse bias=> Q1 doesn’t work.

3. Design equations and calculation

3.1. For the Darlington stage

3 ( √ 2) ×

2 + .

We choose R1≪ , which is R1 = 0.5Ω => because it should be received

this value to satisfy the requirement of Darlington circuit.

Unfortunately, in the market, we just find the minimum resistor, which is

0.68 Ω. Hence, in our circuit, R1 = R2 = 0.68 Ω.

Then, 2 + √ 2 × 3 × 8 . 6 8 7 . 2 2

+ 7.220.68+8 0.83

With ξ=0.8, .

. 9.025

We choose VCC = 10V, and VEE = -10V

2

+ 7.33

0.05

= 0.05+0.830.88

12 0.88 ×0.680.26

− − 7.33−3−0.264.07

1 ℎ : + > 4.07




+ > 2 20

+ > 2 2×0.881.76

, ℎ, ℎ: 122073

22940

ℎ: 0.88> ℎ 0.8875 12

To protect Q1 and Q2, as well as make Q3 and Q4 stable, we add R3 and R4

into the circuit.

ℎ:, 10 1.2

> 12+1.213.2

ℎ 3 4 2 2 0 Ω , ℎ

ℎ ℎ, ℎ 322073

42940

3.2. For the middle stage

Since diode D1, D2, D3, D4, D5 work with small current, we choose

D1= D2=D3=D4=D5=D1N4007

Characteristics of D1N4007 is:

+ 1

+ 0.7 10

Choose R5:

5 − 2

860Ω

ℎ, ℎ 51Ω 2ℎ

− 2 8.6




+ + 19.3

4 ÷ 1 5

6 15 47Ω 6

4 175Ω

ℎ,ℎ 6100Ω ≥ + + + 4 × 0 . 6 2 . 4

_ 4 × 0 . 7 2 . 8

ℎ 10 2.4 ÷ 2.8, ℎ: 7 _ − 3

10 30Ω 7 _ − 310 70Ω

ℎ,ℎ 7 7 5 Ω

ℎ,

.

ℎ,2 + . + 3 + + .

2 − . − 3 − .

+

ℎℎ 5 : +

__ 7 5 + 1 13.2

7 5 + 1 0.17

ℎ 0.7 10

ℎ, 10+0.1710.17

ℎ 5 10,10

− + _ 19.3− 10+2.8 6.5

× 0.176.5 1.105

× 0.1710 1.7

5 6 ℎ : + > 2 × 1.7 3.4

+ > 2 20

+ > 2 2 × 1 0 2 0

, ℎ, ℎ: 5 2940; 6 22073




3.3. For the differential stage

The differential stage has function of reduce noise in the changing noise.

Combining with negative feedback from Darlington circuit (third stage), this firststage play a very important role in quality of amplifier.

, ℎ:

75 0.1775 2.27µ, ≥0.7

ℎ , ≫ ,ℎ,

ℎ, ≅ 75 0.17

+ ≅0.17

+ × 1 2 + ×11, ℎ, 1112 ℎ , : 9 1 0

+ 2×0.170.34

0.1 10, 8

10 1Ω 8 1 10Ω

ℎ, ℎ 81.5Ω

7, 8, 9, 10 11 ℎ :

+ >0.17×101.7

+ > 2 3.4 + > 2 2×0.170.34

ℎ ℎ , 9 11; 8 10 ℎ

, ℎ, ℎ: 78921015

101123904




The rest components are chosen based on the previous lab in this course.

4.

Simulation Results

Testing with sinusoidal signal input (red)

We get the in-phase amplified output (green)

Figure 3: input and output waveform

Figure 4: bandwidth

Some snap shots of DC current and DC voltage.




Figure 5: DC current




Figure 6: DC voltage

Figure 7: DC power

5.

Results

Figure 8: input and output waveform



Figure 9: waveform at 20Hz and 20kHz

Conclusion: in theory, our project worked very well. It nearly was successful

in the first time testing.

6. Printed Circuit Board

Figure 1 : The printed board that we implemented into the real one.



Instructor: NguyenVanTuan LabAssitance: NguyenTrungKien

09ECE | Group13 | NguyenNgocMinh | NgoTranDucThang | NguyenXuanTien

1

Figure 11:

The revised version of PCB after remove some mirror components.

Comment:

-

The first Board (figure 10) is the one that we took to make DEMO. When testing

in theory, we didn’t receive any error. Unfortunately, when implementing

directly to the real Board, since we’re just amateur in the first time doing this,

this board didn’t work. We did try to check error in weld beads and fixed them,

but it still didn’t work. It’s so shame if we blamed this for lacking of time, but it’s

our current situation.

-

The second board is the one that we did try to eliminate some components in

the protecting part of Darlington circuit, since we did test and realized that this





2

part is somehow unnecessary. We remove them to make the circuit simpler

when implementing. Since we don’t have chance to make it real, I just attached

here for referencing, for letting you know that we did really try for this project.

7. Price

Components Quantity Price Total

2SA940 3 3500 10500

Q2SC2073 3 3500 10500

Q2N3904 2 1000 2000

Q2SA1015 3 500 1500

2200µF 25V 1 4800 4800

10µF 2 500 1000

0.1µF

1

400

400

8nF 1 100 100

1N4007 5 400 2000

Resistors 13 85 1105

R 3W 0.68Ω 2 1900 3800

37705





3

IV. Conclusion

After this lab, we are able to design a three stages amplifier with differential input.

Besides, we also recognized the importance of the Darlington circuit and got some

experiences in building the real board circuit. Finally, in addition to the received

knowledge getting from the laboratory, we also studied some of soft skills such as

how to synthesis knowledge from many sources and team work skill.





4

V. References

1.

47387319-K ỹ -thuật-mạch-điện-t ử -Phạm-minh-Ha-Điện-t ử -tương-t ự .pdf

2.

Microelectronic Circuit Design 3rd edition by R. Jaeger.pdf

3.

Lectures of instructor.

4.

Transistor Nhat (nhung transistor thong dung o Danang).pdf

[ee332][09ece][group13]report project (1)

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