efficient fpga implementation of address generator for wimax deinterleaver

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EFFICIENT FPGA IMPLEMENTATION OF ADDRESS GENERATOR FOR WiMAX DEINTERLEAVER Presented By K.Mounika (11NC1A0448) D.Sindhu Priya B.Priyanka (11NC1A0428) (11NC1A0413) Under the esteemed guidance of D.RAJENDRA PRASAD, M.Tech.,(Ph.D.) Associate Professor DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING ST.ANN’S ENGINEERING COLLEGE (Approved by AICTE, Affiliated to JNTUK, Kakinada) CHIRALA, A.P. 2011-2015

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EFFICIENT FPGA IMPLEMENTATION OF ADDRESSGENERATOR FOR WiMAX DEINTERLEAVER

Presented By K.Mounika

(11NC1A0448)

D.Sindhu Priya B.Priyanka (11NC1A0428) (11NC1A0413)

Under the esteemed guidance of D.RAJENDRA PRASAD, M.Tech.,(Ph.D.)

Associate Professor

 

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING ST.ANN’S ENGINEERING COLLEGE

(Approved by AICTE, Affiliated to JNTUK, Kakinada)

CHIRALA, A.P.

2011-2015

  

CONTENTS:IntroductionObjectiveExisting MethodProposed MethodWiMAXInterleaver/DeinterleaverProposed AlgorithmAdvantages ApplicationsConclusionReferences

INTRODUCTION:

BROADBAND wireless access (BWA) is continuously

becoming a more challenging competitor to the conventional wired

last mile access technologies . IEEE has developed standards for

mobile BWA (IEEE 802.16e) popularly referred to as mobile

WiMAX . The channel interleaver employed in the WiMAX

transreceiver plays a vital role in minimizing the effect of burst

error.

The work in Conventional process demonstrates the

grouping of incoming data streams into the block to reduce the

frequency of memory access in a deinterleaver using a conventional

look-up table (LUT) based CMOS address generator for WiMAX.

OBJECTIVE:

A low-complexity and novel technique is proposed to

efficiently implement the address generation circuitry of the

2-D deinterleaver used in the WiMAX transreceiver using the

Xilinx Spartan-3 field-programmable gate array (FPGA).

A simple algorithm along with its mathematical

background developed which eliminates the requirement of

floor function and thereby allows low-complexity FPGA

implementation.

 

EXISTING METHOD:Wi-Fi technology may be used to provide Internet access to

devices that are within the range of a wireless network that is

connected to the Internet. The coverage of one or more

interconnected access points (hotspots) can extend from an area

as small as a few rooms to as large as many square kilo meters.

Wi-Fi allows cheaper deployment of (LANs). Also spaces

where cables cannot be run, such as outdoor areas and

historical buildings, can host wireless LANs.

Manufacturers are building wireless network adapters into

most laptops.

 

WiMAX:

WiMAX stands for worldwide interoperability for microwave access.

WiMAX refers to broadband wireless networks that are based on the IEEE 802.16 standard which ensures compatibility and interoperability between broadband wireless access equipment.

WiMAX, which will have a range of up to 31 miles.

BLOCK DIAGRAM OF WiMAX:

INTERLEAVER/DEINTERLEAVER:

Interleaving is a technique commonly used in communication systems to overcome correlated channel noise such as burst error or fading. The interleaver rearranges input data such that consecutive data are spaced apart. At the receiver end, the interleaved data is arranged back into the original sequence by the deinterleaver. As a result of interleaving, correlated noise introduced in the transmission channel appears to be statistically independent at the receiver and thus allows better error correction.

STRUCTURE:

PROPOSED METHOD:

The use of an internal multiplier of FPGA and the sharing of resources for quadrature phase-shift keying, 16-quadrature-amplitude modulation (QAM), and 64-QAM modulations along with all possible code rates makes our approach to be novel and highly efficient when compared with conventional look-up table-based approach.

PROPOSED ALGORITHM: kn,QPSK= {d∗i + j for∀j and∀i Kn,16-QAM= d*i+j for j%2=0 and for ∀ I d ∗ (i + 1) + j for j%2 = 1 and for i%2 = 0 d ∗ (i − 1) + j for j%2 = 1 and for i%2 = 1 kn,64-QAM= d ∗ i + j for j%3 = 0 and for ∀ i d ∗ (i − 2) + j for j%3 = 1 and for i%3 = 2 d ∗ (i + 1) + j for j%3 = 1 and for i%3 = 2 d ∗ (i + 2) + j for j%3 = 2 and for i%3 = 0 d ∗ (i − 1) + j for j%3 = 2 and for i%3 = 0

ADVANTAGES:

Minimum propagation delay.

Circuitry uses very few FPGA resources.

Reduced interconnection delay inside FPGA.

APPLICATIONS:

It can provide broadband connectivity over large coverage area as compared to 802.11 standard.

WiMAX supports personal broadband services on both fixed and mobile settings because of its high spectral efficiency and wide channelization as well as the advanced antenna technologies.

It serves as a backbone for Wi-Fi for connectivity to the Internet.

CONCLUSION: Using low complexity and novel technique that is proposed we can implement the address generation circuitry of the 2-D deinterleaver.

REFERENCES:

A survey on mobile WiMAX,” IEEE Commun. Mag.vol. 45, no. 12, pp. 70–75, Dec. 2007.

2D realization of WiMAX channel interleaver for efficient hardware implementation. in Proc. World Acad. Sci. Eng. Technol., Hong Kong, 2009, vol. 51, pp. 25–29.