electrical engineering ph.d. qualifying...

University of Nevada, Las Vegas

Electrical Engineering Ph.D. Qualifying Exam

ECE Spring 2014

University of Nevada, Las Vegas

Ph.D. Qualifying Exam

Electrical Engineering

Ph.D. Qualifying Exam: Electrical Engineering

Date: March 24th, 2014 Time: 8:30-12:30

Location:

SEB 2251

Name (Print): __________________________________________________

Student L #: ___________________________________________________

Signature: _____________________________________________________

Assigned Code Number: __________________________________________

Area Examiner Grade (Pass/Fail)

1 Communications Dr. E. Saberinia

2 Control Systems Dr. S. Singh

3 Electromagnetics and Optics Dr. R. Schill Jr

4 Electronics Dr. J. Baker

5 Power Dr. Y. Baghzouz

6 Signal Processing Dr. B. Morris

7 Solid State Dr. B. Das

8 Digital Logic Design Dr. H. Selvaraj

9 Computer Architectures and Organization Dr. M. Yang

10. Digital Electronics and VLSI Dr. M. Venkatesan

11. Computer Communication Networks Dr. S. Latifi

Overall:

PhD E.E. Qualifying Exam – Spring 2014

Note to Proctor:

Allow the examinee to read this cover sheet before beginning the exam. Please verify item

No.# 10 with each student.

READ ALL INSTRUCTIONS ON THIS SHEET BEFORE BEGINNING THE

QUALIFYING EXAM !!!!

1. This is a four (4) hour exam.

2. This exam is divided into and covers eleven different fields in Electrical and Computer Engineering: Communications; Control Systems; Electromagnetics and Optics; Electronics; Power Systems; Signal Processing; Solid State Electronics, Materials and Devices; Digital Logic Design; Computer Architectures and Organization; Digital Electronics and VLSI, and Computer Communication Networks.

3. To pass this exam, you must pass at least four of the eleven areas. Time allowing, you are encouraged to work on as many areas as possible. But keep in mind, a pass in any one area may require that you successfully attempt and/or solve all problems in a single area.

4. To manage your time, allow no more that one hour for any one area. If you have extra time, feel free to spend it on any aspect of the exam.

5. This is a closed book, closed notes exam.

6. All work is to be performed on the pages provided. You may use the reverse side of the pages supplied if more space is needed. Show all work.

7. You may un-staple the exam once you receive it but you are responsible for re-stapling sheets upon completion of the exam. Do not ask the proctor to staple it for you. All responsibility for submitting the entire exam lies with the examinee. It will be assumed if no acknowledgment is provided that all sheets have been submitted and will be graded accordingly.

8. Show all work. Address the questions as stated. If you believe that a problem is ill posed, state your reasons (justify why the problem is ill posed) and continue on with the rest of the exam. Being able to identify when a problem is not solvable is just as important as solving one that is solvable.

9. Please take this time to briefly look through the exam and decide which areas of the exam you would like to begin working on.

10. COUNT THE NUMBER OF PAGES OF THE EXAM AND VERIFY WITH THE PROCTOR THAT YOUR PACKET CONTAINS THE ENTIRE EXAM.

Communications By Dr. E. Saberinia

ECE Department, Qualifying Exam, SPRING 2014

Problem Sheet

Problem 1

Consider a digital communication system where we sent ( )cos(2 4)cp t f t k for k=0,1,2, ..7

and p(t) is given by:

5 0 10( )

0

t sp t

else

a) How many bits can be sent with one symbol? Write a mapping from bits to symbols for this sytem.

b) What is the bit rate of this communication system? c) If bits are equally likely to be “0” or “1” what is the average transmitted power? d) Discuss how much bandwidth this signal occupies. e) Describe a receiver to demodulate this signal at the receiver where the received signal

is equal to the transmitted signal plus white Gaussian noise with power spectral density

equal to 0

2

N.



Solution Sheet 1



Solution Sheet 2



Solution sheet 3

Control By Dr. S. Singh


Problem Sheet

Please show your derivation.

Problem 1

(1) Consider a negative feedback system for which the loop transfer function is

Show the computation for mapping each portion of the Nyquist path and sketch the Nyquist diagram. Using Nyquist criterion, examine the stability of the closed-loop system. Problem 2

Consider a negative feedback system with the loop transfer function

Determine the angles of departure from the open-loop poles, asymptote angles, the centroid, and the equation which determines the breakaway points. Sketch the root locus. [Note: The jω− crossing point using Routh-Hurwitz method is not required unless you have time.]



Solution Sheet 1



Solution Sheet 2



Solution Sheet 3



Solution Sheet 4

Electromagnetics and Optics By Dr. R. Shill, Jr.


Problem Sheet

Problem 1 of 1

The propagation coefficient for a slab (Region 2) of lossy

material d thick is to be determined from the experimental

measurements. Assume that the planar surfaces of the

material extends to infinity for both x and y and the normal of

the surfaces points in the z direction. External to the slab is

free space (Regions 1 and 3). The slab is lossy enough that

multiple reflections may be neglected. [For clarity, only a

positive propagating wave exits in the slab at the 1-2

interface. At the 2-3 interface in region 2, both an incident

and a reflected wave exist in the slab (Region 2)]. Starting from the x polarized plane wave

solution for the three regions as given below [ jj and are respectively the propagation coefficient

and the intrinsic impedance of the jth region], determine an expression for the propagation

coefficient, 2 , in region 2 in terms of known quantities. The following measured values are

known: .,,, 311

xxxi EandEE Here, i is the angular frequency of the incident wave launched

in Region 1 in the +z direction. [NOTE: Show all work. Procedure is more important than the final

answer.]

xj

z

xj

j

z

xj

yj

z

xj

z

xjxj

E

eEeEzH

eEeEzE

jj

jj

2

1

VECTOR DERIVATIVES

Cartesian Coordinates (x,y,z)

A A x A y A z

V xV

xy

V

yz

V

z

AA

x

A

y

A

z

A xA

y

A

zy

A

z

A

xz

A

x

A

y

VV

x

V

y

V

z

x y z

x y z

z y x z y x

2

2

2

2

2

2

2



Cylindrical Coordinates (r,z)

A A r A A z

V rV

r r

Vz

V

z

Ar

rA

r r

A A

z

A rr

A A

z

A

z

A

rz

r

rA

r

A

Vr r

rV

r

r z

r z

z r z r

1

1 1

1 1

12

12

2

2

2

2r

V V

z

Spherical Coordinates (r,)

A A r A A

V rV

r r

V

r

V

Ar

r A

r r

A

r

A

A rr

A A

r

A rA

r r

rA

r

A

r

r

r r

sin

sin

sin

sin

sin

sin

sin

1 1

1 1 1

1 1 1 1

2

2

2

2

2

2 2 2

2

2

1 1 1V

r rr

V

r r

V

r

V

sinsin

sin

COORDINATE TRANSFORMATIONS

From Rectangular (x,y,z) to Cylindrical (r,,z) and Cylindrical to Rectangular

zz

x

y

yxr

zz

yx

yxr

1

22

tan

ˆˆ

ˆcosˆsinˆ

ˆsinˆcosˆ

zz

ry

rx

zz

ry

rx

sin

cos

ˆˆ

ˆcosˆsinˆ

ˆsinˆcosˆ



From Rectangular (x,y,z) to Spherical (r,) and Spherical to Rectangular

x

y

z

yx

zyxr

yx

zyx

zyxr

1

221

222

tan

tan

ˆcosˆsinˆ

ˆsinˆsincosˆcoscos,ˆ

ˆcosˆsinsinˆcossin,ˆ

sin

cos

sinsin

cossin

,ˆsin,ˆcosˆ

ˆcos,ˆsincos,ˆsinsinˆ

ˆsin,ˆcoscos,ˆcossinˆ

22 ryx

rz

ry

rx

rz

ry

rx

From Cylindrical (rc,,z) to Spherical (rs,) and Spherical to Cylindrical

z

r

zrr

zr

zrr

c

cs

c

cs

1

22

tan

ˆˆ

ˆsinˆcos,ˆ

ˆcosˆsin,ˆ

cos

sin

,ˆsin,ˆcosˆ

ˆˆ

,ˆcos,ˆsinˆ

s

sc

s

sc

rz

rr

rz

rr

ELECTROSTATIC EQUATION LIST



F q E D

Eq

Rr P

x Cq

V

V E dl RV

IE V J E

D dS q J qnv

W qV W E DdV VdV

V F W

dq dl dS dV I J

v

o

bv

enc

e

q

l s V

2 2 2

2

1

12

2 12

0

9

2

4

1

3610

1

2

1

2

dS

Vq

RJ dS

dq

dt

D E P Jt

q x

o

o

v

4

16 10 19

.

ddrdrdzrdrddV

rdrddrdrrddrzrdrddrdzrdzrdSd

drrdrdrzdzrdrdrld

rSphericalzrlCylindrica

sin

ˆ;ˆsin;̂sinˆ;ˆ;̂

ˆsinˆˆˆˆˆ

),,(),,(

2

2



MAGNETOSTATIC EQUATION LIST

V

m

S

m

roo

b

V

C

enc

m

VSC

dVHBW

rr

mrB

r

rmA

SIdmd

IM

IL

SdB

HM

HMHB

MrJ

rJrA

r

dVrJrA

AB

ILdH

JH

B

BvqF

r

rdVrJ

r

rdSrK

r

rLdrIrB

dVJdSKLId

2

1

ˆsinˆcos24

4

ˆ

4

0

ˆ

4

ˆ

4

ˆ

4)(

3

2

1

1212

2112

22

2

21

1112

2

21

21111

2

21

21111

2

21

2111122

1

111



ELECTRODYNAMIC FIELD RELATIONS

scsc

vvs

z

o

o

ttrrii

zbo

zao

nrbnra

d

c

Sddt

DdJldHSdB

dt

dldE

dVEJdVHBEDt

SdHE

xx

eE

Ez

dd

ddor

djd

djdzZ

dj

dj

djd

djdd

kkk

eEeEzE

erEerErE

J

J

fSWR

xxx

xxx

jj

j

jj

BvqEqFBDt

DJH

t

BE

2

1

2

1

10410854.8

~

sinhcosh

sinhcosh

sincos

sincos

tan

tan

sincos

sincos

sinsinsin

tan1

1

1

8

3

2

111

8

1

2

111

12

2

1

11

0

70

120

2

1211

11121

1211

11121

121

1121

1211

11121

ˆ0

ˆ0

2

2

21

21



Solution Sheet 1



Solution Sheet 2



Solution Sheet 3

Electronics By Dr. J. Baker


Problem Sheet

Problem 1 of 1

For the differential amplifier (diff-amp) seen below calculate, assuming VDD = 5 V, VTHN = 800 mV, VTHP = 900

mV, KPn = 120 uA/V2, KPP = 40 uA/V

2, n = 0.01 V

-1, and p = 0.02 V

-1:

a) The DC currents and voltages when VCM is VDD/2.

b) The gain of the diff-amp. Be very clear about the directions of the AC drain currents flowing in the

diff-amp.

c) The input voltage common-mode range, CMR, (specify the maximum input CMR in terms of the

output voltage).

d) The amplifier’s 3-dB frequency and the frequency when the gain is one (the unity-gain frequency, fun

).

e) Estimate the diff-amp’s slew-rate limitations (both directions).

All devices are 10u/1u

vin, 1 mV at 1 kHz

VDD

15 A

VDD VDD

VCM

vout

10 pF

100k

All devices are 10u/1u

vin, 1 mV at 1 kHz

VDD

15 A

VDD VDD

VCM

vout

10 pF

100k



Solution Sheet 1



Solution Sheet 2

Power By Dr. Y. Baghzouz


Problem Sheet

Problem 1

A single-phase 2-winding power transformer is rated at 5 KVA, 60 Hz, 480V/120V. Its series

impedance is 0.01 +j0.05 p.u. It is also known that its excitation current is equal 0.03 pu (or 3%)

and its core loss is equal to 40 W. Find the following:

1. The Ohmic value of the series impedance when referred to the secondary side

2. The transformer shunt impedance (i.e. core loss resistance and magnetizing reactance)

when referred to the secondary side

3. Assume that the transformer operates at full load with unity power factor and the secondary

voltage is at rated value. Calculate the transformer efficiency.

4. What is the transformer voltage regulation under the above condition?

5. Under what load with unity power factor (i.e., purely resistive) the transformer operates at

maximum efficiency? What is the optimal efficiency value?

Problem 2

An electrician is planning to connect two motors (one for the pool pump and one for the spa pump)

to a 240 V circuit. One motor is rated at 1.5 hp, and the other is rated at 1 hp. It is also known that

both motors are running at full power with an efficiency of 80% and a power factor of 75%.

1. Calculate the source current

2. A the installation of a capacitor bank that is rated at 240V and 1.5 kVAR will result in an

overall power factor of

3. The minimum source current that can be achieved with shunt capacitors is nearly equal to

4. Determine the cost/day if both motors run for 6 hours, and the cost of electric energy is

$0.13/kWh.



Solution Sheet 1



Solution Sheet 2



Solution Sheet 3



Solution Sheet 4

Signal Processing By Dr. B. Morris


Problem Sheet

Processing Table 1: z-Transform Pairs

Other useful equations



Problem Sheet

Two problems- 23 points

Problem 1 (10 points) Sampling. Consider the following system;

Assume that Xa(f)=0 for |f| > 1/Ts and that

What is the relationship between the output DT signal y(n) and input signal xa(t) (give y(n) in terms

of xa(t)).

Problem 2: (23 points) Structures. Consider the following signal flow graph of a causal system

a. (3 points) Using the node variables indicated, write the set of difference equations

represented by this flow graph.

b. (1 point) What is the difference equation that implements this system.

c. (1 point) What is the name of this structure?

d. (2 points) Draw the pole/zero plot. What type of filter is this? (Lowpass, high-pass,

bandpass, etc.).

e. (2 points) Is the system stable? Explain.

f. (4 points) Draw a cascade implementation using 1st -order sections realized in DFII. You

must consider numerical effects when pairing and ordering your cascade.

g. (5 points) Draw a parallel implementation using 1st -order sections realized in DFII.

h. (3 points) What is the impulse response h[n] of the system.

i. (2 points) Assuming a stable system, which structure would you select to implement the

filter in fixed precision? Why?



Solution Sheet 1



Solution Sheet 2



Solution Sheet 3

Solid State By Dr. B. Das


Problem Sheet

Problem 1

A silicon step junction diode maintained at room temperature under equilibrium conditions has a P-

side doping of NA = 1.5 x 1015

/cm3 and N-side doping of ND = 2.2x10

18/cm

3. The cross-sectional

area of the diode is 2x10-3

cm2.

Calculate the following :

(a) built-in potential Vbi

(b) the diode current for a forward bias voltage of 0.73 volt.

(c) the diode current for a reverse bias voltage of 5.5 volt.

(d) sketch the energy band diagram of the diode

(i) under equilibrium (zero bias),

(ii) under forward bias

(iii) under reverse bias

Problem 2

An NPN bipolar transistor has the following doping concentrations :

Emitter : ND = 5x1018

/cm3.

Base : NA = 2.5 x 1017

/cm3 .

Collector : ND = 1x1016

/cm3.

The cross-sectional area of the transistor is 2x10-3

cm2.

(i) Caluclate the built-in potential Vbi for the Base-Emitter junction.

(ii) Calculate emitter current IE for VBE = 0.7 volts.

(iii) Calculate the collector current IC for transistor β = 100.

Si parameters at room temperature

ni = 1.5 x 1010

/cm3

KS = 12

µn = 1,450 cm2/V-S µp = 450 cm

2/V-S

τn = 10-6

sec. τp = 10-6

sec.



Useful Formulas

EF – Ei = kT ln(n/ni)

ρ = 1/q(µnn + µpp)

Solution Sheet 1

Physical Constants

kT/q = 26 mV at 300K

q = 1.6 x 10-19

C

m0 = 9.1 x 10-31

kg

ε0 = 8.85 x 10-14

F/cm



Solution Sheet

Digital Logic Design By Dr. H.Selvaraj


Problem Sheet

Problem 1

Design a 4:1 MUX (multiplexer with four data inputs and two control inputs) using three 2:1

MUX (multiplexer with two data inputs and one control input).

Problem 2

A sequence detector accepts as input a string of bits: either 0 or 1. Its output goes to 1 when a

target sequence has been detected, otherwise remains at 0. Design a sequence detector to

detect the sequence of 0111. Use JK flip-flops and Mealy machine.



Solution Sheet 1



Solution Sheet 2

Computer Organization and Architectures

By Dr. M.Yang


Two Problems

Problem 1

Assume that in a certain byte-addressed machine all instructions are 32 bits long. The operand

size of B and W is byte and word (2 bytes), respectively. Assume the program counter and

registers are all in 16-bit width. The data stored in memory follows little-endian word-ordering.

The initial state of the machine is as listed below:

Address Value

PC 100

R0 200

R1 300

100 0x1A5B

104 200

108 300

200 400

300 500

500 600

a) Fill in the following table, assuming that each statement executes from the initial state

defined above.

Instruction Addressing Mode Value of R0 after execution

LOAD.W R0, #100 Immediate

LOAD.W R0, 300 Direct

LOAD.W R0, (100) Indirect

LOAD.W R0, R1 Register

LOAD.W R0, [R1] Register indirect

LOAD.W R0, -100[R1] Based

LOAD.W R0, 100[PC] Relative

b) Assuming A0=101, consider the following two statements executed in sequence.

LOAD.B [A0], #0x02

LOAD.W R0, –[A0]

What is R0’s value in decimal?

Solution:


By Dr. M.Yang


Problem 2

The figure bellow shows the 1-bus SRC microarchitecture with control signals and 2-bus SRC

microarchitecture.

a) The SRC instruction set includes the NEG instruction, which computes the arithmetic

2’s complete negation of a register operand. Assume that the NEG operation is not in

the set of operations the ALU can perform. Develop the concrete RTN and the control

sequence to implement the NEG instruction for the 2-bus design.

b) Calculate the minimum clock period for the 1-bus and 2-bus designs. Assume the

control unit delay of 8 ns, gate delay of 2 ns, bus propagation of 5ns, latch propagation

of 2ns. The register file involves 6-gate delay and the control unit involves 4-gate and 1

latch delay. Assume a 25% increase in clock periods as a safety factor.

c) Using the clock periods from (b), calculate the speedup to be expected for the 2-bus

design. Assume that all instructions of the 1-bus design will execute 8 clock cycles and

all instructions of the 2-bus design will execute in 7 clock cycles.


By Dr. M.Yang


Solution for Problem 2:

Digital Electronics and VLSI By Dr. V.Muthukumar


Problem Sheet

Answer all three questions. To pass you need to collect 15 points

Problem 1 [10 points]

A typical CMOS inverter has VDD = 2.5 V, VSS =0 V, (W/L)N =4/1, and (W/L)P =10/1. A) What are

the values of VH and VL for this inverter? Use Kn′ =100uA/V2, Kp

′ =40uA/V2,VTN =0.6V, and VTP =

−0.6V. B) Draw the VTC to scale. C) Determine the VH and VL for a 3-input NAND gate with (W/L)N =4/1, and (W/L)P =5/1.


Design a symmetrical CMOS reference inverter to provide a delay of 1 ns when driving a 10-pF

load. Assume VDD = 3.3 V and VT N = −VT P = 0.75 V. Use Kn′ =100uA/V2,Kp

′ =40uA/V2.


Realize the NMOS and CMOS implementation of Y = A + BC + B D. Derive the (W/L)s of the transistors equivalent to the (W/L)N =4/1, and (W/L)P =10/1 reference inverters.

Useful Formulae:



Solution Sheet 1



Solution Sheet 2



Solution Sheet 3

Computer Networks By Dr. S.Latifi


Problem Sheet

Select any two out of three problems

Problem 1: Explain the limitations and shortcomings associated with the 802.3 protocol. How these issues are addressed in the 802.4 and 802.5 protocols? Problem 2: Suppose there are 4 stations A, B, C and D which work based on the CDMA protocol.

The chip sequences for A, B, C, D are obtained from the rows of a Walsh‐Hadamard matrix W4 (4 bits/chip). Suppose A intends to send a bit "0" to C. At the same time B intends to send a "1" to D. Show the composite signal on the cable and how C and D can correctly decipher

the bits from the received signal. Hint: W1=[0] in Walsh‐Hadamard matrices. Higher dimensions are constructed recursively. Problem 3: There is a communication network which is characterized by the M/M/1 queue. The messages arrive at the rate of 5 messages/s and get processed and transmitted at the rate of 8 messages/s. What is the probability that there is no message in the buffer? What is the Utilization factor? Derive the average number of messages in the buffer (N) and the average delay (T) that is experienced by each message.



Solution Sheet 1



Solution Sheet 2

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