US. Patent 6,290,830. Sept. 18, 2001

A.d Kaylo and N.D. McMurdie,

assignors to PPG Industries Ohio,

Inc., Cleveland

A process for electrodepositing a substantially smooth film upon a surface of an electroconductive substrate, the process comprising passing electric current to cause a substantially continuous film to deposit upon the electroconduc- tive substrate, in the absence of a microorganism control agent and which upon the addition of a microorganism control agent mix- ture of 5-chloro-2-methyl-4-isoth- iazolin-3-one and 2-methyl-4- isothiazolin-3-one electrodeposits on the electroconductive sub- strate as a comparatively rougher film, and wherein at least a por- tion of the microorganism control agent mixture of 5-chloro-2- methyl-4-isothiazolin-3-one and 2-methyl-4-isothiazolin-3-one is replaced by an aliphatic hydro- carbon material selected from the group consisting of halonitroalka- nes, halonitroalkenes, and mix- tures thereof resulting in an elec- trodepositable composition that electrodeposits on the electrocon- ductive substrate as a substan- tially smooth film.

COMPOSITE COATING HAVING A POLYCHROMATlC EFFECT US. Patent 6,291,018. Sept. 18,200l

VP Dattilo, assignor to PPG

Industries Ohio Inc., Cleveland

A method of forming a composite coating having a polychromatic effect over a substrate comprising applying a first liquid basecoat material over a surface of the sub- strate; exposing the first liquid basecoat material to air having a temperature from 50 to 9O”F, a relative humidity of 40 to 80%, and an air velocity at the surface of 20 to 150 fpm for 10 to 180 sec- onds to set the first basecoat material; and applying a second liquid basecoat material over the

first basecoat material by at least one bell applicator to form a com- posite coating, the second basecoat material comprising effect pigment such that the com- posite coating has a polychromat- ic effect.

PROCESS FOR TRBATING METAL VS. Patent 6,291,020. Sept. 18,200l

JI. Melzer and R.J Sujdak, assig-

nors to Betzdearborn Inc., Trevose,

Pa.

A method of forming a hydrophilic coating on a metal surface comprising contacting with a substantially silane-free and chromium-free aqueous solu- tion containing at least 1 g/L of a cationic polymer having a charge density of 1.5 to 12.0 and a molec- ular weight between 1,000 and 600,000, and at least 2 g/L of an alkaline aqueous silicate.

COATING OF METAL TUBES AND CABLES US. Patent 6,291,024. Sept. IS,2001

M. Deroch et al., assignors to Elf

Atochem S.A., Puteaux, France

A process for producing a coating on a metal surface, which coating compris- es at least one layer of polyurethane, one layer of thermoplastic polymer, and a binder between the polyurethane layer and the thermo- plastic polymer layer.

DRYING AND CURING PRIMER COATINGS US. Patent 6,291,027. Sept. 18,200l

D.d Emch, assignor to PPG

Industries Ohio Inc., Cleveland

A process for coating a metal sub- strate comprising applying a liq- uid organic, polymeric basecoat- ing composition; exposing the basecoating composition to air at 10 to 35°C for a period of at least about 30 seconds to volatilize a portion of volatile material; applying infrared radiation at a power density of about 25 kilo- watts per square meter or less

and warm air simultaneously to the basecoating composition for a period of at least 30 seconds; and applying a liquid topcoating com- position over the dried basecoat.

THIN ELECTROFORMED COPPER FOIL US. Patent 6,291,080. Sept. 18,200l

C.B. Yates and G. Gaskill, assignors

to Yates Foil USA Inc., Bordentown,

NJ

An elongated web of electrode- posited copper foil produced on a rotating cathode drum machine, comprising a central web portion extending along the length of the web; and two edge portions extending along the length of the web, one on either side of the cen- tral portion, wherein the central portion has an average thickness and the edge portions each have an average thickness greater than the average thickness of the central portion.

ELECTRODEPOSITED COPPER FOIL US. Patent 6,291,081. Sept. 18, 2001

H. Kurabe et al., assignors to Mitsui

Mining & Smelting Co. Ltd., Tokyo

A process for producing an elec- trodeposited copper foil with its surface prepared comprising sub- jecting an electrodeposited copper foil having a shiny side and a matte side whose average surface roughness is in the range of 2.5 to 10 mm to a first mechanical pol- ishing so that the average surface roughness of the matte side is in the range of 1.5 to 6 m m, and sub- jecting the matte side having undergone the first mechanical polishing to at least one further mechanical polishing so that the average surface roughness of the matte side is in the range of 1.0 to 3.0 mm, wherein the matte side having undergone at least the second mechanical polishing in a counter direction of the first pol- ishing direction has is surface

90 Metal Finishing

substantially without shelf- shaped deformation.

STEEL PRODUCT WlTH PLATING LAYERS US. Patent 6,291,083. Sept. 18, 2001

S. Wada, assignor to Sanoh Kogyo

KK, Ibaraki-Ken, Japan

A plated steel product comprising a base member made of steel; a nickel plating layer formed over a surface of the base member; a cop- per plating layer formed on the nickel plating layer; and a zinc- nickel alloy plating layer formed on the copper plating layer.

US. Patent 6,291,138. Sept. 18,200l

X. Wu et al., assignors to Headway

Technologies, Inc., Milpitas, Calif

A method for forming a magnetic

MASKING FKAME PLATING MEtHOD

pole tip stack layer wherein each layer has enhanced planarity, uniformity, and dimensional con- trol comprising forming over the substrate a masking frame, where the masking frame is fabri- cated to provide an overhang of an upper portion of the masking frame spaced further from the substrate with respect to a lower portion of the masking frame spaced closer to the substrate; and plating the masking frame plated magnetic pole tip stack layer within the masking frame.

U.S. Patent 6,291,332. Sept. 18, 2001

A.S. Yu and F!J Steffan, assignors to

Advanced Micro Devices Inc.,

Sunnyvale, Calif:

ELECTROLESS PLATED SEMICONDUCTOR VIAS AND CHANNELS

A method of manufacturing a semiconductor device comprising providing a semiconductor sub- strate with a dielectric layer formed thereon, wherein the dielectric layer overlays a region on the semiconductor substrate; forming an opening in the dielec- tric layer, the opening defined by walls of the dielectric layer; form- ing a seed layer over the dielectric layer and in the opening, includ- ing along the walls, the seed layer formed to a thickness insufficient to fill the opening; forming a resist over the seed layer, the resist formed to a thickness suff- cient to fill the opening; removing the resist outside the opening; removing the seed layer outside the opening whereby the opening containing the resist retains the seed layer; removing the resist

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